30364 lines
1.1 MiB
30364 lines
1.1 MiB
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STM32Display.elf: file format elf32-littlearm
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Sections:
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Idx Name Size VMA LMA File off Algn
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0 .isr_vector 0000010c 08000000 08000000 00010000 2**0
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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1 .text 0000c530 08000110 08000110 00010110 2**4
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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2 .rodata 00002bf0 0800c640 0800c640 0001c640 2**3
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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3 .ARM.extab 00000000 0800f230 0800f230 00020208 2**0
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CONTENTS
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4 .ARM 00000000 0800f230 0800f230 00020208 2**0
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CONTENTS
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5 .preinit_array 00000000 0800f230 0800f230 00020208 2**0
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CONTENTS, ALLOC, LOAD, DATA
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6 .init_array 00000004 0800f230 0800f230 0001f230 2**2
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CONTENTS, ALLOC, LOAD, DATA
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7 .fini_array 00000004 0800f234 0800f234 0001f234 2**2
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CONTENTS, ALLOC, LOAD, DATA
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8 .data 00000208 20000000 0800f238 00020000 2**2
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CONTENTS, ALLOC, LOAD, DATA
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9 .bss 0000203c 20000208 0800f440 00020208 2**2
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ALLOC
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10 ._user_heap_stack 00000604 20002244 0800f440 00022244 2**0
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ALLOC
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11 .ARM.attributes 00000029 00000000 00000000 00020208 2**0
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CONTENTS, READONLY
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12 .debug_info 00023c66 00000000 00000000 00020231 2**0
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CONTENTS, READONLY, DEBUGGING
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13 .debug_abbrev 00004e05 00000000 00000000 00043e97 2**0
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CONTENTS, READONLY, DEBUGGING
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14 .debug_aranges 00001da0 00000000 00000000 00048ca0 2**3
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CONTENTS, READONLY, DEBUGGING
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15 .debug_ranges 00001b88 00000000 00000000 0004aa40 2**3
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CONTENTS, READONLY, DEBUGGING
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16 .debug_macro 0001aea4 00000000 00000000 0004c5c8 2**0
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CONTENTS, READONLY, DEBUGGING
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17 .debug_line 00018337 00000000 00000000 0006746c 2**0
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CONTENTS, READONLY, DEBUGGING
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18 .debug_str 00085fd5 00000000 00000000 0007f7a3 2**0
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CONTENTS, READONLY, DEBUGGING
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19 .comment 0000007b 00000000 00000000 00105778 2**0
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CONTENTS, READONLY
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20 .debug_frame 000084e8 00000000 00000000 001057f4 2**2
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CONTENTS, READONLY, DEBUGGING
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Disassembly of section .text:
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08000110 <__do_global_dtors_aux>:
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8000110: b510 push {r4, lr}
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8000112: 4c05 ldr r4, [pc, #20] ; (8000128 <__do_global_dtors_aux+0x18>)
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8000114: 7823 ldrb r3, [r4, #0]
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8000116: b933 cbnz r3, 8000126 <__do_global_dtors_aux+0x16>
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8000118: 4b04 ldr r3, [pc, #16] ; (800012c <__do_global_dtors_aux+0x1c>)
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800011a: b113 cbz r3, 8000122 <__do_global_dtors_aux+0x12>
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800011c: 4804 ldr r0, [pc, #16] ; (8000130 <__do_global_dtors_aux+0x20>)
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800011e: f3af 8000 nop.w
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8000122: 2301 movs r3, #1
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8000124: 7023 strb r3, [r4, #0]
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8000126: bd10 pop {r4, pc}
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8000128: 20000208 .word 0x20000208
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800012c: 00000000 .word 0x00000000
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8000130: 0800c628 .word 0x0800c628
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08000134 <frame_dummy>:
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8000134: b508 push {r3, lr}
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8000136: 4b03 ldr r3, [pc, #12] ; (8000144 <frame_dummy+0x10>)
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8000138: b11b cbz r3, 8000142 <frame_dummy+0xe>
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800013a: 4903 ldr r1, [pc, #12] ; (8000148 <frame_dummy+0x14>)
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800013c: 4803 ldr r0, [pc, #12] ; (800014c <frame_dummy+0x18>)
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800013e: f3af 8000 nop.w
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8000142: bd08 pop {r3, pc}
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8000144: 00000000 .word 0x00000000
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8000148: 2000020c .word 0x2000020c
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800014c: 0800c628 .word 0x0800c628
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08000150 <__aeabi_drsub>:
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8000150: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000
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8000154: e002 b.n 800015c <__adddf3>
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8000156: bf00 nop
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08000158 <__aeabi_dsub>:
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8000158: f083 4300 eor.w r3, r3, #2147483648 ; 0x80000000
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0800015c <__adddf3>:
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800015c: b530 push {r4, r5, lr}
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800015e: ea4f 0441 mov.w r4, r1, lsl #1
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8000162: ea4f 0543 mov.w r5, r3, lsl #1
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8000166: ea94 0f05 teq r4, r5
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800016a: bf08 it eq
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800016c: ea90 0f02 teqeq r0, r2
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8000170: bf1f itttt ne
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8000172: ea54 0c00 orrsne.w ip, r4, r0
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8000176: ea55 0c02 orrsne.w ip, r5, r2
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800017a: ea7f 5c64 mvnsne.w ip, r4, asr #21
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800017e: ea7f 5c65 mvnsne.w ip, r5, asr #21
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8000182: f000 80e2 beq.w 800034a <__adddf3+0x1ee>
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8000186: ea4f 5454 mov.w r4, r4, lsr #21
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800018a: ebd4 5555 rsbs r5, r4, r5, lsr #21
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800018e: bfb8 it lt
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8000190: 426d neglt r5, r5
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8000192: dd0c ble.n 80001ae <__adddf3+0x52>
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8000194: 442c add r4, r5
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8000196: ea80 0202 eor.w r2, r0, r2
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800019a: ea81 0303 eor.w r3, r1, r3
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800019e: ea82 0000 eor.w r0, r2, r0
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80001a2: ea83 0101 eor.w r1, r3, r1
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80001a6: ea80 0202 eor.w r2, r0, r2
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80001aa: ea81 0303 eor.w r3, r1, r3
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80001ae: 2d36 cmp r5, #54 ; 0x36
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80001b0: bf88 it hi
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80001b2: bd30 pophi {r4, r5, pc}
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80001b4: f011 4f00 tst.w r1, #2147483648 ; 0x80000000
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80001b8: ea4f 3101 mov.w r1, r1, lsl #12
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80001bc: f44f 1c80 mov.w ip, #1048576 ; 0x100000
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80001c0: ea4c 3111 orr.w r1, ip, r1, lsr #12
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80001c4: d002 beq.n 80001cc <__adddf3+0x70>
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80001c6: 4240 negs r0, r0
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80001c8: eb61 0141 sbc.w r1, r1, r1, lsl #1
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80001cc: f013 4f00 tst.w r3, #2147483648 ; 0x80000000
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80001d0: ea4f 3303 mov.w r3, r3, lsl #12
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80001d4: ea4c 3313 orr.w r3, ip, r3, lsr #12
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80001d8: d002 beq.n 80001e0 <__adddf3+0x84>
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80001da: 4252 negs r2, r2
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80001dc: eb63 0343 sbc.w r3, r3, r3, lsl #1
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80001e0: ea94 0f05 teq r4, r5
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80001e4: f000 80a7 beq.w 8000336 <__adddf3+0x1da>
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80001e8: f1a4 0401 sub.w r4, r4, #1
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80001ec: f1d5 0e20 rsbs lr, r5, #32
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80001f0: db0d blt.n 800020e <__adddf3+0xb2>
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80001f2: fa02 fc0e lsl.w ip, r2, lr
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80001f6: fa22 f205 lsr.w r2, r2, r5
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80001fa: 1880 adds r0, r0, r2
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80001fc: f141 0100 adc.w r1, r1, #0
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8000200: fa03 f20e lsl.w r2, r3, lr
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8000204: 1880 adds r0, r0, r2
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8000206: fa43 f305 asr.w r3, r3, r5
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800020a: 4159 adcs r1, r3
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800020c: e00e b.n 800022c <__adddf3+0xd0>
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800020e: f1a5 0520 sub.w r5, r5, #32
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8000212: f10e 0e20 add.w lr, lr, #32
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8000216: 2a01 cmp r2, #1
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8000218: fa03 fc0e lsl.w ip, r3, lr
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800021c: bf28 it cs
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800021e: f04c 0c02 orrcs.w ip, ip, #2
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8000222: fa43 f305 asr.w r3, r3, r5
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8000226: 18c0 adds r0, r0, r3
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8000228: eb51 71e3 adcs.w r1, r1, r3, asr #31
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800022c: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000
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8000230: d507 bpl.n 8000242 <__adddf3+0xe6>
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8000232: f04f 0e00 mov.w lr, #0
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8000236: f1dc 0c00 rsbs ip, ip, #0
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800023a: eb7e 0000 sbcs.w r0, lr, r0
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800023e: eb6e 0101 sbc.w r1, lr, r1
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8000242: f5b1 1f80 cmp.w r1, #1048576 ; 0x100000
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8000246: d31b bcc.n 8000280 <__adddf3+0x124>
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8000248: f5b1 1f00 cmp.w r1, #2097152 ; 0x200000
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800024c: d30c bcc.n 8000268 <__adddf3+0x10c>
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800024e: 0849 lsrs r1, r1, #1
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8000250: ea5f 0030 movs.w r0, r0, rrx
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8000254: ea4f 0c3c mov.w ip, ip, rrx
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8000258: f104 0401 add.w r4, r4, #1
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800025c: ea4f 5244 mov.w r2, r4, lsl #21
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8000260: f512 0f80 cmn.w r2, #4194304 ; 0x400000
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8000264: f080 809a bcs.w 800039c <__adddf3+0x240>
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8000268: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000
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800026c: bf08 it eq
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800026e: ea5f 0c50 movseq.w ip, r0, lsr #1
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8000272: f150 0000 adcs.w r0, r0, #0
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8000276: eb41 5104 adc.w r1, r1, r4, lsl #20
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800027a: ea41 0105 orr.w r1, r1, r5
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800027e: bd30 pop {r4, r5, pc}
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8000280: ea5f 0c4c movs.w ip, ip, lsl #1
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8000284: 4140 adcs r0, r0
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8000286: eb41 0101 adc.w r1, r1, r1
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800028a: f411 1f80 tst.w r1, #1048576 ; 0x100000
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800028e: f1a4 0401 sub.w r4, r4, #1
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8000292: d1e9 bne.n 8000268 <__adddf3+0x10c>
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8000294: f091 0f00 teq r1, #0
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8000298: bf04 itt eq
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800029a: 4601 moveq r1, r0
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800029c: 2000 moveq r0, #0
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800029e: fab1 f381 clz r3, r1
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80002a2: bf08 it eq
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80002a4: 3320 addeq r3, #32
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80002a6: f1a3 030b sub.w r3, r3, #11
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80002aa: f1b3 0220 subs.w r2, r3, #32
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80002ae: da0c bge.n 80002ca <__adddf3+0x16e>
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80002b0: 320c adds r2, #12
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80002b2: dd08 ble.n 80002c6 <__adddf3+0x16a>
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80002b4: f102 0c14 add.w ip, r2, #20
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80002b8: f1c2 020c rsb r2, r2, #12
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80002bc: fa01 f00c lsl.w r0, r1, ip
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80002c0: fa21 f102 lsr.w r1, r1, r2
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80002c4: e00c b.n 80002e0 <__adddf3+0x184>
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80002c6: f102 0214 add.w r2, r2, #20
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80002ca: bfd8 it le
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80002cc: f1c2 0c20 rsble ip, r2, #32
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80002d0: fa01 f102 lsl.w r1, r1, r2
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80002d4: fa20 fc0c lsr.w ip, r0, ip
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80002d8: bfdc itt le
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80002da: ea41 010c orrle.w r1, r1, ip
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80002de: 4090 lslle r0, r2
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80002e0: 1ae4 subs r4, r4, r3
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80002e2: bfa2 ittt ge
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80002e4: eb01 5104 addge.w r1, r1, r4, lsl #20
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80002e8: 4329 orrge r1, r5
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80002ea: bd30 popge {r4, r5, pc}
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80002ec: ea6f 0404 mvn.w r4, r4
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80002f0: 3c1f subs r4, #31
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80002f2: da1c bge.n 800032e <__adddf3+0x1d2>
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80002f4: 340c adds r4, #12
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80002f6: dc0e bgt.n 8000316 <__adddf3+0x1ba>
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80002f8: f104 0414 add.w r4, r4, #20
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80002fc: f1c4 0220 rsb r2, r4, #32
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8000300: fa20 f004 lsr.w r0, r0, r4
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8000304: fa01 f302 lsl.w r3, r1, r2
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8000308: ea40 0003 orr.w r0, r0, r3
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800030c: fa21 f304 lsr.w r3, r1, r4
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8000310: ea45 0103 orr.w r1, r5, r3
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8000314: bd30 pop {r4, r5, pc}
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8000316: f1c4 040c rsb r4, r4, #12
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800031a: f1c4 0220 rsb r2, r4, #32
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800031e: fa20 f002 lsr.w r0, r0, r2
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8000322: fa01 f304 lsl.w r3, r1, r4
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8000326: ea40 0003 orr.w r0, r0, r3
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800032a: 4629 mov r1, r5
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800032c: bd30 pop {r4, r5, pc}
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800032e: fa21 f004 lsr.w r0, r1, r4
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8000332: 4629 mov r1, r5
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8000334: bd30 pop {r4, r5, pc}
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8000336: f094 0f00 teq r4, #0
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800033a: f483 1380 eor.w r3, r3, #1048576 ; 0x100000
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800033e: bf06 itte eq
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8000340: f481 1180 eoreq.w r1, r1, #1048576 ; 0x100000
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8000344: 3401 addeq r4, #1
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8000346: 3d01 subne r5, #1
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8000348: e74e b.n 80001e8 <__adddf3+0x8c>
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800034a: ea7f 5c64 mvns.w ip, r4, asr #21
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800034e: bf18 it ne
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8000350: ea7f 5c65 mvnsne.w ip, r5, asr #21
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8000354: d029 beq.n 80003aa <__adddf3+0x24e>
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8000356: ea94 0f05 teq r4, r5
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800035a: bf08 it eq
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800035c: ea90 0f02 teqeq r0, r2
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8000360: d005 beq.n 800036e <__adddf3+0x212>
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8000362: ea54 0c00 orrs.w ip, r4, r0
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8000366: bf04 itt eq
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8000368: 4619 moveq r1, r3
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800036a: 4610 moveq r0, r2
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800036c: bd30 pop {r4, r5, pc}
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800036e: ea91 0f03 teq r1, r3
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8000372: bf1e ittt ne
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8000374: 2100 movne r1, #0
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8000376: 2000 movne r0, #0
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8000378: bd30 popne {r4, r5, pc}
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800037a: ea5f 5c54 movs.w ip, r4, lsr #21
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800037e: d105 bne.n 800038c <__adddf3+0x230>
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8000380: 0040 lsls r0, r0, #1
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8000382: 4149 adcs r1, r1
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8000384: bf28 it cs
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8000386: f041 4100 orrcs.w r1, r1, #2147483648 ; 0x80000000
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800038a: bd30 pop {r4, r5, pc}
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800038c: f514 0480 adds.w r4, r4, #4194304 ; 0x400000
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8000390: bf3c itt cc
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8000392: f501 1180 addcc.w r1, r1, #1048576 ; 0x100000
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8000396: bd30 popcc {r4, r5, pc}
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8000398: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000
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800039c: f045 41fe orr.w r1, r5, #2130706432 ; 0x7f000000
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80003a0: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000
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80003a4: f04f 0000 mov.w r0, #0
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80003a8: bd30 pop {r4, r5, pc}
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80003aa: ea7f 5c64 mvns.w ip, r4, asr #21
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80003ae: bf1a itte ne
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80003b0: 4619 movne r1, r3
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80003b2: 4610 movne r0, r2
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80003b4: ea7f 5c65 mvnseq.w ip, r5, asr #21
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80003b8: bf1c itt ne
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80003ba: 460b movne r3, r1
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80003bc: 4602 movne r2, r0
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80003be: ea50 3401 orrs.w r4, r0, r1, lsl #12
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80003c2: bf06 itte eq
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80003c4: ea52 3503 orrseq.w r5, r2, r3, lsl #12
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80003c8: ea91 0f03 teqeq r1, r3
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80003cc: f441 2100 orrne.w r1, r1, #524288 ; 0x80000
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80003d0: bd30 pop {r4, r5, pc}
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80003d2: bf00 nop
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080003d4 <__aeabi_ui2d>:
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80003d4: f090 0f00 teq r0, #0
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80003d8: bf04 itt eq
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80003da: 2100 moveq r1, #0
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80003dc: 4770 bxeq lr
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80003de: b530 push {r4, r5, lr}
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80003e0: f44f 6480 mov.w r4, #1024 ; 0x400
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80003e4: f104 0432 add.w r4, r4, #50 ; 0x32
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80003e8: f04f 0500 mov.w r5, #0
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80003ec: f04f 0100 mov.w r1, #0
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80003f0: e750 b.n 8000294 <__adddf3+0x138>
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80003f2: bf00 nop
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080003f4 <__aeabi_i2d>:
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80003f4: f090 0f00 teq r0, #0
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80003f8: bf04 itt eq
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80003fa: 2100 moveq r1, #0
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80003fc: 4770 bxeq lr
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80003fe: b530 push {r4, r5, lr}
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8000400: f44f 6480 mov.w r4, #1024 ; 0x400
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8000404: f104 0432 add.w r4, r4, #50 ; 0x32
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8000408: f010 4500 ands.w r5, r0, #2147483648 ; 0x80000000
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800040c: bf48 it mi
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800040e: 4240 negmi r0, r0
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8000410: f04f 0100 mov.w r1, #0
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8000414: e73e b.n 8000294 <__adddf3+0x138>
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8000416: bf00 nop
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08000418 <__aeabi_f2d>:
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8000418: 0042 lsls r2, r0, #1
|
|
800041a: ea4f 01e2 mov.w r1, r2, asr #3
|
|
800041e: ea4f 0131 mov.w r1, r1, rrx
|
|
8000422: ea4f 7002 mov.w r0, r2, lsl #28
|
|
8000426: bf1f itttt ne
|
|
8000428: f012 437f andsne.w r3, r2, #4278190080 ; 0xff000000
|
|
800042c: f093 4f7f teqne r3, #4278190080 ; 0xff000000
|
|
8000430: f081 5160 eorne.w r1, r1, #939524096 ; 0x38000000
|
|
8000434: 4770 bxne lr
|
|
8000436: f032 427f bics.w r2, r2, #4278190080 ; 0xff000000
|
|
800043a: bf08 it eq
|
|
800043c: 4770 bxeq lr
|
|
800043e: f093 4f7f teq r3, #4278190080 ; 0xff000000
|
|
8000442: bf04 itt eq
|
|
8000444: f441 2100 orreq.w r1, r1, #524288 ; 0x80000
|
|
8000448: 4770 bxeq lr
|
|
800044a: b530 push {r4, r5, lr}
|
|
800044c: f44f 7460 mov.w r4, #896 ; 0x380
|
|
8000450: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000
|
|
8000454: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000
|
|
8000458: e71c b.n 8000294 <__adddf3+0x138>
|
|
800045a: bf00 nop
|
|
|
|
0800045c <__aeabi_ul2d>:
|
|
800045c: ea50 0201 orrs.w r2, r0, r1
|
|
8000460: bf08 it eq
|
|
8000462: 4770 bxeq lr
|
|
8000464: b530 push {r4, r5, lr}
|
|
8000466: f04f 0500 mov.w r5, #0
|
|
800046a: e00a b.n 8000482 <__aeabi_l2d+0x16>
|
|
|
|
0800046c <__aeabi_l2d>:
|
|
800046c: ea50 0201 orrs.w r2, r0, r1
|
|
8000470: bf08 it eq
|
|
8000472: 4770 bxeq lr
|
|
8000474: b530 push {r4, r5, lr}
|
|
8000476: f011 4500 ands.w r5, r1, #2147483648 ; 0x80000000
|
|
800047a: d502 bpl.n 8000482 <__aeabi_l2d+0x16>
|
|
800047c: 4240 negs r0, r0
|
|
800047e: eb61 0141 sbc.w r1, r1, r1, lsl #1
|
|
8000482: f44f 6480 mov.w r4, #1024 ; 0x400
|
|
8000486: f104 0432 add.w r4, r4, #50 ; 0x32
|
|
800048a: ea5f 5c91 movs.w ip, r1, lsr #22
|
|
800048e: f43f aed8 beq.w 8000242 <__adddf3+0xe6>
|
|
8000492: f04f 0203 mov.w r2, #3
|
|
8000496: ea5f 0cdc movs.w ip, ip, lsr #3
|
|
800049a: bf18 it ne
|
|
800049c: 3203 addne r2, #3
|
|
800049e: ea5f 0cdc movs.w ip, ip, lsr #3
|
|
80004a2: bf18 it ne
|
|
80004a4: 3203 addne r2, #3
|
|
80004a6: eb02 02dc add.w r2, r2, ip, lsr #3
|
|
80004aa: f1c2 0320 rsb r3, r2, #32
|
|
80004ae: fa00 fc03 lsl.w ip, r0, r3
|
|
80004b2: fa20 f002 lsr.w r0, r0, r2
|
|
80004b6: fa01 fe03 lsl.w lr, r1, r3
|
|
80004ba: ea40 000e orr.w r0, r0, lr
|
|
80004be: fa21 f102 lsr.w r1, r1, r2
|
|
80004c2: 4414 add r4, r2
|
|
80004c4: e6bd b.n 8000242 <__adddf3+0xe6>
|
|
80004c6: bf00 nop
|
|
|
|
080004c8 <__aeabi_dmul>:
|
|
80004c8: b570 push {r4, r5, r6, lr}
|
|
80004ca: f04f 0cff mov.w ip, #255 ; 0xff
|
|
80004ce: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700
|
|
80004d2: ea1c 5411 ands.w r4, ip, r1, lsr #20
|
|
80004d6: bf1d ittte ne
|
|
80004d8: ea1c 5513 andsne.w r5, ip, r3, lsr #20
|
|
80004dc: ea94 0f0c teqne r4, ip
|
|
80004e0: ea95 0f0c teqne r5, ip
|
|
80004e4: f000 f8de bleq 80006a4 <__aeabi_dmul+0x1dc>
|
|
80004e8: 442c add r4, r5
|
|
80004ea: ea81 0603 eor.w r6, r1, r3
|
|
80004ee: ea21 514c bic.w r1, r1, ip, lsl #21
|
|
80004f2: ea23 534c bic.w r3, r3, ip, lsl #21
|
|
80004f6: ea50 3501 orrs.w r5, r0, r1, lsl #12
|
|
80004fa: bf18 it ne
|
|
80004fc: ea52 3503 orrsne.w r5, r2, r3, lsl #12
|
|
8000500: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
|
|
8000504: f443 1380 orr.w r3, r3, #1048576 ; 0x100000
|
|
8000508: d038 beq.n 800057c <__aeabi_dmul+0xb4>
|
|
800050a: fba0 ce02 umull ip, lr, r0, r2
|
|
800050e: f04f 0500 mov.w r5, #0
|
|
8000512: fbe1 e502 umlal lr, r5, r1, r2
|
|
8000516: f006 4200 and.w r2, r6, #2147483648 ; 0x80000000
|
|
800051a: fbe0 e503 umlal lr, r5, r0, r3
|
|
800051e: f04f 0600 mov.w r6, #0
|
|
8000522: fbe1 5603 umlal r5, r6, r1, r3
|
|
8000526: f09c 0f00 teq ip, #0
|
|
800052a: bf18 it ne
|
|
800052c: f04e 0e01 orrne.w lr, lr, #1
|
|
8000530: f1a4 04ff sub.w r4, r4, #255 ; 0xff
|
|
8000534: f5b6 7f00 cmp.w r6, #512 ; 0x200
|
|
8000538: f564 7440 sbc.w r4, r4, #768 ; 0x300
|
|
800053c: d204 bcs.n 8000548 <__aeabi_dmul+0x80>
|
|
800053e: ea5f 0e4e movs.w lr, lr, lsl #1
|
|
8000542: 416d adcs r5, r5
|
|
8000544: eb46 0606 adc.w r6, r6, r6
|
|
8000548: ea42 21c6 orr.w r1, r2, r6, lsl #11
|
|
800054c: ea41 5155 orr.w r1, r1, r5, lsr #21
|
|
8000550: ea4f 20c5 mov.w r0, r5, lsl #11
|
|
8000554: ea40 505e orr.w r0, r0, lr, lsr #21
|
|
8000558: ea4f 2ece mov.w lr, lr, lsl #11
|
|
800055c: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd
|
|
8000560: bf88 it hi
|
|
8000562: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700
|
|
8000566: d81e bhi.n 80005a6 <__aeabi_dmul+0xde>
|
|
8000568: f1be 4f00 cmp.w lr, #2147483648 ; 0x80000000
|
|
800056c: bf08 it eq
|
|
800056e: ea5f 0e50 movseq.w lr, r0, lsr #1
|
|
8000572: f150 0000 adcs.w r0, r0, #0
|
|
8000576: eb41 5104 adc.w r1, r1, r4, lsl #20
|
|
800057a: bd70 pop {r4, r5, r6, pc}
|
|
800057c: f006 4600 and.w r6, r6, #2147483648 ; 0x80000000
|
|
8000580: ea46 0101 orr.w r1, r6, r1
|
|
8000584: ea40 0002 orr.w r0, r0, r2
|
|
8000588: ea81 0103 eor.w r1, r1, r3
|
|
800058c: ebb4 045c subs.w r4, r4, ip, lsr #1
|
|
8000590: bfc2 ittt gt
|
|
8000592: ebd4 050c rsbsgt r5, r4, ip
|
|
8000596: ea41 5104 orrgt.w r1, r1, r4, lsl #20
|
|
800059a: bd70 popgt {r4, r5, r6, pc}
|
|
800059c: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
|
|
80005a0: f04f 0e00 mov.w lr, #0
|
|
80005a4: 3c01 subs r4, #1
|
|
80005a6: f300 80ab bgt.w 8000700 <__aeabi_dmul+0x238>
|
|
80005aa: f114 0f36 cmn.w r4, #54 ; 0x36
|
|
80005ae: bfde ittt le
|
|
80005b0: 2000 movle r0, #0
|
|
80005b2: f001 4100 andle.w r1, r1, #2147483648 ; 0x80000000
|
|
80005b6: bd70 pople {r4, r5, r6, pc}
|
|
80005b8: f1c4 0400 rsb r4, r4, #0
|
|
80005bc: 3c20 subs r4, #32
|
|
80005be: da35 bge.n 800062c <__aeabi_dmul+0x164>
|
|
80005c0: 340c adds r4, #12
|
|
80005c2: dc1b bgt.n 80005fc <__aeabi_dmul+0x134>
|
|
80005c4: f104 0414 add.w r4, r4, #20
|
|
80005c8: f1c4 0520 rsb r5, r4, #32
|
|
80005cc: fa00 f305 lsl.w r3, r0, r5
|
|
80005d0: fa20 f004 lsr.w r0, r0, r4
|
|
80005d4: fa01 f205 lsl.w r2, r1, r5
|
|
80005d8: ea40 0002 orr.w r0, r0, r2
|
|
80005dc: f001 4200 and.w r2, r1, #2147483648 ; 0x80000000
|
|
80005e0: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000
|
|
80005e4: eb10 70d3 adds.w r0, r0, r3, lsr #31
|
|
80005e8: fa21 f604 lsr.w r6, r1, r4
|
|
80005ec: eb42 0106 adc.w r1, r2, r6
|
|
80005f0: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
|
|
80005f4: bf08 it eq
|
|
80005f6: ea20 70d3 biceq.w r0, r0, r3, lsr #31
|
|
80005fa: bd70 pop {r4, r5, r6, pc}
|
|
80005fc: f1c4 040c rsb r4, r4, #12
|
|
8000600: f1c4 0520 rsb r5, r4, #32
|
|
8000604: fa00 f304 lsl.w r3, r0, r4
|
|
8000608: fa20 f005 lsr.w r0, r0, r5
|
|
800060c: fa01 f204 lsl.w r2, r1, r4
|
|
8000610: ea40 0002 orr.w r0, r0, r2
|
|
8000614: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
|
|
8000618: eb10 70d3 adds.w r0, r0, r3, lsr #31
|
|
800061c: f141 0100 adc.w r1, r1, #0
|
|
8000620: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
|
|
8000624: bf08 it eq
|
|
8000626: ea20 70d3 biceq.w r0, r0, r3, lsr #31
|
|
800062a: bd70 pop {r4, r5, r6, pc}
|
|
800062c: f1c4 0520 rsb r5, r4, #32
|
|
8000630: fa00 f205 lsl.w r2, r0, r5
|
|
8000634: ea4e 0e02 orr.w lr, lr, r2
|
|
8000638: fa20 f304 lsr.w r3, r0, r4
|
|
800063c: fa01 f205 lsl.w r2, r1, r5
|
|
8000640: ea43 0302 orr.w r3, r3, r2
|
|
8000644: fa21 f004 lsr.w r0, r1, r4
|
|
8000648: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
|
|
800064c: fa21 f204 lsr.w r2, r1, r4
|
|
8000650: ea20 0002 bic.w r0, r0, r2
|
|
8000654: eb00 70d3 add.w r0, r0, r3, lsr #31
|
|
8000658: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
|
|
800065c: bf08 it eq
|
|
800065e: ea20 70d3 biceq.w r0, r0, r3, lsr #31
|
|
8000662: bd70 pop {r4, r5, r6, pc}
|
|
8000664: f094 0f00 teq r4, #0
|
|
8000668: d10f bne.n 800068a <__aeabi_dmul+0x1c2>
|
|
800066a: f001 4600 and.w r6, r1, #2147483648 ; 0x80000000
|
|
800066e: 0040 lsls r0, r0, #1
|
|
8000670: eb41 0101 adc.w r1, r1, r1
|
|
8000674: f411 1f80 tst.w r1, #1048576 ; 0x100000
|
|
8000678: bf08 it eq
|
|
800067a: 3c01 subeq r4, #1
|
|
800067c: d0f7 beq.n 800066e <__aeabi_dmul+0x1a6>
|
|
800067e: ea41 0106 orr.w r1, r1, r6
|
|
8000682: f095 0f00 teq r5, #0
|
|
8000686: bf18 it ne
|
|
8000688: 4770 bxne lr
|
|
800068a: f003 4600 and.w r6, r3, #2147483648 ; 0x80000000
|
|
800068e: 0052 lsls r2, r2, #1
|
|
8000690: eb43 0303 adc.w r3, r3, r3
|
|
8000694: f413 1f80 tst.w r3, #1048576 ; 0x100000
|
|
8000698: bf08 it eq
|
|
800069a: 3d01 subeq r5, #1
|
|
800069c: d0f7 beq.n 800068e <__aeabi_dmul+0x1c6>
|
|
800069e: ea43 0306 orr.w r3, r3, r6
|
|
80006a2: 4770 bx lr
|
|
80006a4: ea94 0f0c teq r4, ip
|
|
80006a8: ea0c 5513 and.w r5, ip, r3, lsr #20
|
|
80006ac: bf18 it ne
|
|
80006ae: ea95 0f0c teqne r5, ip
|
|
80006b2: d00c beq.n 80006ce <__aeabi_dmul+0x206>
|
|
80006b4: ea50 0641 orrs.w r6, r0, r1, lsl #1
|
|
80006b8: bf18 it ne
|
|
80006ba: ea52 0643 orrsne.w r6, r2, r3, lsl #1
|
|
80006be: d1d1 bne.n 8000664 <__aeabi_dmul+0x19c>
|
|
80006c0: ea81 0103 eor.w r1, r1, r3
|
|
80006c4: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
|
|
80006c8: f04f 0000 mov.w r0, #0
|
|
80006cc: bd70 pop {r4, r5, r6, pc}
|
|
80006ce: ea50 0641 orrs.w r6, r0, r1, lsl #1
|
|
80006d2: bf06 itte eq
|
|
80006d4: 4610 moveq r0, r2
|
|
80006d6: 4619 moveq r1, r3
|
|
80006d8: ea52 0643 orrsne.w r6, r2, r3, lsl #1
|
|
80006dc: d019 beq.n 8000712 <__aeabi_dmul+0x24a>
|
|
80006de: ea94 0f0c teq r4, ip
|
|
80006e2: d102 bne.n 80006ea <__aeabi_dmul+0x222>
|
|
80006e4: ea50 3601 orrs.w r6, r0, r1, lsl #12
|
|
80006e8: d113 bne.n 8000712 <__aeabi_dmul+0x24a>
|
|
80006ea: ea95 0f0c teq r5, ip
|
|
80006ee: d105 bne.n 80006fc <__aeabi_dmul+0x234>
|
|
80006f0: ea52 3603 orrs.w r6, r2, r3, lsl #12
|
|
80006f4: bf1c itt ne
|
|
80006f6: 4610 movne r0, r2
|
|
80006f8: 4619 movne r1, r3
|
|
80006fa: d10a bne.n 8000712 <__aeabi_dmul+0x24a>
|
|
80006fc: ea81 0103 eor.w r1, r1, r3
|
|
8000700: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
|
|
8000704: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000
|
|
8000708: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000
|
|
800070c: f04f 0000 mov.w r0, #0
|
|
8000710: bd70 pop {r4, r5, r6, pc}
|
|
8000712: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000
|
|
8000716: f441 0178 orr.w r1, r1, #16252928 ; 0xf80000
|
|
800071a: bd70 pop {r4, r5, r6, pc}
|
|
|
|
0800071c <__aeabi_ddiv>:
|
|
800071c: b570 push {r4, r5, r6, lr}
|
|
800071e: f04f 0cff mov.w ip, #255 ; 0xff
|
|
8000722: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700
|
|
8000726: ea1c 5411 ands.w r4, ip, r1, lsr #20
|
|
800072a: bf1d ittte ne
|
|
800072c: ea1c 5513 andsne.w r5, ip, r3, lsr #20
|
|
8000730: ea94 0f0c teqne r4, ip
|
|
8000734: ea95 0f0c teqne r5, ip
|
|
8000738: f000 f8a7 bleq 800088a <__aeabi_ddiv+0x16e>
|
|
800073c: eba4 0405 sub.w r4, r4, r5
|
|
8000740: ea81 0e03 eor.w lr, r1, r3
|
|
8000744: ea52 3503 orrs.w r5, r2, r3, lsl #12
|
|
8000748: ea4f 3101 mov.w r1, r1, lsl #12
|
|
800074c: f000 8088 beq.w 8000860 <__aeabi_ddiv+0x144>
|
|
8000750: ea4f 3303 mov.w r3, r3, lsl #12
|
|
8000754: f04f 5580 mov.w r5, #268435456 ; 0x10000000
|
|
8000758: ea45 1313 orr.w r3, r5, r3, lsr #4
|
|
800075c: ea43 6312 orr.w r3, r3, r2, lsr #24
|
|
8000760: ea4f 2202 mov.w r2, r2, lsl #8
|
|
8000764: ea45 1511 orr.w r5, r5, r1, lsr #4
|
|
8000768: ea45 6510 orr.w r5, r5, r0, lsr #24
|
|
800076c: ea4f 2600 mov.w r6, r0, lsl #8
|
|
8000770: f00e 4100 and.w r1, lr, #2147483648 ; 0x80000000
|
|
8000774: 429d cmp r5, r3
|
|
8000776: bf08 it eq
|
|
8000778: 4296 cmpeq r6, r2
|
|
800077a: f144 04fd adc.w r4, r4, #253 ; 0xfd
|
|
800077e: f504 7440 add.w r4, r4, #768 ; 0x300
|
|
8000782: d202 bcs.n 800078a <__aeabi_ddiv+0x6e>
|
|
8000784: 085b lsrs r3, r3, #1
|
|
8000786: ea4f 0232 mov.w r2, r2, rrx
|
|
800078a: 1ab6 subs r6, r6, r2
|
|
800078c: eb65 0503 sbc.w r5, r5, r3
|
|
8000790: 085b lsrs r3, r3, #1
|
|
8000792: ea4f 0232 mov.w r2, r2, rrx
|
|
8000796: f44f 1080 mov.w r0, #1048576 ; 0x100000
|
|
800079a: f44f 2c00 mov.w ip, #524288 ; 0x80000
|
|
800079e: ebb6 0e02 subs.w lr, r6, r2
|
|
80007a2: eb75 0e03 sbcs.w lr, r5, r3
|
|
80007a6: bf22 ittt cs
|
|
80007a8: 1ab6 subcs r6, r6, r2
|
|
80007aa: 4675 movcs r5, lr
|
|
80007ac: ea40 000c orrcs.w r0, r0, ip
|
|
80007b0: 085b lsrs r3, r3, #1
|
|
80007b2: ea4f 0232 mov.w r2, r2, rrx
|
|
80007b6: ebb6 0e02 subs.w lr, r6, r2
|
|
80007ba: eb75 0e03 sbcs.w lr, r5, r3
|
|
80007be: bf22 ittt cs
|
|
80007c0: 1ab6 subcs r6, r6, r2
|
|
80007c2: 4675 movcs r5, lr
|
|
80007c4: ea40 005c orrcs.w r0, r0, ip, lsr #1
|
|
80007c8: 085b lsrs r3, r3, #1
|
|
80007ca: ea4f 0232 mov.w r2, r2, rrx
|
|
80007ce: ebb6 0e02 subs.w lr, r6, r2
|
|
80007d2: eb75 0e03 sbcs.w lr, r5, r3
|
|
80007d6: bf22 ittt cs
|
|
80007d8: 1ab6 subcs r6, r6, r2
|
|
80007da: 4675 movcs r5, lr
|
|
80007dc: ea40 009c orrcs.w r0, r0, ip, lsr #2
|
|
80007e0: 085b lsrs r3, r3, #1
|
|
80007e2: ea4f 0232 mov.w r2, r2, rrx
|
|
80007e6: ebb6 0e02 subs.w lr, r6, r2
|
|
80007ea: eb75 0e03 sbcs.w lr, r5, r3
|
|
80007ee: bf22 ittt cs
|
|
80007f0: 1ab6 subcs r6, r6, r2
|
|
80007f2: 4675 movcs r5, lr
|
|
80007f4: ea40 00dc orrcs.w r0, r0, ip, lsr #3
|
|
80007f8: ea55 0e06 orrs.w lr, r5, r6
|
|
80007fc: d018 beq.n 8000830 <__aeabi_ddiv+0x114>
|
|
80007fe: ea4f 1505 mov.w r5, r5, lsl #4
|
|
8000802: ea45 7516 orr.w r5, r5, r6, lsr #28
|
|
8000806: ea4f 1606 mov.w r6, r6, lsl #4
|
|
800080a: ea4f 03c3 mov.w r3, r3, lsl #3
|
|
800080e: ea43 7352 orr.w r3, r3, r2, lsr #29
|
|
8000812: ea4f 02c2 mov.w r2, r2, lsl #3
|
|
8000816: ea5f 1c1c movs.w ip, ip, lsr #4
|
|
800081a: d1c0 bne.n 800079e <__aeabi_ddiv+0x82>
|
|
800081c: f411 1f80 tst.w r1, #1048576 ; 0x100000
|
|
8000820: d10b bne.n 800083a <__aeabi_ddiv+0x11e>
|
|
8000822: ea41 0100 orr.w r1, r1, r0
|
|
8000826: f04f 0000 mov.w r0, #0
|
|
800082a: f04f 4c00 mov.w ip, #2147483648 ; 0x80000000
|
|
800082e: e7b6 b.n 800079e <__aeabi_ddiv+0x82>
|
|
8000830: f411 1f80 tst.w r1, #1048576 ; 0x100000
|
|
8000834: bf04 itt eq
|
|
8000836: 4301 orreq r1, r0
|
|
8000838: 2000 moveq r0, #0
|
|
800083a: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd
|
|
800083e: bf88 it hi
|
|
8000840: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700
|
|
8000844: f63f aeaf bhi.w 80005a6 <__aeabi_dmul+0xde>
|
|
8000848: ebb5 0c03 subs.w ip, r5, r3
|
|
800084c: bf04 itt eq
|
|
800084e: ebb6 0c02 subseq.w ip, r6, r2
|
|
8000852: ea5f 0c50 movseq.w ip, r0, lsr #1
|
|
8000856: f150 0000 adcs.w r0, r0, #0
|
|
800085a: eb41 5104 adc.w r1, r1, r4, lsl #20
|
|
800085e: bd70 pop {r4, r5, r6, pc}
|
|
8000860: f00e 4e00 and.w lr, lr, #2147483648 ; 0x80000000
|
|
8000864: ea4e 3111 orr.w r1, lr, r1, lsr #12
|
|
8000868: eb14 045c adds.w r4, r4, ip, lsr #1
|
|
800086c: bfc2 ittt gt
|
|
800086e: ebd4 050c rsbsgt r5, r4, ip
|
|
8000872: ea41 5104 orrgt.w r1, r1, r4, lsl #20
|
|
8000876: bd70 popgt {r4, r5, r6, pc}
|
|
8000878: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
|
|
800087c: f04f 0e00 mov.w lr, #0
|
|
8000880: 3c01 subs r4, #1
|
|
8000882: e690 b.n 80005a6 <__aeabi_dmul+0xde>
|
|
8000884: ea45 0e06 orr.w lr, r5, r6
|
|
8000888: e68d b.n 80005a6 <__aeabi_dmul+0xde>
|
|
800088a: ea0c 5513 and.w r5, ip, r3, lsr #20
|
|
800088e: ea94 0f0c teq r4, ip
|
|
8000892: bf08 it eq
|
|
8000894: ea95 0f0c teqeq r5, ip
|
|
8000898: f43f af3b beq.w 8000712 <__aeabi_dmul+0x24a>
|
|
800089c: ea94 0f0c teq r4, ip
|
|
80008a0: d10a bne.n 80008b8 <__aeabi_ddiv+0x19c>
|
|
80008a2: ea50 3401 orrs.w r4, r0, r1, lsl #12
|
|
80008a6: f47f af34 bne.w 8000712 <__aeabi_dmul+0x24a>
|
|
80008aa: ea95 0f0c teq r5, ip
|
|
80008ae: f47f af25 bne.w 80006fc <__aeabi_dmul+0x234>
|
|
80008b2: 4610 mov r0, r2
|
|
80008b4: 4619 mov r1, r3
|
|
80008b6: e72c b.n 8000712 <__aeabi_dmul+0x24a>
|
|
80008b8: ea95 0f0c teq r5, ip
|
|
80008bc: d106 bne.n 80008cc <__aeabi_ddiv+0x1b0>
|
|
80008be: ea52 3503 orrs.w r5, r2, r3, lsl #12
|
|
80008c2: f43f aefd beq.w 80006c0 <__aeabi_dmul+0x1f8>
|
|
80008c6: 4610 mov r0, r2
|
|
80008c8: 4619 mov r1, r3
|
|
80008ca: e722 b.n 8000712 <__aeabi_dmul+0x24a>
|
|
80008cc: ea50 0641 orrs.w r6, r0, r1, lsl #1
|
|
80008d0: bf18 it ne
|
|
80008d2: ea52 0643 orrsne.w r6, r2, r3, lsl #1
|
|
80008d6: f47f aec5 bne.w 8000664 <__aeabi_dmul+0x19c>
|
|
80008da: ea50 0441 orrs.w r4, r0, r1, lsl #1
|
|
80008de: f47f af0d bne.w 80006fc <__aeabi_dmul+0x234>
|
|
80008e2: ea52 0543 orrs.w r5, r2, r3, lsl #1
|
|
80008e6: f47f aeeb bne.w 80006c0 <__aeabi_dmul+0x1f8>
|
|
80008ea: e712 b.n 8000712 <__aeabi_dmul+0x24a>
|
|
|
|
080008ec <__gedf2>:
|
|
80008ec: f04f 3cff mov.w ip, #4294967295 ; 0xffffffff
|
|
80008f0: e006 b.n 8000900 <__cmpdf2+0x4>
|
|
80008f2: bf00 nop
|
|
|
|
080008f4 <__ledf2>:
|
|
80008f4: f04f 0c01 mov.w ip, #1
|
|
80008f8: e002 b.n 8000900 <__cmpdf2+0x4>
|
|
80008fa: bf00 nop
|
|
|
|
080008fc <__cmpdf2>:
|
|
80008fc: f04f 0c01 mov.w ip, #1
|
|
8000900: f84d cd04 str.w ip, [sp, #-4]!
|
|
8000904: ea4f 0c41 mov.w ip, r1, lsl #1
|
|
8000908: ea7f 5c6c mvns.w ip, ip, asr #21
|
|
800090c: ea4f 0c43 mov.w ip, r3, lsl #1
|
|
8000910: bf18 it ne
|
|
8000912: ea7f 5c6c mvnsne.w ip, ip, asr #21
|
|
8000916: d01b beq.n 8000950 <__cmpdf2+0x54>
|
|
8000918: b001 add sp, #4
|
|
800091a: ea50 0c41 orrs.w ip, r0, r1, lsl #1
|
|
800091e: bf0c ite eq
|
|
8000920: ea52 0c43 orrseq.w ip, r2, r3, lsl #1
|
|
8000924: ea91 0f03 teqne r1, r3
|
|
8000928: bf02 ittt eq
|
|
800092a: ea90 0f02 teqeq r0, r2
|
|
800092e: 2000 moveq r0, #0
|
|
8000930: 4770 bxeq lr
|
|
8000932: f110 0f00 cmn.w r0, #0
|
|
8000936: ea91 0f03 teq r1, r3
|
|
800093a: bf58 it pl
|
|
800093c: 4299 cmppl r1, r3
|
|
800093e: bf08 it eq
|
|
8000940: 4290 cmpeq r0, r2
|
|
8000942: bf2c ite cs
|
|
8000944: 17d8 asrcs r0, r3, #31
|
|
8000946: ea6f 70e3 mvncc.w r0, r3, asr #31
|
|
800094a: f040 0001 orr.w r0, r0, #1
|
|
800094e: 4770 bx lr
|
|
8000950: ea4f 0c41 mov.w ip, r1, lsl #1
|
|
8000954: ea7f 5c6c mvns.w ip, ip, asr #21
|
|
8000958: d102 bne.n 8000960 <__cmpdf2+0x64>
|
|
800095a: ea50 3c01 orrs.w ip, r0, r1, lsl #12
|
|
800095e: d107 bne.n 8000970 <__cmpdf2+0x74>
|
|
8000960: ea4f 0c43 mov.w ip, r3, lsl #1
|
|
8000964: ea7f 5c6c mvns.w ip, ip, asr #21
|
|
8000968: d1d6 bne.n 8000918 <__cmpdf2+0x1c>
|
|
800096a: ea52 3c03 orrs.w ip, r2, r3, lsl #12
|
|
800096e: d0d3 beq.n 8000918 <__cmpdf2+0x1c>
|
|
8000970: f85d 0b04 ldr.w r0, [sp], #4
|
|
8000974: 4770 bx lr
|
|
8000976: bf00 nop
|
|
|
|
08000978 <__aeabi_cdrcmple>:
|
|
8000978: 4684 mov ip, r0
|
|
800097a: 4610 mov r0, r2
|
|
800097c: 4662 mov r2, ip
|
|
800097e: 468c mov ip, r1
|
|
8000980: 4619 mov r1, r3
|
|
8000982: 4663 mov r3, ip
|
|
8000984: e000 b.n 8000988 <__aeabi_cdcmpeq>
|
|
8000986: bf00 nop
|
|
|
|
08000988 <__aeabi_cdcmpeq>:
|
|
8000988: b501 push {r0, lr}
|
|
800098a: f7ff ffb7 bl 80008fc <__cmpdf2>
|
|
800098e: 2800 cmp r0, #0
|
|
8000990: bf48 it mi
|
|
8000992: f110 0f00 cmnmi.w r0, #0
|
|
8000996: bd01 pop {r0, pc}
|
|
|
|
08000998 <__aeabi_dcmpeq>:
|
|
8000998: f84d ed08 str.w lr, [sp, #-8]!
|
|
800099c: f7ff fff4 bl 8000988 <__aeabi_cdcmpeq>
|
|
80009a0: bf0c ite eq
|
|
80009a2: 2001 moveq r0, #1
|
|
80009a4: 2000 movne r0, #0
|
|
80009a6: f85d fb08 ldr.w pc, [sp], #8
|
|
80009aa: bf00 nop
|
|
|
|
080009ac <__aeabi_dcmplt>:
|
|
80009ac: f84d ed08 str.w lr, [sp, #-8]!
|
|
80009b0: f7ff ffea bl 8000988 <__aeabi_cdcmpeq>
|
|
80009b4: bf34 ite cc
|
|
80009b6: 2001 movcc r0, #1
|
|
80009b8: 2000 movcs r0, #0
|
|
80009ba: f85d fb08 ldr.w pc, [sp], #8
|
|
80009be: bf00 nop
|
|
|
|
080009c0 <__aeabi_dcmple>:
|
|
80009c0: f84d ed08 str.w lr, [sp, #-8]!
|
|
80009c4: f7ff ffe0 bl 8000988 <__aeabi_cdcmpeq>
|
|
80009c8: bf94 ite ls
|
|
80009ca: 2001 movls r0, #1
|
|
80009cc: 2000 movhi r0, #0
|
|
80009ce: f85d fb08 ldr.w pc, [sp], #8
|
|
80009d2: bf00 nop
|
|
|
|
080009d4 <__aeabi_dcmpge>:
|
|
80009d4: f84d ed08 str.w lr, [sp, #-8]!
|
|
80009d8: f7ff ffce bl 8000978 <__aeabi_cdrcmple>
|
|
80009dc: bf94 ite ls
|
|
80009de: 2001 movls r0, #1
|
|
80009e0: 2000 movhi r0, #0
|
|
80009e2: f85d fb08 ldr.w pc, [sp], #8
|
|
80009e6: bf00 nop
|
|
|
|
080009e8 <__aeabi_dcmpgt>:
|
|
80009e8: f84d ed08 str.w lr, [sp, #-8]!
|
|
80009ec: f7ff ffc4 bl 8000978 <__aeabi_cdrcmple>
|
|
80009f0: bf34 ite cc
|
|
80009f2: 2001 movcc r0, #1
|
|
80009f4: 2000 movcs r0, #0
|
|
80009f6: f85d fb08 ldr.w pc, [sp], #8
|
|
80009fa: bf00 nop
|
|
|
|
080009fc <__aeabi_d2iz>:
|
|
80009fc: ea4f 0241 mov.w r2, r1, lsl #1
|
|
8000a00: f512 1200 adds.w r2, r2, #2097152 ; 0x200000
|
|
8000a04: d215 bcs.n 8000a32 <__aeabi_d2iz+0x36>
|
|
8000a06: d511 bpl.n 8000a2c <__aeabi_d2iz+0x30>
|
|
8000a08: f46f 7378 mvn.w r3, #992 ; 0x3e0
|
|
8000a0c: ebb3 5262 subs.w r2, r3, r2, asr #21
|
|
8000a10: d912 bls.n 8000a38 <__aeabi_d2iz+0x3c>
|
|
8000a12: ea4f 23c1 mov.w r3, r1, lsl #11
|
|
8000a16: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
|
|
8000a1a: ea43 5350 orr.w r3, r3, r0, lsr #21
|
|
8000a1e: f011 4f00 tst.w r1, #2147483648 ; 0x80000000
|
|
8000a22: fa23 f002 lsr.w r0, r3, r2
|
|
8000a26: bf18 it ne
|
|
8000a28: 4240 negne r0, r0
|
|
8000a2a: 4770 bx lr
|
|
8000a2c: f04f 0000 mov.w r0, #0
|
|
8000a30: 4770 bx lr
|
|
8000a32: ea50 3001 orrs.w r0, r0, r1, lsl #12
|
|
8000a36: d105 bne.n 8000a44 <__aeabi_d2iz+0x48>
|
|
8000a38: f011 4000 ands.w r0, r1, #2147483648 ; 0x80000000
|
|
8000a3c: bf08 it eq
|
|
8000a3e: f06f 4000 mvneq.w r0, #2147483648 ; 0x80000000
|
|
8000a42: 4770 bx lr
|
|
8000a44: f04f 0000 mov.w r0, #0
|
|
8000a48: 4770 bx lr
|
|
8000a4a: bf00 nop
|
|
|
|
08000a4c <__aeabi_frsub>:
|
|
8000a4c: f080 4000 eor.w r0, r0, #2147483648 ; 0x80000000
|
|
8000a50: e002 b.n 8000a58 <__addsf3>
|
|
8000a52: bf00 nop
|
|
|
|
08000a54 <__aeabi_fsub>:
|
|
8000a54: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000
|
|
|
|
08000a58 <__addsf3>:
|
|
8000a58: 0042 lsls r2, r0, #1
|
|
8000a5a: bf1f itttt ne
|
|
8000a5c: ea5f 0341 movsne.w r3, r1, lsl #1
|
|
8000a60: ea92 0f03 teqne r2, r3
|
|
8000a64: ea7f 6c22 mvnsne.w ip, r2, asr #24
|
|
8000a68: ea7f 6c23 mvnsne.w ip, r3, asr #24
|
|
8000a6c: d06a beq.n 8000b44 <__addsf3+0xec>
|
|
8000a6e: ea4f 6212 mov.w r2, r2, lsr #24
|
|
8000a72: ebd2 6313 rsbs r3, r2, r3, lsr #24
|
|
8000a76: bfc1 itttt gt
|
|
8000a78: 18d2 addgt r2, r2, r3
|
|
8000a7a: 4041 eorgt r1, r0
|
|
8000a7c: 4048 eorgt r0, r1
|
|
8000a7e: 4041 eorgt r1, r0
|
|
8000a80: bfb8 it lt
|
|
8000a82: 425b neglt r3, r3
|
|
8000a84: 2b19 cmp r3, #25
|
|
8000a86: bf88 it hi
|
|
8000a88: 4770 bxhi lr
|
|
8000a8a: f010 4f00 tst.w r0, #2147483648 ; 0x80000000
|
|
8000a8e: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
|
8000a92: f020 407f bic.w r0, r0, #4278190080 ; 0xff000000
|
|
8000a96: bf18 it ne
|
|
8000a98: 4240 negne r0, r0
|
|
8000a9a: f011 4f00 tst.w r1, #2147483648 ; 0x80000000
|
|
8000a9e: f441 0100 orr.w r1, r1, #8388608 ; 0x800000
|
|
8000aa2: f021 417f bic.w r1, r1, #4278190080 ; 0xff000000
|
|
8000aa6: bf18 it ne
|
|
8000aa8: 4249 negne r1, r1
|
|
8000aaa: ea92 0f03 teq r2, r3
|
|
8000aae: d03f beq.n 8000b30 <__addsf3+0xd8>
|
|
8000ab0: f1a2 0201 sub.w r2, r2, #1
|
|
8000ab4: fa41 fc03 asr.w ip, r1, r3
|
|
8000ab8: eb10 000c adds.w r0, r0, ip
|
|
8000abc: f1c3 0320 rsb r3, r3, #32
|
|
8000ac0: fa01 f103 lsl.w r1, r1, r3
|
|
8000ac4: f000 4300 and.w r3, r0, #2147483648 ; 0x80000000
|
|
8000ac8: d502 bpl.n 8000ad0 <__addsf3+0x78>
|
|
8000aca: 4249 negs r1, r1
|
|
8000acc: eb60 0040 sbc.w r0, r0, r0, lsl #1
|
|
8000ad0: f5b0 0f00 cmp.w r0, #8388608 ; 0x800000
|
|
8000ad4: d313 bcc.n 8000afe <__addsf3+0xa6>
|
|
8000ad6: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000
|
|
8000ada: d306 bcc.n 8000aea <__addsf3+0x92>
|
|
8000adc: 0840 lsrs r0, r0, #1
|
|
8000ade: ea4f 0131 mov.w r1, r1, rrx
|
|
8000ae2: f102 0201 add.w r2, r2, #1
|
|
8000ae6: 2afe cmp r2, #254 ; 0xfe
|
|
8000ae8: d251 bcs.n 8000b8e <__addsf3+0x136>
|
|
8000aea: f1b1 4f00 cmp.w r1, #2147483648 ; 0x80000000
|
|
8000aee: eb40 50c2 adc.w r0, r0, r2, lsl #23
|
|
8000af2: bf08 it eq
|
|
8000af4: f020 0001 biceq.w r0, r0, #1
|
|
8000af8: ea40 0003 orr.w r0, r0, r3
|
|
8000afc: 4770 bx lr
|
|
8000afe: 0049 lsls r1, r1, #1
|
|
8000b00: eb40 0000 adc.w r0, r0, r0
|
|
8000b04: f410 0f00 tst.w r0, #8388608 ; 0x800000
|
|
8000b08: f1a2 0201 sub.w r2, r2, #1
|
|
8000b0c: d1ed bne.n 8000aea <__addsf3+0x92>
|
|
8000b0e: fab0 fc80 clz ip, r0
|
|
8000b12: f1ac 0c08 sub.w ip, ip, #8
|
|
8000b16: ebb2 020c subs.w r2, r2, ip
|
|
8000b1a: fa00 f00c lsl.w r0, r0, ip
|
|
8000b1e: bfaa itet ge
|
|
8000b20: eb00 50c2 addge.w r0, r0, r2, lsl #23
|
|
8000b24: 4252 neglt r2, r2
|
|
8000b26: 4318 orrge r0, r3
|
|
8000b28: bfbc itt lt
|
|
8000b2a: 40d0 lsrlt r0, r2
|
|
8000b2c: 4318 orrlt r0, r3
|
|
8000b2e: 4770 bx lr
|
|
8000b30: f092 0f00 teq r2, #0
|
|
8000b34: f481 0100 eor.w r1, r1, #8388608 ; 0x800000
|
|
8000b38: bf06 itte eq
|
|
8000b3a: f480 0000 eoreq.w r0, r0, #8388608 ; 0x800000
|
|
8000b3e: 3201 addeq r2, #1
|
|
8000b40: 3b01 subne r3, #1
|
|
8000b42: e7b5 b.n 8000ab0 <__addsf3+0x58>
|
|
8000b44: ea4f 0341 mov.w r3, r1, lsl #1
|
|
8000b48: ea7f 6c22 mvns.w ip, r2, asr #24
|
|
8000b4c: bf18 it ne
|
|
8000b4e: ea7f 6c23 mvnsne.w ip, r3, asr #24
|
|
8000b52: d021 beq.n 8000b98 <__addsf3+0x140>
|
|
8000b54: ea92 0f03 teq r2, r3
|
|
8000b58: d004 beq.n 8000b64 <__addsf3+0x10c>
|
|
8000b5a: f092 0f00 teq r2, #0
|
|
8000b5e: bf08 it eq
|
|
8000b60: 4608 moveq r0, r1
|
|
8000b62: 4770 bx lr
|
|
8000b64: ea90 0f01 teq r0, r1
|
|
8000b68: bf1c itt ne
|
|
8000b6a: 2000 movne r0, #0
|
|
8000b6c: 4770 bxne lr
|
|
8000b6e: f012 4f7f tst.w r2, #4278190080 ; 0xff000000
|
|
8000b72: d104 bne.n 8000b7e <__addsf3+0x126>
|
|
8000b74: 0040 lsls r0, r0, #1
|
|
8000b76: bf28 it cs
|
|
8000b78: f040 4000 orrcs.w r0, r0, #2147483648 ; 0x80000000
|
|
8000b7c: 4770 bx lr
|
|
8000b7e: f112 7200 adds.w r2, r2, #33554432 ; 0x2000000
|
|
8000b82: bf3c itt cc
|
|
8000b84: f500 0000 addcc.w r0, r0, #8388608 ; 0x800000
|
|
8000b88: 4770 bxcc lr
|
|
8000b8a: f000 4300 and.w r3, r0, #2147483648 ; 0x80000000
|
|
8000b8e: f043 40fe orr.w r0, r3, #2130706432 ; 0x7f000000
|
|
8000b92: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
|
8000b96: 4770 bx lr
|
|
8000b98: ea7f 6222 mvns.w r2, r2, asr #24
|
|
8000b9c: bf16 itet ne
|
|
8000b9e: 4608 movne r0, r1
|
|
8000ba0: ea7f 6323 mvnseq.w r3, r3, asr #24
|
|
8000ba4: 4601 movne r1, r0
|
|
8000ba6: 0242 lsls r2, r0, #9
|
|
8000ba8: bf06 itte eq
|
|
8000baa: ea5f 2341 movseq.w r3, r1, lsl #9
|
|
8000bae: ea90 0f01 teqeq r0, r1
|
|
8000bb2: f440 0080 orrne.w r0, r0, #4194304 ; 0x400000
|
|
8000bb6: 4770 bx lr
|
|
|
|
08000bb8 <__aeabi_ui2f>:
|
|
8000bb8: f04f 0300 mov.w r3, #0
|
|
8000bbc: e004 b.n 8000bc8 <__aeabi_i2f+0x8>
|
|
8000bbe: bf00 nop
|
|
|
|
08000bc0 <__aeabi_i2f>:
|
|
8000bc0: f010 4300 ands.w r3, r0, #2147483648 ; 0x80000000
|
|
8000bc4: bf48 it mi
|
|
8000bc6: 4240 negmi r0, r0
|
|
8000bc8: ea5f 0c00 movs.w ip, r0
|
|
8000bcc: bf08 it eq
|
|
8000bce: 4770 bxeq lr
|
|
8000bd0: f043 4396 orr.w r3, r3, #1258291200 ; 0x4b000000
|
|
8000bd4: 4601 mov r1, r0
|
|
8000bd6: f04f 0000 mov.w r0, #0
|
|
8000bda: e01c b.n 8000c16 <__aeabi_l2f+0x2a>
|
|
|
|
08000bdc <__aeabi_ul2f>:
|
|
8000bdc: ea50 0201 orrs.w r2, r0, r1
|
|
8000be0: bf08 it eq
|
|
8000be2: 4770 bxeq lr
|
|
8000be4: f04f 0300 mov.w r3, #0
|
|
8000be8: e00a b.n 8000c00 <__aeabi_l2f+0x14>
|
|
8000bea: bf00 nop
|
|
|
|
08000bec <__aeabi_l2f>:
|
|
8000bec: ea50 0201 orrs.w r2, r0, r1
|
|
8000bf0: bf08 it eq
|
|
8000bf2: 4770 bxeq lr
|
|
8000bf4: f011 4300 ands.w r3, r1, #2147483648 ; 0x80000000
|
|
8000bf8: d502 bpl.n 8000c00 <__aeabi_l2f+0x14>
|
|
8000bfa: 4240 negs r0, r0
|
|
8000bfc: eb61 0141 sbc.w r1, r1, r1, lsl #1
|
|
8000c00: ea5f 0c01 movs.w ip, r1
|
|
8000c04: bf02 ittt eq
|
|
8000c06: 4684 moveq ip, r0
|
|
8000c08: 4601 moveq r1, r0
|
|
8000c0a: 2000 moveq r0, #0
|
|
8000c0c: f043 43b6 orr.w r3, r3, #1526726656 ; 0x5b000000
|
|
8000c10: bf08 it eq
|
|
8000c12: f1a3 5380 subeq.w r3, r3, #268435456 ; 0x10000000
|
|
8000c16: f5a3 0300 sub.w r3, r3, #8388608 ; 0x800000
|
|
8000c1a: fabc f28c clz r2, ip
|
|
8000c1e: 3a08 subs r2, #8
|
|
8000c20: eba3 53c2 sub.w r3, r3, r2, lsl #23
|
|
8000c24: db10 blt.n 8000c48 <__aeabi_l2f+0x5c>
|
|
8000c26: fa01 fc02 lsl.w ip, r1, r2
|
|
8000c2a: 4463 add r3, ip
|
|
8000c2c: fa00 fc02 lsl.w ip, r0, r2
|
|
8000c30: f1c2 0220 rsb r2, r2, #32
|
|
8000c34: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000
|
|
8000c38: fa20 f202 lsr.w r2, r0, r2
|
|
8000c3c: eb43 0002 adc.w r0, r3, r2
|
|
8000c40: bf08 it eq
|
|
8000c42: f020 0001 biceq.w r0, r0, #1
|
|
8000c46: 4770 bx lr
|
|
8000c48: f102 0220 add.w r2, r2, #32
|
|
8000c4c: fa01 fc02 lsl.w ip, r1, r2
|
|
8000c50: f1c2 0220 rsb r2, r2, #32
|
|
8000c54: ea50 004c orrs.w r0, r0, ip, lsl #1
|
|
8000c58: fa21 f202 lsr.w r2, r1, r2
|
|
8000c5c: eb43 0002 adc.w r0, r3, r2
|
|
8000c60: bf08 it eq
|
|
8000c62: ea20 70dc biceq.w r0, r0, ip, lsr #31
|
|
8000c66: 4770 bx lr
|
|
|
|
08000c68 <__aeabi_fmul>:
|
|
8000c68: f04f 0cff mov.w ip, #255 ; 0xff
|
|
8000c6c: ea1c 52d0 ands.w r2, ip, r0, lsr #23
|
|
8000c70: bf1e ittt ne
|
|
8000c72: ea1c 53d1 andsne.w r3, ip, r1, lsr #23
|
|
8000c76: ea92 0f0c teqne r2, ip
|
|
8000c7a: ea93 0f0c teqne r3, ip
|
|
8000c7e: d06f beq.n 8000d60 <__aeabi_fmul+0xf8>
|
|
8000c80: 441a add r2, r3
|
|
8000c82: ea80 0c01 eor.w ip, r0, r1
|
|
8000c86: 0240 lsls r0, r0, #9
|
|
8000c88: bf18 it ne
|
|
8000c8a: ea5f 2141 movsne.w r1, r1, lsl #9
|
|
8000c8e: d01e beq.n 8000cce <__aeabi_fmul+0x66>
|
|
8000c90: f04f 6300 mov.w r3, #134217728 ; 0x8000000
|
|
8000c94: ea43 1050 orr.w r0, r3, r0, lsr #5
|
|
8000c98: ea43 1151 orr.w r1, r3, r1, lsr #5
|
|
8000c9c: fba0 3101 umull r3, r1, r0, r1
|
|
8000ca0: f00c 4000 and.w r0, ip, #2147483648 ; 0x80000000
|
|
8000ca4: f5b1 0f00 cmp.w r1, #8388608 ; 0x800000
|
|
8000ca8: bf3e ittt cc
|
|
8000caa: 0049 lslcc r1, r1, #1
|
|
8000cac: ea41 71d3 orrcc.w r1, r1, r3, lsr #31
|
|
8000cb0: 005b lslcc r3, r3, #1
|
|
8000cb2: ea40 0001 orr.w r0, r0, r1
|
|
8000cb6: f162 027f sbc.w r2, r2, #127 ; 0x7f
|
|
8000cba: 2afd cmp r2, #253 ; 0xfd
|
|
8000cbc: d81d bhi.n 8000cfa <__aeabi_fmul+0x92>
|
|
8000cbe: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000
|
|
8000cc2: eb40 50c2 adc.w r0, r0, r2, lsl #23
|
|
8000cc6: bf08 it eq
|
|
8000cc8: f020 0001 biceq.w r0, r0, #1
|
|
8000ccc: 4770 bx lr
|
|
8000cce: f090 0f00 teq r0, #0
|
|
8000cd2: f00c 4c00 and.w ip, ip, #2147483648 ; 0x80000000
|
|
8000cd6: bf08 it eq
|
|
8000cd8: 0249 lsleq r1, r1, #9
|
|
8000cda: ea4c 2050 orr.w r0, ip, r0, lsr #9
|
|
8000cde: ea40 2051 orr.w r0, r0, r1, lsr #9
|
|
8000ce2: 3a7f subs r2, #127 ; 0x7f
|
|
8000ce4: bfc2 ittt gt
|
|
8000ce6: f1d2 03ff rsbsgt r3, r2, #255 ; 0xff
|
|
8000cea: ea40 50c2 orrgt.w r0, r0, r2, lsl #23
|
|
8000cee: 4770 bxgt lr
|
|
8000cf0: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
|
8000cf4: f04f 0300 mov.w r3, #0
|
|
8000cf8: 3a01 subs r2, #1
|
|
8000cfa: dc5d bgt.n 8000db8 <__aeabi_fmul+0x150>
|
|
8000cfc: f112 0f19 cmn.w r2, #25
|
|
8000d00: bfdc itt le
|
|
8000d02: f000 4000 andle.w r0, r0, #2147483648 ; 0x80000000
|
|
8000d06: 4770 bxle lr
|
|
8000d08: f1c2 0200 rsb r2, r2, #0
|
|
8000d0c: 0041 lsls r1, r0, #1
|
|
8000d0e: fa21 f102 lsr.w r1, r1, r2
|
|
8000d12: f1c2 0220 rsb r2, r2, #32
|
|
8000d16: fa00 fc02 lsl.w ip, r0, r2
|
|
8000d1a: ea5f 0031 movs.w r0, r1, rrx
|
|
8000d1e: f140 0000 adc.w r0, r0, #0
|
|
8000d22: ea53 034c orrs.w r3, r3, ip, lsl #1
|
|
8000d26: bf08 it eq
|
|
8000d28: ea20 70dc biceq.w r0, r0, ip, lsr #31
|
|
8000d2c: 4770 bx lr
|
|
8000d2e: f092 0f00 teq r2, #0
|
|
8000d32: f000 4c00 and.w ip, r0, #2147483648 ; 0x80000000
|
|
8000d36: bf02 ittt eq
|
|
8000d38: 0040 lsleq r0, r0, #1
|
|
8000d3a: f410 0f00 tsteq.w r0, #8388608 ; 0x800000
|
|
8000d3e: 3a01 subeq r2, #1
|
|
8000d40: d0f9 beq.n 8000d36 <__aeabi_fmul+0xce>
|
|
8000d42: ea40 000c orr.w r0, r0, ip
|
|
8000d46: f093 0f00 teq r3, #0
|
|
8000d4a: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000
|
|
8000d4e: bf02 ittt eq
|
|
8000d50: 0049 lsleq r1, r1, #1
|
|
8000d52: f411 0f00 tsteq.w r1, #8388608 ; 0x800000
|
|
8000d56: 3b01 subeq r3, #1
|
|
8000d58: d0f9 beq.n 8000d4e <__aeabi_fmul+0xe6>
|
|
8000d5a: ea41 010c orr.w r1, r1, ip
|
|
8000d5e: e78f b.n 8000c80 <__aeabi_fmul+0x18>
|
|
8000d60: ea0c 53d1 and.w r3, ip, r1, lsr #23
|
|
8000d64: ea92 0f0c teq r2, ip
|
|
8000d68: bf18 it ne
|
|
8000d6a: ea93 0f0c teqne r3, ip
|
|
8000d6e: d00a beq.n 8000d86 <__aeabi_fmul+0x11e>
|
|
8000d70: f030 4c00 bics.w ip, r0, #2147483648 ; 0x80000000
|
|
8000d74: bf18 it ne
|
|
8000d76: f031 4c00 bicsne.w ip, r1, #2147483648 ; 0x80000000
|
|
8000d7a: d1d8 bne.n 8000d2e <__aeabi_fmul+0xc6>
|
|
8000d7c: ea80 0001 eor.w r0, r0, r1
|
|
8000d80: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000
|
|
8000d84: 4770 bx lr
|
|
8000d86: f090 0f00 teq r0, #0
|
|
8000d8a: bf17 itett ne
|
|
8000d8c: f090 4f00 teqne r0, #2147483648 ; 0x80000000
|
|
8000d90: 4608 moveq r0, r1
|
|
8000d92: f091 0f00 teqne r1, #0
|
|
8000d96: f091 4f00 teqne r1, #2147483648 ; 0x80000000
|
|
8000d9a: d014 beq.n 8000dc6 <__aeabi_fmul+0x15e>
|
|
8000d9c: ea92 0f0c teq r2, ip
|
|
8000da0: d101 bne.n 8000da6 <__aeabi_fmul+0x13e>
|
|
8000da2: 0242 lsls r2, r0, #9
|
|
8000da4: d10f bne.n 8000dc6 <__aeabi_fmul+0x15e>
|
|
8000da6: ea93 0f0c teq r3, ip
|
|
8000daa: d103 bne.n 8000db4 <__aeabi_fmul+0x14c>
|
|
8000dac: 024b lsls r3, r1, #9
|
|
8000dae: bf18 it ne
|
|
8000db0: 4608 movne r0, r1
|
|
8000db2: d108 bne.n 8000dc6 <__aeabi_fmul+0x15e>
|
|
8000db4: ea80 0001 eor.w r0, r0, r1
|
|
8000db8: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000
|
|
8000dbc: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000
|
|
8000dc0: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
|
8000dc4: 4770 bx lr
|
|
8000dc6: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000
|
|
8000dca: f440 0040 orr.w r0, r0, #12582912 ; 0xc00000
|
|
8000dce: 4770 bx lr
|
|
|
|
08000dd0 <__aeabi_fdiv>:
|
|
8000dd0: f04f 0cff mov.w ip, #255 ; 0xff
|
|
8000dd4: ea1c 52d0 ands.w r2, ip, r0, lsr #23
|
|
8000dd8: bf1e ittt ne
|
|
8000dda: ea1c 53d1 andsne.w r3, ip, r1, lsr #23
|
|
8000dde: ea92 0f0c teqne r2, ip
|
|
8000de2: ea93 0f0c teqne r3, ip
|
|
8000de6: d069 beq.n 8000ebc <__aeabi_fdiv+0xec>
|
|
8000de8: eba2 0203 sub.w r2, r2, r3
|
|
8000dec: ea80 0c01 eor.w ip, r0, r1
|
|
8000df0: 0249 lsls r1, r1, #9
|
|
8000df2: ea4f 2040 mov.w r0, r0, lsl #9
|
|
8000df6: d037 beq.n 8000e68 <__aeabi_fdiv+0x98>
|
|
8000df8: f04f 5380 mov.w r3, #268435456 ; 0x10000000
|
|
8000dfc: ea43 1111 orr.w r1, r3, r1, lsr #4
|
|
8000e00: ea43 1310 orr.w r3, r3, r0, lsr #4
|
|
8000e04: f00c 4000 and.w r0, ip, #2147483648 ; 0x80000000
|
|
8000e08: 428b cmp r3, r1
|
|
8000e0a: bf38 it cc
|
|
8000e0c: 005b lslcc r3, r3, #1
|
|
8000e0e: f142 027d adc.w r2, r2, #125 ; 0x7d
|
|
8000e12: f44f 0c00 mov.w ip, #8388608 ; 0x800000
|
|
8000e16: 428b cmp r3, r1
|
|
8000e18: bf24 itt cs
|
|
8000e1a: 1a5b subcs r3, r3, r1
|
|
8000e1c: ea40 000c orrcs.w r0, r0, ip
|
|
8000e20: ebb3 0f51 cmp.w r3, r1, lsr #1
|
|
8000e24: bf24 itt cs
|
|
8000e26: eba3 0351 subcs.w r3, r3, r1, lsr #1
|
|
8000e2a: ea40 005c orrcs.w r0, r0, ip, lsr #1
|
|
8000e2e: ebb3 0f91 cmp.w r3, r1, lsr #2
|
|
8000e32: bf24 itt cs
|
|
8000e34: eba3 0391 subcs.w r3, r3, r1, lsr #2
|
|
8000e38: ea40 009c orrcs.w r0, r0, ip, lsr #2
|
|
8000e3c: ebb3 0fd1 cmp.w r3, r1, lsr #3
|
|
8000e40: bf24 itt cs
|
|
8000e42: eba3 03d1 subcs.w r3, r3, r1, lsr #3
|
|
8000e46: ea40 00dc orrcs.w r0, r0, ip, lsr #3
|
|
8000e4a: 011b lsls r3, r3, #4
|
|
8000e4c: bf18 it ne
|
|
8000e4e: ea5f 1c1c movsne.w ip, ip, lsr #4
|
|
8000e52: d1e0 bne.n 8000e16 <__aeabi_fdiv+0x46>
|
|
8000e54: 2afd cmp r2, #253 ; 0xfd
|
|
8000e56: f63f af50 bhi.w 8000cfa <__aeabi_fmul+0x92>
|
|
8000e5a: 428b cmp r3, r1
|
|
8000e5c: eb40 50c2 adc.w r0, r0, r2, lsl #23
|
|
8000e60: bf08 it eq
|
|
8000e62: f020 0001 biceq.w r0, r0, #1
|
|
8000e66: 4770 bx lr
|
|
8000e68: f00c 4c00 and.w ip, ip, #2147483648 ; 0x80000000
|
|
8000e6c: ea4c 2050 orr.w r0, ip, r0, lsr #9
|
|
8000e70: 327f adds r2, #127 ; 0x7f
|
|
8000e72: bfc2 ittt gt
|
|
8000e74: f1d2 03ff rsbsgt r3, r2, #255 ; 0xff
|
|
8000e78: ea40 50c2 orrgt.w r0, r0, r2, lsl #23
|
|
8000e7c: 4770 bxgt lr
|
|
8000e7e: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
|
8000e82: f04f 0300 mov.w r3, #0
|
|
8000e86: 3a01 subs r2, #1
|
|
8000e88: e737 b.n 8000cfa <__aeabi_fmul+0x92>
|
|
8000e8a: f092 0f00 teq r2, #0
|
|
8000e8e: f000 4c00 and.w ip, r0, #2147483648 ; 0x80000000
|
|
8000e92: bf02 ittt eq
|
|
8000e94: 0040 lsleq r0, r0, #1
|
|
8000e96: f410 0f00 tsteq.w r0, #8388608 ; 0x800000
|
|
8000e9a: 3a01 subeq r2, #1
|
|
8000e9c: d0f9 beq.n 8000e92 <__aeabi_fdiv+0xc2>
|
|
8000e9e: ea40 000c orr.w r0, r0, ip
|
|
8000ea2: f093 0f00 teq r3, #0
|
|
8000ea6: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000
|
|
8000eaa: bf02 ittt eq
|
|
8000eac: 0049 lsleq r1, r1, #1
|
|
8000eae: f411 0f00 tsteq.w r1, #8388608 ; 0x800000
|
|
8000eb2: 3b01 subeq r3, #1
|
|
8000eb4: d0f9 beq.n 8000eaa <__aeabi_fdiv+0xda>
|
|
8000eb6: ea41 010c orr.w r1, r1, ip
|
|
8000eba: e795 b.n 8000de8 <__aeabi_fdiv+0x18>
|
|
8000ebc: ea0c 53d1 and.w r3, ip, r1, lsr #23
|
|
8000ec0: ea92 0f0c teq r2, ip
|
|
8000ec4: d108 bne.n 8000ed8 <__aeabi_fdiv+0x108>
|
|
8000ec6: 0242 lsls r2, r0, #9
|
|
8000ec8: f47f af7d bne.w 8000dc6 <__aeabi_fmul+0x15e>
|
|
8000ecc: ea93 0f0c teq r3, ip
|
|
8000ed0: f47f af70 bne.w 8000db4 <__aeabi_fmul+0x14c>
|
|
8000ed4: 4608 mov r0, r1
|
|
8000ed6: e776 b.n 8000dc6 <__aeabi_fmul+0x15e>
|
|
8000ed8: ea93 0f0c teq r3, ip
|
|
8000edc: d104 bne.n 8000ee8 <__aeabi_fdiv+0x118>
|
|
8000ede: 024b lsls r3, r1, #9
|
|
8000ee0: f43f af4c beq.w 8000d7c <__aeabi_fmul+0x114>
|
|
8000ee4: 4608 mov r0, r1
|
|
8000ee6: e76e b.n 8000dc6 <__aeabi_fmul+0x15e>
|
|
8000ee8: f030 4c00 bics.w ip, r0, #2147483648 ; 0x80000000
|
|
8000eec: bf18 it ne
|
|
8000eee: f031 4c00 bicsne.w ip, r1, #2147483648 ; 0x80000000
|
|
8000ef2: d1ca bne.n 8000e8a <__aeabi_fdiv+0xba>
|
|
8000ef4: f030 4200 bics.w r2, r0, #2147483648 ; 0x80000000
|
|
8000ef8: f47f af5c bne.w 8000db4 <__aeabi_fmul+0x14c>
|
|
8000efc: f031 4300 bics.w r3, r1, #2147483648 ; 0x80000000
|
|
8000f00: f47f af3c bne.w 8000d7c <__aeabi_fmul+0x114>
|
|
8000f04: e75f b.n 8000dc6 <__aeabi_fmul+0x15e>
|
|
8000f06: bf00 nop
|
|
|
|
08000f08 <__gesf2>:
|
|
8000f08: f04f 3cff mov.w ip, #4294967295 ; 0xffffffff
|
|
8000f0c: e006 b.n 8000f1c <__cmpsf2+0x4>
|
|
8000f0e: bf00 nop
|
|
|
|
08000f10 <__lesf2>:
|
|
8000f10: f04f 0c01 mov.w ip, #1
|
|
8000f14: e002 b.n 8000f1c <__cmpsf2+0x4>
|
|
8000f16: bf00 nop
|
|
|
|
08000f18 <__cmpsf2>:
|
|
8000f18: f04f 0c01 mov.w ip, #1
|
|
8000f1c: f84d cd04 str.w ip, [sp, #-4]!
|
|
8000f20: ea4f 0240 mov.w r2, r0, lsl #1
|
|
8000f24: ea4f 0341 mov.w r3, r1, lsl #1
|
|
8000f28: ea7f 6c22 mvns.w ip, r2, asr #24
|
|
8000f2c: bf18 it ne
|
|
8000f2e: ea7f 6c23 mvnsne.w ip, r3, asr #24
|
|
8000f32: d011 beq.n 8000f58 <__cmpsf2+0x40>
|
|
8000f34: b001 add sp, #4
|
|
8000f36: ea52 0c53 orrs.w ip, r2, r3, lsr #1
|
|
8000f3a: bf18 it ne
|
|
8000f3c: ea90 0f01 teqne r0, r1
|
|
8000f40: bf58 it pl
|
|
8000f42: ebb2 0003 subspl.w r0, r2, r3
|
|
8000f46: bf88 it hi
|
|
8000f48: 17c8 asrhi r0, r1, #31
|
|
8000f4a: bf38 it cc
|
|
8000f4c: ea6f 70e1 mvncc.w r0, r1, asr #31
|
|
8000f50: bf18 it ne
|
|
8000f52: f040 0001 orrne.w r0, r0, #1
|
|
8000f56: 4770 bx lr
|
|
8000f58: ea7f 6c22 mvns.w ip, r2, asr #24
|
|
8000f5c: d102 bne.n 8000f64 <__cmpsf2+0x4c>
|
|
8000f5e: ea5f 2c40 movs.w ip, r0, lsl #9
|
|
8000f62: d105 bne.n 8000f70 <__cmpsf2+0x58>
|
|
8000f64: ea7f 6c23 mvns.w ip, r3, asr #24
|
|
8000f68: d1e4 bne.n 8000f34 <__cmpsf2+0x1c>
|
|
8000f6a: ea5f 2c41 movs.w ip, r1, lsl #9
|
|
8000f6e: d0e1 beq.n 8000f34 <__cmpsf2+0x1c>
|
|
8000f70: f85d 0b04 ldr.w r0, [sp], #4
|
|
8000f74: 4770 bx lr
|
|
8000f76: bf00 nop
|
|
|
|
08000f78 <__aeabi_cfrcmple>:
|
|
8000f78: 4684 mov ip, r0
|
|
8000f7a: 4608 mov r0, r1
|
|
8000f7c: 4661 mov r1, ip
|
|
8000f7e: e7ff b.n 8000f80 <__aeabi_cfcmpeq>
|
|
|
|
08000f80 <__aeabi_cfcmpeq>:
|
|
8000f80: b50f push {r0, r1, r2, r3, lr}
|
|
8000f82: f7ff ffc9 bl 8000f18 <__cmpsf2>
|
|
8000f86: 2800 cmp r0, #0
|
|
8000f88: bf48 it mi
|
|
8000f8a: f110 0f00 cmnmi.w r0, #0
|
|
8000f8e: bd0f pop {r0, r1, r2, r3, pc}
|
|
|
|
08000f90 <__aeabi_fcmpeq>:
|
|
8000f90: f84d ed08 str.w lr, [sp, #-8]!
|
|
8000f94: f7ff fff4 bl 8000f80 <__aeabi_cfcmpeq>
|
|
8000f98: bf0c ite eq
|
|
8000f9a: 2001 moveq r0, #1
|
|
8000f9c: 2000 movne r0, #0
|
|
8000f9e: f85d fb08 ldr.w pc, [sp], #8
|
|
8000fa2: bf00 nop
|
|
|
|
08000fa4 <__aeabi_fcmplt>:
|
|
8000fa4: f84d ed08 str.w lr, [sp, #-8]!
|
|
8000fa8: f7ff ffea bl 8000f80 <__aeabi_cfcmpeq>
|
|
8000fac: bf34 ite cc
|
|
8000fae: 2001 movcc r0, #1
|
|
8000fb0: 2000 movcs r0, #0
|
|
8000fb2: f85d fb08 ldr.w pc, [sp], #8
|
|
8000fb6: bf00 nop
|
|
|
|
08000fb8 <__aeabi_fcmple>:
|
|
8000fb8: f84d ed08 str.w lr, [sp, #-8]!
|
|
8000fbc: f7ff ffe0 bl 8000f80 <__aeabi_cfcmpeq>
|
|
8000fc0: bf94 ite ls
|
|
8000fc2: 2001 movls r0, #1
|
|
8000fc4: 2000 movhi r0, #0
|
|
8000fc6: f85d fb08 ldr.w pc, [sp], #8
|
|
8000fca: bf00 nop
|
|
|
|
08000fcc <__aeabi_fcmpge>:
|
|
8000fcc: f84d ed08 str.w lr, [sp, #-8]!
|
|
8000fd0: f7ff ffd2 bl 8000f78 <__aeabi_cfrcmple>
|
|
8000fd4: bf94 ite ls
|
|
8000fd6: 2001 movls r0, #1
|
|
8000fd8: 2000 movhi r0, #0
|
|
8000fda: f85d fb08 ldr.w pc, [sp], #8
|
|
8000fde: bf00 nop
|
|
|
|
08000fe0 <__aeabi_fcmpgt>:
|
|
8000fe0: f84d ed08 str.w lr, [sp, #-8]!
|
|
8000fe4: f7ff ffc8 bl 8000f78 <__aeabi_cfrcmple>
|
|
8000fe8: bf34 ite cc
|
|
8000fea: 2001 movcc r0, #1
|
|
8000fec: 2000 movcs r0, #0
|
|
8000fee: f85d fb08 ldr.w pc, [sp], #8
|
|
8000ff2: bf00 nop
|
|
|
|
08000ff4 <HAL_Init>:
|
|
* need to ensure that the SysTick time base is always set to 1 millisecond
|
|
* to have correct HAL operation.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_Init(void)
|
|
{
|
|
8000ff4: b580 push {r7, lr}
|
|
8000ff6: af00 add r7, sp, #0
|
|
defined(STM32F102x6) || defined(STM32F102xB) || \
|
|
defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \
|
|
defined(STM32F105xC) || defined(STM32F107xC)
|
|
|
|
/* Prefetch buffer is not available on value line devices */
|
|
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
|
|
8000ff8: 4b08 ldr r3, [pc, #32] ; (800101c <HAL_Init+0x28>)
|
|
8000ffa: 681b ldr r3, [r3, #0]
|
|
8000ffc: 4a07 ldr r2, [pc, #28] ; (800101c <HAL_Init+0x28>)
|
|
8000ffe: f043 0310 orr.w r3, r3, #16
|
|
8001002: 6013 str r3, [r2, #0]
|
|
#endif
|
|
#endif /* PREFETCH_ENABLE */
|
|
|
|
/* Set Interrupt Group Priority */
|
|
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
|
|
8001004: 2003 movs r0, #3
|
|
8001006: f000 f945 bl 8001294 <HAL_NVIC_SetPriorityGrouping>
|
|
|
|
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
|
|
HAL_InitTick(TICK_INT_PRIORITY);
|
|
800100a: 200f movs r0, #15
|
|
800100c: f000 f808 bl 8001020 <HAL_InitTick>
|
|
|
|
/* Init the low level hardware */
|
|
HAL_MspInit();
|
|
8001010: f008 ff9c bl 8009f4c <HAL_MspInit>
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
8001014: 2300 movs r3, #0
|
|
}
|
|
8001016: 4618 mov r0, r3
|
|
8001018: bd80 pop {r7, pc}
|
|
800101a: bf00 nop
|
|
800101c: 40022000 .word 0x40022000
|
|
|
|
08001020 <HAL_InitTick>:
|
|
* implementation in user file.
|
|
* @param TickPriority Tick interrupt priority.
|
|
* @retval HAL status
|
|
*/
|
|
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
|
|
{
|
|
8001020: b580 push {r7, lr}
|
|
8001022: b082 sub sp, #8
|
|
8001024: af00 add r7, sp, #0
|
|
8001026: 6078 str r0, [r7, #4]
|
|
/* Configure the SysTick to have interrupt in 1ms time basis*/
|
|
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
|
|
8001028: 4b12 ldr r3, [pc, #72] ; (8001074 <HAL_InitTick+0x54>)
|
|
800102a: 681a ldr r2, [r3, #0]
|
|
800102c: 4b12 ldr r3, [pc, #72] ; (8001078 <HAL_InitTick+0x58>)
|
|
800102e: 781b ldrb r3, [r3, #0]
|
|
8001030: 4619 mov r1, r3
|
|
8001032: f44f 737a mov.w r3, #1000 ; 0x3e8
|
|
8001036: fbb3 f3f1 udiv r3, r3, r1
|
|
800103a: fbb2 f3f3 udiv r3, r2, r3
|
|
800103e: 4618 mov r0, r3
|
|
8001040: f000 f95d bl 80012fe <HAL_SYSTICK_Config>
|
|
8001044: 4603 mov r3, r0
|
|
8001046: 2b00 cmp r3, #0
|
|
8001048: d001 beq.n 800104e <HAL_InitTick+0x2e>
|
|
{
|
|
return HAL_ERROR;
|
|
800104a: 2301 movs r3, #1
|
|
800104c: e00e b.n 800106c <HAL_InitTick+0x4c>
|
|
}
|
|
|
|
/* Configure the SysTick IRQ priority */
|
|
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
|
|
800104e: 687b ldr r3, [r7, #4]
|
|
8001050: 2b0f cmp r3, #15
|
|
8001052: d80a bhi.n 800106a <HAL_InitTick+0x4a>
|
|
{
|
|
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
|
|
8001054: 2200 movs r2, #0
|
|
8001056: 6879 ldr r1, [r7, #4]
|
|
8001058: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
|
800105c: f000 f925 bl 80012aa <HAL_NVIC_SetPriority>
|
|
uwTickPrio = TickPriority;
|
|
8001060: 4a06 ldr r2, [pc, #24] ; (800107c <HAL_InitTick+0x5c>)
|
|
8001062: 687b ldr r3, [r7, #4]
|
|
8001064: 6013 str r3, [r2, #0]
|
|
{
|
|
return HAL_ERROR;
|
|
}
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
8001066: 2300 movs r3, #0
|
|
8001068: e000 b.n 800106c <HAL_InitTick+0x4c>
|
|
return HAL_ERROR;
|
|
800106a: 2301 movs r3, #1
|
|
}
|
|
800106c: 4618 mov r0, r3
|
|
800106e: 3708 adds r7, #8
|
|
8001070: 46bd mov sp, r7
|
|
8001072: bd80 pop {r7, pc}
|
|
8001074: 20000140 .word 0x20000140
|
|
8001078: 20000004 .word 0x20000004
|
|
800107c: 20000000 .word 0x20000000
|
|
|
|
08001080 <HAL_IncTick>:
|
|
* @note This function is declared as __weak to be overwritten in case of other
|
|
* implementations in user file.
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_IncTick(void)
|
|
{
|
|
8001080: b480 push {r7}
|
|
8001082: af00 add r7, sp, #0
|
|
uwTick += uwTickFreq;
|
|
8001084: 4b05 ldr r3, [pc, #20] ; (800109c <HAL_IncTick+0x1c>)
|
|
8001086: 781b ldrb r3, [r3, #0]
|
|
8001088: 461a mov r2, r3
|
|
800108a: 4b05 ldr r3, [pc, #20] ; (80010a0 <HAL_IncTick+0x20>)
|
|
800108c: 681b ldr r3, [r3, #0]
|
|
800108e: 4413 add r3, r2
|
|
8001090: 4a03 ldr r2, [pc, #12] ; (80010a0 <HAL_IncTick+0x20>)
|
|
8001092: 6013 str r3, [r2, #0]
|
|
}
|
|
8001094: bf00 nop
|
|
8001096: 46bd mov sp, r7
|
|
8001098: bc80 pop {r7}
|
|
800109a: 4770 bx lr
|
|
800109c: 20000004 .word 0x20000004
|
|
80010a0: 200011f4 .word 0x200011f4
|
|
|
|
080010a4 <HAL_GetTick>:
|
|
* @note This function is declared as __weak to be overwritten in case of other
|
|
* implementations in user file.
|
|
* @retval tick value
|
|
*/
|
|
__weak uint32_t HAL_GetTick(void)
|
|
{
|
|
80010a4: b480 push {r7}
|
|
80010a6: af00 add r7, sp, #0
|
|
return uwTick;
|
|
80010a8: 4b02 ldr r3, [pc, #8] ; (80010b4 <HAL_GetTick+0x10>)
|
|
80010aa: 681b ldr r3, [r3, #0]
|
|
}
|
|
80010ac: 4618 mov r0, r3
|
|
80010ae: 46bd mov sp, r7
|
|
80010b0: bc80 pop {r7}
|
|
80010b2: 4770 bx lr
|
|
80010b4: 200011f4 .word 0x200011f4
|
|
|
|
080010b8 <HAL_Delay>:
|
|
* implementations in user file.
|
|
* @param Delay specifies the delay time length, in milliseconds.
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_Delay(uint32_t Delay)
|
|
{
|
|
80010b8: b580 push {r7, lr}
|
|
80010ba: b084 sub sp, #16
|
|
80010bc: af00 add r7, sp, #0
|
|
80010be: 6078 str r0, [r7, #4]
|
|
uint32_t tickstart = HAL_GetTick();
|
|
80010c0: f7ff fff0 bl 80010a4 <HAL_GetTick>
|
|
80010c4: 60b8 str r0, [r7, #8]
|
|
uint32_t wait = Delay;
|
|
80010c6: 687b ldr r3, [r7, #4]
|
|
80010c8: 60fb str r3, [r7, #12]
|
|
|
|
/* Add a freq to guarantee minimum wait */
|
|
if (wait < HAL_MAX_DELAY)
|
|
80010ca: 68fb ldr r3, [r7, #12]
|
|
80010cc: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
|
80010d0: d005 beq.n 80010de <HAL_Delay+0x26>
|
|
{
|
|
wait += (uint32_t)(uwTickFreq);
|
|
80010d2: 4b09 ldr r3, [pc, #36] ; (80010f8 <HAL_Delay+0x40>)
|
|
80010d4: 781b ldrb r3, [r3, #0]
|
|
80010d6: 461a mov r2, r3
|
|
80010d8: 68fb ldr r3, [r7, #12]
|
|
80010da: 4413 add r3, r2
|
|
80010dc: 60fb str r3, [r7, #12]
|
|
}
|
|
|
|
while ((HAL_GetTick() - tickstart) < wait)
|
|
80010de: bf00 nop
|
|
80010e0: f7ff ffe0 bl 80010a4 <HAL_GetTick>
|
|
80010e4: 4602 mov r2, r0
|
|
80010e6: 68bb ldr r3, [r7, #8]
|
|
80010e8: 1ad3 subs r3, r2, r3
|
|
80010ea: 68fa ldr r2, [r7, #12]
|
|
80010ec: 429a cmp r2, r3
|
|
80010ee: d8f7 bhi.n 80010e0 <HAL_Delay+0x28>
|
|
{
|
|
}
|
|
}
|
|
80010f0: bf00 nop
|
|
80010f2: 3710 adds r7, #16
|
|
80010f4: 46bd mov sp, r7
|
|
80010f6: bd80 pop {r7, pc}
|
|
80010f8: 20000004 .word 0x20000004
|
|
|
|
080010fc <__NVIC_SetPriorityGrouping>:
|
|
In case of a conflict between priority grouping and available
|
|
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
|
|
\param [in] PriorityGroup Priority grouping field.
|
|
*/
|
|
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
|
|
{
|
|
80010fc: b480 push {r7}
|
|
80010fe: b085 sub sp, #20
|
|
8001100: af00 add r7, sp, #0
|
|
8001102: 6078 str r0, [r7, #4]
|
|
uint32_t reg_value;
|
|
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
|
|
8001104: 687b ldr r3, [r7, #4]
|
|
8001106: f003 0307 and.w r3, r3, #7
|
|
800110a: 60fb str r3, [r7, #12]
|
|
|
|
reg_value = SCB->AIRCR; /* read old register configuration */
|
|
800110c: 4b0c ldr r3, [pc, #48] ; (8001140 <__NVIC_SetPriorityGrouping+0x44>)
|
|
800110e: 68db ldr r3, [r3, #12]
|
|
8001110: 60bb str r3, [r7, #8]
|
|
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
|
|
8001112: 68ba ldr r2, [r7, #8]
|
|
8001114: f64f 03ff movw r3, #63743 ; 0xf8ff
|
|
8001118: 4013 ands r3, r2
|
|
800111a: 60bb str r3, [r7, #8]
|
|
reg_value = (reg_value |
|
|
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
|
|
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
|
|
800111c: 68fb ldr r3, [r7, #12]
|
|
800111e: 021a lsls r2, r3, #8
|
|
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
|
|
8001120: 68bb ldr r3, [r7, #8]
|
|
8001122: 4313 orrs r3, r2
|
|
reg_value = (reg_value |
|
|
8001124: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000
|
|
8001128: f443 3300 orr.w r3, r3, #131072 ; 0x20000
|
|
800112c: 60bb str r3, [r7, #8]
|
|
SCB->AIRCR = reg_value;
|
|
800112e: 4a04 ldr r2, [pc, #16] ; (8001140 <__NVIC_SetPriorityGrouping+0x44>)
|
|
8001130: 68bb ldr r3, [r7, #8]
|
|
8001132: 60d3 str r3, [r2, #12]
|
|
}
|
|
8001134: bf00 nop
|
|
8001136: 3714 adds r7, #20
|
|
8001138: 46bd mov sp, r7
|
|
800113a: bc80 pop {r7}
|
|
800113c: 4770 bx lr
|
|
800113e: bf00 nop
|
|
8001140: e000ed00 .word 0xe000ed00
|
|
|
|
08001144 <__NVIC_GetPriorityGrouping>:
|
|
\brief Get Priority Grouping
|
|
\details Reads the priority grouping field from the NVIC Interrupt Controller.
|
|
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
|
|
*/
|
|
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
|
|
{
|
|
8001144: b480 push {r7}
|
|
8001146: af00 add r7, sp, #0
|
|
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
|
|
8001148: 4b04 ldr r3, [pc, #16] ; (800115c <__NVIC_GetPriorityGrouping+0x18>)
|
|
800114a: 68db ldr r3, [r3, #12]
|
|
800114c: 0a1b lsrs r3, r3, #8
|
|
800114e: f003 0307 and.w r3, r3, #7
|
|
}
|
|
8001152: 4618 mov r0, r3
|
|
8001154: 46bd mov sp, r7
|
|
8001156: bc80 pop {r7}
|
|
8001158: 4770 bx lr
|
|
800115a: bf00 nop
|
|
800115c: e000ed00 .word 0xe000ed00
|
|
|
|
08001160 <__NVIC_EnableIRQ>:
|
|
\details Enables a device specific interrupt in the NVIC interrupt controller.
|
|
\param [in] IRQn Device specific interrupt number.
|
|
\note IRQn must not be negative.
|
|
*/
|
|
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
|
|
{
|
|
8001160: b480 push {r7}
|
|
8001162: b083 sub sp, #12
|
|
8001164: af00 add r7, sp, #0
|
|
8001166: 4603 mov r3, r0
|
|
8001168: 71fb strb r3, [r7, #7]
|
|
if ((int32_t)(IRQn) >= 0)
|
|
800116a: f997 3007 ldrsb.w r3, [r7, #7]
|
|
800116e: 2b00 cmp r3, #0
|
|
8001170: db0b blt.n 800118a <__NVIC_EnableIRQ+0x2a>
|
|
{
|
|
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
|
|
8001172: 79fb ldrb r3, [r7, #7]
|
|
8001174: f003 021f and.w r2, r3, #31
|
|
8001178: 4906 ldr r1, [pc, #24] ; (8001194 <__NVIC_EnableIRQ+0x34>)
|
|
800117a: f997 3007 ldrsb.w r3, [r7, #7]
|
|
800117e: 095b lsrs r3, r3, #5
|
|
8001180: 2001 movs r0, #1
|
|
8001182: fa00 f202 lsl.w r2, r0, r2
|
|
8001186: f841 2023 str.w r2, [r1, r3, lsl #2]
|
|
}
|
|
}
|
|
800118a: bf00 nop
|
|
800118c: 370c adds r7, #12
|
|
800118e: 46bd mov sp, r7
|
|
8001190: bc80 pop {r7}
|
|
8001192: 4770 bx lr
|
|
8001194: e000e100 .word 0xe000e100
|
|
|
|
08001198 <__NVIC_SetPriority>:
|
|
\param [in] IRQn Interrupt number.
|
|
\param [in] priority Priority to set.
|
|
\note The priority cannot be set for every processor exception.
|
|
*/
|
|
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
|
|
{
|
|
8001198: b480 push {r7}
|
|
800119a: b083 sub sp, #12
|
|
800119c: af00 add r7, sp, #0
|
|
800119e: 4603 mov r3, r0
|
|
80011a0: 6039 str r1, [r7, #0]
|
|
80011a2: 71fb strb r3, [r7, #7]
|
|
if ((int32_t)(IRQn) >= 0)
|
|
80011a4: f997 3007 ldrsb.w r3, [r7, #7]
|
|
80011a8: 2b00 cmp r3, #0
|
|
80011aa: db0a blt.n 80011c2 <__NVIC_SetPriority+0x2a>
|
|
{
|
|
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
|
80011ac: 683b ldr r3, [r7, #0]
|
|
80011ae: b2da uxtb r2, r3
|
|
80011b0: 490c ldr r1, [pc, #48] ; (80011e4 <__NVIC_SetPriority+0x4c>)
|
|
80011b2: f997 3007 ldrsb.w r3, [r7, #7]
|
|
80011b6: 0112 lsls r2, r2, #4
|
|
80011b8: b2d2 uxtb r2, r2
|
|
80011ba: 440b add r3, r1
|
|
80011bc: f883 2300 strb.w r2, [r3, #768] ; 0x300
|
|
}
|
|
else
|
|
{
|
|
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
|
}
|
|
}
|
|
80011c0: e00a b.n 80011d8 <__NVIC_SetPriority+0x40>
|
|
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
|
80011c2: 683b ldr r3, [r7, #0]
|
|
80011c4: b2da uxtb r2, r3
|
|
80011c6: 4908 ldr r1, [pc, #32] ; (80011e8 <__NVIC_SetPriority+0x50>)
|
|
80011c8: 79fb ldrb r3, [r7, #7]
|
|
80011ca: f003 030f and.w r3, r3, #15
|
|
80011ce: 3b04 subs r3, #4
|
|
80011d0: 0112 lsls r2, r2, #4
|
|
80011d2: b2d2 uxtb r2, r2
|
|
80011d4: 440b add r3, r1
|
|
80011d6: 761a strb r2, [r3, #24]
|
|
}
|
|
80011d8: bf00 nop
|
|
80011da: 370c adds r7, #12
|
|
80011dc: 46bd mov sp, r7
|
|
80011de: bc80 pop {r7}
|
|
80011e0: 4770 bx lr
|
|
80011e2: bf00 nop
|
|
80011e4: e000e100 .word 0xe000e100
|
|
80011e8: e000ed00 .word 0xe000ed00
|
|
|
|
080011ec <NVIC_EncodePriority>:
|
|
\param [in] PreemptPriority Preemptive priority value (starting from 0).
|
|
\param [in] SubPriority Subpriority value (starting from 0).
|
|
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
|
|
*/
|
|
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
|
|
{
|
|
80011ec: b480 push {r7}
|
|
80011ee: b089 sub sp, #36 ; 0x24
|
|
80011f0: af00 add r7, sp, #0
|
|
80011f2: 60f8 str r0, [r7, #12]
|
|
80011f4: 60b9 str r1, [r7, #8]
|
|
80011f6: 607a str r2, [r7, #4]
|
|
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
|
|
80011f8: 68fb ldr r3, [r7, #12]
|
|
80011fa: f003 0307 and.w r3, r3, #7
|
|
80011fe: 61fb str r3, [r7, #28]
|
|
uint32_t PreemptPriorityBits;
|
|
uint32_t SubPriorityBits;
|
|
|
|
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
|
|
8001200: 69fb ldr r3, [r7, #28]
|
|
8001202: f1c3 0307 rsb r3, r3, #7
|
|
8001206: 2b04 cmp r3, #4
|
|
8001208: bf28 it cs
|
|
800120a: 2304 movcs r3, #4
|
|
800120c: 61bb str r3, [r7, #24]
|
|
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
|
|
800120e: 69fb ldr r3, [r7, #28]
|
|
8001210: 3304 adds r3, #4
|
|
8001212: 2b06 cmp r3, #6
|
|
8001214: d902 bls.n 800121c <NVIC_EncodePriority+0x30>
|
|
8001216: 69fb ldr r3, [r7, #28]
|
|
8001218: 3b03 subs r3, #3
|
|
800121a: e000 b.n 800121e <NVIC_EncodePriority+0x32>
|
|
800121c: 2300 movs r3, #0
|
|
800121e: 617b str r3, [r7, #20]
|
|
|
|
return (
|
|
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
|
|
8001220: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
|
8001224: 69bb ldr r3, [r7, #24]
|
|
8001226: fa02 f303 lsl.w r3, r2, r3
|
|
800122a: 43da mvns r2, r3
|
|
800122c: 68bb ldr r3, [r7, #8]
|
|
800122e: 401a ands r2, r3
|
|
8001230: 697b ldr r3, [r7, #20]
|
|
8001232: 409a lsls r2, r3
|
|
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
|
|
8001234: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff
|
|
8001238: 697b ldr r3, [r7, #20]
|
|
800123a: fa01 f303 lsl.w r3, r1, r3
|
|
800123e: 43d9 mvns r1, r3
|
|
8001240: 687b ldr r3, [r7, #4]
|
|
8001242: 400b ands r3, r1
|
|
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
|
|
8001244: 4313 orrs r3, r2
|
|
);
|
|
}
|
|
8001246: 4618 mov r0, r3
|
|
8001248: 3724 adds r7, #36 ; 0x24
|
|
800124a: 46bd mov sp, r7
|
|
800124c: bc80 pop {r7}
|
|
800124e: 4770 bx lr
|
|
|
|
08001250 <SysTick_Config>:
|
|
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
|
|
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
|
|
must contain a vendor-specific implementation of this function.
|
|
*/
|
|
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
|
|
{
|
|
8001250: b580 push {r7, lr}
|
|
8001252: b082 sub sp, #8
|
|
8001254: af00 add r7, sp, #0
|
|
8001256: 6078 str r0, [r7, #4]
|
|
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
|
|
8001258: 687b ldr r3, [r7, #4]
|
|
800125a: 3b01 subs r3, #1
|
|
800125c: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000
|
|
8001260: d301 bcc.n 8001266 <SysTick_Config+0x16>
|
|
{
|
|
return (1UL); /* Reload value impossible */
|
|
8001262: 2301 movs r3, #1
|
|
8001264: e00f b.n 8001286 <SysTick_Config+0x36>
|
|
}
|
|
|
|
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
|
|
8001266: 4a0a ldr r2, [pc, #40] ; (8001290 <SysTick_Config+0x40>)
|
|
8001268: 687b ldr r3, [r7, #4]
|
|
800126a: 3b01 subs r3, #1
|
|
800126c: 6053 str r3, [r2, #4]
|
|
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
|
|
800126e: 210f movs r1, #15
|
|
8001270: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
|
8001274: f7ff ff90 bl 8001198 <__NVIC_SetPriority>
|
|
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
|
|
8001278: 4b05 ldr r3, [pc, #20] ; (8001290 <SysTick_Config+0x40>)
|
|
800127a: 2200 movs r2, #0
|
|
800127c: 609a str r2, [r3, #8]
|
|
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
|
|
800127e: 4b04 ldr r3, [pc, #16] ; (8001290 <SysTick_Config+0x40>)
|
|
8001280: 2207 movs r2, #7
|
|
8001282: 601a str r2, [r3, #0]
|
|
SysTick_CTRL_TICKINT_Msk |
|
|
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
|
|
return (0UL); /* Function successful */
|
|
8001284: 2300 movs r3, #0
|
|
}
|
|
8001286: 4618 mov r0, r3
|
|
8001288: 3708 adds r7, #8
|
|
800128a: 46bd mov sp, r7
|
|
800128c: bd80 pop {r7, pc}
|
|
800128e: bf00 nop
|
|
8001290: e000e010 .word 0xe000e010
|
|
|
|
08001294 <HAL_NVIC_SetPriorityGrouping>:
|
|
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
|
|
* The pending IRQ priority will be managed only by the subpriority.
|
|
* @retval None
|
|
*/
|
|
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
|
|
{
|
|
8001294: b580 push {r7, lr}
|
|
8001296: b082 sub sp, #8
|
|
8001298: af00 add r7, sp, #0
|
|
800129a: 6078 str r0, [r7, #4]
|
|
/* Check the parameters */
|
|
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
|
|
|
|
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
|
|
NVIC_SetPriorityGrouping(PriorityGroup);
|
|
800129c: 6878 ldr r0, [r7, #4]
|
|
800129e: f7ff ff2d bl 80010fc <__NVIC_SetPriorityGrouping>
|
|
}
|
|
80012a2: bf00 nop
|
|
80012a4: 3708 adds r7, #8
|
|
80012a6: 46bd mov sp, r7
|
|
80012a8: bd80 pop {r7, pc}
|
|
|
|
080012aa <HAL_NVIC_SetPriority>:
|
|
* This parameter can be a value between 0 and 15
|
|
* A lower priority value indicates a higher priority.
|
|
* @retval None
|
|
*/
|
|
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
|
|
{
|
|
80012aa: b580 push {r7, lr}
|
|
80012ac: b086 sub sp, #24
|
|
80012ae: af00 add r7, sp, #0
|
|
80012b0: 4603 mov r3, r0
|
|
80012b2: 60b9 str r1, [r7, #8]
|
|
80012b4: 607a str r2, [r7, #4]
|
|
80012b6: 73fb strb r3, [r7, #15]
|
|
uint32_t prioritygroup = 0x00U;
|
|
80012b8: 2300 movs r3, #0
|
|
80012ba: 617b str r3, [r7, #20]
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
|
|
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
|
|
|
|
prioritygroup = NVIC_GetPriorityGrouping();
|
|
80012bc: f7ff ff42 bl 8001144 <__NVIC_GetPriorityGrouping>
|
|
80012c0: 6178 str r0, [r7, #20]
|
|
|
|
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
|
|
80012c2: 687a ldr r2, [r7, #4]
|
|
80012c4: 68b9 ldr r1, [r7, #8]
|
|
80012c6: 6978 ldr r0, [r7, #20]
|
|
80012c8: f7ff ff90 bl 80011ec <NVIC_EncodePriority>
|
|
80012cc: 4602 mov r2, r0
|
|
80012ce: f997 300f ldrsb.w r3, [r7, #15]
|
|
80012d2: 4611 mov r1, r2
|
|
80012d4: 4618 mov r0, r3
|
|
80012d6: f7ff ff5f bl 8001198 <__NVIC_SetPriority>
|
|
}
|
|
80012da: bf00 nop
|
|
80012dc: 3718 adds r7, #24
|
|
80012de: 46bd mov sp, r7
|
|
80012e0: bd80 pop {r7, pc}
|
|
|
|
080012e2 <HAL_NVIC_EnableIRQ>:
|
|
* This parameter can be an enumerator of IRQn_Type enumeration
|
|
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h))
|
|
* @retval None
|
|
*/
|
|
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
|
|
{
|
|
80012e2: b580 push {r7, lr}
|
|
80012e4: b082 sub sp, #8
|
|
80012e6: af00 add r7, sp, #0
|
|
80012e8: 4603 mov r3, r0
|
|
80012ea: 71fb strb r3, [r7, #7]
|
|
/* Check the parameters */
|
|
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
|
|
|
|
/* Enable interrupt */
|
|
NVIC_EnableIRQ(IRQn);
|
|
80012ec: f997 3007 ldrsb.w r3, [r7, #7]
|
|
80012f0: 4618 mov r0, r3
|
|
80012f2: f7ff ff35 bl 8001160 <__NVIC_EnableIRQ>
|
|
}
|
|
80012f6: bf00 nop
|
|
80012f8: 3708 adds r7, #8
|
|
80012fa: 46bd mov sp, r7
|
|
80012fc: bd80 pop {r7, pc}
|
|
|
|
080012fe <HAL_SYSTICK_Config>:
|
|
* @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
|
|
* @retval status: - 0 Function succeeded.
|
|
* - 1 Function failed.
|
|
*/
|
|
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
|
|
{
|
|
80012fe: b580 push {r7, lr}
|
|
8001300: b082 sub sp, #8
|
|
8001302: af00 add r7, sp, #0
|
|
8001304: 6078 str r0, [r7, #4]
|
|
return SysTick_Config(TicksNumb);
|
|
8001306: 6878 ldr r0, [r7, #4]
|
|
8001308: f7ff ffa2 bl 8001250 <SysTick_Config>
|
|
800130c: 4603 mov r3, r0
|
|
}
|
|
800130e: 4618 mov r0, r3
|
|
8001310: 3708 adds r7, #8
|
|
8001312: 46bd mov sp, r7
|
|
8001314: bd80 pop {r7, pc}
|
|
...
|
|
|
|
08001318 <HAL_GPIO_Init>:
|
|
* @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
|
|
* the configuration information for the specified GPIO peripheral.
|
|
* @retval None
|
|
*/
|
|
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
|
|
{
|
|
8001318: b480 push {r7}
|
|
800131a: b08b sub sp, #44 ; 0x2c
|
|
800131c: af00 add r7, sp, #0
|
|
800131e: 6078 str r0, [r7, #4]
|
|
8001320: 6039 str r1, [r7, #0]
|
|
uint32_t position = 0x00u;
|
|
8001322: 2300 movs r3, #0
|
|
8001324: 627b str r3, [r7, #36] ; 0x24
|
|
uint32_t ioposition;
|
|
uint32_t iocurrent;
|
|
uint32_t temp;
|
|
uint32_t config = 0x00u;
|
|
8001326: 2300 movs r3, #0
|
|
8001328: 623b str r3, [r7, #32]
|
|
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
|
|
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
|
|
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
|
|
|
|
/* Configure the port pins */
|
|
while (((GPIO_Init->Pin) >> position) != 0x00u)
|
|
800132a: e127 b.n 800157c <HAL_GPIO_Init+0x264>
|
|
{
|
|
/* Get the IO position */
|
|
ioposition = (0x01uL << position);
|
|
800132c: 2201 movs r2, #1
|
|
800132e: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8001330: fa02 f303 lsl.w r3, r2, r3
|
|
8001334: 61fb str r3, [r7, #28]
|
|
|
|
/* Get the current IO position */
|
|
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
|
|
8001336: 683b ldr r3, [r7, #0]
|
|
8001338: 681b ldr r3, [r3, #0]
|
|
800133a: 69fa ldr r2, [r7, #28]
|
|
800133c: 4013 ands r3, r2
|
|
800133e: 61bb str r3, [r7, #24]
|
|
|
|
if (iocurrent == ioposition)
|
|
8001340: 69ba ldr r2, [r7, #24]
|
|
8001342: 69fb ldr r3, [r7, #28]
|
|
8001344: 429a cmp r2, r3
|
|
8001346: f040 8116 bne.w 8001576 <HAL_GPIO_Init+0x25e>
|
|
{
|
|
/* Check the Alternate function parameters */
|
|
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
|
|
|
|
/* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */
|
|
switch (GPIO_Init->Mode)
|
|
800134a: 683b ldr r3, [r7, #0]
|
|
800134c: 685b ldr r3, [r3, #4]
|
|
800134e: 2b12 cmp r3, #18
|
|
8001350: d034 beq.n 80013bc <HAL_GPIO_Init+0xa4>
|
|
8001352: 2b12 cmp r3, #18
|
|
8001354: d80d bhi.n 8001372 <HAL_GPIO_Init+0x5a>
|
|
8001356: 2b02 cmp r3, #2
|
|
8001358: d02b beq.n 80013b2 <HAL_GPIO_Init+0x9a>
|
|
800135a: 2b02 cmp r3, #2
|
|
800135c: d804 bhi.n 8001368 <HAL_GPIO_Init+0x50>
|
|
800135e: 2b00 cmp r3, #0
|
|
8001360: d031 beq.n 80013c6 <HAL_GPIO_Init+0xae>
|
|
8001362: 2b01 cmp r3, #1
|
|
8001364: d01c beq.n 80013a0 <HAL_GPIO_Init+0x88>
|
|
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
|
|
break;
|
|
|
|
/* Parameters are checked with assert_param */
|
|
default:
|
|
break;
|
|
8001366: e048 b.n 80013fa <HAL_GPIO_Init+0xe2>
|
|
switch (GPIO_Init->Mode)
|
|
8001368: 2b03 cmp r3, #3
|
|
800136a: d043 beq.n 80013f4 <HAL_GPIO_Init+0xdc>
|
|
800136c: 2b11 cmp r3, #17
|
|
800136e: d01b beq.n 80013a8 <HAL_GPIO_Init+0x90>
|
|
break;
|
|
8001370: e043 b.n 80013fa <HAL_GPIO_Init+0xe2>
|
|
switch (GPIO_Init->Mode)
|
|
8001372: 4a89 ldr r2, [pc, #548] ; (8001598 <HAL_GPIO_Init+0x280>)
|
|
8001374: 4293 cmp r3, r2
|
|
8001376: d026 beq.n 80013c6 <HAL_GPIO_Init+0xae>
|
|
8001378: 4a87 ldr r2, [pc, #540] ; (8001598 <HAL_GPIO_Init+0x280>)
|
|
800137a: 4293 cmp r3, r2
|
|
800137c: d806 bhi.n 800138c <HAL_GPIO_Init+0x74>
|
|
800137e: 4a87 ldr r2, [pc, #540] ; (800159c <HAL_GPIO_Init+0x284>)
|
|
8001380: 4293 cmp r3, r2
|
|
8001382: d020 beq.n 80013c6 <HAL_GPIO_Init+0xae>
|
|
8001384: 4a86 ldr r2, [pc, #536] ; (80015a0 <HAL_GPIO_Init+0x288>)
|
|
8001386: 4293 cmp r3, r2
|
|
8001388: d01d beq.n 80013c6 <HAL_GPIO_Init+0xae>
|
|
break;
|
|
800138a: e036 b.n 80013fa <HAL_GPIO_Init+0xe2>
|
|
switch (GPIO_Init->Mode)
|
|
800138c: 4a85 ldr r2, [pc, #532] ; (80015a4 <HAL_GPIO_Init+0x28c>)
|
|
800138e: 4293 cmp r3, r2
|
|
8001390: d019 beq.n 80013c6 <HAL_GPIO_Init+0xae>
|
|
8001392: 4a85 ldr r2, [pc, #532] ; (80015a8 <HAL_GPIO_Init+0x290>)
|
|
8001394: 4293 cmp r3, r2
|
|
8001396: d016 beq.n 80013c6 <HAL_GPIO_Init+0xae>
|
|
8001398: 4a84 ldr r2, [pc, #528] ; (80015ac <HAL_GPIO_Init+0x294>)
|
|
800139a: 4293 cmp r3, r2
|
|
800139c: d013 beq.n 80013c6 <HAL_GPIO_Init+0xae>
|
|
break;
|
|
800139e: e02c b.n 80013fa <HAL_GPIO_Init+0xe2>
|
|
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
|
|
80013a0: 683b ldr r3, [r7, #0]
|
|
80013a2: 68db ldr r3, [r3, #12]
|
|
80013a4: 623b str r3, [r7, #32]
|
|
break;
|
|
80013a6: e028 b.n 80013fa <HAL_GPIO_Init+0xe2>
|
|
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
|
|
80013a8: 683b ldr r3, [r7, #0]
|
|
80013aa: 68db ldr r3, [r3, #12]
|
|
80013ac: 3304 adds r3, #4
|
|
80013ae: 623b str r3, [r7, #32]
|
|
break;
|
|
80013b0: e023 b.n 80013fa <HAL_GPIO_Init+0xe2>
|
|
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
|
|
80013b2: 683b ldr r3, [r7, #0]
|
|
80013b4: 68db ldr r3, [r3, #12]
|
|
80013b6: 3308 adds r3, #8
|
|
80013b8: 623b str r3, [r7, #32]
|
|
break;
|
|
80013ba: e01e b.n 80013fa <HAL_GPIO_Init+0xe2>
|
|
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
|
|
80013bc: 683b ldr r3, [r7, #0]
|
|
80013be: 68db ldr r3, [r3, #12]
|
|
80013c0: 330c adds r3, #12
|
|
80013c2: 623b str r3, [r7, #32]
|
|
break;
|
|
80013c4: e019 b.n 80013fa <HAL_GPIO_Init+0xe2>
|
|
if (GPIO_Init->Pull == GPIO_NOPULL)
|
|
80013c6: 683b ldr r3, [r7, #0]
|
|
80013c8: 689b ldr r3, [r3, #8]
|
|
80013ca: 2b00 cmp r3, #0
|
|
80013cc: d102 bne.n 80013d4 <HAL_GPIO_Init+0xbc>
|
|
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
|
|
80013ce: 2304 movs r3, #4
|
|
80013d0: 623b str r3, [r7, #32]
|
|
break;
|
|
80013d2: e012 b.n 80013fa <HAL_GPIO_Init+0xe2>
|
|
else if (GPIO_Init->Pull == GPIO_PULLUP)
|
|
80013d4: 683b ldr r3, [r7, #0]
|
|
80013d6: 689b ldr r3, [r3, #8]
|
|
80013d8: 2b01 cmp r3, #1
|
|
80013da: d105 bne.n 80013e8 <HAL_GPIO_Init+0xd0>
|
|
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
|
|
80013dc: 2308 movs r3, #8
|
|
80013de: 623b str r3, [r7, #32]
|
|
GPIOx->BSRR = ioposition;
|
|
80013e0: 687b ldr r3, [r7, #4]
|
|
80013e2: 69fa ldr r2, [r7, #28]
|
|
80013e4: 611a str r2, [r3, #16]
|
|
break;
|
|
80013e6: e008 b.n 80013fa <HAL_GPIO_Init+0xe2>
|
|
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
|
|
80013e8: 2308 movs r3, #8
|
|
80013ea: 623b str r3, [r7, #32]
|
|
GPIOx->BRR = ioposition;
|
|
80013ec: 687b ldr r3, [r7, #4]
|
|
80013ee: 69fa ldr r2, [r7, #28]
|
|
80013f0: 615a str r2, [r3, #20]
|
|
break;
|
|
80013f2: e002 b.n 80013fa <HAL_GPIO_Init+0xe2>
|
|
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
|
|
80013f4: 2300 movs r3, #0
|
|
80013f6: 623b str r3, [r7, #32]
|
|
break;
|
|
80013f8: bf00 nop
|
|
}
|
|
|
|
/* Check if the current bit belongs to first half or last half of the pin count number
|
|
in order to address CRH or CRL register*/
|
|
configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
|
|
80013fa: 69bb ldr r3, [r7, #24]
|
|
80013fc: 2bff cmp r3, #255 ; 0xff
|
|
80013fe: d801 bhi.n 8001404 <HAL_GPIO_Init+0xec>
|
|
8001400: 687b ldr r3, [r7, #4]
|
|
8001402: e001 b.n 8001408 <HAL_GPIO_Init+0xf0>
|
|
8001404: 687b ldr r3, [r7, #4]
|
|
8001406: 3304 adds r3, #4
|
|
8001408: 617b str r3, [r7, #20]
|
|
registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
|
|
800140a: 69bb ldr r3, [r7, #24]
|
|
800140c: 2bff cmp r3, #255 ; 0xff
|
|
800140e: d802 bhi.n 8001416 <HAL_GPIO_Init+0xfe>
|
|
8001410: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8001412: 009b lsls r3, r3, #2
|
|
8001414: e002 b.n 800141c <HAL_GPIO_Init+0x104>
|
|
8001416: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8001418: 3b08 subs r3, #8
|
|
800141a: 009b lsls r3, r3, #2
|
|
800141c: 613b str r3, [r7, #16]
|
|
|
|
/* Apply the new configuration of the pin to the register */
|
|
MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
|
|
800141e: 697b ldr r3, [r7, #20]
|
|
8001420: 681a ldr r2, [r3, #0]
|
|
8001422: 210f movs r1, #15
|
|
8001424: 693b ldr r3, [r7, #16]
|
|
8001426: fa01 f303 lsl.w r3, r1, r3
|
|
800142a: 43db mvns r3, r3
|
|
800142c: 401a ands r2, r3
|
|
800142e: 6a39 ldr r1, [r7, #32]
|
|
8001430: 693b ldr r3, [r7, #16]
|
|
8001432: fa01 f303 lsl.w r3, r1, r3
|
|
8001436: 431a orrs r2, r3
|
|
8001438: 697b ldr r3, [r7, #20]
|
|
800143a: 601a str r2, [r3, #0]
|
|
|
|
/*--------------------- EXTI Mode Configuration ------------------------*/
|
|
/* Configure the External Interrupt or event for the current IO */
|
|
if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
|
|
800143c: 683b ldr r3, [r7, #0]
|
|
800143e: 685b ldr r3, [r3, #4]
|
|
8001440: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
|
8001444: 2b00 cmp r3, #0
|
|
8001446: f000 8096 beq.w 8001576 <HAL_GPIO_Init+0x25e>
|
|
{
|
|
/* Enable AFIO Clock */
|
|
__HAL_RCC_AFIO_CLK_ENABLE();
|
|
800144a: 4b59 ldr r3, [pc, #356] ; (80015b0 <HAL_GPIO_Init+0x298>)
|
|
800144c: 699b ldr r3, [r3, #24]
|
|
800144e: 4a58 ldr r2, [pc, #352] ; (80015b0 <HAL_GPIO_Init+0x298>)
|
|
8001450: f043 0301 orr.w r3, r3, #1
|
|
8001454: 6193 str r3, [r2, #24]
|
|
8001456: 4b56 ldr r3, [pc, #344] ; (80015b0 <HAL_GPIO_Init+0x298>)
|
|
8001458: 699b ldr r3, [r3, #24]
|
|
800145a: f003 0301 and.w r3, r3, #1
|
|
800145e: 60bb str r3, [r7, #8]
|
|
8001460: 68bb ldr r3, [r7, #8]
|
|
temp = AFIO->EXTICR[position >> 2u];
|
|
8001462: 4a54 ldr r2, [pc, #336] ; (80015b4 <HAL_GPIO_Init+0x29c>)
|
|
8001464: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8001466: 089b lsrs r3, r3, #2
|
|
8001468: 3302 adds r3, #2
|
|
800146a: f852 3023 ldr.w r3, [r2, r3, lsl #2]
|
|
800146e: 60fb str r3, [r7, #12]
|
|
CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
|
|
8001470: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8001472: f003 0303 and.w r3, r3, #3
|
|
8001476: 009b lsls r3, r3, #2
|
|
8001478: 220f movs r2, #15
|
|
800147a: fa02 f303 lsl.w r3, r2, r3
|
|
800147e: 43db mvns r3, r3
|
|
8001480: 68fa ldr r2, [r7, #12]
|
|
8001482: 4013 ands r3, r2
|
|
8001484: 60fb str r3, [r7, #12]
|
|
SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
|
|
8001486: 687b ldr r3, [r7, #4]
|
|
8001488: 4a4b ldr r2, [pc, #300] ; (80015b8 <HAL_GPIO_Init+0x2a0>)
|
|
800148a: 4293 cmp r3, r2
|
|
800148c: d013 beq.n 80014b6 <HAL_GPIO_Init+0x19e>
|
|
800148e: 687b ldr r3, [r7, #4]
|
|
8001490: 4a4a ldr r2, [pc, #296] ; (80015bc <HAL_GPIO_Init+0x2a4>)
|
|
8001492: 4293 cmp r3, r2
|
|
8001494: d00d beq.n 80014b2 <HAL_GPIO_Init+0x19a>
|
|
8001496: 687b ldr r3, [r7, #4]
|
|
8001498: 4a49 ldr r2, [pc, #292] ; (80015c0 <HAL_GPIO_Init+0x2a8>)
|
|
800149a: 4293 cmp r3, r2
|
|
800149c: d007 beq.n 80014ae <HAL_GPIO_Init+0x196>
|
|
800149e: 687b ldr r3, [r7, #4]
|
|
80014a0: 4a48 ldr r2, [pc, #288] ; (80015c4 <HAL_GPIO_Init+0x2ac>)
|
|
80014a2: 4293 cmp r3, r2
|
|
80014a4: d101 bne.n 80014aa <HAL_GPIO_Init+0x192>
|
|
80014a6: 2303 movs r3, #3
|
|
80014a8: e006 b.n 80014b8 <HAL_GPIO_Init+0x1a0>
|
|
80014aa: 2304 movs r3, #4
|
|
80014ac: e004 b.n 80014b8 <HAL_GPIO_Init+0x1a0>
|
|
80014ae: 2302 movs r3, #2
|
|
80014b0: e002 b.n 80014b8 <HAL_GPIO_Init+0x1a0>
|
|
80014b2: 2301 movs r3, #1
|
|
80014b4: e000 b.n 80014b8 <HAL_GPIO_Init+0x1a0>
|
|
80014b6: 2300 movs r3, #0
|
|
80014b8: 6a7a ldr r2, [r7, #36] ; 0x24
|
|
80014ba: f002 0203 and.w r2, r2, #3
|
|
80014be: 0092 lsls r2, r2, #2
|
|
80014c0: 4093 lsls r3, r2
|
|
80014c2: 68fa ldr r2, [r7, #12]
|
|
80014c4: 4313 orrs r3, r2
|
|
80014c6: 60fb str r3, [r7, #12]
|
|
AFIO->EXTICR[position >> 2u] = temp;
|
|
80014c8: 493a ldr r1, [pc, #232] ; (80015b4 <HAL_GPIO_Init+0x29c>)
|
|
80014ca: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80014cc: 089b lsrs r3, r3, #2
|
|
80014ce: 3302 adds r3, #2
|
|
80014d0: 68fa ldr r2, [r7, #12]
|
|
80014d2: f841 2023 str.w r2, [r1, r3, lsl #2]
|
|
|
|
|
|
/* Configure the interrupt mask */
|
|
if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
|
|
80014d6: 683b ldr r3, [r7, #0]
|
|
80014d8: 685b ldr r3, [r3, #4]
|
|
80014da: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
|
80014de: 2b00 cmp r3, #0
|
|
80014e0: d006 beq.n 80014f0 <HAL_GPIO_Init+0x1d8>
|
|
{
|
|
SET_BIT(EXTI->IMR, iocurrent);
|
|
80014e2: 4b39 ldr r3, [pc, #228] ; (80015c8 <HAL_GPIO_Init+0x2b0>)
|
|
80014e4: 681a ldr r2, [r3, #0]
|
|
80014e6: 4938 ldr r1, [pc, #224] ; (80015c8 <HAL_GPIO_Init+0x2b0>)
|
|
80014e8: 69bb ldr r3, [r7, #24]
|
|
80014ea: 4313 orrs r3, r2
|
|
80014ec: 600b str r3, [r1, #0]
|
|
80014ee: e006 b.n 80014fe <HAL_GPIO_Init+0x1e6>
|
|
}
|
|
else
|
|
{
|
|
CLEAR_BIT(EXTI->IMR, iocurrent);
|
|
80014f0: 4b35 ldr r3, [pc, #212] ; (80015c8 <HAL_GPIO_Init+0x2b0>)
|
|
80014f2: 681a ldr r2, [r3, #0]
|
|
80014f4: 69bb ldr r3, [r7, #24]
|
|
80014f6: 43db mvns r3, r3
|
|
80014f8: 4933 ldr r1, [pc, #204] ; (80015c8 <HAL_GPIO_Init+0x2b0>)
|
|
80014fa: 4013 ands r3, r2
|
|
80014fc: 600b str r3, [r1, #0]
|
|
}
|
|
|
|
/* Configure the event mask */
|
|
if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
|
|
80014fe: 683b ldr r3, [r7, #0]
|
|
8001500: 685b ldr r3, [r3, #4]
|
|
8001502: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
|
8001506: 2b00 cmp r3, #0
|
|
8001508: d006 beq.n 8001518 <HAL_GPIO_Init+0x200>
|
|
{
|
|
SET_BIT(EXTI->EMR, iocurrent);
|
|
800150a: 4b2f ldr r3, [pc, #188] ; (80015c8 <HAL_GPIO_Init+0x2b0>)
|
|
800150c: 685a ldr r2, [r3, #4]
|
|
800150e: 492e ldr r1, [pc, #184] ; (80015c8 <HAL_GPIO_Init+0x2b0>)
|
|
8001510: 69bb ldr r3, [r7, #24]
|
|
8001512: 4313 orrs r3, r2
|
|
8001514: 604b str r3, [r1, #4]
|
|
8001516: e006 b.n 8001526 <HAL_GPIO_Init+0x20e>
|
|
}
|
|
else
|
|
{
|
|
CLEAR_BIT(EXTI->EMR, iocurrent);
|
|
8001518: 4b2b ldr r3, [pc, #172] ; (80015c8 <HAL_GPIO_Init+0x2b0>)
|
|
800151a: 685a ldr r2, [r3, #4]
|
|
800151c: 69bb ldr r3, [r7, #24]
|
|
800151e: 43db mvns r3, r3
|
|
8001520: 4929 ldr r1, [pc, #164] ; (80015c8 <HAL_GPIO_Init+0x2b0>)
|
|
8001522: 4013 ands r3, r2
|
|
8001524: 604b str r3, [r1, #4]
|
|
}
|
|
|
|
/* Enable or disable the rising trigger */
|
|
if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
|
|
8001526: 683b ldr r3, [r7, #0]
|
|
8001528: 685b ldr r3, [r3, #4]
|
|
800152a: f403 1380 and.w r3, r3, #1048576 ; 0x100000
|
|
800152e: 2b00 cmp r3, #0
|
|
8001530: d006 beq.n 8001540 <HAL_GPIO_Init+0x228>
|
|
{
|
|
SET_BIT(EXTI->RTSR, iocurrent);
|
|
8001532: 4b25 ldr r3, [pc, #148] ; (80015c8 <HAL_GPIO_Init+0x2b0>)
|
|
8001534: 689a ldr r2, [r3, #8]
|
|
8001536: 4924 ldr r1, [pc, #144] ; (80015c8 <HAL_GPIO_Init+0x2b0>)
|
|
8001538: 69bb ldr r3, [r7, #24]
|
|
800153a: 4313 orrs r3, r2
|
|
800153c: 608b str r3, [r1, #8]
|
|
800153e: e006 b.n 800154e <HAL_GPIO_Init+0x236>
|
|
}
|
|
else
|
|
{
|
|
CLEAR_BIT(EXTI->RTSR, iocurrent);
|
|
8001540: 4b21 ldr r3, [pc, #132] ; (80015c8 <HAL_GPIO_Init+0x2b0>)
|
|
8001542: 689a ldr r2, [r3, #8]
|
|
8001544: 69bb ldr r3, [r7, #24]
|
|
8001546: 43db mvns r3, r3
|
|
8001548: 491f ldr r1, [pc, #124] ; (80015c8 <HAL_GPIO_Init+0x2b0>)
|
|
800154a: 4013 ands r3, r2
|
|
800154c: 608b str r3, [r1, #8]
|
|
}
|
|
|
|
/* Enable or disable the falling trigger */
|
|
if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
|
|
800154e: 683b ldr r3, [r7, #0]
|
|
8001550: 685b ldr r3, [r3, #4]
|
|
8001552: f403 1300 and.w r3, r3, #2097152 ; 0x200000
|
|
8001556: 2b00 cmp r3, #0
|
|
8001558: d006 beq.n 8001568 <HAL_GPIO_Init+0x250>
|
|
{
|
|
SET_BIT(EXTI->FTSR, iocurrent);
|
|
800155a: 4b1b ldr r3, [pc, #108] ; (80015c8 <HAL_GPIO_Init+0x2b0>)
|
|
800155c: 68da ldr r2, [r3, #12]
|
|
800155e: 491a ldr r1, [pc, #104] ; (80015c8 <HAL_GPIO_Init+0x2b0>)
|
|
8001560: 69bb ldr r3, [r7, #24]
|
|
8001562: 4313 orrs r3, r2
|
|
8001564: 60cb str r3, [r1, #12]
|
|
8001566: e006 b.n 8001576 <HAL_GPIO_Init+0x25e>
|
|
}
|
|
else
|
|
{
|
|
CLEAR_BIT(EXTI->FTSR, iocurrent);
|
|
8001568: 4b17 ldr r3, [pc, #92] ; (80015c8 <HAL_GPIO_Init+0x2b0>)
|
|
800156a: 68da ldr r2, [r3, #12]
|
|
800156c: 69bb ldr r3, [r7, #24]
|
|
800156e: 43db mvns r3, r3
|
|
8001570: 4915 ldr r1, [pc, #84] ; (80015c8 <HAL_GPIO_Init+0x2b0>)
|
|
8001572: 4013 ands r3, r2
|
|
8001574: 60cb str r3, [r1, #12]
|
|
}
|
|
}
|
|
}
|
|
|
|
position++;
|
|
8001576: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8001578: 3301 adds r3, #1
|
|
800157a: 627b str r3, [r7, #36] ; 0x24
|
|
while (((GPIO_Init->Pin) >> position) != 0x00u)
|
|
800157c: 683b ldr r3, [r7, #0]
|
|
800157e: 681a ldr r2, [r3, #0]
|
|
8001580: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8001582: fa22 f303 lsr.w r3, r2, r3
|
|
8001586: 2b00 cmp r3, #0
|
|
8001588: f47f aed0 bne.w 800132c <HAL_GPIO_Init+0x14>
|
|
}
|
|
}
|
|
800158c: bf00 nop
|
|
800158e: 372c adds r7, #44 ; 0x2c
|
|
8001590: 46bd mov sp, r7
|
|
8001592: bc80 pop {r7}
|
|
8001594: 4770 bx lr
|
|
8001596: bf00 nop
|
|
8001598: 10210000 .word 0x10210000
|
|
800159c: 10110000 .word 0x10110000
|
|
80015a0: 10120000 .word 0x10120000
|
|
80015a4: 10310000 .word 0x10310000
|
|
80015a8: 10320000 .word 0x10320000
|
|
80015ac: 10220000 .word 0x10220000
|
|
80015b0: 40021000 .word 0x40021000
|
|
80015b4: 40010000 .word 0x40010000
|
|
80015b8: 40010800 .word 0x40010800
|
|
80015bc: 40010c00 .word 0x40010c00
|
|
80015c0: 40011000 .word 0x40011000
|
|
80015c4: 40011400 .word 0x40011400
|
|
80015c8: 40010400 .word 0x40010400
|
|
|
|
080015cc <HAL_GPIO_ReadPin>:
|
|
* @param GPIO_Pin: specifies the port bit to read.
|
|
* This parameter can be GPIO_PIN_x where x can be (0..15).
|
|
* @retval The input port pin value.
|
|
*/
|
|
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
|
|
{
|
|
80015cc: b480 push {r7}
|
|
80015ce: b085 sub sp, #20
|
|
80015d0: af00 add r7, sp, #0
|
|
80015d2: 6078 str r0, [r7, #4]
|
|
80015d4: 460b mov r3, r1
|
|
80015d6: 807b strh r3, [r7, #2]
|
|
GPIO_PinState bitstatus;
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
|
|
|
if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
|
|
80015d8: 687b ldr r3, [r7, #4]
|
|
80015da: 689a ldr r2, [r3, #8]
|
|
80015dc: 887b ldrh r3, [r7, #2]
|
|
80015de: 4013 ands r3, r2
|
|
80015e0: 2b00 cmp r3, #0
|
|
80015e2: d002 beq.n 80015ea <HAL_GPIO_ReadPin+0x1e>
|
|
{
|
|
bitstatus = GPIO_PIN_SET;
|
|
80015e4: 2301 movs r3, #1
|
|
80015e6: 73fb strb r3, [r7, #15]
|
|
80015e8: e001 b.n 80015ee <HAL_GPIO_ReadPin+0x22>
|
|
}
|
|
else
|
|
{
|
|
bitstatus = GPIO_PIN_RESET;
|
|
80015ea: 2300 movs r3, #0
|
|
80015ec: 73fb strb r3, [r7, #15]
|
|
}
|
|
return bitstatus;
|
|
80015ee: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
80015f0: 4618 mov r0, r3
|
|
80015f2: 3714 adds r7, #20
|
|
80015f4: 46bd mov sp, r7
|
|
80015f6: bc80 pop {r7}
|
|
80015f8: 4770 bx lr
|
|
|
|
080015fa <HAL_GPIO_WritePin>:
|
|
* @arg GPIO_PIN_RESET: to clear the port pin
|
|
* @arg GPIO_PIN_SET: to set the port pin
|
|
* @retval None
|
|
*/
|
|
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
|
|
{
|
|
80015fa: b480 push {r7}
|
|
80015fc: b083 sub sp, #12
|
|
80015fe: af00 add r7, sp, #0
|
|
8001600: 6078 str r0, [r7, #4]
|
|
8001602: 460b mov r3, r1
|
|
8001604: 807b strh r3, [r7, #2]
|
|
8001606: 4613 mov r3, r2
|
|
8001608: 707b strb r3, [r7, #1]
|
|
/* Check the parameters */
|
|
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
|
assert_param(IS_GPIO_PIN_ACTION(PinState));
|
|
|
|
if (PinState != GPIO_PIN_RESET)
|
|
800160a: 787b ldrb r3, [r7, #1]
|
|
800160c: 2b00 cmp r3, #0
|
|
800160e: d003 beq.n 8001618 <HAL_GPIO_WritePin+0x1e>
|
|
{
|
|
GPIOx->BSRR = GPIO_Pin;
|
|
8001610: 887a ldrh r2, [r7, #2]
|
|
8001612: 687b ldr r3, [r7, #4]
|
|
8001614: 611a str r2, [r3, #16]
|
|
}
|
|
else
|
|
{
|
|
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
|
|
}
|
|
}
|
|
8001616: e003 b.n 8001620 <HAL_GPIO_WritePin+0x26>
|
|
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
|
|
8001618: 887b ldrh r3, [r7, #2]
|
|
800161a: 041a lsls r2, r3, #16
|
|
800161c: 687b ldr r3, [r7, #4]
|
|
800161e: 611a str r2, [r3, #16]
|
|
}
|
|
8001620: bf00 nop
|
|
8001622: 370c adds r7, #12
|
|
8001624: 46bd mov sp, r7
|
|
8001626: bc80 pop {r7}
|
|
8001628: 4770 bx lr
|
|
...
|
|
|
|
0800162c <HAL_I2C_Init>:
|
|
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
|
|
* the configuration information for the specified I2C.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
|
|
{
|
|
800162c: b580 push {r7, lr}
|
|
800162e: b084 sub sp, #16
|
|
8001630: af00 add r7, sp, #0
|
|
8001632: 6078 str r0, [r7, #4]
|
|
uint32_t freqrange;
|
|
uint32_t pclk1;
|
|
|
|
/* Check the I2C handle allocation */
|
|
if (hi2c == NULL)
|
|
8001634: 687b ldr r3, [r7, #4]
|
|
8001636: 2b00 cmp r3, #0
|
|
8001638: d101 bne.n 800163e <HAL_I2C_Init+0x12>
|
|
{
|
|
return HAL_ERROR;
|
|
800163a: 2301 movs r3, #1
|
|
800163c: e10f b.n 800185e <HAL_I2C_Init+0x232>
|
|
assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
|
|
assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
|
|
assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
|
|
assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
|
|
|
|
if (hi2c->State == HAL_I2C_STATE_RESET)
|
|
800163e: 687b ldr r3, [r7, #4]
|
|
8001640: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
|
|
8001644: b2db uxtb r3, r3
|
|
8001646: 2b00 cmp r3, #0
|
|
8001648: d106 bne.n 8001658 <HAL_I2C_Init+0x2c>
|
|
{
|
|
/* Allocate lock resource and initialize it */
|
|
hi2c->Lock = HAL_UNLOCKED;
|
|
800164a: 687b ldr r3, [r7, #4]
|
|
800164c: 2200 movs r2, #0
|
|
800164e: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
|
|
|
/* Init the low level hardware : GPIO, CLOCK, NVIC */
|
|
hi2c->MspInitCallback(hi2c);
|
|
#else
|
|
/* Init the low level hardware : GPIO, CLOCK, NVIC */
|
|
HAL_I2C_MspInit(hi2c);
|
|
8001652: 6878 ldr r0, [r7, #4]
|
|
8001654: f008 fcb2 bl 8009fbc <HAL_I2C_MspInit>
|
|
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
|
|
}
|
|
|
|
hi2c->State = HAL_I2C_STATE_BUSY;
|
|
8001658: 687b ldr r3, [r7, #4]
|
|
800165a: 2224 movs r2, #36 ; 0x24
|
|
800165c: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
|
|
/* Disable the selected I2C peripheral */
|
|
__HAL_I2C_DISABLE(hi2c);
|
|
8001660: 687b ldr r3, [r7, #4]
|
|
8001662: 681b ldr r3, [r3, #0]
|
|
8001664: 681a ldr r2, [r3, #0]
|
|
8001666: 687b ldr r3, [r7, #4]
|
|
8001668: 681b ldr r3, [r3, #0]
|
|
800166a: f022 0201 bic.w r2, r2, #1
|
|
800166e: 601a str r2, [r3, #0]
|
|
|
|
/* Get PCLK1 frequency */
|
|
pclk1 = HAL_RCC_GetPCLK1Freq();
|
|
8001670: f001 fbc8 bl 8002e04 <HAL_RCC_GetPCLK1Freq>
|
|
8001674: 60f8 str r0, [r7, #12]
|
|
|
|
/* Check the minimum allowed PCLK1 frequency */
|
|
if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U)
|
|
8001676: 687b ldr r3, [r7, #4]
|
|
8001678: 685b ldr r3, [r3, #4]
|
|
800167a: 4a7b ldr r2, [pc, #492] ; (8001868 <HAL_I2C_Init+0x23c>)
|
|
800167c: 4293 cmp r3, r2
|
|
800167e: d807 bhi.n 8001690 <HAL_I2C_Init+0x64>
|
|
8001680: 68fb ldr r3, [r7, #12]
|
|
8001682: 4a7a ldr r2, [pc, #488] ; (800186c <HAL_I2C_Init+0x240>)
|
|
8001684: 4293 cmp r3, r2
|
|
8001686: bf94 ite ls
|
|
8001688: 2301 movls r3, #1
|
|
800168a: 2300 movhi r3, #0
|
|
800168c: b2db uxtb r3, r3
|
|
800168e: e006 b.n 800169e <HAL_I2C_Init+0x72>
|
|
8001690: 68fb ldr r3, [r7, #12]
|
|
8001692: 4a77 ldr r2, [pc, #476] ; (8001870 <HAL_I2C_Init+0x244>)
|
|
8001694: 4293 cmp r3, r2
|
|
8001696: bf94 ite ls
|
|
8001698: 2301 movls r3, #1
|
|
800169a: 2300 movhi r3, #0
|
|
800169c: b2db uxtb r3, r3
|
|
800169e: 2b00 cmp r3, #0
|
|
80016a0: d001 beq.n 80016a6 <HAL_I2C_Init+0x7a>
|
|
{
|
|
return HAL_ERROR;
|
|
80016a2: 2301 movs r3, #1
|
|
80016a4: e0db b.n 800185e <HAL_I2C_Init+0x232>
|
|
}
|
|
|
|
/* Calculate frequency range */
|
|
freqrange = I2C_FREQRANGE(pclk1);
|
|
80016a6: 68fb ldr r3, [r7, #12]
|
|
80016a8: 4a72 ldr r2, [pc, #456] ; (8001874 <HAL_I2C_Init+0x248>)
|
|
80016aa: fba2 2303 umull r2, r3, r2, r3
|
|
80016ae: 0c9b lsrs r3, r3, #18
|
|
80016b0: 60bb str r3, [r7, #8]
|
|
|
|
/*---------------------------- I2Cx CR2 Configuration ----------------------*/
|
|
/* Configure I2Cx: Frequency range */
|
|
MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange);
|
|
80016b2: 687b ldr r3, [r7, #4]
|
|
80016b4: 681b ldr r3, [r3, #0]
|
|
80016b6: 685b ldr r3, [r3, #4]
|
|
80016b8: f023 013f bic.w r1, r3, #63 ; 0x3f
|
|
80016bc: 687b ldr r3, [r7, #4]
|
|
80016be: 681b ldr r3, [r3, #0]
|
|
80016c0: 68ba ldr r2, [r7, #8]
|
|
80016c2: 430a orrs r2, r1
|
|
80016c4: 605a str r2, [r3, #4]
|
|
|
|
/*---------------------------- I2Cx TRISE Configuration --------------------*/
|
|
/* Configure I2Cx: Rise Time */
|
|
MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed));
|
|
80016c6: 687b ldr r3, [r7, #4]
|
|
80016c8: 681b ldr r3, [r3, #0]
|
|
80016ca: 6a1b ldr r3, [r3, #32]
|
|
80016cc: f023 013f bic.w r1, r3, #63 ; 0x3f
|
|
80016d0: 687b ldr r3, [r7, #4]
|
|
80016d2: 685b ldr r3, [r3, #4]
|
|
80016d4: 4a64 ldr r2, [pc, #400] ; (8001868 <HAL_I2C_Init+0x23c>)
|
|
80016d6: 4293 cmp r3, r2
|
|
80016d8: d802 bhi.n 80016e0 <HAL_I2C_Init+0xb4>
|
|
80016da: 68bb ldr r3, [r7, #8]
|
|
80016dc: 3301 adds r3, #1
|
|
80016de: e009 b.n 80016f4 <HAL_I2C_Init+0xc8>
|
|
80016e0: 68bb ldr r3, [r7, #8]
|
|
80016e2: f44f 7296 mov.w r2, #300 ; 0x12c
|
|
80016e6: fb02 f303 mul.w r3, r2, r3
|
|
80016ea: 4a63 ldr r2, [pc, #396] ; (8001878 <HAL_I2C_Init+0x24c>)
|
|
80016ec: fba2 2303 umull r2, r3, r2, r3
|
|
80016f0: 099b lsrs r3, r3, #6
|
|
80016f2: 3301 adds r3, #1
|
|
80016f4: 687a ldr r2, [r7, #4]
|
|
80016f6: 6812 ldr r2, [r2, #0]
|
|
80016f8: 430b orrs r3, r1
|
|
80016fa: 6213 str r3, [r2, #32]
|
|
|
|
/*---------------------------- I2Cx CCR Configuration ----------------------*/
|
|
/* Configure I2Cx: Speed */
|
|
MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle));
|
|
80016fc: 687b ldr r3, [r7, #4]
|
|
80016fe: 681b ldr r3, [r3, #0]
|
|
8001700: 69db ldr r3, [r3, #28]
|
|
8001702: f423 424f bic.w r2, r3, #52992 ; 0xcf00
|
|
8001706: f022 02ff bic.w r2, r2, #255 ; 0xff
|
|
800170a: 687b ldr r3, [r7, #4]
|
|
800170c: 685b ldr r3, [r3, #4]
|
|
800170e: 4956 ldr r1, [pc, #344] ; (8001868 <HAL_I2C_Init+0x23c>)
|
|
8001710: 428b cmp r3, r1
|
|
8001712: d80d bhi.n 8001730 <HAL_I2C_Init+0x104>
|
|
8001714: 68fb ldr r3, [r7, #12]
|
|
8001716: 1e59 subs r1, r3, #1
|
|
8001718: 687b ldr r3, [r7, #4]
|
|
800171a: 685b ldr r3, [r3, #4]
|
|
800171c: 005b lsls r3, r3, #1
|
|
800171e: fbb1 f3f3 udiv r3, r1, r3
|
|
8001722: 3301 adds r3, #1
|
|
8001724: f3c3 030b ubfx r3, r3, #0, #12
|
|
8001728: 2b04 cmp r3, #4
|
|
800172a: bf38 it cc
|
|
800172c: 2304 movcc r3, #4
|
|
800172e: e04f b.n 80017d0 <HAL_I2C_Init+0x1a4>
|
|
8001730: 687b ldr r3, [r7, #4]
|
|
8001732: 689b ldr r3, [r3, #8]
|
|
8001734: 2b00 cmp r3, #0
|
|
8001736: d111 bne.n 800175c <HAL_I2C_Init+0x130>
|
|
8001738: 68fb ldr r3, [r7, #12]
|
|
800173a: 1e58 subs r0, r3, #1
|
|
800173c: 687b ldr r3, [r7, #4]
|
|
800173e: 6859 ldr r1, [r3, #4]
|
|
8001740: 460b mov r3, r1
|
|
8001742: 005b lsls r3, r3, #1
|
|
8001744: 440b add r3, r1
|
|
8001746: fbb0 f3f3 udiv r3, r0, r3
|
|
800174a: 3301 adds r3, #1
|
|
800174c: f3c3 030b ubfx r3, r3, #0, #12
|
|
8001750: 2b00 cmp r3, #0
|
|
8001752: bf0c ite eq
|
|
8001754: 2301 moveq r3, #1
|
|
8001756: 2300 movne r3, #0
|
|
8001758: b2db uxtb r3, r3
|
|
800175a: e012 b.n 8001782 <HAL_I2C_Init+0x156>
|
|
800175c: 68fb ldr r3, [r7, #12]
|
|
800175e: 1e58 subs r0, r3, #1
|
|
8001760: 687b ldr r3, [r7, #4]
|
|
8001762: 6859 ldr r1, [r3, #4]
|
|
8001764: 460b mov r3, r1
|
|
8001766: 009b lsls r3, r3, #2
|
|
8001768: 440b add r3, r1
|
|
800176a: 0099 lsls r1, r3, #2
|
|
800176c: 440b add r3, r1
|
|
800176e: fbb0 f3f3 udiv r3, r0, r3
|
|
8001772: 3301 adds r3, #1
|
|
8001774: f3c3 030b ubfx r3, r3, #0, #12
|
|
8001778: 2b00 cmp r3, #0
|
|
800177a: bf0c ite eq
|
|
800177c: 2301 moveq r3, #1
|
|
800177e: 2300 movne r3, #0
|
|
8001780: b2db uxtb r3, r3
|
|
8001782: 2b00 cmp r3, #0
|
|
8001784: d001 beq.n 800178a <HAL_I2C_Init+0x15e>
|
|
8001786: 2301 movs r3, #1
|
|
8001788: e022 b.n 80017d0 <HAL_I2C_Init+0x1a4>
|
|
800178a: 687b ldr r3, [r7, #4]
|
|
800178c: 689b ldr r3, [r3, #8]
|
|
800178e: 2b00 cmp r3, #0
|
|
8001790: d10e bne.n 80017b0 <HAL_I2C_Init+0x184>
|
|
8001792: 68fb ldr r3, [r7, #12]
|
|
8001794: 1e58 subs r0, r3, #1
|
|
8001796: 687b ldr r3, [r7, #4]
|
|
8001798: 6859 ldr r1, [r3, #4]
|
|
800179a: 460b mov r3, r1
|
|
800179c: 005b lsls r3, r3, #1
|
|
800179e: 440b add r3, r1
|
|
80017a0: fbb0 f3f3 udiv r3, r0, r3
|
|
80017a4: 3301 adds r3, #1
|
|
80017a6: f3c3 030b ubfx r3, r3, #0, #12
|
|
80017aa: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
80017ae: e00f b.n 80017d0 <HAL_I2C_Init+0x1a4>
|
|
80017b0: 68fb ldr r3, [r7, #12]
|
|
80017b2: 1e58 subs r0, r3, #1
|
|
80017b4: 687b ldr r3, [r7, #4]
|
|
80017b6: 6859 ldr r1, [r3, #4]
|
|
80017b8: 460b mov r3, r1
|
|
80017ba: 009b lsls r3, r3, #2
|
|
80017bc: 440b add r3, r1
|
|
80017be: 0099 lsls r1, r3, #2
|
|
80017c0: 440b add r3, r1
|
|
80017c2: fbb0 f3f3 udiv r3, r0, r3
|
|
80017c6: 3301 adds r3, #1
|
|
80017c8: f3c3 030b ubfx r3, r3, #0, #12
|
|
80017cc: f443 4340 orr.w r3, r3, #49152 ; 0xc000
|
|
80017d0: 6879 ldr r1, [r7, #4]
|
|
80017d2: 6809 ldr r1, [r1, #0]
|
|
80017d4: 4313 orrs r3, r2
|
|
80017d6: 61cb str r3, [r1, #28]
|
|
|
|
/*---------------------------- I2Cx CR1 Configuration ----------------------*/
|
|
/* Configure I2Cx: Generalcall and NoStretch mode */
|
|
MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode));
|
|
80017d8: 687b ldr r3, [r7, #4]
|
|
80017da: 681b ldr r3, [r3, #0]
|
|
80017dc: 681b ldr r3, [r3, #0]
|
|
80017de: f023 01c0 bic.w r1, r3, #192 ; 0xc0
|
|
80017e2: 687b ldr r3, [r7, #4]
|
|
80017e4: 69da ldr r2, [r3, #28]
|
|
80017e6: 687b ldr r3, [r7, #4]
|
|
80017e8: 6a1b ldr r3, [r3, #32]
|
|
80017ea: 431a orrs r2, r3
|
|
80017ec: 687b ldr r3, [r7, #4]
|
|
80017ee: 681b ldr r3, [r3, #0]
|
|
80017f0: 430a orrs r2, r1
|
|
80017f2: 601a str r2, [r3, #0]
|
|
|
|
/*---------------------------- I2Cx OAR1 Configuration ---------------------*/
|
|
/* Configure I2Cx: Own Address1 and addressing mode */
|
|
MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1));
|
|
80017f4: 687b ldr r3, [r7, #4]
|
|
80017f6: 681b ldr r3, [r3, #0]
|
|
80017f8: 689b ldr r3, [r3, #8]
|
|
80017fa: f423 4303 bic.w r3, r3, #33536 ; 0x8300
|
|
80017fe: f023 03ff bic.w r3, r3, #255 ; 0xff
|
|
8001802: 687a ldr r2, [r7, #4]
|
|
8001804: 6911 ldr r1, [r2, #16]
|
|
8001806: 687a ldr r2, [r7, #4]
|
|
8001808: 68d2 ldr r2, [r2, #12]
|
|
800180a: 4311 orrs r1, r2
|
|
800180c: 687a ldr r2, [r7, #4]
|
|
800180e: 6812 ldr r2, [r2, #0]
|
|
8001810: 430b orrs r3, r1
|
|
8001812: 6093 str r3, [r2, #8]
|
|
|
|
/*---------------------------- I2Cx OAR2 Configuration ---------------------*/
|
|
/* Configure I2Cx: Dual mode and Own Address2 */
|
|
MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2));
|
|
8001814: 687b ldr r3, [r7, #4]
|
|
8001816: 681b ldr r3, [r3, #0]
|
|
8001818: 68db ldr r3, [r3, #12]
|
|
800181a: f023 01ff bic.w r1, r3, #255 ; 0xff
|
|
800181e: 687b ldr r3, [r7, #4]
|
|
8001820: 695a ldr r2, [r3, #20]
|
|
8001822: 687b ldr r3, [r7, #4]
|
|
8001824: 699b ldr r3, [r3, #24]
|
|
8001826: 431a orrs r2, r3
|
|
8001828: 687b ldr r3, [r7, #4]
|
|
800182a: 681b ldr r3, [r3, #0]
|
|
800182c: 430a orrs r2, r1
|
|
800182e: 60da str r2, [r3, #12]
|
|
|
|
/* Enable the selected I2C peripheral */
|
|
__HAL_I2C_ENABLE(hi2c);
|
|
8001830: 687b ldr r3, [r7, #4]
|
|
8001832: 681b ldr r3, [r3, #0]
|
|
8001834: 681a ldr r2, [r3, #0]
|
|
8001836: 687b ldr r3, [r7, #4]
|
|
8001838: 681b ldr r3, [r3, #0]
|
|
800183a: f042 0201 orr.w r2, r2, #1
|
|
800183e: 601a str r2, [r3, #0]
|
|
|
|
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
|
|
8001840: 687b ldr r3, [r7, #4]
|
|
8001842: 2200 movs r2, #0
|
|
8001844: 641a str r2, [r3, #64] ; 0x40
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8001846: 687b ldr r3, [r7, #4]
|
|
8001848: 2220 movs r2, #32
|
|
800184a: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
800184e: 687b ldr r3, [r7, #4]
|
|
8001850: 2200 movs r2, #0
|
|
8001852: 631a str r2, [r3, #48] ; 0x30
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8001854: 687b ldr r3, [r7, #4]
|
|
8001856: 2200 movs r2, #0
|
|
8001858: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
|
|
|
return HAL_OK;
|
|
800185c: 2300 movs r3, #0
|
|
}
|
|
800185e: 4618 mov r0, r3
|
|
8001860: 3710 adds r7, #16
|
|
8001862: 46bd mov sp, r7
|
|
8001864: bd80 pop {r7, pc}
|
|
8001866: bf00 nop
|
|
8001868: 000186a0 .word 0x000186a0
|
|
800186c: 001e847f .word 0x001e847f
|
|
8001870: 003d08ff .word 0x003d08ff
|
|
8001874: 431bde83 .word 0x431bde83
|
|
8001878: 10624dd3 .word 0x10624dd3
|
|
|
|
0800187c <HAL_PCD_Init>:
|
|
* parameters in the PCD_InitTypeDef and initialize the associated handle.
|
|
* @param hpcd PCD handle
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
|
|
{
|
|
800187c: b5f0 push {r4, r5, r6, r7, lr}
|
|
800187e: b08b sub sp, #44 ; 0x2c
|
|
8001880: af06 add r7, sp, #24
|
|
8001882: 6078 str r0, [r7, #4]
|
|
USB_OTG_GlobalTypeDef *USBx;
|
|
#endif /* defined (USB_OTG_FS) */
|
|
uint8_t i;
|
|
|
|
/* Check the PCD handle allocation */
|
|
if (hpcd == NULL)
|
|
8001884: 687b ldr r3, [r7, #4]
|
|
8001886: 2b00 cmp r3, #0
|
|
8001888: d101 bne.n 800188e <HAL_PCD_Init+0x12>
|
|
{
|
|
return HAL_ERROR;
|
|
800188a: 2301 movs r3, #1
|
|
800188c: e0d3 b.n 8001a36 <HAL_PCD_Init+0x1ba>
|
|
|
|
#if defined (USB_OTG_FS)
|
|
USBx = hpcd->Instance;
|
|
#endif /* defined (USB_OTG_FS) */
|
|
|
|
if (hpcd->State == HAL_PCD_STATE_RESET)
|
|
800188e: 687b ldr r3, [r7, #4]
|
|
8001890: f893 3229 ldrb.w r3, [r3, #553] ; 0x229
|
|
8001894: b2db uxtb r3, r3
|
|
8001896: 2b00 cmp r3, #0
|
|
8001898: d106 bne.n 80018a8 <HAL_PCD_Init+0x2c>
|
|
{
|
|
/* Allocate lock resource and initialize it */
|
|
hpcd->Lock = HAL_UNLOCKED;
|
|
800189a: 687b ldr r3, [r7, #4]
|
|
800189c: 2200 movs r2, #0
|
|
800189e: f883 2228 strb.w r2, [r3, #552] ; 0x228
|
|
|
|
/* Init the low level hardware */
|
|
hpcd->MspInitCallback(hpcd);
|
|
#else
|
|
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
|
|
HAL_PCD_MspInit(hpcd);
|
|
80018a2: 6878 ldr r0, [r7, #4]
|
|
80018a4: f008 fe0c bl 800a4c0 <HAL_PCD_MspInit>
|
|
#endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */
|
|
}
|
|
|
|
hpcd->State = HAL_PCD_STATE_BUSY;
|
|
80018a8: 687b ldr r3, [r7, #4]
|
|
80018aa: 2203 movs r2, #3
|
|
80018ac: f883 2229 strb.w r2, [r3, #553] ; 0x229
|
|
hpcd->Init.dma_enable = 0U;
|
|
}
|
|
#endif /* defined (USB_OTG_FS) */
|
|
|
|
/* Disable the Interrupts */
|
|
__HAL_PCD_DISABLE(hpcd);
|
|
80018b0: 687b ldr r3, [r7, #4]
|
|
80018b2: 681b ldr r3, [r3, #0]
|
|
80018b4: 4618 mov r0, r3
|
|
80018b6: f002 feb6 bl 8004626 <USB_DisableGlobalInt>
|
|
|
|
/*Init the Core (common init.) */
|
|
if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK)
|
|
80018ba: 687b ldr r3, [r7, #4]
|
|
80018bc: 681b ldr r3, [r3, #0]
|
|
80018be: 603b str r3, [r7, #0]
|
|
80018c0: 687e ldr r6, [r7, #4]
|
|
80018c2: 466d mov r5, sp
|
|
80018c4: f106 0410 add.w r4, r6, #16
|
|
80018c8: cc0f ldmia r4!, {r0, r1, r2, r3}
|
|
80018ca: c50f stmia r5!, {r0, r1, r2, r3}
|
|
80018cc: 6823 ldr r3, [r4, #0]
|
|
80018ce: 602b str r3, [r5, #0]
|
|
80018d0: 1d33 adds r3, r6, #4
|
|
80018d2: cb0e ldmia r3, {r1, r2, r3}
|
|
80018d4: 6838 ldr r0, [r7, #0]
|
|
80018d6: f002 fe7f bl 80045d8 <USB_CoreInit>
|
|
80018da: 4603 mov r3, r0
|
|
80018dc: 2b00 cmp r3, #0
|
|
80018de: d005 beq.n 80018ec <HAL_PCD_Init+0x70>
|
|
{
|
|
hpcd->State = HAL_PCD_STATE_ERROR;
|
|
80018e0: 687b ldr r3, [r7, #4]
|
|
80018e2: 2202 movs r2, #2
|
|
80018e4: f883 2229 strb.w r2, [r3, #553] ; 0x229
|
|
return HAL_ERROR;
|
|
80018e8: 2301 movs r3, #1
|
|
80018ea: e0a4 b.n 8001a36 <HAL_PCD_Init+0x1ba>
|
|
}
|
|
|
|
/* Force Device Mode*/
|
|
(void)USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE);
|
|
80018ec: 687b ldr r3, [r7, #4]
|
|
80018ee: 681b ldr r3, [r3, #0]
|
|
80018f0: 2100 movs r1, #0
|
|
80018f2: 4618 mov r0, r3
|
|
80018f4: f002 feb3 bl 800465e <USB_SetCurrentMode>
|
|
|
|
/* Init endpoints structures */
|
|
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
|
|
80018f8: 2300 movs r3, #0
|
|
80018fa: 73fb strb r3, [r7, #15]
|
|
80018fc: e035 b.n 800196a <HAL_PCD_Init+0xee>
|
|
{
|
|
/* Init ep structure */
|
|
hpcd->IN_ep[i].is_in = 1U;
|
|
80018fe: 7bfb ldrb r3, [r7, #15]
|
|
8001900: 687a ldr r2, [r7, #4]
|
|
8001902: 015b lsls r3, r3, #5
|
|
8001904: 4413 add r3, r2
|
|
8001906: 3329 adds r3, #41 ; 0x29
|
|
8001908: 2201 movs r2, #1
|
|
800190a: 701a strb r2, [r3, #0]
|
|
hpcd->IN_ep[i].num = i;
|
|
800190c: 7bfb ldrb r3, [r7, #15]
|
|
800190e: 687a ldr r2, [r7, #4]
|
|
8001910: 015b lsls r3, r3, #5
|
|
8001912: 4413 add r3, r2
|
|
8001914: 3328 adds r3, #40 ; 0x28
|
|
8001916: 7bfa ldrb r2, [r7, #15]
|
|
8001918: 701a strb r2, [r3, #0]
|
|
hpcd->IN_ep[i].tx_fifo_num = i;
|
|
800191a: 7bfb ldrb r3, [r7, #15]
|
|
800191c: 7bfa ldrb r2, [r7, #15]
|
|
800191e: b291 uxth r1, r2
|
|
8001920: 687a ldr r2, [r7, #4]
|
|
8001922: 015b lsls r3, r3, #5
|
|
8001924: 4413 add r3, r2
|
|
8001926: 3336 adds r3, #54 ; 0x36
|
|
8001928: 460a mov r2, r1
|
|
800192a: 801a strh r2, [r3, #0]
|
|
/* Control until ep is activated */
|
|
hpcd->IN_ep[i].type = EP_TYPE_CTRL;
|
|
800192c: 7bfb ldrb r3, [r7, #15]
|
|
800192e: 687a ldr r2, [r7, #4]
|
|
8001930: 015b lsls r3, r3, #5
|
|
8001932: 4413 add r3, r2
|
|
8001934: 332b adds r3, #43 ; 0x2b
|
|
8001936: 2200 movs r2, #0
|
|
8001938: 701a strb r2, [r3, #0]
|
|
hpcd->IN_ep[i].maxpacket = 0U;
|
|
800193a: 7bfb ldrb r3, [r7, #15]
|
|
800193c: 687a ldr r2, [r7, #4]
|
|
800193e: 015b lsls r3, r3, #5
|
|
8001940: 4413 add r3, r2
|
|
8001942: 3338 adds r3, #56 ; 0x38
|
|
8001944: 2200 movs r2, #0
|
|
8001946: 601a str r2, [r3, #0]
|
|
hpcd->IN_ep[i].xfer_buff = 0U;
|
|
8001948: 7bfb ldrb r3, [r7, #15]
|
|
800194a: 687a ldr r2, [r7, #4]
|
|
800194c: 015b lsls r3, r3, #5
|
|
800194e: 4413 add r3, r2
|
|
8001950: 333c adds r3, #60 ; 0x3c
|
|
8001952: 2200 movs r2, #0
|
|
8001954: 601a str r2, [r3, #0]
|
|
hpcd->IN_ep[i].xfer_len = 0U;
|
|
8001956: 7bfb ldrb r3, [r7, #15]
|
|
8001958: 687a ldr r2, [r7, #4]
|
|
800195a: 3302 adds r3, #2
|
|
800195c: 015b lsls r3, r3, #5
|
|
800195e: 4413 add r3, r2
|
|
8001960: 2200 movs r2, #0
|
|
8001962: 601a str r2, [r3, #0]
|
|
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
|
|
8001964: 7bfb ldrb r3, [r7, #15]
|
|
8001966: 3301 adds r3, #1
|
|
8001968: 73fb strb r3, [r7, #15]
|
|
800196a: 7bfa ldrb r2, [r7, #15]
|
|
800196c: 687b ldr r3, [r7, #4]
|
|
800196e: 685b ldr r3, [r3, #4]
|
|
8001970: 429a cmp r2, r3
|
|
8001972: d3c4 bcc.n 80018fe <HAL_PCD_Init+0x82>
|
|
}
|
|
|
|
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
|
|
8001974: 2300 movs r3, #0
|
|
8001976: 73fb strb r3, [r7, #15]
|
|
8001978: e031 b.n 80019de <HAL_PCD_Init+0x162>
|
|
{
|
|
hpcd->OUT_ep[i].is_in = 0U;
|
|
800197a: 7bfb ldrb r3, [r7, #15]
|
|
800197c: 687a ldr r2, [r7, #4]
|
|
800197e: 015b lsls r3, r3, #5
|
|
8001980: 4413 add r3, r2
|
|
8001982: f203 1329 addw r3, r3, #297 ; 0x129
|
|
8001986: 2200 movs r2, #0
|
|
8001988: 701a strb r2, [r3, #0]
|
|
hpcd->OUT_ep[i].num = i;
|
|
800198a: 7bfb ldrb r3, [r7, #15]
|
|
800198c: 687a ldr r2, [r7, #4]
|
|
800198e: 015b lsls r3, r3, #5
|
|
8001990: 4413 add r3, r2
|
|
8001992: f503 7394 add.w r3, r3, #296 ; 0x128
|
|
8001996: 7bfa ldrb r2, [r7, #15]
|
|
8001998: 701a strb r2, [r3, #0]
|
|
/* Control until ep is activated */
|
|
hpcd->OUT_ep[i].type = EP_TYPE_CTRL;
|
|
800199a: 7bfb ldrb r3, [r7, #15]
|
|
800199c: 687a ldr r2, [r7, #4]
|
|
800199e: 015b lsls r3, r3, #5
|
|
80019a0: 4413 add r3, r2
|
|
80019a2: f203 132b addw r3, r3, #299 ; 0x12b
|
|
80019a6: 2200 movs r2, #0
|
|
80019a8: 701a strb r2, [r3, #0]
|
|
hpcd->OUT_ep[i].maxpacket = 0U;
|
|
80019aa: 7bfb ldrb r3, [r7, #15]
|
|
80019ac: 687a ldr r2, [r7, #4]
|
|
80019ae: 015b lsls r3, r3, #5
|
|
80019b0: 4413 add r3, r2
|
|
80019b2: f503 739c add.w r3, r3, #312 ; 0x138
|
|
80019b6: 2200 movs r2, #0
|
|
80019b8: 601a str r2, [r3, #0]
|
|
hpcd->OUT_ep[i].xfer_buff = 0U;
|
|
80019ba: 7bfb ldrb r3, [r7, #15]
|
|
80019bc: 687a ldr r2, [r7, #4]
|
|
80019be: 015b lsls r3, r3, #5
|
|
80019c0: 4413 add r3, r2
|
|
80019c2: f503 739e add.w r3, r3, #316 ; 0x13c
|
|
80019c6: 2200 movs r2, #0
|
|
80019c8: 601a str r2, [r3, #0]
|
|
hpcd->OUT_ep[i].xfer_len = 0U;
|
|
80019ca: 7bfb ldrb r3, [r7, #15]
|
|
80019cc: 687a ldr r2, [r7, #4]
|
|
80019ce: 330a adds r3, #10
|
|
80019d0: 015b lsls r3, r3, #5
|
|
80019d2: 4413 add r3, r2
|
|
80019d4: 2200 movs r2, #0
|
|
80019d6: 601a str r2, [r3, #0]
|
|
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
|
|
80019d8: 7bfb ldrb r3, [r7, #15]
|
|
80019da: 3301 adds r3, #1
|
|
80019dc: 73fb strb r3, [r7, #15]
|
|
80019de: 7bfa ldrb r2, [r7, #15]
|
|
80019e0: 687b ldr r3, [r7, #4]
|
|
80019e2: 685b ldr r3, [r3, #4]
|
|
80019e4: 429a cmp r2, r3
|
|
80019e6: d3c8 bcc.n 800197a <HAL_PCD_Init+0xfe>
|
|
}
|
|
|
|
/* Init Device */
|
|
if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK)
|
|
80019e8: 687b ldr r3, [r7, #4]
|
|
80019ea: 681b ldr r3, [r3, #0]
|
|
80019ec: 603b str r3, [r7, #0]
|
|
80019ee: 687e ldr r6, [r7, #4]
|
|
80019f0: 466d mov r5, sp
|
|
80019f2: f106 0410 add.w r4, r6, #16
|
|
80019f6: cc0f ldmia r4!, {r0, r1, r2, r3}
|
|
80019f8: c50f stmia r5!, {r0, r1, r2, r3}
|
|
80019fa: 6823 ldr r3, [r4, #0]
|
|
80019fc: 602b str r3, [r5, #0]
|
|
80019fe: 1d33 adds r3, r6, #4
|
|
8001a00: cb0e ldmia r3, {r1, r2, r3}
|
|
8001a02: 6838 ldr r0, [r7, #0]
|
|
8001a04: f002 fe37 bl 8004676 <USB_DevInit>
|
|
8001a08: 4603 mov r3, r0
|
|
8001a0a: 2b00 cmp r3, #0
|
|
8001a0c: d005 beq.n 8001a1a <HAL_PCD_Init+0x19e>
|
|
{
|
|
hpcd->State = HAL_PCD_STATE_ERROR;
|
|
8001a0e: 687b ldr r3, [r7, #4]
|
|
8001a10: 2202 movs r2, #2
|
|
8001a12: f883 2229 strb.w r2, [r3, #553] ; 0x229
|
|
return HAL_ERROR;
|
|
8001a16: 2301 movs r3, #1
|
|
8001a18: e00d b.n 8001a36 <HAL_PCD_Init+0x1ba>
|
|
}
|
|
|
|
hpcd->USB_Address = 0U;
|
|
8001a1a: 687b ldr r3, [r7, #4]
|
|
8001a1c: 2200 movs r2, #0
|
|
8001a1e: f883 2024 strb.w r2, [r3, #36] ; 0x24
|
|
hpcd->State = HAL_PCD_STATE_READY;
|
|
8001a22: 687b ldr r3, [r7, #4]
|
|
8001a24: 2201 movs r2, #1
|
|
8001a26: f883 2229 strb.w r2, [r3, #553] ; 0x229
|
|
(void)USB_DevDisconnect(hpcd->Instance);
|
|
8001a2a: 687b ldr r3, [r7, #4]
|
|
8001a2c: 681b ldr r3, [r3, #0]
|
|
8001a2e: 4618 mov r0, r3
|
|
8001a30: f003 fe75 bl 800571e <USB_DevDisconnect>
|
|
|
|
return HAL_OK;
|
|
8001a34: 2300 movs r3, #0
|
|
}
|
|
8001a36: 4618 mov r0, r3
|
|
8001a38: 3714 adds r7, #20
|
|
8001a3a: 46bd mov sp, r7
|
|
8001a3c: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
08001a3e <HAL_PCD_Start>:
|
|
* @brief Start the USB device
|
|
* @param hpcd PCD handle
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
|
|
{
|
|
8001a3e: b580 push {r7, lr}
|
|
8001a40: b082 sub sp, #8
|
|
8001a42: af00 add r7, sp, #0
|
|
8001a44: 6078 str r0, [r7, #4]
|
|
__HAL_LOCK(hpcd);
|
|
8001a46: 687b ldr r3, [r7, #4]
|
|
8001a48: f893 3228 ldrb.w r3, [r3, #552] ; 0x228
|
|
8001a4c: 2b01 cmp r3, #1
|
|
8001a4e: d101 bne.n 8001a54 <HAL_PCD_Start+0x16>
|
|
8001a50: 2302 movs r3, #2
|
|
8001a52: e016 b.n 8001a82 <HAL_PCD_Start+0x44>
|
|
8001a54: 687b ldr r3, [r7, #4]
|
|
8001a56: 2201 movs r2, #1
|
|
8001a58: f883 2228 strb.w r2, [r3, #552] ; 0x228
|
|
#if defined (USB)
|
|
HAL_PCDEx_SetConnectionState(hpcd, 1U);
|
|
8001a5c: 2101 movs r1, #1
|
|
8001a5e: 6878 ldr r0, [r7, #4]
|
|
8001a60: f008 ff95 bl 800a98e <HAL_PCDEx_SetConnectionState>
|
|
#endif /* defined (USB) */
|
|
(void)USB_DevConnect(hpcd->Instance);
|
|
8001a64: 687b ldr r3, [r7, #4]
|
|
8001a66: 681b ldr r3, [r3, #0]
|
|
8001a68: 4618 mov r0, r3
|
|
8001a6a: f003 fe4e bl 800570a <USB_DevConnect>
|
|
__HAL_PCD_ENABLE(hpcd);
|
|
8001a6e: 687b ldr r3, [r7, #4]
|
|
8001a70: 681b ldr r3, [r3, #0]
|
|
8001a72: 4618 mov r0, r3
|
|
8001a74: f002 fdc0 bl 80045f8 <USB_EnableGlobalInt>
|
|
__HAL_UNLOCK(hpcd);
|
|
8001a78: 687b ldr r3, [r7, #4]
|
|
8001a7a: 2200 movs r2, #0
|
|
8001a7c: f883 2228 strb.w r2, [r3, #552] ; 0x228
|
|
return HAL_OK;
|
|
8001a80: 2300 movs r3, #0
|
|
}
|
|
8001a82: 4618 mov r0, r3
|
|
8001a84: 3708 adds r7, #8
|
|
8001a86: 46bd mov sp, r7
|
|
8001a88: bd80 pop {r7, pc}
|
|
|
|
08001a8a <HAL_PCD_IRQHandler>:
|
|
* @brief This function handles PCD interrupt request.
|
|
* @param hpcd PCD handle
|
|
* @retval HAL status
|
|
*/
|
|
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
|
|
{
|
|
8001a8a: b580 push {r7, lr}
|
|
8001a8c: b082 sub sp, #8
|
|
8001a8e: af00 add r7, sp, #0
|
|
8001a90: 6078 str r0, [r7, #4]
|
|
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_CTR))
|
|
8001a92: 687b ldr r3, [r7, #4]
|
|
8001a94: 681b ldr r3, [r3, #0]
|
|
8001a96: 4618 mov r0, r3
|
|
8001a98: f003 fe4b bl 8005732 <USB_ReadInterrupts>
|
|
8001a9c: 4603 mov r3, r0
|
|
8001a9e: f403 4300 and.w r3, r3, #32768 ; 0x8000
|
|
8001aa2: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
|
|
8001aa6: d102 bne.n 8001aae <HAL_PCD_IRQHandler+0x24>
|
|
{
|
|
/* servicing of the endpoint correct transfer interrupt */
|
|
/* clear of the CTR flag into the sub */
|
|
(void)PCD_EP_ISR_Handler(hpcd);
|
|
8001aa8: 6878 ldr r0, [r7, #4]
|
|
8001aaa: f000 faf3 bl 8002094 <PCD_EP_ISR_Handler>
|
|
}
|
|
|
|
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_RESET))
|
|
8001aae: 687b ldr r3, [r7, #4]
|
|
8001ab0: 681b ldr r3, [r3, #0]
|
|
8001ab2: 4618 mov r0, r3
|
|
8001ab4: f003 fe3d bl 8005732 <USB_ReadInterrupts>
|
|
8001ab8: 4603 mov r3, r0
|
|
8001aba: f403 6380 and.w r3, r3, #1024 ; 0x400
|
|
8001abe: f5b3 6f80 cmp.w r3, #1024 ; 0x400
|
|
8001ac2: d112 bne.n 8001aea <HAL_PCD_IRQHandler+0x60>
|
|
{
|
|
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
|
|
8001ac4: 687b ldr r3, [r7, #4]
|
|
8001ac6: 681b ldr r3, [r3, #0]
|
|
8001ac8: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
|
|
8001acc: b29a uxth r2, r3
|
|
8001ace: 687b ldr r3, [r7, #4]
|
|
8001ad0: 681b ldr r3, [r3, #0]
|
|
8001ad2: f422 6280 bic.w r2, r2, #1024 ; 0x400
|
|
8001ad6: b292 uxth r2, r2
|
|
8001ad8: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
|
|
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->ResetCallback(hpcd);
|
|
#else
|
|
HAL_PCD_ResetCallback(hpcd);
|
|
8001adc: 6878 ldr r0, [r7, #4]
|
|
8001ade: f008 fd64 bl 800a5aa <HAL_PCD_ResetCallback>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
|
|
(void)HAL_PCD_SetAddress(hpcd, 0U);
|
|
8001ae2: 2100 movs r1, #0
|
|
8001ae4: 6878 ldr r0, [r7, #4]
|
|
8001ae6: f000 f8de bl 8001ca6 <HAL_PCD_SetAddress>
|
|
}
|
|
|
|
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_PMAOVR))
|
|
8001aea: 687b ldr r3, [r7, #4]
|
|
8001aec: 681b ldr r3, [r3, #0]
|
|
8001aee: 4618 mov r0, r3
|
|
8001af0: f003 fe1f bl 8005732 <USB_ReadInterrupts>
|
|
8001af4: 4603 mov r3, r0
|
|
8001af6: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
8001afa: f5b3 4f80 cmp.w r3, #16384 ; 0x4000
|
|
8001afe: d10b bne.n 8001b18 <HAL_PCD_IRQHandler+0x8e>
|
|
{
|
|
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR);
|
|
8001b00: 687b ldr r3, [r7, #4]
|
|
8001b02: 681b ldr r3, [r3, #0]
|
|
8001b04: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
|
|
8001b08: b29a uxth r2, r3
|
|
8001b0a: 687b ldr r3, [r7, #4]
|
|
8001b0c: 681b ldr r3, [r3, #0]
|
|
8001b0e: f422 4280 bic.w r2, r2, #16384 ; 0x4000
|
|
8001b12: b292 uxth r2, r2
|
|
8001b14: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
|
|
}
|
|
|
|
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_ERR))
|
|
8001b18: 687b ldr r3, [r7, #4]
|
|
8001b1a: 681b ldr r3, [r3, #0]
|
|
8001b1c: 4618 mov r0, r3
|
|
8001b1e: f003 fe08 bl 8005732 <USB_ReadInterrupts>
|
|
8001b22: 4603 mov r3, r0
|
|
8001b24: f403 5300 and.w r3, r3, #8192 ; 0x2000
|
|
8001b28: f5b3 5f00 cmp.w r3, #8192 ; 0x2000
|
|
8001b2c: d10b bne.n 8001b46 <HAL_PCD_IRQHandler+0xbc>
|
|
{
|
|
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR);
|
|
8001b2e: 687b ldr r3, [r7, #4]
|
|
8001b30: 681b ldr r3, [r3, #0]
|
|
8001b32: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
|
|
8001b36: b29a uxth r2, r3
|
|
8001b38: 687b ldr r3, [r7, #4]
|
|
8001b3a: 681b ldr r3, [r3, #0]
|
|
8001b3c: f422 5200 bic.w r2, r2, #8192 ; 0x2000
|
|
8001b40: b292 uxth r2, r2
|
|
8001b42: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
|
|
}
|
|
|
|
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_WKUP))
|
|
8001b46: 687b ldr r3, [r7, #4]
|
|
8001b48: 681b ldr r3, [r3, #0]
|
|
8001b4a: 4618 mov r0, r3
|
|
8001b4c: f003 fdf1 bl 8005732 <USB_ReadInterrupts>
|
|
8001b50: 4603 mov r3, r0
|
|
8001b52: f403 5380 and.w r3, r3, #4096 ; 0x1000
|
|
8001b56: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
|
|
8001b5a: d126 bne.n 8001baa <HAL_PCD_IRQHandler+0x120>
|
|
{
|
|
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LP_MODE);
|
|
8001b5c: 687b ldr r3, [r7, #4]
|
|
8001b5e: 681b ldr r3, [r3, #0]
|
|
8001b60: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
|
|
8001b64: b29a uxth r2, r3
|
|
8001b66: 687b ldr r3, [r7, #4]
|
|
8001b68: 681b ldr r3, [r3, #0]
|
|
8001b6a: f022 0204 bic.w r2, r2, #4
|
|
8001b6e: b292 uxth r2, r2
|
|
8001b70: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
|
|
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP);
|
|
8001b74: 687b ldr r3, [r7, #4]
|
|
8001b76: 681b ldr r3, [r3, #0]
|
|
8001b78: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
|
|
8001b7c: b29a uxth r2, r3
|
|
8001b7e: 687b ldr r3, [r7, #4]
|
|
8001b80: 681b ldr r3, [r3, #0]
|
|
8001b82: f022 0208 bic.w r2, r2, #8
|
|
8001b86: b292 uxth r2, r2
|
|
8001b88: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
|
|
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->ResumeCallback(hpcd);
|
|
#else
|
|
HAL_PCD_ResumeCallback(hpcd);
|
|
8001b8c: 6878 ldr r0, [r7, #4]
|
|
8001b8e: f008 fd45 bl 800a61c <HAL_PCD_ResumeCallback>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
|
|
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP);
|
|
8001b92: 687b ldr r3, [r7, #4]
|
|
8001b94: 681b ldr r3, [r3, #0]
|
|
8001b96: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
|
|
8001b9a: b29a uxth r2, r3
|
|
8001b9c: 687b ldr r3, [r7, #4]
|
|
8001b9e: 681b ldr r3, [r3, #0]
|
|
8001ba0: f422 5280 bic.w r2, r2, #4096 ; 0x1000
|
|
8001ba4: b292 uxth r2, r2
|
|
8001ba6: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
|
|
}
|
|
|
|
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_SUSP))
|
|
8001baa: 687b ldr r3, [r7, #4]
|
|
8001bac: 681b ldr r3, [r3, #0]
|
|
8001bae: 4618 mov r0, r3
|
|
8001bb0: f003 fdbf bl 8005732 <USB_ReadInterrupts>
|
|
8001bb4: 4603 mov r3, r0
|
|
8001bb6: f403 6300 and.w r3, r3, #2048 ; 0x800
|
|
8001bba: f5b3 6f00 cmp.w r3, #2048 ; 0x800
|
|
8001bbe: d13d bne.n 8001c3c <HAL_PCD_IRQHandler+0x1b2>
|
|
{
|
|
/* Force low-power mode in the macrocell */
|
|
hpcd->Instance->CNTR |= USB_CNTR_FSUSP;
|
|
8001bc0: 687b ldr r3, [r7, #4]
|
|
8001bc2: 681b ldr r3, [r3, #0]
|
|
8001bc4: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
|
|
8001bc8: b29a uxth r2, r3
|
|
8001bca: 687b ldr r3, [r7, #4]
|
|
8001bcc: 681b ldr r3, [r3, #0]
|
|
8001bce: f042 0208 orr.w r2, r2, #8
|
|
8001bd2: b292 uxth r2, r2
|
|
8001bd4: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
|
|
|
|
/* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
|
|
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP);
|
|
8001bd8: 687b ldr r3, [r7, #4]
|
|
8001bda: 681b ldr r3, [r3, #0]
|
|
8001bdc: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
|
|
8001be0: b29a uxth r2, r3
|
|
8001be2: 687b ldr r3, [r7, #4]
|
|
8001be4: 681b ldr r3, [r3, #0]
|
|
8001be6: f422 6200 bic.w r2, r2, #2048 ; 0x800
|
|
8001bea: b292 uxth r2, r2
|
|
8001bec: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
|
|
|
|
hpcd->Instance->CNTR |= USB_CNTR_LP_MODE;
|
|
8001bf0: 687b ldr r3, [r7, #4]
|
|
8001bf2: 681b ldr r3, [r3, #0]
|
|
8001bf4: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
|
|
8001bf8: b29a uxth r2, r3
|
|
8001bfa: 687b ldr r3, [r7, #4]
|
|
8001bfc: 681b ldr r3, [r3, #0]
|
|
8001bfe: f042 0204 orr.w r2, r2, #4
|
|
8001c02: b292 uxth r2, r2
|
|
8001c04: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
|
|
|
|
/* WA: Clear Wakeup flag if raised with suspend signal */
|
|
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_WKUP))
|
|
8001c08: 687b ldr r3, [r7, #4]
|
|
8001c0a: 681b ldr r3, [r3, #0]
|
|
8001c0c: 4618 mov r0, r3
|
|
8001c0e: f003 fd90 bl 8005732 <USB_ReadInterrupts>
|
|
8001c12: 4603 mov r3, r0
|
|
8001c14: f403 5380 and.w r3, r3, #4096 ; 0x1000
|
|
8001c18: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
|
|
8001c1c: d10b bne.n 8001c36 <HAL_PCD_IRQHandler+0x1ac>
|
|
{
|
|
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP);
|
|
8001c1e: 687b ldr r3, [r7, #4]
|
|
8001c20: 681b ldr r3, [r3, #0]
|
|
8001c22: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
|
|
8001c26: b29a uxth r2, r3
|
|
8001c28: 687b ldr r3, [r7, #4]
|
|
8001c2a: 681b ldr r3, [r3, #0]
|
|
8001c2c: f422 5280 bic.w r2, r2, #4096 ; 0x1000
|
|
8001c30: b292 uxth r2, r2
|
|
8001c32: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
|
|
}
|
|
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->SuspendCallback(hpcd);
|
|
#else
|
|
HAL_PCD_SuspendCallback(hpcd);
|
|
8001c36: 6878 ldr r0, [r7, #4]
|
|
8001c38: f008 fcd6 bl 800a5e8 <HAL_PCD_SuspendCallback>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
}
|
|
|
|
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_SOF))
|
|
8001c3c: 687b ldr r3, [r7, #4]
|
|
8001c3e: 681b ldr r3, [r3, #0]
|
|
8001c40: 4618 mov r0, r3
|
|
8001c42: f003 fd76 bl 8005732 <USB_ReadInterrupts>
|
|
8001c46: 4603 mov r3, r0
|
|
8001c48: f403 7300 and.w r3, r3, #512 ; 0x200
|
|
8001c4c: f5b3 7f00 cmp.w r3, #512 ; 0x200
|
|
8001c50: d10e bne.n 8001c70 <HAL_PCD_IRQHandler+0x1e6>
|
|
{
|
|
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF);
|
|
8001c52: 687b ldr r3, [r7, #4]
|
|
8001c54: 681b ldr r3, [r3, #0]
|
|
8001c56: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
|
|
8001c5a: b29a uxth r2, r3
|
|
8001c5c: 687b ldr r3, [r7, #4]
|
|
8001c5e: 681b ldr r3, [r3, #0]
|
|
8001c60: f422 7200 bic.w r2, r2, #512 ; 0x200
|
|
8001c64: b292 uxth r2, r2
|
|
8001c66: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
|
|
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->SOFCallback(hpcd);
|
|
#else
|
|
HAL_PCD_SOFCallback(hpcd);
|
|
8001c6a: 6878 ldr r0, [r7, #4]
|
|
8001c6c: f008 fc8f bl 800a58e <HAL_PCD_SOFCallback>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
}
|
|
|
|
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_ESOF))
|
|
8001c70: 687b ldr r3, [r7, #4]
|
|
8001c72: 681b ldr r3, [r3, #0]
|
|
8001c74: 4618 mov r0, r3
|
|
8001c76: f003 fd5c bl 8005732 <USB_ReadInterrupts>
|
|
8001c7a: 4603 mov r3, r0
|
|
8001c7c: f403 7380 and.w r3, r3, #256 ; 0x100
|
|
8001c80: f5b3 7f80 cmp.w r3, #256 ; 0x100
|
|
8001c84: d10b bne.n 8001c9e <HAL_PCD_IRQHandler+0x214>
|
|
{
|
|
/* clear ESOF flag in ISTR */
|
|
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF);
|
|
8001c86: 687b ldr r3, [r7, #4]
|
|
8001c88: 681b ldr r3, [r3, #0]
|
|
8001c8a: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
|
|
8001c8e: b29a uxth r2, r3
|
|
8001c90: 687b ldr r3, [r7, #4]
|
|
8001c92: 681b ldr r3, [r3, #0]
|
|
8001c94: f422 7280 bic.w r2, r2, #256 ; 0x100
|
|
8001c98: b292 uxth r2, r2
|
|
8001c9a: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
|
|
}
|
|
}
|
|
8001c9e: bf00 nop
|
|
8001ca0: 3708 adds r7, #8
|
|
8001ca2: 46bd mov sp, r7
|
|
8001ca4: bd80 pop {r7, pc}
|
|
|
|
08001ca6 <HAL_PCD_SetAddress>:
|
|
* @param hpcd PCD handle
|
|
* @param address new device address
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
|
|
{
|
|
8001ca6: b580 push {r7, lr}
|
|
8001ca8: b082 sub sp, #8
|
|
8001caa: af00 add r7, sp, #0
|
|
8001cac: 6078 str r0, [r7, #4]
|
|
8001cae: 460b mov r3, r1
|
|
8001cb0: 70fb strb r3, [r7, #3]
|
|
__HAL_LOCK(hpcd);
|
|
8001cb2: 687b ldr r3, [r7, #4]
|
|
8001cb4: f893 3228 ldrb.w r3, [r3, #552] ; 0x228
|
|
8001cb8: 2b01 cmp r3, #1
|
|
8001cba: d101 bne.n 8001cc0 <HAL_PCD_SetAddress+0x1a>
|
|
8001cbc: 2302 movs r3, #2
|
|
8001cbe: e013 b.n 8001ce8 <HAL_PCD_SetAddress+0x42>
|
|
8001cc0: 687b ldr r3, [r7, #4]
|
|
8001cc2: 2201 movs r2, #1
|
|
8001cc4: f883 2228 strb.w r2, [r3, #552] ; 0x228
|
|
hpcd->USB_Address = address;
|
|
8001cc8: 687b ldr r3, [r7, #4]
|
|
8001cca: 78fa ldrb r2, [r7, #3]
|
|
8001ccc: f883 2024 strb.w r2, [r3, #36] ; 0x24
|
|
(void)USB_SetDevAddress(hpcd->Instance, address);
|
|
8001cd0: 687b ldr r3, [r7, #4]
|
|
8001cd2: 681b ldr r3, [r3, #0]
|
|
8001cd4: 78fa ldrb r2, [r7, #3]
|
|
8001cd6: 4611 mov r1, r2
|
|
8001cd8: 4618 mov r0, r3
|
|
8001cda: f003 fd03 bl 80056e4 <USB_SetDevAddress>
|
|
__HAL_UNLOCK(hpcd);
|
|
8001cde: 687b ldr r3, [r7, #4]
|
|
8001ce0: 2200 movs r2, #0
|
|
8001ce2: f883 2228 strb.w r2, [r3, #552] ; 0x228
|
|
return HAL_OK;
|
|
8001ce6: 2300 movs r3, #0
|
|
}
|
|
8001ce8: 4618 mov r0, r3
|
|
8001cea: 3708 adds r7, #8
|
|
8001cec: 46bd mov sp, r7
|
|
8001cee: bd80 pop {r7, pc}
|
|
|
|
08001cf0 <HAL_PCD_EP_Open>:
|
|
* @param ep_mps endpoint max packet size
|
|
* @param ep_type endpoint type
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type)
|
|
{
|
|
8001cf0: b580 push {r7, lr}
|
|
8001cf2: b084 sub sp, #16
|
|
8001cf4: af00 add r7, sp, #0
|
|
8001cf6: 6078 str r0, [r7, #4]
|
|
8001cf8: 4608 mov r0, r1
|
|
8001cfa: 4611 mov r1, r2
|
|
8001cfc: 461a mov r2, r3
|
|
8001cfe: 4603 mov r3, r0
|
|
8001d00: 70fb strb r3, [r7, #3]
|
|
8001d02: 460b mov r3, r1
|
|
8001d04: 803b strh r3, [r7, #0]
|
|
8001d06: 4613 mov r3, r2
|
|
8001d08: 70bb strb r3, [r7, #2]
|
|
HAL_StatusTypeDef ret = HAL_OK;
|
|
8001d0a: 2300 movs r3, #0
|
|
8001d0c: 72fb strb r3, [r7, #11]
|
|
PCD_EPTypeDef *ep;
|
|
|
|
if ((ep_addr & 0x80U) == 0x80U)
|
|
8001d0e: f997 3003 ldrsb.w r3, [r7, #3]
|
|
8001d12: 2b00 cmp r3, #0
|
|
8001d14: da0b bge.n 8001d2e <HAL_PCD_EP_Open+0x3e>
|
|
{
|
|
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
|
|
8001d16: 78fb ldrb r3, [r7, #3]
|
|
8001d18: f003 0307 and.w r3, r3, #7
|
|
8001d1c: 015b lsls r3, r3, #5
|
|
8001d1e: 3328 adds r3, #40 ; 0x28
|
|
8001d20: 687a ldr r2, [r7, #4]
|
|
8001d22: 4413 add r3, r2
|
|
8001d24: 60fb str r3, [r7, #12]
|
|
ep->is_in = 1U;
|
|
8001d26: 68fb ldr r3, [r7, #12]
|
|
8001d28: 2201 movs r2, #1
|
|
8001d2a: 705a strb r2, [r3, #1]
|
|
8001d2c: e00b b.n 8001d46 <HAL_PCD_EP_Open+0x56>
|
|
}
|
|
else
|
|
{
|
|
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
|
|
8001d2e: 78fb ldrb r3, [r7, #3]
|
|
8001d30: f003 0307 and.w r3, r3, #7
|
|
8001d34: 015b lsls r3, r3, #5
|
|
8001d36: f503 7394 add.w r3, r3, #296 ; 0x128
|
|
8001d3a: 687a ldr r2, [r7, #4]
|
|
8001d3c: 4413 add r3, r2
|
|
8001d3e: 60fb str r3, [r7, #12]
|
|
ep->is_in = 0U;
|
|
8001d40: 68fb ldr r3, [r7, #12]
|
|
8001d42: 2200 movs r2, #0
|
|
8001d44: 705a strb r2, [r3, #1]
|
|
}
|
|
|
|
ep->num = ep_addr & EP_ADDR_MSK;
|
|
8001d46: 78fb ldrb r3, [r7, #3]
|
|
8001d48: f003 0307 and.w r3, r3, #7
|
|
8001d4c: b2da uxtb r2, r3
|
|
8001d4e: 68fb ldr r3, [r7, #12]
|
|
8001d50: 701a strb r2, [r3, #0]
|
|
ep->maxpacket = ep_mps;
|
|
8001d52: 883a ldrh r2, [r7, #0]
|
|
8001d54: 68fb ldr r3, [r7, #12]
|
|
8001d56: 611a str r2, [r3, #16]
|
|
ep->type = ep_type;
|
|
8001d58: 68fb ldr r3, [r7, #12]
|
|
8001d5a: 78ba ldrb r2, [r7, #2]
|
|
8001d5c: 70da strb r2, [r3, #3]
|
|
|
|
if (ep->is_in != 0U)
|
|
8001d5e: 68fb ldr r3, [r7, #12]
|
|
8001d60: 785b ldrb r3, [r3, #1]
|
|
8001d62: 2b00 cmp r3, #0
|
|
8001d64: d004 beq.n 8001d70 <HAL_PCD_EP_Open+0x80>
|
|
{
|
|
/* Assign a Tx FIFO */
|
|
ep->tx_fifo_num = ep->num;
|
|
8001d66: 68fb ldr r3, [r7, #12]
|
|
8001d68: 781b ldrb r3, [r3, #0]
|
|
8001d6a: b29a uxth r2, r3
|
|
8001d6c: 68fb ldr r3, [r7, #12]
|
|
8001d6e: 81da strh r2, [r3, #14]
|
|
}
|
|
/* Set initial data PID. */
|
|
if (ep_type == EP_TYPE_BULK)
|
|
8001d70: 78bb ldrb r3, [r7, #2]
|
|
8001d72: 2b02 cmp r3, #2
|
|
8001d74: d102 bne.n 8001d7c <HAL_PCD_EP_Open+0x8c>
|
|
{
|
|
ep->data_pid_start = 0U;
|
|
8001d76: 68fb ldr r3, [r7, #12]
|
|
8001d78: 2200 movs r2, #0
|
|
8001d7a: 711a strb r2, [r3, #4]
|
|
}
|
|
|
|
__HAL_LOCK(hpcd);
|
|
8001d7c: 687b ldr r3, [r7, #4]
|
|
8001d7e: f893 3228 ldrb.w r3, [r3, #552] ; 0x228
|
|
8001d82: 2b01 cmp r3, #1
|
|
8001d84: d101 bne.n 8001d8a <HAL_PCD_EP_Open+0x9a>
|
|
8001d86: 2302 movs r3, #2
|
|
8001d88: e00e b.n 8001da8 <HAL_PCD_EP_Open+0xb8>
|
|
8001d8a: 687b ldr r3, [r7, #4]
|
|
8001d8c: 2201 movs r2, #1
|
|
8001d8e: f883 2228 strb.w r2, [r3, #552] ; 0x228
|
|
(void)USB_ActivateEndpoint(hpcd->Instance, ep);
|
|
8001d92: 687b ldr r3, [r7, #4]
|
|
8001d94: 681b ldr r3, [r3, #0]
|
|
8001d96: 68f9 ldr r1, [r7, #12]
|
|
8001d98: 4618 mov r0, r3
|
|
8001d9a: f002 fc91 bl 80046c0 <USB_ActivateEndpoint>
|
|
__HAL_UNLOCK(hpcd);
|
|
8001d9e: 687b ldr r3, [r7, #4]
|
|
8001da0: 2200 movs r2, #0
|
|
8001da2: f883 2228 strb.w r2, [r3, #552] ; 0x228
|
|
|
|
return ret;
|
|
8001da6: 7afb ldrb r3, [r7, #11]
|
|
}
|
|
8001da8: 4618 mov r0, r3
|
|
8001daa: 3710 adds r7, #16
|
|
8001dac: 46bd mov sp, r7
|
|
8001dae: bd80 pop {r7, pc}
|
|
|
|
08001db0 <HAL_PCD_EP_Close>:
|
|
* @param hpcd PCD handle
|
|
* @param ep_addr endpoint address
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
|
|
{
|
|
8001db0: b580 push {r7, lr}
|
|
8001db2: b084 sub sp, #16
|
|
8001db4: af00 add r7, sp, #0
|
|
8001db6: 6078 str r0, [r7, #4]
|
|
8001db8: 460b mov r3, r1
|
|
8001dba: 70fb strb r3, [r7, #3]
|
|
PCD_EPTypeDef *ep;
|
|
|
|
if ((ep_addr & 0x80U) == 0x80U)
|
|
8001dbc: f997 3003 ldrsb.w r3, [r7, #3]
|
|
8001dc0: 2b00 cmp r3, #0
|
|
8001dc2: da0b bge.n 8001ddc <HAL_PCD_EP_Close+0x2c>
|
|
{
|
|
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
|
|
8001dc4: 78fb ldrb r3, [r7, #3]
|
|
8001dc6: f003 0307 and.w r3, r3, #7
|
|
8001dca: 015b lsls r3, r3, #5
|
|
8001dcc: 3328 adds r3, #40 ; 0x28
|
|
8001dce: 687a ldr r2, [r7, #4]
|
|
8001dd0: 4413 add r3, r2
|
|
8001dd2: 60fb str r3, [r7, #12]
|
|
ep->is_in = 1U;
|
|
8001dd4: 68fb ldr r3, [r7, #12]
|
|
8001dd6: 2201 movs r2, #1
|
|
8001dd8: 705a strb r2, [r3, #1]
|
|
8001dda: e00b b.n 8001df4 <HAL_PCD_EP_Close+0x44>
|
|
}
|
|
else
|
|
{
|
|
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
|
|
8001ddc: 78fb ldrb r3, [r7, #3]
|
|
8001dde: f003 0307 and.w r3, r3, #7
|
|
8001de2: 015b lsls r3, r3, #5
|
|
8001de4: f503 7394 add.w r3, r3, #296 ; 0x128
|
|
8001de8: 687a ldr r2, [r7, #4]
|
|
8001dea: 4413 add r3, r2
|
|
8001dec: 60fb str r3, [r7, #12]
|
|
ep->is_in = 0U;
|
|
8001dee: 68fb ldr r3, [r7, #12]
|
|
8001df0: 2200 movs r2, #0
|
|
8001df2: 705a strb r2, [r3, #1]
|
|
}
|
|
ep->num = ep_addr & EP_ADDR_MSK;
|
|
8001df4: 78fb ldrb r3, [r7, #3]
|
|
8001df6: f003 0307 and.w r3, r3, #7
|
|
8001dfa: b2da uxtb r2, r3
|
|
8001dfc: 68fb ldr r3, [r7, #12]
|
|
8001dfe: 701a strb r2, [r3, #0]
|
|
|
|
__HAL_LOCK(hpcd);
|
|
8001e00: 687b ldr r3, [r7, #4]
|
|
8001e02: f893 3228 ldrb.w r3, [r3, #552] ; 0x228
|
|
8001e06: 2b01 cmp r3, #1
|
|
8001e08: d101 bne.n 8001e0e <HAL_PCD_EP_Close+0x5e>
|
|
8001e0a: 2302 movs r3, #2
|
|
8001e0c: e00e b.n 8001e2c <HAL_PCD_EP_Close+0x7c>
|
|
8001e0e: 687b ldr r3, [r7, #4]
|
|
8001e10: 2201 movs r2, #1
|
|
8001e12: f883 2228 strb.w r2, [r3, #552] ; 0x228
|
|
(void)USB_DeactivateEndpoint(hpcd->Instance, ep);
|
|
8001e16: 687b ldr r3, [r7, #4]
|
|
8001e18: 681b ldr r3, [r3, #0]
|
|
8001e1a: 68f9 ldr r1, [r7, #12]
|
|
8001e1c: 4618 mov r0, r3
|
|
8001e1e: f002 ff3d bl 8004c9c <USB_DeactivateEndpoint>
|
|
__HAL_UNLOCK(hpcd);
|
|
8001e22: 687b ldr r3, [r7, #4]
|
|
8001e24: 2200 movs r2, #0
|
|
8001e26: f883 2228 strb.w r2, [r3, #552] ; 0x228
|
|
return HAL_OK;
|
|
8001e2a: 2300 movs r3, #0
|
|
}
|
|
8001e2c: 4618 mov r0, r3
|
|
8001e2e: 3710 adds r7, #16
|
|
8001e30: 46bd mov sp, r7
|
|
8001e32: bd80 pop {r7, pc}
|
|
|
|
08001e34 <HAL_PCD_EP_Receive>:
|
|
* @param pBuf pointer to the reception buffer
|
|
* @param len amount of data to be received
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
|
|
{
|
|
8001e34: b580 push {r7, lr}
|
|
8001e36: b086 sub sp, #24
|
|
8001e38: af00 add r7, sp, #0
|
|
8001e3a: 60f8 str r0, [r7, #12]
|
|
8001e3c: 607a str r2, [r7, #4]
|
|
8001e3e: 603b str r3, [r7, #0]
|
|
8001e40: 460b mov r3, r1
|
|
8001e42: 72fb strb r3, [r7, #11]
|
|
PCD_EPTypeDef *ep;
|
|
|
|
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
|
|
8001e44: 7afb ldrb r3, [r7, #11]
|
|
8001e46: f003 0307 and.w r3, r3, #7
|
|
8001e4a: 015b lsls r3, r3, #5
|
|
8001e4c: f503 7394 add.w r3, r3, #296 ; 0x128
|
|
8001e50: 68fa ldr r2, [r7, #12]
|
|
8001e52: 4413 add r3, r2
|
|
8001e54: 617b str r3, [r7, #20]
|
|
|
|
/*setup and start the Xfer */
|
|
ep->xfer_buff = pBuf;
|
|
8001e56: 697b ldr r3, [r7, #20]
|
|
8001e58: 687a ldr r2, [r7, #4]
|
|
8001e5a: 615a str r2, [r3, #20]
|
|
ep->xfer_len = len;
|
|
8001e5c: 697b ldr r3, [r7, #20]
|
|
8001e5e: 683a ldr r2, [r7, #0]
|
|
8001e60: 619a str r2, [r3, #24]
|
|
ep->xfer_count = 0U;
|
|
8001e62: 697b ldr r3, [r7, #20]
|
|
8001e64: 2200 movs r2, #0
|
|
8001e66: 61da str r2, [r3, #28]
|
|
ep->is_in = 0U;
|
|
8001e68: 697b ldr r3, [r7, #20]
|
|
8001e6a: 2200 movs r2, #0
|
|
8001e6c: 705a strb r2, [r3, #1]
|
|
ep->num = ep_addr & EP_ADDR_MSK;
|
|
8001e6e: 7afb ldrb r3, [r7, #11]
|
|
8001e70: f003 0307 and.w r3, r3, #7
|
|
8001e74: b2da uxtb r2, r3
|
|
8001e76: 697b ldr r3, [r7, #20]
|
|
8001e78: 701a strb r2, [r3, #0]
|
|
|
|
if ((ep_addr & EP_ADDR_MSK) == 0U)
|
|
8001e7a: 7afb ldrb r3, [r7, #11]
|
|
8001e7c: f003 0307 and.w r3, r3, #7
|
|
8001e80: 2b00 cmp r3, #0
|
|
8001e82: d106 bne.n 8001e92 <HAL_PCD_EP_Receive+0x5e>
|
|
{
|
|
(void)USB_EP0StartXfer(hpcd->Instance, ep);
|
|
8001e84: 68fb ldr r3, [r7, #12]
|
|
8001e86: 681b ldr r3, [r3, #0]
|
|
8001e88: 6979 ldr r1, [r7, #20]
|
|
8001e8a: 4618 mov r0, r3
|
|
8001e8c: f003 f89c bl 8004fc8 <USB_EPStartXfer>
|
|
8001e90: e005 b.n 8001e9e <HAL_PCD_EP_Receive+0x6a>
|
|
}
|
|
else
|
|
{
|
|
(void)USB_EPStartXfer(hpcd->Instance, ep);
|
|
8001e92: 68fb ldr r3, [r7, #12]
|
|
8001e94: 681b ldr r3, [r3, #0]
|
|
8001e96: 6979 ldr r1, [r7, #20]
|
|
8001e98: 4618 mov r0, r3
|
|
8001e9a: f003 f895 bl 8004fc8 <USB_EPStartXfer>
|
|
}
|
|
|
|
return HAL_OK;
|
|
8001e9e: 2300 movs r3, #0
|
|
}
|
|
8001ea0: 4618 mov r0, r3
|
|
8001ea2: 3718 adds r7, #24
|
|
8001ea4: 46bd mov sp, r7
|
|
8001ea6: bd80 pop {r7, pc}
|
|
|
|
08001ea8 <HAL_PCD_EP_GetRxCount>:
|
|
* @param hpcd PCD handle
|
|
* @param ep_addr endpoint address
|
|
* @retval Data Size
|
|
*/
|
|
uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
|
|
{
|
|
8001ea8: b480 push {r7}
|
|
8001eaa: b083 sub sp, #12
|
|
8001eac: af00 add r7, sp, #0
|
|
8001eae: 6078 str r0, [r7, #4]
|
|
8001eb0: 460b mov r3, r1
|
|
8001eb2: 70fb strb r3, [r7, #3]
|
|
return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count;
|
|
8001eb4: 78fb ldrb r3, [r7, #3]
|
|
8001eb6: f003 0307 and.w r3, r3, #7
|
|
8001eba: 687a ldr r2, [r7, #4]
|
|
8001ebc: 330a adds r3, #10
|
|
8001ebe: 015b lsls r3, r3, #5
|
|
8001ec0: 4413 add r3, r2
|
|
8001ec2: 3304 adds r3, #4
|
|
8001ec4: 681b ldr r3, [r3, #0]
|
|
}
|
|
8001ec6: 4618 mov r0, r3
|
|
8001ec8: 370c adds r7, #12
|
|
8001eca: 46bd mov sp, r7
|
|
8001ecc: bc80 pop {r7}
|
|
8001ece: 4770 bx lr
|
|
|
|
08001ed0 <HAL_PCD_EP_Transmit>:
|
|
* @param pBuf pointer to the transmission buffer
|
|
* @param len amount of data to be sent
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
|
|
{
|
|
8001ed0: b580 push {r7, lr}
|
|
8001ed2: b086 sub sp, #24
|
|
8001ed4: af00 add r7, sp, #0
|
|
8001ed6: 60f8 str r0, [r7, #12]
|
|
8001ed8: 607a str r2, [r7, #4]
|
|
8001eda: 603b str r3, [r7, #0]
|
|
8001edc: 460b mov r3, r1
|
|
8001ede: 72fb strb r3, [r7, #11]
|
|
PCD_EPTypeDef *ep;
|
|
|
|
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
|
|
8001ee0: 7afb ldrb r3, [r7, #11]
|
|
8001ee2: f003 0307 and.w r3, r3, #7
|
|
8001ee6: 015b lsls r3, r3, #5
|
|
8001ee8: 3328 adds r3, #40 ; 0x28
|
|
8001eea: 68fa ldr r2, [r7, #12]
|
|
8001eec: 4413 add r3, r2
|
|
8001eee: 617b str r3, [r7, #20]
|
|
|
|
/*setup and start the Xfer */
|
|
ep->xfer_buff = pBuf;
|
|
8001ef0: 697b ldr r3, [r7, #20]
|
|
8001ef2: 687a ldr r2, [r7, #4]
|
|
8001ef4: 615a str r2, [r3, #20]
|
|
ep->xfer_len = len;
|
|
8001ef6: 697b ldr r3, [r7, #20]
|
|
8001ef8: 683a ldr r2, [r7, #0]
|
|
8001efa: 619a str r2, [r3, #24]
|
|
ep->xfer_count = 0U;
|
|
8001efc: 697b ldr r3, [r7, #20]
|
|
8001efe: 2200 movs r2, #0
|
|
8001f00: 61da str r2, [r3, #28]
|
|
ep->is_in = 1U;
|
|
8001f02: 697b ldr r3, [r7, #20]
|
|
8001f04: 2201 movs r2, #1
|
|
8001f06: 705a strb r2, [r3, #1]
|
|
ep->num = ep_addr & EP_ADDR_MSK;
|
|
8001f08: 7afb ldrb r3, [r7, #11]
|
|
8001f0a: f003 0307 and.w r3, r3, #7
|
|
8001f0e: b2da uxtb r2, r3
|
|
8001f10: 697b ldr r3, [r7, #20]
|
|
8001f12: 701a strb r2, [r3, #0]
|
|
|
|
if ((ep_addr & EP_ADDR_MSK) == 0U)
|
|
8001f14: 7afb ldrb r3, [r7, #11]
|
|
8001f16: f003 0307 and.w r3, r3, #7
|
|
8001f1a: 2b00 cmp r3, #0
|
|
8001f1c: d106 bne.n 8001f2c <HAL_PCD_EP_Transmit+0x5c>
|
|
{
|
|
(void)USB_EP0StartXfer(hpcd->Instance, ep);
|
|
8001f1e: 68fb ldr r3, [r7, #12]
|
|
8001f20: 681b ldr r3, [r3, #0]
|
|
8001f22: 6979 ldr r1, [r7, #20]
|
|
8001f24: 4618 mov r0, r3
|
|
8001f26: f003 f84f bl 8004fc8 <USB_EPStartXfer>
|
|
8001f2a: e005 b.n 8001f38 <HAL_PCD_EP_Transmit+0x68>
|
|
}
|
|
else
|
|
{
|
|
(void)USB_EPStartXfer(hpcd->Instance, ep);
|
|
8001f2c: 68fb ldr r3, [r7, #12]
|
|
8001f2e: 681b ldr r3, [r3, #0]
|
|
8001f30: 6979 ldr r1, [r7, #20]
|
|
8001f32: 4618 mov r0, r3
|
|
8001f34: f003 f848 bl 8004fc8 <USB_EPStartXfer>
|
|
}
|
|
|
|
return HAL_OK;
|
|
8001f38: 2300 movs r3, #0
|
|
}
|
|
8001f3a: 4618 mov r0, r3
|
|
8001f3c: 3718 adds r7, #24
|
|
8001f3e: 46bd mov sp, r7
|
|
8001f40: bd80 pop {r7, pc}
|
|
|
|
08001f42 <HAL_PCD_EP_SetStall>:
|
|
* @param hpcd PCD handle
|
|
* @param ep_addr endpoint address
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
|
|
{
|
|
8001f42: b580 push {r7, lr}
|
|
8001f44: b084 sub sp, #16
|
|
8001f46: af00 add r7, sp, #0
|
|
8001f48: 6078 str r0, [r7, #4]
|
|
8001f4a: 460b mov r3, r1
|
|
8001f4c: 70fb strb r3, [r7, #3]
|
|
PCD_EPTypeDef *ep;
|
|
|
|
if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints)
|
|
8001f4e: 78fb ldrb r3, [r7, #3]
|
|
8001f50: f003 0207 and.w r2, r3, #7
|
|
8001f54: 687b ldr r3, [r7, #4]
|
|
8001f56: 685b ldr r3, [r3, #4]
|
|
8001f58: 429a cmp r2, r3
|
|
8001f5a: d901 bls.n 8001f60 <HAL_PCD_EP_SetStall+0x1e>
|
|
{
|
|
return HAL_ERROR;
|
|
8001f5c: 2301 movs r3, #1
|
|
8001f5e: e046 b.n 8001fee <HAL_PCD_EP_SetStall+0xac>
|
|
}
|
|
|
|
if ((0x80U & ep_addr) == 0x80U)
|
|
8001f60: f997 3003 ldrsb.w r3, [r7, #3]
|
|
8001f64: 2b00 cmp r3, #0
|
|
8001f66: da0b bge.n 8001f80 <HAL_PCD_EP_SetStall+0x3e>
|
|
{
|
|
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
|
|
8001f68: 78fb ldrb r3, [r7, #3]
|
|
8001f6a: f003 0307 and.w r3, r3, #7
|
|
8001f6e: 015b lsls r3, r3, #5
|
|
8001f70: 3328 adds r3, #40 ; 0x28
|
|
8001f72: 687a ldr r2, [r7, #4]
|
|
8001f74: 4413 add r3, r2
|
|
8001f76: 60fb str r3, [r7, #12]
|
|
ep->is_in = 1U;
|
|
8001f78: 68fb ldr r3, [r7, #12]
|
|
8001f7a: 2201 movs r2, #1
|
|
8001f7c: 705a strb r2, [r3, #1]
|
|
8001f7e: e009 b.n 8001f94 <HAL_PCD_EP_SetStall+0x52>
|
|
}
|
|
else
|
|
{
|
|
ep = &hpcd->OUT_ep[ep_addr];
|
|
8001f80: 78fb ldrb r3, [r7, #3]
|
|
8001f82: 015b lsls r3, r3, #5
|
|
8001f84: f503 7394 add.w r3, r3, #296 ; 0x128
|
|
8001f88: 687a ldr r2, [r7, #4]
|
|
8001f8a: 4413 add r3, r2
|
|
8001f8c: 60fb str r3, [r7, #12]
|
|
ep->is_in = 0U;
|
|
8001f8e: 68fb ldr r3, [r7, #12]
|
|
8001f90: 2200 movs r2, #0
|
|
8001f92: 705a strb r2, [r3, #1]
|
|
}
|
|
|
|
ep->is_stall = 1U;
|
|
8001f94: 68fb ldr r3, [r7, #12]
|
|
8001f96: 2201 movs r2, #1
|
|
8001f98: 709a strb r2, [r3, #2]
|
|
ep->num = ep_addr & EP_ADDR_MSK;
|
|
8001f9a: 78fb ldrb r3, [r7, #3]
|
|
8001f9c: f003 0307 and.w r3, r3, #7
|
|
8001fa0: b2da uxtb r2, r3
|
|
8001fa2: 68fb ldr r3, [r7, #12]
|
|
8001fa4: 701a strb r2, [r3, #0]
|
|
|
|
__HAL_LOCK(hpcd);
|
|
8001fa6: 687b ldr r3, [r7, #4]
|
|
8001fa8: f893 3228 ldrb.w r3, [r3, #552] ; 0x228
|
|
8001fac: 2b01 cmp r3, #1
|
|
8001fae: d101 bne.n 8001fb4 <HAL_PCD_EP_SetStall+0x72>
|
|
8001fb0: 2302 movs r3, #2
|
|
8001fb2: e01c b.n 8001fee <HAL_PCD_EP_SetStall+0xac>
|
|
8001fb4: 687b ldr r3, [r7, #4]
|
|
8001fb6: 2201 movs r2, #1
|
|
8001fb8: f883 2228 strb.w r2, [r3, #552] ; 0x228
|
|
|
|
(void)USB_EPSetStall(hpcd->Instance, ep);
|
|
8001fbc: 687b ldr r3, [r7, #4]
|
|
8001fbe: 681b ldr r3, [r3, #0]
|
|
8001fc0: 68f9 ldr r1, [r7, #12]
|
|
8001fc2: 4618 mov r0, r3
|
|
8001fc4: f003 fab8 bl 8005538 <USB_EPSetStall>
|
|
if ((ep_addr & EP_ADDR_MSK) == 0U)
|
|
8001fc8: 78fb ldrb r3, [r7, #3]
|
|
8001fca: f003 0307 and.w r3, r3, #7
|
|
8001fce: 2b00 cmp r3, #0
|
|
8001fd0: d108 bne.n 8001fe4 <HAL_PCD_EP_SetStall+0xa2>
|
|
{
|
|
(void)USB_EP0_OutStart(hpcd->Instance, (uint8_t *)hpcd->Setup);
|
|
8001fd2: 687b ldr r3, [r7, #4]
|
|
8001fd4: 681a ldr r2, [r3, #0]
|
|
8001fd6: 687b ldr r3, [r7, #4]
|
|
8001fd8: f503 730c add.w r3, r3, #560 ; 0x230
|
|
8001fdc: 4619 mov r1, r3
|
|
8001fde: 4610 mov r0, r2
|
|
8001fe0: f003 fbb6 bl 8005750 <USB_EP0_OutStart>
|
|
}
|
|
__HAL_UNLOCK(hpcd);
|
|
8001fe4: 687b ldr r3, [r7, #4]
|
|
8001fe6: 2200 movs r2, #0
|
|
8001fe8: f883 2228 strb.w r2, [r3, #552] ; 0x228
|
|
|
|
return HAL_OK;
|
|
8001fec: 2300 movs r3, #0
|
|
}
|
|
8001fee: 4618 mov r0, r3
|
|
8001ff0: 3710 adds r7, #16
|
|
8001ff2: 46bd mov sp, r7
|
|
8001ff4: bd80 pop {r7, pc}
|
|
|
|
08001ff6 <HAL_PCD_EP_ClrStall>:
|
|
* @param hpcd PCD handle
|
|
* @param ep_addr endpoint address
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
|
|
{
|
|
8001ff6: b580 push {r7, lr}
|
|
8001ff8: b084 sub sp, #16
|
|
8001ffa: af00 add r7, sp, #0
|
|
8001ffc: 6078 str r0, [r7, #4]
|
|
8001ffe: 460b mov r3, r1
|
|
8002000: 70fb strb r3, [r7, #3]
|
|
PCD_EPTypeDef *ep;
|
|
|
|
if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints)
|
|
8002002: 78fb ldrb r3, [r7, #3]
|
|
8002004: f003 020f and.w r2, r3, #15
|
|
8002008: 687b ldr r3, [r7, #4]
|
|
800200a: 685b ldr r3, [r3, #4]
|
|
800200c: 429a cmp r2, r3
|
|
800200e: d901 bls.n 8002014 <HAL_PCD_EP_ClrStall+0x1e>
|
|
{
|
|
return HAL_ERROR;
|
|
8002010: 2301 movs r3, #1
|
|
8002012: e03a b.n 800208a <HAL_PCD_EP_ClrStall+0x94>
|
|
}
|
|
|
|
if ((0x80U & ep_addr) == 0x80U)
|
|
8002014: f997 3003 ldrsb.w r3, [r7, #3]
|
|
8002018: 2b00 cmp r3, #0
|
|
800201a: da0b bge.n 8002034 <HAL_PCD_EP_ClrStall+0x3e>
|
|
{
|
|
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
|
|
800201c: 78fb ldrb r3, [r7, #3]
|
|
800201e: f003 0307 and.w r3, r3, #7
|
|
8002022: 015b lsls r3, r3, #5
|
|
8002024: 3328 adds r3, #40 ; 0x28
|
|
8002026: 687a ldr r2, [r7, #4]
|
|
8002028: 4413 add r3, r2
|
|
800202a: 60fb str r3, [r7, #12]
|
|
ep->is_in = 1U;
|
|
800202c: 68fb ldr r3, [r7, #12]
|
|
800202e: 2201 movs r2, #1
|
|
8002030: 705a strb r2, [r3, #1]
|
|
8002032: e00b b.n 800204c <HAL_PCD_EP_ClrStall+0x56>
|
|
}
|
|
else
|
|
{
|
|
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
|
|
8002034: 78fb ldrb r3, [r7, #3]
|
|
8002036: f003 0307 and.w r3, r3, #7
|
|
800203a: 015b lsls r3, r3, #5
|
|
800203c: f503 7394 add.w r3, r3, #296 ; 0x128
|
|
8002040: 687a ldr r2, [r7, #4]
|
|
8002042: 4413 add r3, r2
|
|
8002044: 60fb str r3, [r7, #12]
|
|
ep->is_in = 0U;
|
|
8002046: 68fb ldr r3, [r7, #12]
|
|
8002048: 2200 movs r2, #0
|
|
800204a: 705a strb r2, [r3, #1]
|
|
}
|
|
|
|
ep->is_stall = 0U;
|
|
800204c: 68fb ldr r3, [r7, #12]
|
|
800204e: 2200 movs r2, #0
|
|
8002050: 709a strb r2, [r3, #2]
|
|
ep->num = ep_addr & EP_ADDR_MSK;
|
|
8002052: 78fb ldrb r3, [r7, #3]
|
|
8002054: f003 0307 and.w r3, r3, #7
|
|
8002058: b2da uxtb r2, r3
|
|
800205a: 68fb ldr r3, [r7, #12]
|
|
800205c: 701a strb r2, [r3, #0]
|
|
|
|
__HAL_LOCK(hpcd);
|
|
800205e: 687b ldr r3, [r7, #4]
|
|
8002060: f893 3228 ldrb.w r3, [r3, #552] ; 0x228
|
|
8002064: 2b01 cmp r3, #1
|
|
8002066: d101 bne.n 800206c <HAL_PCD_EP_ClrStall+0x76>
|
|
8002068: 2302 movs r3, #2
|
|
800206a: e00e b.n 800208a <HAL_PCD_EP_ClrStall+0x94>
|
|
800206c: 687b ldr r3, [r7, #4]
|
|
800206e: 2201 movs r2, #1
|
|
8002070: f883 2228 strb.w r2, [r3, #552] ; 0x228
|
|
(void)USB_EPClearStall(hpcd->Instance, ep);
|
|
8002074: 687b ldr r3, [r7, #4]
|
|
8002076: 681b ldr r3, [r3, #0]
|
|
8002078: 68f9 ldr r1, [r7, #12]
|
|
800207a: 4618 mov r0, r3
|
|
800207c: f003 fa9e bl 80055bc <USB_EPClearStall>
|
|
__HAL_UNLOCK(hpcd);
|
|
8002080: 687b ldr r3, [r7, #4]
|
|
8002082: 2200 movs r2, #0
|
|
8002084: f883 2228 strb.w r2, [r3, #552] ; 0x228
|
|
|
|
return HAL_OK;
|
|
8002088: 2300 movs r3, #0
|
|
}
|
|
800208a: 4618 mov r0, r3
|
|
800208c: 3710 adds r7, #16
|
|
800208e: 46bd mov sp, r7
|
|
8002090: bd80 pop {r7, pc}
|
|
...
|
|
|
|
08002094 <PCD_EP_ISR_Handler>:
|
|
* @brief This function handles PCD Endpoint interrupt request.
|
|
* @param hpcd PCD handle
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
|
|
{
|
|
8002094: b590 push {r4, r7, lr}
|
|
8002096: b089 sub sp, #36 ; 0x24
|
|
8002098: af00 add r7, sp, #0
|
|
800209a: 6078 str r0, [r7, #4]
|
|
uint16_t wIstr;
|
|
uint16_t wEPVal;
|
|
uint8_t epindex;
|
|
|
|
/* stay in loop while pending interrupts */
|
|
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
|
|
800209c: e282 b.n 80025a4 <PCD_EP_ISR_Handler+0x510>
|
|
{
|
|
wIstr = hpcd->Instance->ISTR;
|
|
800209e: 687b ldr r3, [r7, #4]
|
|
80020a0: 681b ldr r3, [r3, #0]
|
|
80020a2: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
|
|
80020a6: 82fb strh r3, [r7, #22]
|
|
/* extract highest priority endpoint number */
|
|
epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID);
|
|
80020a8: 8afb ldrh r3, [r7, #22]
|
|
80020aa: b2db uxtb r3, r3
|
|
80020ac: f003 030f and.w r3, r3, #15
|
|
80020b0: 757b strb r3, [r7, #21]
|
|
|
|
if (epindex == 0U)
|
|
80020b2: 7d7b ldrb r3, [r7, #21]
|
|
80020b4: 2b00 cmp r3, #0
|
|
80020b6: f040 8142 bne.w 800233e <PCD_EP_ISR_Handler+0x2aa>
|
|
{
|
|
/* Decode and service control endpoint interrupt */
|
|
|
|
/* DIR bit = origin of the interrupt */
|
|
if ((wIstr & USB_ISTR_DIR) == 0U)
|
|
80020ba: 8afb ldrh r3, [r7, #22]
|
|
80020bc: f003 0310 and.w r3, r3, #16
|
|
80020c0: 2b00 cmp r3, #0
|
|
80020c2: d151 bne.n 8002168 <PCD_EP_ISR_Handler+0xd4>
|
|
{
|
|
/* DIR = 0 */
|
|
|
|
/* DIR = 0 => IN int */
|
|
/* DIR = 0 implies that (EP_CTR_TX = 1) always */
|
|
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0);
|
|
80020c4: 687b ldr r3, [r7, #4]
|
|
80020c6: 681b ldr r3, [r3, #0]
|
|
80020c8: 881b ldrh r3, [r3, #0]
|
|
80020ca: b29b uxth r3, r3
|
|
80020cc: f423 43e1 bic.w r3, r3, #28800 ; 0x7080
|
|
80020d0: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
80020d4: b29c uxth r4, r3
|
|
80020d6: 687b ldr r3, [r7, #4]
|
|
80020d8: 681a ldr r2, [r3, #0]
|
|
80020da: ea6f 4344 mvn.w r3, r4, lsl #17
|
|
80020de: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
80020e2: b29b uxth r3, r3
|
|
80020e4: 8013 strh r3, [r2, #0]
|
|
ep = &hpcd->IN_ep[0];
|
|
80020e6: 687b ldr r3, [r7, #4]
|
|
80020e8: 3328 adds r3, #40 ; 0x28
|
|
80020ea: 60fb str r3, [r7, #12]
|
|
|
|
ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
|
|
80020ec: 687b ldr r3, [r7, #4]
|
|
80020ee: 681b ldr r3, [r3, #0]
|
|
80020f0: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
80020f4: b29b uxth r3, r3
|
|
80020f6: 461a mov r2, r3
|
|
80020f8: 68fb ldr r3, [r7, #12]
|
|
80020fa: 781b ldrb r3, [r3, #0]
|
|
80020fc: 00db lsls r3, r3, #3
|
|
80020fe: 4413 add r3, r2
|
|
8002100: 3302 adds r3, #2
|
|
8002102: 005b lsls r3, r3, #1
|
|
8002104: 687a ldr r2, [r7, #4]
|
|
8002106: 6812 ldr r2, [r2, #0]
|
|
8002108: 4413 add r3, r2
|
|
800210a: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
800210e: 881b ldrh r3, [r3, #0]
|
|
8002110: f3c3 0209 ubfx r2, r3, #0, #10
|
|
8002114: 68fb ldr r3, [r7, #12]
|
|
8002116: 61da str r2, [r3, #28]
|
|
ep->xfer_buff += ep->xfer_count;
|
|
8002118: 68fb ldr r3, [r7, #12]
|
|
800211a: 695a ldr r2, [r3, #20]
|
|
800211c: 68fb ldr r3, [r7, #12]
|
|
800211e: 69db ldr r3, [r3, #28]
|
|
8002120: 441a add r2, r3
|
|
8002122: 68fb ldr r3, [r7, #12]
|
|
8002124: 615a str r2, [r3, #20]
|
|
|
|
/* TX COMPLETE */
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->DataInStageCallback(hpcd, 0U);
|
|
#else
|
|
HAL_PCD_DataInStageCallback(hpcd, 0U);
|
|
8002126: 2100 movs r1, #0
|
|
8002128: 6878 ldr r0, [r7, #4]
|
|
800212a: f008 fa19 bl 800a560 <HAL_PCD_DataInStageCallback>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
|
|
if ((hpcd->USB_Address > 0U) && (ep->xfer_len == 0U))
|
|
800212e: 687b ldr r3, [r7, #4]
|
|
8002130: f893 3024 ldrb.w r3, [r3, #36] ; 0x24
|
|
8002134: b2db uxtb r3, r3
|
|
8002136: 2b00 cmp r3, #0
|
|
8002138: f000 8234 beq.w 80025a4 <PCD_EP_ISR_Handler+0x510>
|
|
800213c: 68fb ldr r3, [r7, #12]
|
|
800213e: 699b ldr r3, [r3, #24]
|
|
8002140: 2b00 cmp r3, #0
|
|
8002142: f040 822f bne.w 80025a4 <PCD_EP_ISR_Handler+0x510>
|
|
{
|
|
hpcd->Instance->DADDR = ((uint16_t)hpcd->USB_Address | USB_DADDR_EF);
|
|
8002146: 687b ldr r3, [r7, #4]
|
|
8002148: f893 3024 ldrb.w r3, [r3, #36] ; 0x24
|
|
800214c: b2db uxtb r3, r3
|
|
800214e: f063 037f orn r3, r3, #127 ; 0x7f
|
|
8002152: b2da uxtb r2, r3
|
|
8002154: 687b ldr r3, [r7, #4]
|
|
8002156: 681b ldr r3, [r3, #0]
|
|
8002158: b292 uxth r2, r2
|
|
800215a: f8a3 204c strh.w r2, [r3, #76] ; 0x4c
|
|
hpcd->USB_Address = 0U;
|
|
800215e: 687b ldr r3, [r7, #4]
|
|
8002160: 2200 movs r2, #0
|
|
8002162: f883 2024 strb.w r2, [r3, #36] ; 0x24
|
|
8002166: e21d b.n 80025a4 <PCD_EP_ISR_Handler+0x510>
|
|
{
|
|
/* DIR = 1 */
|
|
|
|
/* DIR = 1 & CTR_RX => SETUP or OUT int */
|
|
/* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */
|
|
ep = &hpcd->OUT_ep[0];
|
|
8002168: 687b ldr r3, [r7, #4]
|
|
800216a: f503 7394 add.w r3, r3, #296 ; 0x128
|
|
800216e: 60fb str r3, [r7, #12]
|
|
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
|
|
8002170: 687b ldr r3, [r7, #4]
|
|
8002172: 681b ldr r3, [r3, #0]
|
|
8002174: 881b ldrh r3, [r3, #0]
|
|
8002176: 827b strh r3, [r7, #18]
|
|
|
|
if ((wEPVal & USB_EP_SETUP) != 0U)
|
|
8002178: 8a7b ldrh r3, [r7, #18]
|
|
800217a: f403 6300 and.w r3, r3, #2048 ; 0x800
|
|
800217e: 2b00 cmp r3, #0
|
|
8002180: d033 beq.n 80021ea <PCD_EP_ISR_Handler+0x156>
|
|
{
|
|
/* Get SETUP Packet*/
|
|
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
|
|
8002182: 687b ldr r3, [r7, #4]
|
|
8002184: 681b ldr r3, [r3, #0]
|
|
8002186: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
800218a: b29b uxth r3, r3
|
|
800218c: 461a mov r2, r3
|
|
800218e: 68fb ldr r3, [r7, #12]
|
|
8002190: 781b ldrb r3, [r3, #0]
|
|
8002192: 00db lsls r3, r3, #3
|
|
8002194: 4413 add r3, r2
|
|
8002196: 3306 adds r3, #6
|
|
8002198: 005b lsls r3, r3, #1
|
|
800219a: 687a ldr r2, [r7, #4]
|
|
800219c: 6812 ldr r2, [r2, #0]
|
|
800219e: 4413 add r3, r2
|
|
80021a0: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
80021a4: 881b ldrh r3, [r3, #0]
|
|
80021a6: f3c3 0209 ubfx r2, r3, #0, #10
|
|
80021aa: 68fb ldr r3, [r7, #12]
|
|
80021ac: 61da str r2, [r3, #28]
|
|
|
|
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
|
|
80021ae: 687b ldr r3, [r7, #4]
|
|
80021b0: 6818 ldr r0, [r3, #0]
|
|
80021b2: 687b ldr r3, [r7, #4]
|
|
80021b4: f503 710c add.w r1, r3, #560 ; 0x230
|
|
80021b8: 68fb ldr r3, [r7, #12]
|
|
80021ba: 88da ldrh r2, [r3, #6]
|
|
ep->pmaadress, (uint16_t)ep->xfer_count);
|
|
80021bc: 68fb ldr r3, [r7, #12]
|
|
80021be: 69db ldr r3, [r3, #28]
|
|
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
|
|
80021c0: b29b uxth r3, r3
|
|
80021c2: f003 fb14 bl 80057ee <USB_ReadPMA>
|
|
|
|
/* SETUP bit kept frozen while CTR_RX = 1*/
|
|
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
|
|
80021c6: 687b ldr r3, [r7, #4]
|
|
80021c8: 681b ldr r3, [r3, #0]
|
|
80021ca: 881b ldrh r3, [r3, #0]
|
|
80021cc: b29a uxth r2, r3
|
|
80021ce: f640 738f movw r3, #3983 ; 0xf8f
|
|
80021d2: 4013 ands r3, r2
|
|
80021d4: b29c uxth r4, r3
|
|
80021d6: 687b ldr r3, [r7, #4]
|
|
80021d8: 681b ldr r3, [r3, #0]
|
|
80021da: f044 0280 orr.w r2, r4, #128 ; 0x80
|
|
80021de: b292 uxth r2, r2
|
|
80021e0: 801a strh r2, [r3, #0]
|
|
|
|
/* Process SETUP Packet*/
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->SetupStageCallback(hpcd);
|
|
#else
|
|
HAL_PCD_SetupStageCallback(hpcd);
|
|
80021e2: 6878 ldr r0, [r7, #4]
|
|
80021e4: f008 f992 bl 800a50c <HAL_PCD_SetupStageCallback>
|
|
80021e8: e1dc b.n 80025a4 <PCD_EP_ISR_Handler+0x510>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
}
|
|
|
|
else if ((wEPVal & USB_EP_CTR_RX) != 0U)
|
|
80021ea: f9b7 3012 ldrsh.w r3, [r7, #18]
|
|
80021ee: 2b00 cmp r3, #0
|
|
80021f0: f280 81d8 bge.w 80025a4 <PCD_EP_ISR_Handler+0x510>
|
|
{
|
|
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
|
|
80021f4: 687b ldr r3, [r7, #4]
|
|
80021f6: 681b ldr r3, [r3, #0]
|
|
80021f8: 881b ldrh r3, [r3, #0]
|
|
80021fa: b29a uxth r2, r3
|
|
80021fc: f640 738f movw r3, #3983 ; 0xf8f
|
|
8002200: 4013 ands r3, r2
|
|
8002202: b29c uxth r4, r3
|
|
8002204: 687b ldr r3, [r7, #4]
|
|
8002206: 681b ldr r3, [r3, #0]
|
|
8002208: f044 0280 orr.w r2, r4, #128 ; 0x80
|
|
800220c: b292 uxth r2, r2
|
|
800220e: 801a strh r2, [r3, #0]
|
|
|
|
/* Get Control Data OUT Packet*/
|
|
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
|
|
8002210: 687b ldr r3, [r7, #4]
|
|
8002212: 681b ldr r3, [r3, #0]
|
|
8002214: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8002218: b29b uxth r3, r3
|
|
800221a: 461a mov r2, r3
|
|
800221c: 68fb ldr r3, [r7, #12]
|
|
800221e: 781b ldrb r3, [r3, #0]
|
|
8002220: 00db lsls r3, r3, #3
|
|
8002222: 4413 add r3, r2
|
|
8002224: 3306 adds r3, #6
|
|
8002226: 005b lsls r3, r3, #1
|
|
8002228: 687a ldr r2, [r7, #4]
|
|
800222a: 6812 ldr r2, [r2, #0]
|
|
800222c: 4413 add r3, r2
|
|
800222e: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
8002232: 881b ldrh r3, [r3, #0]
|
|
8002234: f3c3 0209 ubfx r2, r3, #0, #10
|
|
8002238: 68fb ldr r3, [r7, #12]
|
|
800223a: 61da str r2, [r3, #28]
|
|
|
|
if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U))
|
|
800223c: 68fb ldr r3, [r7, #12]
|
|
800223e: 69db ldr r3, [r3, #28]
|
|
8002240: 2b00 cmp r3, #0
|
|
8002242: d019 beq.n 8002278 <PCD_EP_ISR_Handler+0x1e4>
|
|
8002244: 68fb ldr r3, [r7, #12]
|
|
8002246: 695b ldr r3, [r3, #20]
|
|
8002248: 2b00 cmp r3, #0
|
|
800224a: d015 beq.n 8002278 <PCD_EP_ISR_Handler+0x1e4>
|
|
{
|
|
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
|
|
800224c: 687b ldr r3, [r7, #4]
|
|
800224e: 6818 ldr r0, [r3, #0]
|
|
8002250: 68fb ldr r3, [r7, #12]
|
|
8002252: 6959 ldr r1, [r3, #20]
|
|
8002254: 68fb ldr r3, [r7, #12]
|
|
8002256: 88da ldrh r2, [r3, #6]
|
|
ep->pmaadress, (uint16_t)ep->xfer_count);
|
|
8002258: 68fb ldr r3, [r7, #12]
|
|
800225a: 69db ldr r3, [r3, #28]
|
|
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
|
|
800225c: b29b uxth r3, r3
|
|
800225e: f003 fac6 bl 80057ee <USB_ReadPMA>
|
|
|
|
ep->xfer_buff += ep->xfer_count;
|
|
8002262: 68fb ldr r3, [r7, #12]
|
|
8002264: 695a ldr r2, [r3, #20]
|
|
8002266: 68fb ldr r3, [r7, #12]
|
|
8002268: 69db ldr r3, [r3, #28]
|
|
800226a: 441a add r2, r3
|
|
800226c: 68fb ldr r3, [r7, #12]
|
|
800226e: 615a str r2, [r3, #20]
|
|
|
|
/* Process Control Data OUT Packet*/
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->DataOutStageCallback(hpcd, 0U);
|
|
#else
|
|
HAL_PCD_DataOutStageCallback(hpcd, 0U);
|
|
8002270: 2100 movs r1, #0
|
|
8002272: 6878 ldr r0, [r7, #4]
|
|
8002274: f008 f95c bl 800a530 <HAL_PCD_DataOutStageCallback>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
}
|
|
|
|
PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket);
|
|
8002278: 687b ldr r3, [r7, #4]
|
|
800227a: 681b ldr r3, [r3, #0]
|
|
800227c: 461c mov r4, r3
|
|
800227e: 687b ldr r3, [r7, #4]
|
|
8002280: 681b ldr r3, [r3, #0]
|
|
8002282: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8002286: b29b uxth r3, r3
|
|
8002288: 441c add r4, r3
|
|
800228a: f204 430c addw r3, r4, #1036 ; 0x40c
|
|
800228e: 461c mov r4, r3
|
|
8002290: 68fb ldr r3, [r7, #12]
|
|
8002292: 691b ldr r3, [r3, #16]
|
|
8002294: 2b00 cmp r3, #0
|
|
8002296: d10e bne.n 80022b6 <PCD_EP_ISR_Handler+0x222>
|
|
8002298: 8823 ldrh r3, [r4, #0]
|
|
800229a: b29b uxth r3, r3
|
|
800229c: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
|
|
80022a0: b29b uxth r3, r3
|
|
80022a2: 8023 strh r3, [r4, #0]
|
|
80022a4: 8823 ldrh r3, [r4, #0]
|
|
80022a6: b29b uxth r3, r3
|
|
80022a8: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
80022ac: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
80022b0: b29b uxth r3, r3
|
|
80022b2: 8023 strh r3, [r4, #0]
|
|
80022b4: e02d b.n 8002312 <PCD_EP_ISR_Handler+0x27e>
|
|
80022b6: 68fb ldr r3, [r7, #12]
|
|
80022b8: 691b ldr r3, [r3, #16]
|
|
80022ba: 2b3e cmp r3, #62 ; 0x3e
|
|
80022bc: d812 bhi.n 80022e4 <PCD_EP_ISR_Handler+0x250>
|
|
80022be: 68fb ldr r3, [r7, #12]
|
|
80022c0: 691b ldr r3, [r3, #16]
|
|
80022c2: 085b lsrs r3, r3, #1
|
|
80022c4: 61bb str r3, [r7, #24]
|
|
80022c6: 68fb ldr r3, [r7, #12]
|
|
80022c8: 691b ldr r3, [r3, #16]
|
|
80022ca: f003 0301 and.w r3, r3, #1
|
|
80022ce: 2b00 cmp r3, #0
|
|
80022d0: d002 beq.n 80022d8 <PCD_EP_ISR_Handler+0x244>
|
|
80022d2: 69bb ldr r3, [r7, #24]
|
|
80022d4: 3301 adds r3, #1
|
|
80022d6: 61bb str r3, [r7, #24]
|
|
80022d8: 69bb ldr r3, [r7, #24]
|
|
80022da: b29b uxth r3, r3
|
|
80022dc: 029b lsls r3, r3, #10
|
|
80022de: b29b uxth r3, r3
|
|
80022e0: 8023 strh r3, [r4, #0]
|
|
80022e2: e016 b.n 8002312 <PCD_EP_ISR_Handler+0x27e>
|
|
80022e4: 68fb ldr r3, [r7, #12]
|
|
80022e6: 691b ldr r3, [r3, #16]
|
|
80022e8: 095b lsrs r3, r3, #5
|
|
80022ea: 61bb str r3, [r7, #24]
|
|
80022ec: 68fb ldr r3, [r7, #12]
|
|
80022ee: 691b ldr r3, [r3, #16]
|
|
80022f0: f003 031f and.w r3, r3, #31
|
|
80022f4: 2b00 cmp r3, #0
|
|
80022f6: d102 bne.n 80022fe <PCD_EP_ISR_Handler+0x26a>
|
|
80022f8: 69bb ldr r3, [r7, #24]
|
|
80022fa: 3b01 subs r3, #1
|
|
80022fc: 61bb str r3, [r7, #24]
|
|
80022fe: 69bb ldr r3, [r7, #24]
|
|
8002300: b29b uxth r3, r3
|
|
8002302: 029b lsls r3, r3, #10
|
|
8002304: b29b uxth r3, r3
|
|
8002306: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
800230a: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
800230e: b29b uxth r3, r3
|
|
8002310: 8023 strh r3, [r4, #0]
|
|
PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID);
|
|
8002312: 687b ldr r3, [r7, #4]
|
|
8002314: 681b ldr r3, [r3, #0]
|
|
8002316: 881b ldrh r3, [r3, #0]
|
|
8002318: b29b uxth r3, r3
|
|
800231a: f423 4380 bic.w r3, r3, #16384 ; 0x4000
|
|
800231e: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8002322: b29c uxth r4, r3
|
|
8002324: f484 5380 eor.w r3, r4, #4096 ; 0x1000
|
|
8002328: b29c uxth r4, r3
|
|
800232a: f484 5300 eor.w r3, r4, #8192 ; 0x2000
|
|
800232e: b29c uxth r4, r3
|
|
8002330: 687b ldr r3, [r7, #4]
|
|
8002332: 681a ldr r2, [r3, #0]
|
|
8002334: 4ba2 ldr r3, [pc, #648] ; (80025c0 <PCD_EP_ISR_Handler+0x52c>)
|
|
8002336: 4323 orrs r3, r4
|
|
8002338: b29b uxth r3, r3
|
|
800233a: 8013 strh r3, [r2, #0]
|
|
800233c: e132 b.n 80025a4 <PCD_EP_ISR_Handler+0x510>
|
|
else
|
|
{
|
|
/* Decode and service non control endpoints interrupt */
|
|
|
|
/* process related endpoint register */
|
|
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex);
|
|
800233e: 687b ldr r3, [r7, #4]
|
|
8002340: 681b ldr r3, [r3, #0]
|
|
8002342: 461a mov r2, r3
|
|
8002344: 7d7b ldrb r3, [r7, #21]
|
|
8002346: 009b lsls r3, r3, #2
|
|
8002348: 4413 add r3, r2
|
|
800234a: 881b ldrh r3, [r3, #0]
|
|
800234c: 827b strh r3, [r7, #18]
|
|
if ((wEPVal & USB_EP_CTR_RX) != 0U)
|
|
800234e: f9b7 3012 ldrsh.w r3, [r7, #18]
|
|
8002352: 2b00 cmp r3, #0
|
|
8002354: f280 80d1 bge.w 80024fa <PCD_EP_ISR_Handler+0x466>
|
|
{
|
|
/* clear int flag */
|
|
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex);
|
|
8002358: 687b ldr r3, [r7, #4]
|
|
800235a: 681b ldr r3, [r3, #0]
|
|
800235c: 461a mov r2, r3
|
|
800235e: 7d7b ldrb r3, [r7, #21]
|
|
8002360: 009b lsls r3, r3, #2
|
|
8002362: 4413 add r3, r2
|
|
8002364: 881b ldrh r3, [r3, #0]
|
|
8002366: b29a uxth r2, r3
|
|
8002368: f640 738f movw r3, #3983 ; 0xf8f
|
|
800236c: 4013 ands r3, r2
|
|
800236e: b29c uxth r4, r3
|
|
8002370: 687b ldr r3, [r7, #4]
|
|
8002372: 681b ldr r3, [r3, #0]
|
|
8002374: 461a mov r2, r3
|
|
8002376: 7d7b ldrb r3, [r7, #21]
|
|
8002378: 009b lsls r3, r3, #2
|
|
800237a: 4413 add r3, r2
|
|
800237c: f044 0280 orr.w r2, r4, #128 ; 0x80
|
|
8002380: b292 uxth r2, r2
|
|
8002382: 801a strh r2, [r3, #0]
|
|
ep = &hpcd->OUT_ep[epindex];
|
|
8002384: 7d7b ldrb r3, [r7, #21]
|
|
8002386: 015b lsls r3, r3, #5
|
|
8002388: f503 7394 add.w r3, r3, #296 ; 0x128
|
|
800238c: 687a ldr r2, [r7, #4]
|
|
800238e: 4413 add r3, r2
|
|
8002390: 60fb str r3, [r7, #12]
|
|
|
|
/* OUT double Buffering*/
|
|
if (ep->doublebuffer == 0U)
|
|
8002392: 68fb ldr r3, [r7, #12]
|
|
8002394: 7b1b ldrb r3, [r3, #12]
|
|
8002396: 2b00 cmp r3, #0
|
|
8002398: d121 bne.n 80023de <PCD_EP_ISR_Handler+0x34a>
|
|
{
|
|
count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
|
|
800239a: 687b ldr r3, [r7, #4]
|
|
800239c: 681b ldr r3, [r3, #0]
|
|
800239e: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
80023a2: b29b uxth r3, r3
|
|
80023a4: 461a mov r2, r3
|
|
80023a6: 68fb ldr r3, [r7, #12]
|
|
80023a8: 781b ldrb r3, [r3, #0]
|
|
80023aa: 00db lsls r3, r3, #3
|
|
80023ac: 4413 add r3, r2
|
|
80023ae: 3306 adds r3, #6
|
|
80023b0: 005b lsls r3, r3, #1
|
|
80023b2: 687a ldr r2, [r7, #4]
|
|
80023b4: 6812 ldr r2, [r2, #0]
|
|
80023b6: 4413 add r3, r2
|
|
80023b8: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
80023bc: 881b ldrh r3, [r3, #0]
|
|
80023be: f3c3 0309 ubfx r3, r3, #0, #10
|
|
80023c2: 83fb strh r3, [r7, #30]
|
|
if (count != 0U)
|
|
80023c4: 8bfb ldrh r3, [r7, #30]
|
|
80023c6: 2b00 cmp r3, #0
|
|
80023c8: d072 beq.n 80024b0 <PCD_EP_ISR_Handler+0x41c>
|
|
{
|
|
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count);
|
|
80023ca: 687b ldr r3, [r7, #4]
|
|
80023cc: 6818 ldr r0, [r3, #0]
|
|
80023ce: 68fb ldr r3, [r7, #12]
|
|
80023d0: 6959 ldr r1, [r3, #20]
|
|
80023d2: 68fb ldr r3, [r7, #12]
|
|
80023d4: 88da ldrh r2, [r3, #6]
|
|
80023d6: 8bfb ldrh r3, [r7, #30]
|
|
80023d8: f003 fa09 bl 80057ee <USB_ReadPMA>
|
|
80023dc: e068 b.n 80024b0 <PCD_EP_ISR_Handler+0x41c>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U)
|
|
80023de: 687b ldr r3, [r7, #4]
|
|
80023e0: 681b ldr r3, [r3, #0]
|
|
80023e2: 461a mov r2, r3
|
|
80023e4: 68fb ldr r3, [r7, #12]
|
|
80023e6: 781b ldrb r3, [r3, #0]
|
|
80023e8: 009b lsls r3, r3, #2
|
|
80023ea: 4413 add r3, r2
|
|
80023ec: 881b ldrh r3, [r3, #0]
|
|
80023ee: b29b uxth r3, r3
|
|
80023f0: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
80023f4: 2b00 cmp r3, #0
|
|
80023f6: d021 beq.n 800243c <PCD_EP_ISR_Handler+0x3a8>
|
|
{
|
|
/*read from endpoint BUF0Addr buffer*/
|
|
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
|
|
80023f8: 687b ldr r3, [r7, #4]
|
|
80023fa: 681b ldr r3, [r3, #0]
|
|
80023fc: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8002400: b29b uxth r3, r3
|
|
8002402: 461a mov r2, r3
|
|
8002404: 68fb ldr r3, [r7, #12]
|
|
8002406: 781b ldrb r3, [r3, #0]
|
|
8002408: 00db lsls r3, r3, #3
|
|
800240a: 4413 add r3, r2
|
|
800240c: 3302 adds r3, #2
|
|
800240e: 005b lsls r3, r3, #1
|
|
8002410: 687a ldr r2, [r7, #4]
|
|
8002412: 6812 ldr r2, [r2, #0]
|
|
8002414: 4413 add r3, r2
|
|
8002416: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
800241a: 881b ldrh r3, [r3, #0]
|
|
800241c: f3c3 0309 ubfx r3, r3, #0, #10
|
|
8002420: 83fb strh r3, [r7, #30]
|
|
if (count != 0U)
|
|
8002422: 8bfb ldrh r3, [r7, #30]
|
|
8002424: 2b00 cmp r3, #0
|
|
8002426: d02a beq.n 800247e <PCD_EP_ISR_Handler+0x3ea>
|
|
{
|
|
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
|
|
8002428: 687b ldr r3, [r7, #4]
|
|
800242a: 6818 ldr r0, [r3, #0]
|
|
800242c: 68fb ldr r3, [r7, #12]
|
|
800242e: 6959 ldr r1, [r3, #20]
|
|
8002430: 68fb ldr r3, [r7, #12]
|
|
8002432: 891a ldrh r2, [r3, #8]
|
|
8002434: 8bfb ldrh r3, [r7, #30]
|
|
8002436: f003 f9da bl 80057ee <USB_ReadPMA>
|
|
800243a: e020 b.n 800247e <PCD_EP_ISR_Handler+0x3ea>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/*read from endpoint BUF1Addr buffer*/
|
|
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
|
|
800243c: 687b ldr r3, [r7, #4]
|
|
800243e: 681b ldr r3, [r3, #0]
|
|
8002440: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8002444: b29b uxth r3, r3
|
|
8002446: 461a mov r2, r3
|
|
8002448: 68fb ldr r3, [r7, #12]
|
|
800244a: 781b ldrb r3, [r3, #0]
|
|
800244c: 00db lsls r3, r3, #3
|
|
800244e: 4413 add r3, r2
|
|
8002450: 3306 adds r3, #6
|
|
8002452: 005b lsls r3, r3, #1
|
|
8002454: 687a ldr r2, [r7, #4]
|
|
8002456: 6812 ldr r2, [r2, #0]
|
|
8002458: 4413 add r3, r2
|
|
800245a: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
800245e: 881b ldrh r3, [r3, #0]
|
|
8002460: f3c3 0309 ubfx r3, r3, #0, #10
|
|
8002464: 83fb strh r3, [r7, #30]
|
|
if (count != 0U)
|
|
8002466: 8bfb ldrh r3, [r7, #30]
|
|
8002468: 2b00 cmp r3, #0
|
|
800246a: d008 beq.n 800247e <PCD_EP_ISR_Handler+0x3ea>
|
|
{
|
|
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
|
|
800246c: 687b ldr r3, [r7, #4]
|
|
800246e: 6818 ldr r0, [r3, #0]
|
|
8002470: 68fb ldr r3, [r7, #12]
|
|
8002472: 6959 ldr r1, [r3, #20]
|
|
8002474: 68fb ldr r3, [r7, #12]
|
|
8002476: 895a ldrh r2, [r3, #10]
|
|
8002478: 8bfb ldrh r3, [r7, #30]
|
|
800247a: f003 f9b8 bl 80057ee <USB_ReadPMA>
|
|
}
|
|
}
|
|
/* free EP OUT Buffer */
|
|
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U);
|
|
800247e: 687b ldr r3, [r7, #4]
|
|
8002480: 681b ldr r3, [r3, #0]
|
|
8002482: 461a mov r2, r3
|
|
8002484: 68fb ldr r3, [r7, #12]
|
|
8002486: 781b ldrb r3, [r3, #0]
|
|
8002488: 009b lsls r3, r3, #2
|
|
800248a: 4413 add r3, r2
|
|
800248c: 881b ldrh r3, [r3, #0]
|
|
800248e: b29b uxth r3, r3
|
|
8002490: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8002494: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8002498: b29c uxth r4, r3
|
|
800249a: 687b ldr r3, [r7, #4]
|
|
800249c: 681b ldr r3, [r3, #0]
|
|
800249e: 461a mov r2, r3
|
|
80024a0: 68fb ldr r3, [r7, #12]
|
|
80024a2: 781b ldrb r3, [r3, #0]
|
|
80024a4: 009b lsls r3, r3, #2
|
|
80024a6: 441a add r2, r3
|
|
80024a8: 4b46 ldr r3, [pc, #280] ; (80025c4 <PCD_EP_ISR_Handler+0x530>)
|
|
80024aa: 4323 orrs r3, r4
|
|
80024ac: b29b uxth r3, r3
|
|
80024ae: 8013 strh r3, [r2, #0]
|
|
}
|
|
/*multi-packet on the NON control OUT endpoint*/
|
|
ep->xfer_count += count;
|
|
80024b0: 68fb ldr r3, [r7, #12]
|
|
80024b2: 69da ldr r2, [r3, #28]
|
|
80024b4: 8bfb ldrh r3, [r7, #30]
|
|
80024b6: 441a add r2, r3
|
|
80024b8: 68fb ldr r3, [r7, #12]
|
|
80024ba: 61da str r2, [r3, #28]
|
|
ep->xfer_buff += count;
|
|
80024bc: 68fb ldr r3, [r7, #12]
|
|
80024be: 695a ldr r2, [r3, #20]
|
|
80024c0: 8bfb ldrh r3, [r7, #30]
|
|
80024c2: 441a add r2, r3
|
|
80024c4: 68fb ldr r3, [r7, #12]
|
|
80024c6: 615a str r2, [r3, #20]
|
|
|
|
if ((ep->xfer_len == 0U) || (count < ep->maxpacket))
|
|
80024c8: 68fb ldr r3, [r7, #12]
|
|
80024ca: 699b ldr r3, [r3, #24]
|
|
80024cc: 2b00 cmp r3, #0
|
|
80024ce: d004 beq.n 80024da <PCD_EP_ISR_Handler+0x446>
|
|
80024d0: 8bfa ldrh r2, [r7, #30]
|
|
80024d2: 68fb ldr r3, [r7, #12]
|
|
80024d4: 691b ldr r3, [r3, #16]
|
|
80024d6: 429a cmp r2, r3
|
|
80024d8: d206 bcs.n 80024e8 <PCD_EP_ISR_Handler+0x454>
|
|
{
|
|
/* RX COMPLETE */
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->DataOutStageCallback(hpcd, ep->num);
|
|
#else
|
|
HAL_PCD_DataOutStageCallback(hpcd, ep->num);
|
|
80024da: 68fb ldr r3, [r7, #12]
|
|
80024dc: 781b ldrb r3, [r3, #0]
|
|
80024de: 4619 mov r1, r3
|
|
80024e0: 6878 ldr r0, [r7, #4]
|
|
80024e2: f008 f825 bl 800a530 <HAL_PCD_DataOutStageCallback>
|
|
80024e6: e008 b.n 80024fa <PCD_EP_ISR_Handler+0x466>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
}
|
|
else
|
|
{
|
|
(void)HAL_PCD_EP_Receive(hpcd, ep->num, ep->xfer_buff, ep->xfer_len);
|
|
80024e8: 68fb ldr r3, [r7, #12]
|
|
80024ea: 7819 ldrb r1, [r3, #0]
|
|
80024ec: 68fb ldr r3, [r7, #12]
|
|
80024ee: 695a ldr r2, [r3, #20]
|
|
80024f0: 68fb ldr r3, [r7, #12]
|
|
80024f2: 699b ldr r3, [r3, #24]
|
|
80024f4: 6878 ldr r0, [r7, #4]
|
|
80024f6: f7ff fc9d bl 8001e34 <HAL_PCD_EP_Receive>
|
|
}
|
|
|
|
} /* if((wEPVal & EP_CTR_RX) */
|
|
|
|
if ((wEPVal & USB_EP_CTR_TX) != 0U)
|
|
80024fa: 8a7b ldrh r3, [r7, #18]
|
|
80024fc: f003 0380 and.w r3, r3, #128 ; 0x80
|
|
8002500: 2b00 cmp r3, #0
|
|
8002502: d04f beq.n 80025a4 <PCD_EP_ISR_Handler+0x510>
|
|
{
|
|
ep = &hpcd->IN_ep[epindex];
|
|
8002504: 7d7b ldrb r3, [r7, #21]
|
|
8002506: 015b lsls r3, r3, #5
|
|
8002508: 3328 adds r3, #40 ; 0x28
|
|
800250a: 687a ldr r2, [r7, #4]
|
|
800250c: 4413 add r3, r2
|
|
800250e: 60fb str r3, [r7, #12]
|
|
|
|
/* clear int flag */
|
|
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex);
|
|
8002510: 687b ldr r3, [r7, #4]
|
|
8002512: 681b ldr r3, [r3, #0]
|
|
8002514: 461a mov r2, r3
|
|
8002516: 7d7b ldrb r3, [r7, #21]
|
|
8002518: 009b lsls r3, r3, #2
|
|
800251a: 4413 add r3, r2
|
|
800251c: 881b ldrh r3, [r3, #0]
|
|
800251e: b29b uxth r3, r3
|
|
8002520: f423 43e1 bic.w r3, r3, #28800 ; 0x7080
|
|
8002524: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8002528: b29c uxth r4, r3
|
|
800252a: 687b ldr r3, [r7, #4]
|
|
800252c: 681b ldr r3, [r3, #0]
|
|
800252e: 461a mov r2, r3
|
|
8002530: 7d7b ldrb r3, [r7, #21]
|
|
8002532: 009b lsls r3, r3, #2
|
|
8002534: 441a add r2, r3
|
|
8002536: ea6f 4344 mvn.w r3, r4, lsl #17
|
|
800253a: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
800253e: b29b uxth r3, r3
|
|
8002540: 8013 strh r3, [r2, #0]
|
|
|
|
/*multi-packet on the NON control IN endpoint*/
|
|
ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
|
|
8002542: 687b ldr r3, [r7, #4]
|
|
8002544: 681b ldr r3, [r3, #0]
|
|
8002546: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
800254a: b29b uxth r3, r3
|
|
800254c: 461a mov r2, r3
|
|
800254e: 68fb ldr r3, [r7, #12]
|
|
8002550: 781b ldrb r3, [r3, #0]
|
|
8002552: 00db lsls r3, r3, #3
|
|
8002554: 4413 add r3, r2
|
|
8002556: 3302 adds r3, #2
|
|
8002558: 005b lsls r3, r3, #1
|
|
800255a: 687a ldr r2, [r7, #4]
|
|
800255c: 6812 ldr r2, [r2, #0]
|
|
800255e: 4413 add r3, r2
|
|
8002560: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
8002564: 881b ldrh r3, [r3, #0]
|
|
8002566: f3c3 0209 ubfx r2, r3, #0, #10
|
|
800256a: 68fb ldr r3, [r7, #12]
|
|
800256c: 61da str r2, [r3, #28]
|
|
ep->xfer_buff += ep->xfer_count;
|
|
800256e: 68fb ldr r3, [r7, #12]
|
|
8002570: 695a ldr r2, [r3, #20]
|
|
8002572: 68fb ldr r3, [r7, #12]
|
|
8002574: 69db ldr r3, [r3, #28]
|
|
8002576: 441a add r2, r3
|
|
8002578: 68fb ldr r3, [r7, #12]
|
|
800257a: 615a str r2, [r3, #20]
|
|
|
|
/* Zero Length Packet? */
|
|
if (ep->xfer_len == 0U)
|
|
800257c: 68fb ldr r3, [r7, #12]
|
|
800257e: 699b ldr r3, [r3, #24]
|
|
8002580: 2b00 cmp r3, #0
|
|
8002582: d106 bne.n 8002592 <PCD_EP_ISR_Handler+0x4fe>
|
|
{
|
|
/* TX COMPLETE */
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->DataInStageCallback(hpcd, ep->num);
|
|
#else
|
|
HAL_PCD_DataInStageCallback(hpcd, ep->num);
|
|
8002584: 68fb ldr r3, [r7, #12]
|
|
8002586: 781b ldrb r3, [r3, #0]
|
|
8002588: 4619 mov r1, r3
|
|
800258a: 6878 ldr r0, [r7, #4]
|
|
800258c: f007 ffe8 bl 800a560 <HAL_PCD_DataInStageCallback>
|
|
8002590: e008 b.n 80025a4 <PCD_EP_ISR_Handler+0x510>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
}
|
|
else
|
|
{
|
|
(void)HAL_PCD_EP_Transmit(hpcd, ep->num, ep->xfer_buff, ep->xfer_len);
|
|
8002592: 68fb ldr r3, [r7, #12]
|
|
8002594: 7819 ldrb r1, [r3, #0]
|
|
8002596: 68fb ldr r3, [r7, #12]
|
|
8002598: 695a ldr r2, [r3, #20]
|
|
800259a: 68fb ldr r3, [r7, #12]
|
|
800259c: 699b ldr r3, [r3, #24]
|
|
800259e: 6878 ldr r0, [r7, #4]
|
|
80025a0: f7ff fc96 bl 8001ed0 <HAL_PCD_EP_Transmit>
|
|
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
|
|
80025a4: 687b ldr r3, [r7, #4]
|
|
80025a6: 681b ldr r3, [r3, #0]
|
|
80025a8: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
|
|
80025ac: b29b uxth r3, r3
|
|
80025ae: b21b sxth r3, r3
|
|
80025b0: 2b00 cmp r3, #0
|
|
80025b2: f6ff ad74 blt.w 800209e <PCD_EP_ISR_Handler+0xa>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
return HAL_OK;
|
|
80025b6: 2300 movs r3, #0
|
|
}
|
|
80025b8: 4618 mov r0, r3
|
|
80025ba: 3724 adds r7, #36 ; 0x24
|
|
80025bc: 46bd mov sp, r7
|
|
80025be: bd90 pop {r4, r7, pc}
|
|
80025c0: ffff8080 .word 0xffff8080
|
|
80025c4: ffff80c0 .word 0xffff80c0
|
|
|
|
080025c8 <HAL_PCDEx_PMAConfig>:
|
|
|
|
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd,
|
|
uint16_t ep_addr,
|
|
uint16_t ep_kind,
|
|
uint32_t pmaadress)
|
|
{
|
|
80025c8: b480 push {r7}
|
|
80025ca: b087 sub sp, #28
|
|
80025cc: af00 add r7, sp, #0
|
|
80025ce: 60f8 str r0, [r7, #12]
|
|
80025d0: 607b str r3, [r7, #4]
|
|
80025d2: 460b mov r3, r1
|
|
80025d4: 817b strh r3, [r7, #10]
|
|
80025d6: 4613 mov r3, r2
|
|
80025d8: 813b strh r3, [r7, #8]
|
|
PCD_EPTypeDef *ep;
|
|
|
|
/* initialize ep structure*/
|
|
if ((0x80U & ep_addr) == 0x80U)
|
|
80025da: 897b ldrh r3, [r7, #10]
|
|
80025dc: f003 0380 and.w r3, r3, #128 ; 0x80
|
|
80025e0: b29b uxth r3, r3
|
|
80025e2: 2b00 cmp r3, #0
|
|
80025e4: d008 beq.n 80025f8 <HAL_PCDEx_PMAConfig+0x30>
|
|
{
|
|
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
|
|
80025e6: 897b ldrh r3, [r7, #10]
|
|
80025e8: f003 0307 and.w r3, r3, #7
|
|
80025ec: 015b lsls r3, r3, #5
|
|
80025ee: 3328 adds r3, #40 ; 0x28
|
|
80025f0: 68fa ldr r2, [r7, #12]
|
|
80025f2: 4413 add r3, r2
|
|
80025f4: 617b str r3, [r7, #20]
|
|
80025f6: e006 b.n 8002606 <HAL_PCDEx_PMAConfig+0x3e>
|
|
}
|
|
else
|
|
{
|
|
ep = &hpcd->OUT_ep[ep_addr];
|
|
80025f8: 897b ldrh r3, [r7, #10]
|
|
80025fa: 015b lsls r3, r3, #5
|
|
80025fc: f503 7394 add.w r3, r3, #296 ; 0x128
|
|
8002600: 68fa ldr r2, [r7, #12]
|
|
8002602: 4413 add r3, r2
|
|
8002604: 617b str r3, [r7, #20]
|
|
}
|
|
|
|
/* Here we check if the endpoint is single or double Buffer*/
|
|
if (ep_kind == PCD_SNG_BUF)
|
|
8002606: 893b ldrh r3, [r7, #8]
|
|
8002608: 2b00 cmp r3, #0
|
|
800260a: d107 bne.n 800261c <HAL_PCDEx_PMAConfig+0x54>
|
|
{
|
|
/* Single Buffer */
|
|
ep->doublebuffer = 0U;
|
|
800260c: 697b ldr r3, [r7, #20]
|
|
800260e: 2200 movs r2, #0
|
|
8002610: 731a strb r2, [r3, #12]
|
|
/* Configure the PMA */
|
|
ep->pmaadress = (uint16_t)pmaadress;
|
|
8002612: 687b ldr r3, [r7, #4]
|
|
8002614: b29a uxth r2, r3
|
|
8002616: 697b ldr r3, [r7, #20]
|
|
8002618: 80da strh r2, [r3, #6]
|
|
800261a: e00b b.n 8002634 <HAL_PCDEx_PMAConfig+0x6c>
|
|
}
|
|
else /* USB_DBL_BUF */
|
|
{
|
|
/* Double Buffer Endpoint */
|
|
ep->doublebuffer = 1U;
|
|
800261c: 697b ldr r3, [r7, #20]
|
|
800261e: 2201 movs r2, #1
|
|
8002620: 731a strb r2, [r3, #12]
|
|
/* Configure the PMA */
|
|
ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU);
|
|
8002622: 687b ldr r3, [r7, #4]
|
|
8002624: b29a uxth r2, r3
|
|
8002626: 697b ldr r3, [r7, #20]
|
|
8002628: 811a strh r2, [r3, #8]
|
|
ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16);
|
|
800262a: 687b ldr r3, [r7, #4]
|
|
800262c: 0c1b lsrs r3, r3, #16
|
|
800262e: b29a uxth r2, r3
|
|
8002630: 697b ldr r3, [r7, #20]
|
|
8002632: 815a strh r2, [r3, #10]
|
|
}
|
|
|
|
return HAL_OK;
|
|
8002634: 2300 movs r3, #0
|
|
}
|
|
8002636: 4618 mov r0, r3
|
|
8002638: 371c adds r7, #28
|
|
800263a: 46bd mov sp, r7
|
|
800263c: bc80 pop {r7}
|
|
800263e: 4770 bx lr
|
|
|
|
08002640 <HAL_PWR_EnableBkUpAccess>:
|
|
* @note If the HSE divided by 128 is used as the RTC clock, the
|
|
* Backup Domain Access should be kept enabled.
|
|
* @retval None
|
|
*/
|
|
void HAL_PWR_EnableBkUpAccess(void)
|
|
{
|
|
8002640: b480 push {r7}
|
|
8002642: af00 add r7, sp, #0
|
|
/* Enable access to RTC and backup registers */
|
|
*(__IO uint32_t *) CR_DBP_BB = (uint32_t)ENABLE;
|
|
8002644: 4b03 ldr r3, [pc, #12] ; (8002654 <HAL_PWR_EnableBkUpAccess+0x14>)
|
|
8002646: 2201 movs r2, #1
|
|
8002648: 601a str r2, [r3, #0]
|
|
}
|
|
800264a: bf00 nop
|
|
800264c: 46bd mov sp, r7
|
|
800264e: bc80 pop {r7}
|
|
8002650: 4770 bx lr
|
|
8002652: bf00 nop
|
|
8002654: 420e0020 .word 0x420e0020
|
|
|
|
08002658 <HAL_RCC_OscConfig>:
|
|
* supported by this macro. User should request a transition to HSE Off
|
|
* first and then HSE On or HSE Bypass.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
|
|
{
|
|
8002658: b580 push {r7, lr}
|
|
800265a: b086 sub sp, #24
|
|
800265c: af00 add r7, sp, #0
|
|
800265e: 6078 str r0, [r7, #4]
|
|
uint32_t tickstart;
|
|
uint32_t pll_config;
|
|
|
|
/* Check Null pointer */
|
|
if (RCC_OscInitStruct == NULL)
|
|
8002660: 687b ldr r3, [r7, #4]
|
|
8002662: 2b00 cmp r3, #0
|
|
8002664: d101 bne.n 800266a <HAL_RCC_OscConfig+0x12>
|
|
{
|
|
return HAL_ERROR;
|
|
8002666: 2301 movs r3, #1
|
|
8002668: e26c b.n 8002b44 <HAL_RCC_OscConfig+0x4ec>
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
|
|
|
|
/*------------------------------- HSE Configuration ------------------------*/
|
|
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
|
|
800266a: 687b ldr r3, [r7, #4]
|
|
800266c: 681b ldr r3, [r3, #0]
|
|
800266e: f003 0301 and.w r3, r3, #1
|
|
8002672: 2b00 cmp r3, #0
|
|
8002674: f000 8087 beq.w 8002786 <HAL_RCC_OscConfig+0x12e>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
|
|
|
|
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
|
|
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
|
|
8002678: 4b92 ldr r3, [pc, #584] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
800267a: 685b ldr r3, [r3, #4]
|
|
800267c: f003 030c and.w r3, r3, #12
|
|
8002680: 2b04 cmp r3, #4
|
|
8002682: d00c beq.n 800269e <HAL_RCC_OscConfig+0x46>
|
|
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
|
|
8002684: 4b8f ldr r3, [pc, #572] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002686: 685b ldr r3, [r3, #4]
|
|
8002688: f003 030c and.w r3, r3, #12
|
|
800268c: 2b08 cmp r3, #8
|
|
800268e: d112 bne.n 80026b6 <HAL_RCC_OscConfig+0x5e>
|
|
8002690: 4b8c ldr r3, [pc, #560] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002692: 685b ldr r3, [r3, #4]
|
|
8002694: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
|
8002698: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
|
|
800269c: d10b bne.n 80026b6 <HAL_RCC_OscConfig+0x5e>
|
|
{
|
|
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
|
|
800269e: 4b89 ldr r3, [pc, #548] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
80026a0: 681b ldr r3, [r3, #0]
|
|
80026a2: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
|
80026a6: 2b00 cmp r3, #0
|
|
80026a8: d06c beq.n 8002784 <HAL_RCC_OscConfig+0x12c>
|
|
80026aa: 687b ldr r3, [r7, #4]
|
|
80026ac: 685b ldr r3, [r3, #4]
|
|
80026ae: 2b00 cmp r3, #0
|
|
80026b0: d168 bne.n 8002784 <HAL_RCC_OscConfig+0x12c>
|
|
{
|
|
return HAL_ERROR;
|
|
80026b2: 2301 movs r3, #1
|
|
80026b4: e246 b.n 8002b44 <HAL_RCC_OscConfig+0x4ec>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Set the new HSE configuration ---------------------------------------*/
|
|
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
|
|
80026b6: 687b ldr r3, [r7, #4]
|
|
80026b8: 685b ldr r3, [r3, #4]
|
|
80026ba: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
|
|
80026be: d106 bne.n 80026ce <HAL_RCC_OscConfig+0x76>
|
|
80026c0: 4b80 ldr r3, [pc, #512] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
80026c2: 681b ldr r3, [r3, #0]
|
|
80026c4: 4a7f ldr r2, [pc, #508] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
80026c6: f443 3380 orr.w r3, r3, #65536 ; 0x10000
|
|
80026ca: 6013 str r3, [r2, #0]
|
|
80026cc: e02e b.n 800272c <HAL_RCC_OscConfig+0xd4>
|
|
80026ce: 687b ldr r3, [r7, #4]
|
|
80026d0: 685b ldr r3, [r3, #4]
|
|
80026d2: 2b00 cmp r3, #0
|
|
80026d4: d10c bne.n 80026f0 <HAL_RCC_OscConfig+0x98>
|
|
80026d6: 4b7b ldr r3, [pc, #492] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
80026d8: 681b ldr r3, [r3, #0]
|
|
80026da: 4a7a ldr r2, [pc, #488] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
80026dc: f423 3380 bic.w r3, r3, #65536 ; 0x10000
|
|
80026e0: 6013 str r3, [r2, #0]
|
|
80026e2: 4b78 ldr r3, [pc, #480] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
80026e4: 681b ldr r3, [r3, #0]
|
|
80026e6: 4a77 ldr r2, [pc, #476] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
80026e8: f423 2380 bic.w r3, r3, #262144 ; 0x40000
|
|
80026ec: 6013 str r3, [r2, #0]
|
|
80026ee: e01d b.n 800272c <HAL_RCC_OscConfig+0xd4>
|
|
80026f0: 687b ldr r3, [r7, #4]
|
|
80026f2: 685b ldr r3, [r3, #4]
|
|
80026f4: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000
|
|
80026f8: d10c bne.n 8002714 <HAL_RCC_OscConfig+0xbc>
|
|
80026fa: 4b72 ldr r3, [pc, #456] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
80026fc: 681b ldr r3, [r3, #0]
|
|
80026fe: 4a71 ldr r2, [pc, #452] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002700: f443 2380 orr.w r3, r3, #262144 ; 0x40000
|
|
8002704: 6013 str r3, [r2, #0]
|
|
8002706: 4b6f ldr r3, [pc, #444] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002708: 681b ldr r3, [r3, #0]
|
|
800270a: 4a6e ldr r2, [pc, #440] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
800270c: f443 3380 orr.w r3, r3, #65536 ; 0x10000
|
|
8002710: 6013 str r3, [r2, #0]
|
|
8002712: e00b b.n 800272c <HAL_RCC_OscConfig+0xd4>
|
|
8002714: 4b6b ldr r3, [pc, #428] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002716: 681b ldr r3, [r3, #0]
|
|
8002718: 4a6a ldr r2, [pc, #424] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
800271a: f423 3380 bic.w r3, r3, #65536 ; 0x10000
|
|
800271e: 6013 str r3, [r2, #0]
|
|
8002720: 4b68 ldr r3, [pc, #416] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002722: 681b ldr r3, [r3, #0]
|
|
8002724: 4a67 ldr r2, [pc, #412] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002726: f423 2380 bic.w r3, r3, #262144 ; 0x40000
|
|
800272a: 6013 str r3, [r2, #0]
|
|
|
|
|
|
/* Check the HSE State */
|
|
if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
|
|
800272c: 687b ldr r3, [r7, #4]
|
|
800272e: 685b ldr r3, [r3, #4]
|
|
8002730: 2b00 cmp r3, #0
|
|
8002732: d013 beq.n 800275c <HAL_RCC_OscConfig+0x104>
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8002734: f7fe fcb6 bl 80010a4 <HAL_GetTick>
|
|
8002738: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till HSE is ready */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
|
800273a: e008 b.n 800274e <HAL_RCC_OscConfig+0xf6>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
|
|
800273c: f7fe fcb2 bl 80010a4 <HAL_GetTick>
|
|
8002740: 4602 mov r2, r0
|
|
8002742: 693b ldr r3, [r7, #16]
|
|
8002744: 1ad3 subs r3, r2, r3
|
|
8002746: 2b64 cmp r3, #100 ; 0x64
|
|
8002748: d901 bls.n 800274e <HAL_RCC_OscConfig+0xf6>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
800274a: 2303 movs r3, #3
|
|
800274c: e1fa b.n 8002b44 <HAL_RCC_OscConfig+0x4ec>
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
|
800274e: 4b5d ldr r3, [pc, #372] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002750: 681b ldr r3, [r3, #0]
|
|
8002752: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
|
8002756: 2b00 cmp r3, #0
|
|
8002758: d0f0 beq.n 800273c <HAL_RCC_OscConfig+0xe4>
|
|
800275a: e014 b.n 8002786 <HAL_RCC_OscConfig+0x12e>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
800275c: f7fe fca2 bl 80010a4 <HAL_GetTick>
|
|
8002760: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till HSE is disabled */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
|
|
8002762: e008 b.n 8002776 <HAL_RCC_OscConfig+0x11e>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
|
|
8002764: f7fe fc9e bl 80010a4 <HAL_GetTick>
|
|
8002768: 4602 mov r2, r0
|
|
800276a: 693b ldr r3, [r7, #16]
|
|
800276c: 1ad3 subs r3, r2, r3
|
|
800276e: 2b64 cmp r3, #100 ; 0x64
|
|
8002770: d901 bls.n 8002776 <HAL_RCC_OscConfig+0x11e>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8002772: 2303 movs r3, #3
|
|
8002774: e1e6 b.n 8002b44 <HAL_RCC_OscConfig+0x4ec>
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
|
|
8002776: 4b53 ldr r3, [pc, #332] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002778: 681b ldr r3, [r3, #0]
|
|
800277a: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
|
800277e: 2b00 cmp r3, #0
|
|
8002780: d1f0 bne.n 8002764 <HAL_RCC_OscConfig+0x10c>
|
|
8002782: e000 b.n 8002786 <HAL_RCC_OscConfig+0x12e>
|
|
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
|
|
8002784: bf00 nop
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/*----------------------------- HSI Configuration --------------------------*/
|
|
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
|
|
8002786: 687b ldr r3, [r7, #4]
|
|
8002788: 681b ldr r3, [r3, #0]
|
|
800278a: f003 0302 and.w r3, r3, #2
|
|
800278e: 2b00 cmp r3, #0
|
|
8002790: d063 beq.n 800285a <HAL_RCC_OscConfig+0x202>
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
|
|
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
|
|
|
|
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
|
|
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
|
|
8002792: 4b4c ldr r3, [pc, #304] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002794: 685b ldr r3, [r3, #4]
|
|
8002796: f003 030c and.w r3, r3, #12
|
|
800279a: 2b00 cmp r3, #0
|
|
800279c: d00b beq.n 80027b6 <HAL_RCC_OscConfig+0x15e>
|
|
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
|
|
800279e: 4b49 ldr r3, [pc, #292] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
80027a0: 685b ldr r3, [r3, #4]
|
|
80027a2: f003 030c and.w r3, r3, #12
|
|
80027a6: 2b08 cmp r3, #8
|
|
80027a8: d11c bne.n 80027e4 <HAL_RCC_OscConfig+0x18c>
|
|
80027aa: 4b46 ldr r3, [pc, #280] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
80027ac: 685b ldr r3, [r3, #4]
|
|
80027ae: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
|
80027b2: 2b00 cmp r3, #0
|
|
80027b4: d116 bne.n 80027e4 <HAL_RCC_OscConfig+0x18c>
|
|
{
|
|
/* When HSI is used as system clock it will not disabled */
|
|
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
|
|
80027b6: 4b43 ldr r3, [pc, #268] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
80027b8: 681b ldr r3, [r3, #0]
|
|
80027ba: f003 0302 and.w r3, r3, #2
|
|
80027be: 2b00 cmp r3, #0
|
|
80027c0: d005 beq.n 80027ce <HAL_RCC_OscConfig+0x176>
|
|
80027c2: 687b ldr r3, [r7, #4]
|
|
80027c4: 691b ldr r3, [r3, #16]
|
|
80027c6: 2b01 cmp r3, #1
|
|
80027c8: d001 beq.n 80027ce <HAL_RCC_OscConfig+0x176>
|
|
{
|
|
return HAL_ERROR;
|
|
80027ca: 2301 movs r3, #1
|
|
80027cc: e1ba b.n 8002b44 <HAL_RCC_OscConfig+0x4ec>
|
|
}
|
|
/* Otherwise, just the calibration is allowed */
|
|
else
|
|
{
|
|
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
|
|
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
|
80027ce: 4b3d ldr r3, [pc, #244] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
80027d0: 681b ldr r3, [r3, #0]
|
|
80027d2: f023 02f8 bic.w r2, r3, #248 ; 0xf8
|
|
80027d6: 687b ldr r3, [r7, #4]
|
|
80027d8: 695b ldr r3, [r3, #20]
|
|
80027da: 00db lsls r3, r3, #3
|
|
80027dc: 4939 ldr r1, [pc, #228] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
80027de: 4313 orrs r3, r2
|
|
80027e0: 600b str r3, [r1, #0]
|
|
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
|
|
80027e2: e03a b.n 800285a <HAL_RCC_OscConfig+0x202>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Check the HSI State */
|
|
if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
|
|
80027e4: 687b ldr r3, [r7, #4]
|
|
80027e6: 691b ldr r3, [r3, #16]
|
|
80027e8: 2b00 cmp r3, #0
|
|
80027ea: d020 beq.n 800282e <HAL_RCC_OscConfig+0x1d6>
|
|
{
|
|
/* Enable the Internal High Speed oscillator (HSI). */
|
|
__HAL_RCC_HSI_ENABLE();
|
|
80027ec: 4b36 ldr r3, [pc, #216] ; (80028c8 <HAL_RCC_OscConfig+0x270>)
|
|
80027ee: 2201 movs r2, #1
|
|
80027f0: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
80027f2: f7fe fc57 bl 80010a4 <HAL_GetTick>
|
|
80027f6: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till HSI is ready */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
|
80027f8: e008 b.n 800280c <HAL_RCC_OscConfig+0x1b4>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
|
|
80027fa: f7fe fc53 bl 80010a4 <HAL_GetTick>
|
|
80027fe: 4602 mov r2, r0
|
|
8002800: 693b ldr r3, [r7, #16]
|
|
8002802: 1ad3 subs r3, r2, r3
|
|
8002804: 2b02 cmp r3, #2
|
|
8002806: d901 bls.n 800280c <HAL_RCC_OscConfig+0x1b4>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8002808: 2303 movs r3, #3
|
|
800280a: e19b b.n 8002b44 <HAL_RCC_OscConfig+0x4ec>
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
|
800280c: 4b2d ldr r3, [pc, #180] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
800280e: 681b ldr r3, [r3, #0]
|
|
8002810: f003 0302 and.w r3, r3, #2
|
|
8002814: 2b00 cmp r3, #0
|
|
8002816: d0f0 beq.n 80027fa <HAL_RCC_OscConfig+0x1a2>
|
|
}
|
|
}
|
|
|
|
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
|
|
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
|
8002818: 4b2a ldr r3, [pc, #168] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
800281a: 681b ldr r3, [r3, #0]
|
|
800281c: f023 02f8 bic.w r2, r3, #248 ; 0xf8
|
|
8002820: 687b ldr r3, [r7, #4]
|
|
8002822: 695b ldr r3, [r3, #20]
|
|
8002824: 00db lsls r3, r3, #3
|
|
8002826: 4927 ldr r1, [pc, #156] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002828: 4313 orrs r3, r2
|
|
800282a: 600b str r3, [r1, #0]
|
|
800282c: e015 b.n 800285a <HAL_RCC_OscConfig+0x202>
|
|
}
|
|
else
|
|
{
|
|
/* Disable the Internal High Speed oscillator (HSI). */
|
|
__HAL_RCC_HSI_DISABLE();
|
|
800282e: 4b26 ldr r3, [pc, #152] ; (80028c8 <HAL_RCC_OscConfig+0x270>)
|
|
8002830: 2200 movs r2, #0
|
|
8002832: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8002834: f7fe fc36 bl 80010a4 <HAL_GetTick>
|
|
8002838: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till HSI is disabled */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
|
800283a: e008 b.n 800284e <HAL_RCC_OscConfig+0x1f6>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
|
|
800283c: f7fe fc32 bl 80010a4 <HAL_GetTick>
|
|
8002840: 4602 mov r2, r0
|
|
8002842: 693b ldr r3, [r7, #16]
|
|
8002844: 1ad3 subs r3, r2, r3
|
|
8002846: 2b02 cmp r3, #2
|
|
8002848: d901 bls.n 800284e <HAL_RCC_OscConfig+0x1f6>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
800284a: 2303 movs r3, #3
|
|
800284c: e17a b.n 8002b44 <HAL_RCC_OscConfig+0x4ec>
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
|
800284e: 4b1d ldr r3, [pc, #116] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002850: 681b ldr r3, [r3, #0]
|
|
8002852: f003 0302 and.w r3, r3, #2
|
|
8002856: 2b00 cmp r3, #0
|
|
8002858: d1f0 bne.n 800283c <HAL_RCC_OscConfig+0x1e4>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/*------------------------------ LSI Configuration -------------------------*/
|
|
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
|
|
800285a: 687b ldr r3, [r7, #4]
|
|
800285c: 681b ldr r3, [r3, #0]
|
|
800285e: f003 0308 and.w r3, r3, #8
|
|
8002862: 2b00 cmp r3, #0
|
|
8002864: d03a beq.n 80028dc <HAL_RCC_OscConfig+0x284>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
|
|
|
|
/* Check the LSI State */
|
|
if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
|
|
8002866: 687b ldr r3, [r7, #4]
|
|
8002868: 699b ldr r3, [r3, #24]
|
|
800286a: 2b00 cmp r3, #0
|
|
800286c: d019 beq.n 80028a2 <HAL_RCC_OscConfig+0x24a>
|
|
{
|
|
/* Enable the Internal Low Speed oscillator (LSI). */
|
|
__HAL_RCC_LSI_ENABLE();
|
|
800286e: 4b17 ldr r3, [pc, #92] ; (80028cc <HAL_RCC_OscConfig+0x274>)
|
|
8002870: 2201 movs r2, #1
|
|
8002872: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8002874: f7fe fc16 bl 80010a4 <HAL_GetTick>
|
|
8002878: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till LSI is ready */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
|
|
800287a: e008 b.n 800288e <HAL_RCC_OscConfig+0x236>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
|
|
800287c: f7fe fc12 bl 80010a4 <HAL_GetTick>
|
|
8002880: 4602 mov r2, r0
|
|
8002882: 693b ldr r3, [r7, #16]
|
|
8002884: 1ad3 subs r3, r2, r3
|
|
8002886: 2b02 cmp r3, #2
|
|
8002888: d901 bls.n 800288e <HAL_RCC_OscConfig+0x236>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
800288a: 2303 movs r3, #3
|
|
800288c: e15a b.n 8002b44 <HAL_RCC_OscConfig+0x4ec>
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
|
|
800288e: 4b0d ldr r3, [pc, #52] ; (80028c4 <HAL_RCC_OscConfig+0x26c>)
|
|
8002890: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
8002892: f003 0302 and.w r3, r3, #2
|
|
8002896: 2b00 cmp r3, #0
|
|
8002898: d0f0 beq.n 800287c <HAL_RCC_OscConfig+0x224>
|
|
}
|
|
}
|
|
/* To have a fully stabilized clock in the specified range, a software delay of 1ms
|
|
should be added.*/
|
|
RCC_Delay(1);
|
|
800289a: 2001 movs r0, #1
|
|
800289c: f000 fada bl 8002e54 <RCC_Delay>
|
|
80028a0: e01c b.n 80028dc <HAL_RCC_OscConfig+0x284>
|
|
}
|
|
else
|
|
{
|
|
/* Disable the Internal Low Speed oscillator (LSI). */
|
|
__HAL_RCC_LSI_DISABLE();
|
|
80028a2: 4b0a ldr r3, [pc, #40] ; (80028cc <HAL_RCC_OscConfig+0x274>)
|
|
80028a4: 2200 movs r2, #0
|
|
80028a6: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
80028a8: f7fe fbfc bl 80010a4 <HAL_GetTick>
|
|
80028ac: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till LSI is disabled */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
|
|
80028ae: e00f b.n 80028d0 <HAL_RCC_OscConfig+0x278>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
|
|
80028b0: f7fe fbf8 bl 80010a4 <HAL_GetTick>
|
|
80028b4: 4602 mov r2, r0
|
|
80028b6: 693b ldr r3, [r7, #16]
|
|
80028b8: 1ad3 subs r3, r2, r3
|
|
80028ba: 2b02 cmp r3, #2
|
|
80028bc: d908 bls.n 80028d0 <HAL_RCC_OscConfig+0x278>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
80028be: 2303 movs r3, #3
|
|
80028c0: e140 b.n 8002b44 <HAL_RCC_OscConfig+0x4ec>
|
|
80028c2: bf00 nop
|
|
80028c4: 40021000 .word 0x40021000
|
|
80028c8: 42420000 .word 0x42420000
|
|
80028cc: 42420480 .word 0x42420480
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
|
|
80028d0: 4b9e ldr r3, [pc, #632] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
80028d2: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
80028d4: f003 0302 and.w r3, r3, #2
|
|
80028d8: 2b00 cmp r3, #0
|
|
80028da: d1e9 bne.n 80028b0 <HAL_RCC_OscConfig+0x258>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/*------------------------------ LSE Configuration -------------------------*/
|
|
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
|
|
80028dc: 687b ldr r3, [r7, #4]
|
|
80028de: 681b ldr r3, [r3, #0]
|
|
80028e0: f003 0304 and.w r3, r3, #4
|
|
80028e4: 2b00 cmp r3, #0
|
|
80028e6: f000 80a6 beq.w 8002a36 <HAL_RCC_OscConfig+0x3de>
|
|
{
|
|
FlagStatus pwrclkchanged = RESET;
|
|
80028ea: 2300 movs r3, #0
|
|
80028ec: 75fb strb r3, [r7, #23]
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
|
|
|
|
/* Update LSE configuration in Backup Domain control register */
|
|
/* Requires to enable write access to Backup Domain of necessary */
|
|
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
|
|
80028ee: 4b97 ldr r3, [pc, #604] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
80028f0: 69db ldr r3, [r3, #28]
|
|
80028f2: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
|
80028f6: 2b00 cmp r3, #0
|
|
80028f8: d10d bne.n 8002916 <HAL_RCC_OscConfig+0x2be>
|
|
{
|
|
__HAL_RCC_PWR_CLK_ENABLE();
|
|
80028fa: 4b94 ldr r3, [pc, #592] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
80028fc: 69db ldr r3, [r3, #28]
|
|
80028fe: 4a93 ldr r2, [pc, #588] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
8002900: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
|
|
8002904: 61d3 str r3, [r2, #28]
|
|
8002906: 4b91 ldr r3, [pc, #580] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
8002908: 69db ldr r3, [r3, #28]
|
|
800290a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
|
800290e: 60bb str r3, [r7, #8]
|
|
8002910: 68bb ldr r3, [r7, #8]
|
|
pwrclkchanged = SET;
|
|
8002912: 2301 movs r3, #1
|
|
8002914: 75fb strb r3, [r7, #23]
|
|
}
|
|
|
|
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
8002916: 4b8e ldr r3, [pc, #568] ; (8002b50 <HAL_RCC_OscConfig+0x4f8>)
|
|
8002918: 681b ldr r3, [r3, #0]
|
|
800291a: f403 7380 and.w r3, r3, #256 ; 0x100
|
|
800291e: 2b00 cmp r3, #0
|
|
8002920: d118 bne.n 8002954 <HAL_RCC_OscConfig+0x2fc>
|
|
{
|
|
/* Enable write access to Backup domain */
|
|
SET_BIT(PWR->CR, PWR_CR_DBP);
|
|
8002922: 4b8b ldr r3, [pc, #556] ; (8002b50 <HAL_RCC_OscConfig+0x4f8>)
|
|
8002924: 681b ldr r3, [r3, #0]
|
|
8002926: 4a8a ldr r2, [pc, #552] ; (8002b50 <HAL_RCC_OscConfig+0x4f8>)
|
|
8002928: f443 7380 orr.w r3, r3, #256 ; 0x100
|
|
800292c: 6013 str r3, [r2, #0]
|
|
|
|
/* Wait for Backup domain Write protection disable */
|
|
tickstart = HAL_GetTick();
|
|
800292e: f7fe fbb9 bl 80010a4 <HAL_GetTick>
|
|
8002932: 6138 str r0, [r7, #16]
|
|
|
|
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
8002934: e008 b.n 8002948 <HAL_RCC_OscConfig+0x2f0>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
|
|
8002936: f7fe fbb5 bl 80010a4 <HAL_GetTick>
|
|
800293a: 4602 mov r2, r0
|
|
800293c: 693b ldr r3, [r7, #16]
|
|
800293e: 1ad3 subs r3, r2, r3
|
|
8002940: 2b64 cmp r3, #100 ; 0x64
|
|
8002942: d901 bls.n 8002948 <HAL_RCC_OscConfig+0x2f0>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8002944: 2303 movs r3, #3
|
|
8002946: e0fd b.n 8002b44 <HAL_RCC_OscConfig+0x4ec>
|
|
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
8002948: 4b81 ldr r3, [pc, #516] ; (8002b50 <HAL_RCC_OscConfig+0x4f8>)
|
|
800294a: 681b ldr r3, [r3, #0]
|
|
800294c: f403 7380 and.w r3, r3, #256 ; 0x100
|
|
8002950: 2b00 cmp r3, #0
|
|
8002952: d0f0 beq.n 8002936 <HAL_RCC_OscConfig+0x2de>
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Set the new LSE configuration -----------------------------------------*/
|
|
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
|
|
8002954: 687b ldr r3, [r7, #4]
|
|
8002956: 68db ldr r3, [r3, #12]
|
|
8002958: 2b01 cmp r3, #1
|
|
800295a: d106 bne.n 800296a <HAL_RCC_OscConfig+0x312>
|
|
800295c: 4b7b ldr r3, [pc, #492] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
800295e: 6a1b ldr r3, [r3, #32]
|
|
8002960: 4a7a ldr r2, [pc, #488] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
8002962: f043 0301 orr.w r3, r3, #1
|
|
8002966: 6213 str r3, [r2, #32]
|
|
8002968: e02d b.n 80029c6 <HAL_RCC_OscConfig+0x36e>
|
|
800296a: 687b ldr r3, [r7, #4]
|
|
800296c: 68db ldr r3, [r3, #12]
|
|
800296e: 2b00 cmp r3, #0
|
|
8002970: d10c bne.n 800298c <HAL_RCC_OscConfig+0x334>
|
|
8002972: 4b76 ldr r3, [pc, #472] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
8002974: 6a1b ldr r3, [r3, #32]
|
|
8002976: 4a75 ldr r2, [pc, #468] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
8002978: f023 0301 bic.w r3, r3, #1
|
|
800297c: 6213 str r3, [r2, #32]
|
|
800297e: 4b73 ldr r3, [pc, #460] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
8002980: 6a1b ldr r3, [r3, #32]
|
|
8002982: 4a72 ldr r2, [pc, #456] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
8002984: f023 0304 bic.w r3, r3, #4
|
|
8002988: 6213 str r3, [r2, #32]
|
|
800298a: e01c b.n 80029c6 <HAL_RCC_OscConfig+0x36e>
|
|
800298c: 687b ldr r3, [r7, #4]
|
|
800298e: 68db ldr r3, [r3, #12]
|
|
8002990: 2b05 cmp r3, #5
|
|
8002992: d10c bne.n 80029ae <HAL_RCC_OscConfig+0x356>
|
|
8002994: 4b6d ldr r3, [pc, #436] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
8002996: 6a1b ldr r3, [r3, #32]
|
|
8002998: 4a6c ldr r2, [pc, #432] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
800299a: f043 0304 orr.w r3, r3, #4
|
|
800299e: 6213 str r3, [r2, #32]
|
|
80029a0: 4b6a ldr r3, [pc, #424] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
80029a2: 6a1b ldr r3, [r3, #32]
|
|
80029a4: 4a69 ldr r2, [pc, #420] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
80029a6: f043 0301 orr.w r3, r3, #1
|
|
80029aa: 6213 str r3, [r2, #32]
|
|
80029ac: e00b b.n 80029c6 <HAL_RCC_OscConfig+0x36e>
|
|
80029ae: 4b67 ldr r3, [pc, #412] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
80029b0: 6a1b ldr r3, [r3, #32]
|
|
80029b2: 4a66 ldr r2, [pc, #408] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
80029b4: f023 0301 bic.w r3, r3, #1
|
|
80029b8: 6213 str r3, [r2, #32]
|
|
80029ba: 4b64 ldr r3, [pc, #400] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
80029bc: 6a1b ldr r3, [r3, #32]
|
|
80029be: 4a63 ldr r2, [pc, #396] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
80029c0: f023 0304 bic.w r3, r3, #4
|
|
80029c4: 6213 str r3, [r2, #32]
|
|
/* Check the LSE State */
|
|
if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
|
|
80029c6: 687b ldr r3, [r7, #4]
|
|
80029c8: 68db ldr r3, [r3, #12]
|
|
80029ca: 2b00 cmp r3, #0
|
|
80029cc: d015 beq.n 80029fa <HAL_RCC_OscConfig+0x3a2>
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
80029ce: f7fe fb69 bl 80010a4 <HAL_GetTick>
|
|
80029d2: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till LSE is ready */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
|
80029d4: e00a b.n 80029ec <HAL_RCC_OscConfig+0x394>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
|
|
80029d6: f7fe fb65 bl 80010a4 <HAL_GetTick>
|
|
80029da: 4602 mov r2, r0
|
|
80029dc: 693b ldr r3, [r7, #16]
|
|
80029de: 1ad3 subs r3, r2, r3
|
|
80029e0: f241 3288 movw r2, #5000 ; 0x1388
|
|
80029e4: 4293 cmp r3, r2
|
|
80029e6: d901 bls.n 80029ec <HAL_RCC_OscConfig+0x394>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
80029e8: 2303 movs r3, #3
|
|
80029ea: e0ab b.n 8002b44 <HAL_RCC_OscConfig+0x4ec>
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
|
80029ec: 4b57 ldr r3, [pc, #348] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
80029ee: 6a1b ldr r3, [r3, #32]
|
|
80029f0: f003 0302 and.w r3, r3, #2
|
|
80029f4: 2b00 cmp r3, #0
|
|
80029f6: d0ee beq.n 80029d6 <HAL_RCC_OscConfig+0x37e>
|
|
80029f8: e014 b.n 8002a24 <HAL_RCC_OscConfig+0x3cc>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
80029fa: f7fe fb53 bl 80010a4 <HAL_GetTick>
|
|
80029fe: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till LSE is disabled */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
|
|
8002a00: e00a b.n 8002a18 <HAL_RCC_OscConfig+0x3c0>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
|
|
8002a02: f7fe fb4f bl 80010a4 <HAL_GetTick>
|
|
8002a06: 4602 mov r2, r0
|
|
8002a08: 693b ldr r3, [r7, #16]
|
|
8002a0a: 1ad3 subs r3, r2, r3
|
|
8002a0c: f241 3288 movw r2, #5000 ; 0x1388
|
|
8002a10: 4293 cmp r3, r2
|
|
8002a12: d901 bls.n 8002a18 <HAL_RCC_OscConfig+0x3c0>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8002a14: 2303 movs r3, #3
|
|
8002a16: e095 b.n 8002b44 <HAL_RCC_OscConfig+0x4ec>
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
|
|
8002a18: 4b4c ldr r3, [pc, #304] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
8002a1a: 6a1b ldr r3, [r3, #32]
|
|
8002a1c: f003 0302 and.w r3, r3, #2
|
|
8002a20: 2b00 cmp r3, #0
|
|
8002a22: d1ee bne.n 8002a02 <HAL_RCC_OscConfig+0x3aa>
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Require to disable power clock if necessary */
|
|
if (pwrclkchanged == SET)
|
|
8002a24: 7dfb ldrb r3, [r7, #23]
|
|
8002a26: 2b01 cmp r3, #1
|
|
8002a28: d105 bne.n 8002a36 <HAL_RCC_OscConfig+0x3de>
|
|
{
|
|
__HAL_RCC_PWR_CLK_DISABLE();
|
|
8002a2a: 4b48 ldr r3, [pc, #288] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
8002a2c: 69db ldr r3, [r3, #28]
|
|
8002a2e: 4a47 ldr r2, [pc, #284] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
8002a30: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
|
|
8002a34: 61d3 str r3, [r2, #28]
|
|
|
|
#endif /* RCC_CR_PLL2ON */
|
|
/*-------------------------------- PLL Configuration -----------------------*/
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
|
|
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
|
|
8002a36: 687b ldr r3, [r7, #4]
|
|
8002a38: 69db ldr r3, [r3, #28]
|
|
8002a3a: 2b00 cmp r3, #0
|
|
8002a3c: f000 8081 beq.w 8002b42 <HAL_RCC_OscConfig+0x4ea>
|
|
{
|
|
/* Check if the PLL is used as system clock or not */
|
|
if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
|
|
8002a40: 4b42 ldr r3, [pc, #264] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
8002a42: 685b ldr r3, [r3, #4]
|
|
8002a44: f003 030c and.w r3, r3, #12
|
|
8002a48: 2b08 cmp r3, #8
|
|
8002a4a: d061 beq.n 8002b10 <HAL_RCC_OscConfig+0x4b8>
|
|
{
|
|
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
|
|
8002a4c: 687b ldr r3, [r7, #4]
|
|
8002a4e: 69db ldr r3, [r3, #28]
|
|
8002a50: 2b02 cmp r3, #2
|
|
8002a52: d146 bne.n 8002ae2 <HAL_RCC_OscConfig+0x48a>
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
|
|
assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
|
|
|
|
/* Disable the main PLL. */
|
|
__HAL_RCC_PLL_DISABLE();
|
|
8002a54: 4b3f ldr r3, [pc, #252] ; (8002b54 <HAL_RCC_OscConfig+0x4fc>)
|
|
8002a56: 2200 movs r2, #0
|
|
8002a58: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8002a5a: f7fe fb23 bl 80010a4 <HAL_GetTick>
|
|
8002a5e: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till PLL is disabled */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
8002a60: e008 b.n 8002a74 <HAL_RCC_OscConfig+0x41c>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
|
|
8002a62: f7fe fb1f bl 80010a4 <HAL_GetTick>
|
|
8002a66: 4602 mov r2, r0
|
|
8002a68: 693b ldr r3, [r7, #16]
|
|
8002a6a: 1ad3 subs r3, r2, r3
|
|
8002a6c: 2b02 cmp r3, #2
|
|
8002a6e: d901 bls.n 8002a74 <HAL_RCC_OscConfig+0x41c>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8002a70: 2303 movs r3, #3
|
|
8002a72: e067 b.n 8002b44 <HAL_RCC_OscConfig+0x4ec>
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
8002a74: 4b35 ldr r3, [pc, #212] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
8002a76: 681b ldr r3, [r3, #0]
|
|
8002a78: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
|
8002a7c: 2b00 cmp r3, #0
|
|
8002a7e: d1f0 bne.n 8002a62 <HAL_RCC_OscConfig+0x40a>
|
|
}
|
|
}
|
|
|
|
/* Configure the HSE prediv factor --------------------------------*/
|
|
/* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */
|
|
if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
|
|
8002a80: 687b ldr r3, [r7, #4]
|
|
8002a82: 6a1b ldr r3, [r3, #32]
|
|
8002a84: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
|
|
8002a88: d108 bne.n 8002a9c <HAL_RCC_OscConfig+0x444>
|
|
/* Set PREDIV1 source */
|
|
SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source);
|
|
#endif /* RCC_CFGR2_PREDIV1SRC */
|
|
|
|
/* Set PREDIV1 Value */
|
|
__HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
|
|
8002a8a: 4b30 ldr r3, [pc, #192] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
8002a8c: 685b ldr r3, [r3, #4]
|
|
8002a8e: f423 3200 bic.w r2, r3, #131072 ; 0x20000
|
|
8002a92: 687b ldr r3, [r7, #4]
|
|
8002a94: 689b ldr r3, [r3, #8]
|
|
8002a96: 492d ldr r1, [pc, #180] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
8002a98: 4313 orrs r3, r2
|
|
8002a9a: 604b str r3, [r1, #4]
|
|
}
|
|
|
|
/* Configure the main PLL clock source and multiplication factors. */
|
|
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
|
|
8002a9c: 4b2b ldr r3, [pc, #172] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
8002a9e: 685b ldr r3, [r3, #4]
|
|
8002aa0: f423 1274 bic.w r2, r3, #3997696 ; 0x3d0000
|
|
8002aa4: 687b ldr r3, [r7, #4]
|
|
8002aa6: 6a19 ldr r1, [r3, #32]
|
|
8002aa8: 687b ldr r3, [r7, #4]
|
|
8002aaa: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
8002aac: 430b orrs r3, r1
|
|
8002aae: 4927 ldr r1, [pc, #156] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
8002ab0: 4313 orrs r3, r2
|
|
8002ab2: 604b str r3, [r1, #4]
|
|
RCC_OscInitStruct->PLL.PLLMUL);
|
|
/* Enable the main PLL. */
|
|
__HAL_RCC_PLL_ENABLE();
|
|
8002ab4: 4b27 ldr r3, [pc, #156] ; (8002b54 <HAL_RCC_OscConfig+0x4fc>)
|
|
8002ab6: 2201 movs r2, #1
|
|
8002ab8: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8002aba: f7fe faf3 bl 80010a4 <HAL_GetTick>
|
|
8002abe: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till PLL is ready */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
|
8002ac0: e008 b.n 8002ad4 <HAL_RCC_OscConfig+0x47c>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
|
|
8002ac2: f7fe faef bl 80010a4 <HAL_GetTick>
|
|
8002ac6: 4602 mov r2, r0
|
|
8002ac8: 693b ldr r3, [r7, #16]
|
|
8002aca: 1ad3 subs r3, r2, r3
|
|
8002acc: 2b02 cmp r3, #2
|
|
8002ace: d901 bls.n 8002ad4 <HAL_RCC_OscConfig+0x47c>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8002ad0: 2303 movs r3, #3
|
|
8002ad2: e037 b.n 8002b44 <HAL_RCC_OscConfig+0x4ec>
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
|
8002ad4: 4b1d ldr r3, [pc, #116] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
8002ad6: 681b ldr r3, [r3, #0]
|
|
8002ad8: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
|
8002adc: 2b00 cmp r3, #0
|
|
8002ade: d0f0 beq.n 8002ac2 <HAL_RCC_OscConfig+0x46a>
|
|
8002ae0: e02f b.n 8002b42 <HAL_RCC_OscConfig+0x4ea>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Disable the main PLL. */
|
|
__HAL_RCC_PLL_DISABLE();
|
|
8002ae2: 4b1c ldr r3, [pc, #112] ; (8002b54 <HAL_RCC_OscConfig+0x4fc>)
|
|
8002ae4: 2200 movs r2, #0
|
|
8002ae6: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8002ae8: f7fe fadc bl 80010a4 <HAL_GetTick>
|
|
8002aec: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till PLL is disabled */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
8002aee: e008 b.n 8002b02 <HAL_RCC_OscConfig+0x4aa>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
|
|
8002af0: f7fe fad8 bl 80010a4 <HAL_GetTick>
|
|
8002af4: 4602 mov r2, r0
|
|
8002af6: 693b ldr r3, [r7, #16]
|
|
8002af8: 1ad3 subs r3, r2, r3
|
|
8002afa: 2b02 cmp r3, #2
|
|
8002afc: d901 bls.n 8002b02 <HAL_RCC_OscConfig+0x4aa>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8002afe: 2303 movs r3, #3
|
|
8002b00: e020 b.n 8002b44 <HAL_RCC_OscConfig+0x4ec>
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
8002b02: 4b12 ldr r3, [pc, #72] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
8002b04: 681b ldr r3, [r3, #0]
|
|
8002b06: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
|
8002b0a: 2b00 cmp r3, #0
|
|
8002b0c: d1f0 bne.n 8002af0 <HAL_RCC_OscConfig+0x498>
|
|
8002b0e: e018 b.n 8002b42 <HAL_RCC_OscConfig+0x4ea>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Check if there is a request to disable the PLL used as System clock source */
|
|
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
|
|
8002b10: 687b ldr r3, [r7, #4]
|
|
8002b12: 69db ldr r3, [r3, #28]
|
|
8002b14: 2b01 cmp r3, #1
|
|
8002b16: d101 bne.n 8002b1c <HAL_RCC_OscConfig+0x4c4>
|
|
{
|
|
return HAL_ERROR;
|
|
8002b18: 2301 movs r3, #1
|
|
8002b1a: e013 b.n 8002b44 <HAL_RCC_OscConfig+0x4ec>
|
|
}
|
|
else
|
|
{
|
|
/* Do not return HAL_ERROR if request repeats the current configuration */
|
|
pll_config = RCC->CFGR;
|
|
8002b1c: 4b0b ldr r3, [pc, #44] ; (8002b4c <HAL_RCC_OscConfig+0x4f4>)
|
|
8002b1e: 685b ldr r3, [r3, #4]
|
|
8002b20: 60fb str r3, [r7, #12]
|
|
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
|
8002b22: 68fb ldr r3, [r7, #12]
|
|
8002b24: f403 3280 and.w r2, r3, #65536 ; 0x10000
|
|
8002b28: 687b ldr r3, [r7, #4]
|
|
8002b2a: 6a1b ldr r3, [r3, #32]
|
|
8002b2c: 429a cmp r2, r3
|
|
8002b2e: d106 bne.n 8002b3e <HAL_RCC_OscConfig+0x4e6>
|
|
(READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
|
|
8002b30: 68fb ldr r3, [r7, #12]
|
|
8002b32: f403 1270 and.w r2, r3, #3932160 ; 0x3c0000
|
|
8002b36: 687b ldr r3, [r7, #4]
|
|
8002b38: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
|
8002b3a: 429a cmp r2, r3
|
|
8002b3c: d001 beq.n 8002b42 <HAL_RCC_OscConfig+0x4ea>
|
|
{
|
|
return HAL_ERROR;
|
|
8002b3e: 2301 movs r3, #1
|
|
8002b40: e000 b.n 8002b44 <HAL_RCC_OscConfig+0x4ec>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
return HAL_OK;
|
|
8002b42: 2300 movs r3, #0
|
|
}
|
|
8002b44: 4618 mov r0, r3
|
|
8002b46: 3718 adds r7, #24
|
|
8002b48: 46bd mov sp, r7
|
|
8002b4a: bd80 pop {r7, pc}
|
|
8002b4c: 40021000 .word 0x40021000
|
|
8002b50: 40007000 .word 0x40007000
|
|
8002b54: 42420060 .word 0x42420060
|
|
|
|
08002b58 <HAL_RCC_ClockConfig>:
|
|
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
|
|
* currently used as system clock source.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
|
|
{
|
|
8002b58: b580 push {r7, lr}
|
|
8002b5a: b084 sub sp, #16
|
|
8002b5c: af00 add r7, sp, #0
|
|
8002b5e: 6078 str r0, [r7, #4]
|
|
8002b60: 6039 str r1, [r7, #0]
|
|
uint32_t tickstart;
|
|
|
|
/* Check Null pointer */
|
|
if (RCC_ClkInitStruct == NULL)
|
|
8002b62: 687b ldr r3, [r7, #4]
|
|
8002b64: 2b00 cmp r3, #0
|
|
8002b66: d101 bne.n 8002b6c <HAL_RCC_ClockConfig+0x14>
|
|
{
|
|
return HAL_ERROR;
|
|
8002b68: 2301 movs r3, #1
|
|
8002b6a: e0d0 b.n 8002d0e <HAL_RCC_ClockConfig+0x1b6>
|
|
must be correctly programmed according to the frequency of the CPU clock
|
|
(HCLK) of the device. */
|
|
|
|
#if defined(FLASH_ACR_LATENCY)
|
|
/* Increasing the number of wait states because of higher CPU frequency */
|
|
if (FLatency > __HAL_FLASH_GET_LATENCY())
|
|
8002b6c: 4b6a ldr r3, [pc, #424] ; (8002d18 <HAL_RCC_ClockConfig+0x1c0>)
|
|
8002b6e: 681b ldr r3, [r3, #0]
|
|
8002b70: f003 0307 and.w r3, r3, #7
|
|
8002b74: 683a ldr r2, [r7, #0]
|
|
8002b76: 429a cmp r2, r3
|
|
8002b78: d910 bls.n 8002b9c <HAL_RCC_ClockConfig+0x44>
|
|
{
|
|
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
|
__HAL_FLASH_SET_LATENCY(FLatency);
|
|
8002b7a: 4b67 ldr r3, [pc, #412] ; (8002d18 <HAL_RCC_ClockConfig+0x1c0>)
|
|
8002b7c: 681b ldr r3, [r3, #0]
|
|
8002b7e: f023 0207 bic.w r2, r3, #7
|
|
8002b82: 4965 ldr r1, [pc, #404] ; (8002d18 <HAL_RCC_ClockConfig+0x1c0>)
|
|
8002b84: 683b ldr r3, [r7, #0]
|
|
8002b86: 4313 orrs r3, r2
|
|
8002b88: 600b str r3, [r1, #0]
|
|
|
|
/* Check that the new number of wait states is taken into account to access the Flash
|
|
memory by reading the FLASH_ACR register */
|
|
if (__HAL_FLASH_GET_LATENCY() != FLatency)
|
|
8002b8a: 4b63 ldr r3, [pc, #396] ; (8002d18 <HAL_RCC_ClockConfig+0x1c0>)
|
|
8002b8c: 681b ldr r3, [r3, #0]
|
|
8002b8e: f003 0307 and.w r3, r3, #7
|
|
8002b92: 683a ldr r2, [r7, #0]
|
|
8002b94: 429a cmp r2, r3
|
|
8002b96: d001 beq.n 8002b9c <HAL_RCC_ClockConfig+0x44>
|
|
{
|
|
return HAL_ERROR;
|
|
8002b98: 2301 movs r3, #1
|
|
8002b9a: e0b8 b.n 8002d0e <HAL_RCC_ClockConfig+0x1b6>
|
|
}
|
|
}
|
|
|
|
#endif /* FLASH_ACR_LATENCY */
|
|
/*-------------------------- HCLK Configuration --------------------------*/
|
|
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
|
|
8002b9c: 687b ldr r3, [r7, #4]
|
|
8002b9e: 681b ldr r3, [r3, #0]
|
|
8002ba0: f003 0302 and.w r3, r3, #2
|
|
8002ba4: 2b00 cmp r3, #0
|
|
8002ba6: d020 beq.n 8002bea <HAL_RCC_ClockConfig+0x92>
|
|
{
|
|
/* Set the highest APBx dividers in order to ensure that we do not go through
|
|
a non-spec phase whatever we decrease or increase HCLK. */
|
|
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
|
|
8002ba8: 687b ldr r3, [r7, #4]
|
|
8002baa: 681b ldr r3, [r3, #0]
|
|
8002bac: f003 0304 and.w r3, r3, #4
|
|
8002bb0: 2b00 cmp r3, #0
|
|
8002bb2: d005 beq.n 8002bc0 <HAL_RCC_ClockConfig+0x68>
|
|
{
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
|
|
8002bb4: 4b59 ldr r3, [pc, #356] ; (8002d1c <HAL_RCC_ClockConfig+0x1c4>)
|
|
8002bb6: 685b ldr r3, [r3, #4]
|
|
8002bb8: 4a58 ldr r2, [pc, #352] ; (8002d1c <HAL_RCC_ClockConfig+0x1c4>)
|
|
8002bba: f443 63e0 orr.w r3, r3, #1792 ; 0x700
|
|
8002bbe: 6053 str r3, [r2, #4]
|
|
}
|
|
|
|
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
|
|
8002bc0: 687b ldr r3, [r7, #4]
|
|
8002bc2: 681b ldr r3, [r3, #0]
|
|
8002bc4: f003 0308 and.w r3, r3, #8
|
|
8002bc8: 2b00 cmp r3, #0
|
|
8002bca: d005 beq.n 8002bd8 <HAL_RCC_ClockConfig+0x80>
|
|
{
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
|
|
8002bcc: 4b53 ldr r3, [pc, #332] ; (8002d1c <HAL_RCC_ClockConfig+0x1c4>)
|
|
8002bce: 685b ldr r3, [r3, #4]
|
|
8002bd0: 4a52 ldr r2, [pc, #328] ; (8002d1c <HAL_RCC_ClockConfig+0x1c4>)
|
|
8002bd2: f443 5360 orr.w r3, r3, #14336 ; 0x3800
|
|
8002bd6: 6053 str r3, [r2, #4]
|
|
}
|
|
|
|
/* Set the new HCLK clock divider */
|
|
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
|
|
8002bd8: 4b50 ldr r3, [pc, #320] ; (8002d1c <HAL_RCC_ClockConfig+0x1c4>)
|
|
8002bda: 685b ldr r3, [r3, #4]
|
|
8002bdc: f023 02f0 bic.w r2, r3, #240 ; 0xf0
|
|
8002be0: 687b ldr r3, [r7, #4]
|
|
8002be2: 689b ldr r3, [r3, #8]
|
|
8002be4: 494d ldr r1, [pc, #308] ; (8002d1c <HAL_RCC_ClockConfig+0x1c4>)
|
|
8002be6: 4313 orrs r3, r2
|
|
8002be8: 604b str r3, [r1, #4]
|
|
}
|
|
|
|
/*------------------------- SYSCLK Configuration ---------------------------*/
|
|
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
|
|
8002bea: 687b ldr r3, [r7, #4]
|
|
8002bec: 681b ldr r3, [r3, #0]
|
|
8002bee: f003 0301 and.w r3, r3, #1
|
|
8002bf2: 2b00 cmp r3, #0
|
|
8002bf4: d040 beq.n 8002c78 <HAL_RCC_ClockConfig+0x120>
|
|
{
|
|
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
|
|
|
|
/* HSE is selected as System Clock Source */
|
|
if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
|
|
8002bf6: 687b ldr r3, [r7, #4]
|
|
8002bf8: 685b ldr r3, [r3, #4]
|
|
8002bfa: 2b01 cmp r3, #1
|
|
8002bfc: d107 bne.n 8002c0e <HAL_RCC_ClockConfig+0xb6>
|
|
{
|
|
/* Check the HSE ready flag */
|
|
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
|
8002bfe: 4b47 ldr r3, [pc, #284] ; (8002d1c <HAL_RCC_ClockConfig+0x1c4>)
|
|
8002c00: 681b ldr r3, [r3, #0]
|
|
8002c02: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
|
8002c06: 2b00 cmp r3, #0
|
|
8002c08: d115 bne.n 8002c36 <HAL_RCC_ClockConfig+0xde>
|
|
{
|
|
return HAL_ERROR;
|
|
8002c0a: 2301 movs r3, #1
|
|
8002c0c: e07f b.n 8002d0e <HAL_RCC_ClockConfig+0x1b6>
|
|
}
|
|
}
|
|
/* PLL is selected as System Clock Source */
|
|
else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
|
|
8002c0e: 687b ldr r3, [r7, #4]
|
|
8002c10: 685b ldr r3, [r3, #4]
|
|
8002c12: 2b02 cmp r3, #2
|
|
8002c14: d107 bne.n 8002c26 <HAL_RCC_ClockConfig+0xce>
|
|
{
|
|
/* Check the PLL ready flag */
|
|
if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
|
8002c16: 4b41 ldr r3, [pc, #260] ; (8002d1c <HAL_RCC_ClockConfig+0x1c4>)
|
|
8002c18: 681b ldr r3, [r3, #0]
|
|
8002c1a: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
|
8002c1e: 2b00 cmp r3, #0
|
|
8002c20: d109 bne.n 8002c36 <HAL_RCC_ClockConfig+0xde>
|
|
{
|
|
return HAL_ERROR;
|
|
8002c22: 2301 movs r3, #1
|
|
8002c24: e073 b.n 8002d0e <HAL_RCC_ClockConfig+0x1b6>
|
|
}
|
|
/* HSI is selected as System Clock Source */
|
|
else
|
|
{
|
|
/* Check the HSI ready flag */
|
|
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
|
8002c26: 4b3d ldr r3, [pc, #244] ; (8002d1c <HAL_RCC_ClockConfig+0x1c4>)
|
|
8002c28: 681b ldr r3, [r3, #0]
|
|
8002c2a: f003 0302 and.w r3, r3, #2
|
|
8002c2e: 2b00 cmp r3, #0
|
|
8002c30: d101 bne.n 8002c36 <HAL_RCC_ClockConfig+0xde>
|
|
{
|
|
return HAL_ERROR;
|
|
8002c32: 2301 movs r3, #1
|
|
8002c34: e06b b.n 8002d0e <HAL_RCC_ClockConfig+0x1b6>
|
|
}
|
|
}
|
|
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
|
|
8002c36: 4b39 ldr r3, [pc, #228] ; (8002d1c <HAL_RCC_ClockConfig+0x1c4>)
|
|
8002c38: 685b ldr r3, [r3, #4]
|
|
8002c3a: f023 0203 bic.w r2, r3, #3
|
|
8002c3e: 687b ldr r3, [r7, #4]
|
|
8002c40: 685b ldr r3, [r3, #4]
|
|
8002c42: 4936 ldr r1, [pc, #216] ; (8002d1c <HAL_RCC_ClockConfig+0x1c4>)
|
|
8002c44: 4313 orrs r3, r2
|
|
8002c46: 604b str r3, [r1, #4]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8002c48: f7fe fa2c bl 80010a4 <HAL_GetTick>
|
|
8002c4c: 60f8 str r0, [r7, #12]
|
|
|
|
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
|
|
8002c4e: e00a b.n 8002c66 <HAL_RCC_ClockConfig+0x10e>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
|
|
8002c50: f7fe fa28 bl 80010a4 <HAL_GetTick>
|
|
8002c54: 4602 mov r2, r0
|
|
8002c56: 68fb ldr r3, [r7, #12]
|
|
8002c58: 1ad3 subs r3, r2, r3
|
|
8002c5a: f241 3288 movw r2, #5000 ; 0x1388
|
|
8002c5e: 4293 cmp r3, r2
|
|
8002c60: d901 bls.n 8002c66 <HAL_RCC_ClockConfig+0x10e>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8002c62: 2303 movs r3, #3
|
|
8002c64: e053 b.n 8002d0e <HAL_RCC_ClockConfig+0x1b6>
|
|
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
|
|
8002c66: 4b2d ldr r3, [pc, #180] ; (8002d1c <HAL_RCC_ClockConfig+0x1c4>)
|
|
8002c68: 685b ldr r3, [r3, #4]
|
|
8002c6a: f003 020c and.w r2, r3, #12
|
|
8002c6e: 687b ldr r3, [r7, #4]
|
|
8002c70: 685b ldr r3, [r3, #4]
|
|
8002c72: 009b lsls r3, r3, #2
|
|
8002c74: 429a cmp r2, r3
|
|
8002c76: d1eb bne.n 8002c50 <HAL_RCC_ClockConfig+0xf8>
|
|
}
|
|
}
|
|
|
|
#if defined(FLASH_ACR_LATENCY)
|
|
/* Decreasing the number of wait states because of lower CPU frequency */
|
|
if (FLatency < __HAL_FLASH_GET_LATENCY())
|
|
8002c78: 4b27 ldr r3, [pc, #156] ; (8002d18 <HAL_RCC_ClockConfig+0x1c0>)
|
|
8002c7a: 681b ldr r3, [r3, #0]
|
|
8002c7c: f003 0307 and.w r3, r3, #7
|
|
8002c80: 683a ldr r2, [r7, #0]
|
|
8002c82: 429a cmp r2, r3
|
|
8002c84: d210 bcs.n 8002ca8 <HAL_RCC_ClockConfig+0x150>
|
|
{
|
|
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
|
__HAL_FLASH_SET_LATENCY(FLatency);
|
|
8002c86: 4b24 ldr r3, [pc, #144] ; (8002d18 <HAL_RCC_ClockConfig+0x1c0>)
|
|
8002c88: 681b ldr r3, [r3, #0]
|
|
8002c8a: f023 0207 bic.w r2, r3, #7
|
|
8002c8e: 4922 ldr r1, [pc, #136] ; (8002d18 <HAL_RCC_ClockConfig+0x1c0>)
|
|
8002c90: 683b ldr r3, [r7, #0]
|
|
8002c92: 4313 orrs r3, r2
|
|
8002c94: 600b str r3, [r1, #0]
|
|
|
|
/* Check that the new number of wait states is taken into account to access the Flash
|
|
memory by reading the FLASH_ACR register */
|
|
if (__HAL_FLASH_GET_LATENCY() != FLatency)
|
|
8002c96: 4b20 ldr r3, [pc, #128] ; (8002d18 <HAL_RCC_ClockConfig+0x1c0>)
|
|
8002c98: 681b ldr r3, [r3, #0]
|
|
8002c9a: f003 0307 and.w r3, r3, #7
|
|
8002c9e: 683a ldr r2, [r7, #0]
|
|
8002ca0: 429a cmp r2, r3
|
|
8002ca2: d001 beq.n 8002ca8 <HAL_RCC_ClockConfig+0x150>
|
|
{
|
|
return HAL_ERROR;
|
|
8002ca4: 2301 movs r3, #1
|
|
8002ca6: e032 b.n 8002d0e <HAL_RCC_ClockConfig+0x1b6>
|
|
}
|
|
}
|
|
#endif /* FLASH_ACR_LATENCY */
|
|
|
|
/*-------------------------- PCLK1 Configuration ---------------------------*/
|
|
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
|
|
8002ca8: 687b ldr r3, [r7, #4]
|
|
8002caa: 681b ldr r3, [r3, #0]
|
|
8002cac: f003 0304 and.w r3, r3, #4
|
|
8002cb0: 2b00 cmp r3, #0
|
|
8002cb2: d008 beq.n 8002cc6 <HAL_RCC_ClockConfig+0x16e>
|
|
{
|
|
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
|
|
8002cb4: 4b19 ldr r3, [pc, #100] ; (8002d1c <HAL_RCC_ClockConfig+0x1c4>)
|
|
8002cb6: 685b ldr r3, [r3, #4]
|
|
8002cb8: f423 62e0 bic.w r2, r3, #1792 ; 0x700
|
|
8002cbc: 687b ldr r3, [r7, #4]
|
|
8002cbe: 68db ldr r3, [r3, #12]
|
|
8002cc0: 4916 ldr r1, [pc, #88] ; (8002d1c <HAL_RCC_ClockConfig+0x1c4>)
|
|
8002cc2: 4313 orrs r3, r2
|
|
8002cc4: 604b str r3, [r1, #4]
|
|
}
|
|
|
|
/*-------------------------- PCLK2 Configuration ---------------------------*/
|
|
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
|
|
8002cc6: 687b ldr r3, [r7, #4]
|
|
8002cc8: 681b ldr r3, [r3, #0]
|
|
8002cca: f003 0308 and.w r3, r3, #8
|
|
8002cce: 2b00 cmp r3, #0
|
|
8002cd0: d009 beq.n 8002ce6 <HAL_RCC_ClockConfig+0x18e>
|
|
{
|
|
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
|
|
8002cd2: 4b12 ldr r3, [pc, #72] ; (8002d1c <HAL_RCC_ClockConfig+0x1c4>)
|
|
8002cd4: 685b ldr r3, [r3, #4]
|
|
8002cd6: f423 5260 bic.w r2, r3, #14336 ; 0x3800
|
|
8002cda: 687b ldr r3, [r7, #4]
|
|
8002cdc: 691b ldr r3, [r3, #16]
|
|
8002cde: 00db lsls r3, r3, #3
|
|
8002ce0: 490e ldr r1, [pc, #56] ; (8002d1c <HAL_RCC_ClockConfig+0x1c4>)
|
|
8002ce2: 4313 orrs r3, r2
|
|
8002ce4: 604b str r3, [r1, #4]
|
|
}
|
|
|
|
/* Update the SystemCoreClock global variable */
|
|
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
|
|
8002ce6: f000 f821 bl 8002d2c <HAL_RCC_GetSysClockFreq>
|
|
8002cea: 4601 mov r1, r0
|
|
8002cec: 4b0b ldr r3, [pc, #44] ; (8002d1c <HAL_RCC_ClockConfig+0x1c4>)
|
|
8002cee: 685b ldr r3, [r3, #4]
|
|
8002cf0: 091b lsrs r3, r3, #4
|
|
8002cf2: f003 030f and.w r3, r3, #15
|
|
8002cf6: 4a0a ldr r2, [pc, #40] ; (8002d20 <HAL_RCC_ClockConfig+0x1c8>)
|
|
8002cf8: 5cd3 ldrb r3, [r2, r3]
|
|
8002cfa: fa21 f303 lsr.w r3, r1, r3
|
|
8002cfe: 4a09 ldr r2, [pc, #36] ; (8002d24 <HAL_RCC_ClockConfig+0x1cc>)
|
|
8002d00: 6013 str r3, [r2, #0]
|
|
|
|
/* Configure the source of time base considering new system clocks settings*/
|
|
HAL_InitTick(uwTickPrio);
|
|
8002d02: 4b09 ldr r3, [pc, #36] ; (8002d28 <HAL_RCC_ClockConfig+0x1d0>)
|
|
8002d04: 681b ldr r3, [r3, #0]
|
|
8002d06: 4618 mov r0, r3
|
|
8002d08: f7fe f98a bl 8001020 <HAL_InitTick>
|
|
|
|
return HAL_OK;
|
|
8002d0c: 2300 movs r3, #0
|
|
}
|
|
8002d0e: 4618 mov r0, r3
|
|
8002d10: 3710 adds r7, #16
|
|
8002d12: 46bd mov sp, r7
|
|
8002d14: bd80 pop {r7, pc}
|
|
8002d16: bf00 nop
|
|
8002d18: 40022000 .word 0x40022000
|
|
8002d1c: 40021000 .word 0x40021000
|
|
8002d20: 0800f008 .word 0x0800f008
|
|
8002d24: 20000140 .word 0x20000140
|
|
8002d28: 20000000 .word 0x20000000
|
|
|
|
08002d2c <HAL_RCC_GetSysClockFreq>:
|
|
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
|
|
*
|
|
* @retval SYSCLK frequency
|
|
*/
|
|
uint32_t HAL_RCC_GetSysClockFreq(void)
|
|
{
|
|
8002d2c: b490 push {r4, r7}
|
|
8002d2e: b08a sub sp, #40 ; 0x28
|
|
8002d30: af00 add r7, sp, #0
|
|
#if defined(RCC_CFGR2_PREDIV1SRC)
|
|
const uint8_t aPLLMULFactorTable[14] = {0, 0, 4, 5, 6, 7, 8, 9, 0, 0, 0, 0, 0, 13};
|
|
const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};
|
|
#else
|
|
const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
|
|
8002d32: 4b2a ldr r3, [pc, #168] ; (8002ddc <HAL_RCC_GetSysClockFreq+0xb0>)
|
|
8002d34: 1d3c adds r4, r7, #4
|
|
8002d36: cb0f ldmia r3, {r0, r1, r2, r3}
|
|
8002d38: e884 000f stmia.w r4, {r0, r1, r2, r3}
|
|
#if defined(RCC_CFGR2_PREDIV1)
|
|
const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};
|
|
#else
|
|
const uint8_t aPredivFactorTable[2] = {1, 2};
|
|
8002d3c: 4b28 ldr r3, [pc, #160] ; (8002de0 <HAL_RCC_GetSysClockFreq+0xb4>)
|
|
8002d3e: 881b ldrh r3, [r3, #0]
|
|
8002d40: 803b strh r3, [r7, #0]
|
|
#endif /*RCC_CFGR2_PREDIV1*/
|
|
|
|
#endif
|
|
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
|
|
8002d42: 2300 movs r3, #0
|
|
8002d44: 61fb str r3, [r7, #28]
|
|
8002d46: 2300 movs r3, #0
|
|
8002d48: 61bb str r3, [r7, #24]
|
|
8002d4a: 2300 movs r3, #0
|
|
8002d4c: 627b str r3, [r7, #36] ; 0x24
|
|
8002d4e: 2300 movs r3, #0
|
|
8002d50: 617b str r3, [r7, #20]
|
|
uint32_t sysclockfreq = 0U;
|
|
8002d52: 2300 movs r3, #0
|
|
8002d54: 623b str r3, [r7, #32]
|
|
#if defined(RCC_CFGR2_PREDIV1SRC)
|
|
uint32_t prediv2 = 0U, pll2mul = 0U;
|
|
#endif /*RCC_CFGR2_PREDIV1SRC*/
|
|
|
|
tmpreg = RCC->CFGR;
|
|
8002d56: 4b23 ldr r3, [pc, #140] ; (8002de4 <HAL_RCC_GetSysClockFreq+0xb8>)
|
|
8002d58: 685b ldr r3, [r3, #4]
|
|
8002d5a: 61fb str r3, [r7, #28]
|
|
|
|
/* Get SYSCLK source -------------------------------------------------------*/
|
|
switch (tmpreg & RCC_CFGR_SWS)
|
|
8002d5c: 69fb ldr r3, [r7, #28]
|
|
8002d5e: f003 030c and.w r3, r3, #12
|
|
8002d62: 2b04 cmp r3, #4
|
|
8002d64: d002 beq.n 8002d6c <HAL_RCC_GetSysClockFreq+0x40>
|
|
8002d66: 2b08 cmp r3, #8
|
|
8002d68: d003 beq.n 8002d72 <HAL_RCC_GetSysClockFreq+0x46>
|
|
8002d6a: e02d b.n 8002dc8 <HAL_RCC_GetSysClockFreq+0x9c>
|
|
{
|
|
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
|
|
{
|
|
sysclockfreq = HSE_VALUE;
|
|
8002d6c: 4b1e ldr r3, [pc, #120] ; (8002de8 <HAL_RCC_GetSysClockFreq+0xbc>)
|
|
8002d6e: 623b str r3, [r7, #32]
|
|
break;
|
|
8002d70: e02d b.n 8002dce <HAL_RCC_GetSysClockFreq+0xa2>
|
|
}
|
|
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
|
|
{
|
|
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
|
|
8002d72: 69fb ldr r3, [r7, #28]
|
|
8002d74: 0c9b lsrs r3, r3, #18
|
|
8002d76: f003 030f and.w r3, r3, #15
|
|
8002d7a: f107 0228 add.w r2, r7, #40 ; 0x28
|
|
8002d7e: 4413 add r3, r2
|
|
8002d80: f813 3c24 ldrb.w r3, [r3, #-36]
|
|
8002d84: 617b str r3, [r7, #20]
|
|
if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
|
|
8002d86: 69fb ldr r3, [r7, #28]
|
|
8002d88: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
|
8002d8c: 2b00 cmp r3, #0
|
|
8002d8e: d013 beq.n 8002db8 <HAL_RCC_GetSysClockFreq+0x8c>
|
|
{
|
|
#if defined(RCC_CFGR2_PREDIV1)
|
|
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
|
|
#else
|
|
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
|
|
8002d90: 4b14 ldr r3, [pc, #80] ; (8002de4 <HAL_RCC_GetSysClockFreq+0xb8>)
|
|
8002d92: 685b ldr r3, [r3, #4]
|
|
8002d94: 0c5b lsrs r3, r3, #17
|
|
8002d96: f003 0301 and.w r3, r3, #1
|
|
8002d9a: f107 0228 add.w r2, r7, #40 ; 0x28
|
|
8002d9e: 4413 add r3, r2
|
|
8002da0: f813 3c28 ldrb.w r3, [r3, #-40]
|
|
8002da4: 61bb str r3, [r7, #24]
|
|
{
|
|
pllclk = pllclk / 2;
|
|
}
|
|
#else
|
|
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
|
|
pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
|
|
8002da6: 697b ldr r3, [r7, #20]
|
|
8002da8: 4a0f ldr r2, [pc, #60] ; (8002de8 <HAL_RCC_GetSysClockFreq+0xbc>)
|
|
8002daa: fb02 f203 mul.w r2, r2, r3
|
|
8002dae: 69bb ldr r3, [r7, #24]
|
|
8002db0: fbb2 f3f3 udiv r3, r2, r3
|
|
8002db4: 627b str r3, [r7, #36] ; 0x24
|
|
8002db6: e004 b.n 8002dc2 <HAL_RCC_GetSysClockFreq+0x96>
|
|
#endif /*RCC_CFGR2_PREDIV1SRC*/
|
|
}
|
|
else
|
|
{
|
|
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
|
|
pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
|
|
8002db8: 697b ldr r3, [r7, #20]
|
|
8002dba: 4a0c ldr r2, [pc, #48] ; (8002dec <HAL_RCC_GetSysClockFreq+0xc0>)
|
|
8002dbc: fb02 f303 mul.w r3, r2, r3
|
|
8002dc0: 627b str r3, [r7, #36] ; 0x24
|
|
}
|
|
sysclockfreq = pllclk;
|
|
8002dc2: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8002dc4: 623b str r3, [r7, #32]
|
|
break;
|
|
8002dc6: e002 b.n 8002dce <HAL_RCC_GetSysClockFreq+0xa2>
|
|
}
|
|
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
|
|
default: /* HSI used as system clock */
|
|
{
|
|
sysclockfreq = HSI_VALUE;
|
|
8002dc8: 4b07 ldr r3, [pc, #28] ; (8002de8 <HAL_RCC_GetSysClockFreq+0xbc>)
|
|
8002dca: 623b str r3, [r7, #32]
|
|
break;
|
|
8002dcc: bf00 nop
|
|
}
|
|
}
|
|
return sysclockfreq;
|
|
8002dce: 6a3b ldr r3, [r7, #32]
|
|
}
|
|
8002dd0: 4618 mov r0, r3
|
|
8002dd2: 3728 adds r7, #40 ; 0x28
|
|
8002dd4: 46bd mov sp, r7
|
|
8002dd6: bc90 pop {r4, r7}
|
|
8002dd8: 4770 bx lr
|
|
8002dda: bf00 nop
|
|
8002ddc: 0800c640 .word 0x0800c640
|
|
8002de0: 0800c650 .word 0x0800c650
|
|
8002de4: 40021000 .word 0x40021000
|
|
8002de8: 007a1200 .word 0x007a1200
|
|
8002dec: 003d0900 .word 0x003d0900
|
|
|
|
08002df0 <HAL_RCC_GetHCLKFreq>:
|
|
* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
|
|
* and updated within this function
|
|
* @retval HCLK frequency
|
|
*/
|
|
uint32_t HAL_RCC_GetHCLKFreq(void)
|
|
{
|
|
8002df0: b480 push {r7}
|
|
8002df2: af00 add r7, sp, #0
|
|
return SystemCoreClock;
|
|
8002df4: 4b02 ldr r3, [pc, #8] ; (8002e00 <HAL_RCC_GetHCLKFreq+0x10>)
|
|
8002df6: 681b ldr r3, [r3, #0]
|
|
}
|
|
8002df8: 4618 mov r0, r3
|
|
8002dfa: 46bd mov sp, r7
|
|
8002dfc: bc80 pop {r7}
|
|
8002dfe: 4770 bx lr
|
|
8002e00: 20000140 .word 0x20000140
|
|
|
|
08002e04 <HAL_RCC_GetPCLK1Freq>:
|
|
* @note Each time PCLK1 changes, this function must be called to update the
|
|
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
|
|
* @retval PCLK1 frequency
|
|
*/
|
|
uint32_t HAL_RCC_GetPCLK1Freq(void)
|
|
{
|
|
8002e04: b580 push {r7, lr}
|
|
8002e06: af00 add r7, sp, #0
|
|
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
|
|
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
|
|
8002e08: f7ff fff2 bl 8002df0 <HAL_RCC_GetHCLKFreq>
|
|
8002e0c: 4601 mov r1, r0
|
|
8002e0e: 4b05 ldr r3, [pc, #20] ; (8002e24 <HAL_RCC_GetPCLK1Freq+0x20>)
|
|
8002e10: 685b ldr r3, [r3, #4]
|
|
8002e12: 0a1b lsrs r3, r3, #8
|
|
8002e14: f003 0307 and.w r3, r3, #7
|
|
8002e18: 4a03 ldr r2, [pc, #12] ; (8002e28 <HAL_RCC_GetPCLK1Freq+0x24>)
|
|
8002e1a: 5cd3 ldrb r3, [r2, r3]
|
|
8002e1c: fa21 f303 lsr.w r3, r1, r3
|
|
}
|
|
8002e20: 4618 mov r0, r3
|
|
8002e22: bd80 pop {r7, pc}
|
|
8002e24: 40021000 .word 0x40021000
|
|
8002e28: 0800f018 .word 0x0800f018
|
|
|
|
08002e2c <HAL_RCC_GetPCLK2Freq>:
|
|
* @note Each time PCLK2 changes, this function must be called to update the
|
|
* right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
|
|
* @retval PCLK2 frequency
|
|
*/
|
|
uint32_t HAL_RCC_GetPCLK2Freq(void)
|
|
{
|
|
8002e2c: b580 push {r7, lr}
|
|
8002e2e: af00 add r7, sp, #0
|
|
/* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
|
|
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
|
|
8002e30: f7ff ffde bl 8002df0 <HAL_RCC_GetHCLKFreq>
|
|
8002e34: 4601 mov r1, r0
|
|
8002e36: 4b05 ldr r3, [pc, #20] ; (8002e4c <HAL_RCC_GetPCLK2Freq+0x20>)
|
|
8002e38: 685b ldr r3, [r3, #4]
|
|
8002e3a: 0adb lsrs r3, r3, #11
|
|
8002e3c: f003 0307 and.w r3, r3, #7
|
|
8002e40: 4a03 ldr r2, [pc, #12] ; (8002e50 <HAL_RCC_GetPCLK2Freq+0x24>)
|
|
8002e42: 5cd3 ldrb r3, [r2, r3]
|
|
8002e44: fa21 f303 lsr.w r3, r1, r3
|
|
}
|
|
8002e48: 4618 mov r0, r3
|
|
8002e4a: bd80 pop {r7, pc}
|
|
8002e4c: 40021000 .word 0x40021000
|
|
8002e50: 0800f018 .word 0x0800f018
|
|
|
|
08002e54 <RCC_Delay>:
|
|
* @brief This function provides delay (in milliseconds) based on CPU cycles method.
|
|
* @param mdelay: specifies the delay time length, in milliseconds.
|
|
* @retval None
|
|
*/
|
|
static void RCC_Delay(uint32_t mdelay)
|
|
{
|
|
8002e54: b480 push {r7}
|
|
8002e56: b085 sub sp, #20
|
|
8002e58: af00 add r7, sp, #0
|
|
8002e5a: 6078 str r0, [r7, #4]
|
|
__IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
|
|
8002e5c: 4b0a ldr r3, [pc, #40] ; (8002e88 <RCC_Delay+0x34>)
|
|
8002e5e: 681b ldr r3, [r3, #0]
|
|
8002e60: 4a0a ldr r2, [pc, #40] ; (8002e8c <RCC_Delay+0x38>)
|
|
8002e62: fba2 2303 umull r2, r3, r2, r3
|
|
8002e66: 0a5b lsrs r3, r3, #9
|
|
8002e68: 687a ldr r2, [r7, #4]
|
|
8002e6a: fb02 f303 mul.w r3, r2, r3
|
|
8002e6e: 60fb str r3, [r7, #12]
|
|
do
|
|
{
|
|
__NOP();
|
|
8002e70: bf00 nop
|
|
}
|
|
while (Delay --);
|
|
8002e72: 68fb ldr r3, [r7, #12]
|
|
8002e74: 1e5a subs r2, r3, #1
|
|
8002e76: 60fa str r2, [r7, #12]
|
|
8002e78: 2b00 cmp r3, #0
|
|
8002e7a: d1f9 bne.n 8002e70 <RCC_Delay+0x1c>
|
|
}
|
|
8002e7c: bf00 nop
|
|
8002e7e: 3714 adds r7, #20
|
|
8002e80: 46bd mov sp, r7
|
|
8002e82: bc80 pop {r7}
|
|
8002e84: 4770 bx lr
|
|
8002e86: bf00 nop
|
|
8002e88: 20000140 .word 0x20000140
|
|
8002e8c: 10624dd3 .word 0x10624dd3
|
|
|
|
08002e90 <HAL_RCCEx_PeriphCLKConfig>:
|
|
* manually disable it.
|
|
*
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
|
|
{
|
|
8002e90: b580 push {r7, lr}
|
|
8002e92: b086 sub sp, #24
|
|
8002e94: af00 add r7, sp, #0
|
|
8002e96: 6078 str r0, [r7, #4]
|
|
uint32_t tickstart = 0U, temp_reg = 0U;
|
|
8002e98: 2300 movs r3, #0
|
|
8002e9a: 613b str r3, [r7, #16]
|
|
8002e9c: 2300 movs r3, #0
|
|
8002e9e: 60fb str r3, [r7, #12]
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
|
|
|
|
/*------------------------------- RTC/LCD Configuration ------------------------*/
|
|
if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
|
|
8002ea0: 687b ldr r3, [r7, #4]
|
|
8002ea2: 681b ldr r3, [r3, #0]
|
|
8002ea4: f003 0301 and.w r3, r3, #1
|
|
8002ea8: 2b00 cmp r3, #0
|
|
8002eaa: d07d beq.n 8002fa8 <HAL_RCCEx_PeriphCLKConfig+0x118>
|
|
{
|
|
/* check for RTC Parameters used to output RTCCLK */
|
|
assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
|
|
|
|
FlagStatus pwrclkchanged = RESET;
|
|
8002eac: 2300 movs r3, #0
|
|
8002eae: 75fb strb r3, [r7, #23]
|
|
|
|
/* As soon as function is called to change RTC clock source, activation of the
|
|
power domain is done. */
|
|
/* Requires to enable write access to Backup Domain of necessary */
|
|
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
|
|
8002eb0: 4b4f ldr r3, [pc, #316] ; (8002ff0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8002eb2: 69db ldr r3, [r3, #28]
|
|
8002eb4: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
|
8002eb8: 2b00 cmp r3, #0
|
|
8002eba: d10d bne.n 8002ed8 <HAL_RCCEx_PeriphCLKConfig+0x48>
|
|
{
|
|
__HAL_RCC_PWR_CLK_ENABLE();
|
|
8002ebc: 4b4c ldr r3, [pc, #304] ; (8002ff0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8002ebe: 69db ldr r3, [r3, #28]
|
|
8002ec0: 4a4b ldr r2, [pc, #300] ; (8002ff0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8002ec2: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
|
|
8002ec6: 61d3 str r3, [r2, #28]
|
|
8002ec8: 4b49 ldr r3, [pc, #292] ; (8002ff0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8002eca: 69db ldr r3, [r3, #28]
|
|
8002ecc: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
|
8002ed0: 60bb str r3, [r7, #8]
|
|
8002ed2: 68bb ldr r3, [r7, #8]
|
|
pwrclkchanged = SET;
|
|
8002ed4: 2301 movs r3, #1
|
|
8002ed6: 75fb strb r3, [r7, #23]
|
|
}
|
|
|
|
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
8002ed8: 4b46 ldr r3, [pc, #280] ; (8002ff4 <HAL_RCCEx_PeriphCLKConfig+0x164>)
|
|
8002eda: 681b ldr r3, [r3, #0]
|
|
8002edc: f403 7380 and.w r3, r3, #256 ; 0x100
|
|
8002ee0: 2b00 cmp r3, #0
|
|
8002ee2: d118 bne.n 8002f16 <HAL_RCCEx_PeriphCLKConfig+0x86>
|
|
{
|
|
/* Enable write access to Backup domain */
|
|
SET_BIT(PWR->CR, PWR_CR_DBP);
|
|
8002ee4: 4b43 ldr r3, [pc, #268] ; (8002ff4 <HAL_RCCEx_PeriphCLKConfig+0x164>)
|
|
8002ee6: 681b ldr r3, [r3, #0]
|
|
8002ee8: 4a42 ldr r2, [pc, #264] ; (8002ff4 <HAL_RCCEx_PeriphCLKConfig+0x164>)
|
|
8002eea: f443 7380 orr.w r3, r3, #256 ; 0x100
|
|
8002eee: 6013 str r3, [r2, #0]
|
|
|
|
/* Wait for Backup domain Write protection disable */
|
|
tickstart = HAL_GetTick();
|
|
8002ef0: f7fe f8d8 bl 80010a4 <HAL_GetTick>
|
|
8002ef4: 6138 str r0, [r7, #16]
|
|
|
|
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
8002ef6: e008 b.n 8002f0a <HAL_RCCEx_PeriphCLKConfig+0x7a>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
|
|
8002ef8: f7fe f8d4 bl 80010a4 <HAL_GetTick>
|
|
8002efc: 4602 mov r2, r0
|
|
8002efe: 693b ldr r3, [r7, #16]
|
|
8002f00: 1ad3 subs r3, r2, r3
|
|
8002f02: 2b64 cmp r3, #100 ; 0x64
|
|
8002f04: d901 bls.n 8002f0a <HAL_RCCEx_PeriphCLKConfig+0x7a>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8002f06: 2303 movs r3, #3
|
|
8002f08: e06d b.n 8002fe6 <HAL_RCCEx_PeriphCLKConfig+0x156>
|
|
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
8002f0a: 4b3a ldr r3, [pc, #232] ; (8002ff4 <HAL_RCCEx_PeriphCLKConfig+0x164>)
|
|
8002f0c: 681b ldr r3, [r3, #0]
|
|
8002f0e: f403 7380 and.w r3, r3, #256 ; 0x100
|
|
8002f12: 2b00 cmp r3, #0
|
|
8002f14: d0f0 beq.n 8002ef8 <HAL_RCCEx_PeriphCLKConfig+0x68>
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
|
|
temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
|
|
8002f16: 4b36 ldr r3, [pc, #216] ; (8002ff0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8002f18: 6a1b ldr r3, [r3, #32]
|
|
8002f1a: f403 7340 and.w r3, r3, #768 ; 0x300
|
|
8002f1e: 60fb str r3, [r7, #12]
|
|
if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
|
|
8002f20: 68fb ldr r3, [r7, #12]
|
|
8002f22: 2b00 cmp r3, #0
|
|
8002f24: d02e beq.n 8002f84 <HAL_RCCEx_PeriphCLKConfig+0xf4>
|
|
8002f26: 687b ldr r3, [r7, #4]
|
|
8002f28: 685b ldr r3, [r3, #4]
|
|
8002f2a: f403 7340 and.w r3, r3, #768 ; 0x300
|
|
8002f2e: 68fa ldr r2, [r7, #12]
|
|
8002f30: 429a cmp r2, r3
|
|
8002f32: d027 beq.n 8002f84 <HAL_RCCEx_PeriphCLKConfig+0xf4>
|
|
{
|
|
/* Store the content of BDCR register before the reset of Backup Domain */
|
|
temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
|
|
8002f34: 4b2e ldr r3, [pc, #184] ; (8002ff0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8002f36: 6a1b ldr r3, [r3, #32]
|
|
8002f38: f423 7340 bic.w r3, r3, #768 ; 0x300
|
|
8002f3c: 60fb str r3, [r7, #12]
|
|
/* RTC Clock selection can be changed only if the Backup Domain is reset */
|
|
__HAL_RCC_BACKUPRESET_FORCE();
|
|
8002f3e: 4b2e ldr r3, [pc, #184] ; (8002ff8 <HAL_RCCEx_PeriphCLKConfig+0x168>)
|
|
8002f40: 2201 movs r2, #1
|
|
8002f42: 601a str r2, [r3, #0]
|
|
__HAL_RCC_BACKUPRESET_RELEASE();
|
|
8002f44: 4b2c ldr r3, [pc, #176] ; (8002ff8 <HAL_RCCEx_PeriphCLKConfig+0x168>)
|
|
8002f46: 2200 movs r2, #0
|
|
8002f48: 601a str r2, [r3, #0]
|
|
/* Restore the Content of BDCR register */
|
|
RCC->BDCR = temp_reg;
|
|
8002f4a: 4a29 ldr r2, [pc, #164] ; (8002ff0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8002f4c: 68fb ldr r3, [r7, #12]
|
|
8002f4e: 6213 str r3, [r2, #32]
|
|
|
|
/* Wait for LSERDY if LSE was enabled */
|
|
if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
|
|
8002f50: 68fb ldr r3, [r7, #12]
|
|
8002f52: f003 0301 and.w r3, r3, #1
|
|
8002f56: 2b00 cmp r3, #0
|
|
8002f58: d014 beq.n 8002f84 <HAL_RCCEx_PeriphCLKConfig+0xf4>
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8002f5a: f7fe f8a3 bl 80010a4 <HAL_GetTick>
|
|
8002f5e: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till LSE is ready */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
|
8002f60: e00a b.n 8002f78 <HAL_RCCEx_PeriphCLKConfig+0xe8>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
|
|
8002f62: f7fe f89f bl 80010a4 <HAL_GetTick>
|
|
8002f66: 4602 mov r2, r0
|
|
8002f68: 693b ldr r3, [r7, #16]
|
|
8002f6a: 1ad3 subs r3, r2, r3
|
|
8002f6c: f241 3288 movw r2, #5000 ; 0x1388
|
|
8002f70: 4293 cmp r3, r2
|
|
8002f72: d901 bls.n 8002f78 <HAL_RCCEx_PeriphCLKConfig+0xe8>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8002f74: 2303 movs r3, #3
|
|
8002f76: e036 b.n 8002fe6 <HAL_RCCEx_PeriphCLKConfig+0x156>
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
|
8002f78: 4b1d ldr r3, [pc, #116] ; (8002ff0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8002f7a: 6a1b ldr r3, [r3, #32]
|
|
8002f7c: f003 0302 and.w r3, r3, #2
|
|
8002f80: 2b00 cmp r3, #0
|
|
8002f82: d0ee beq.n 8002f62 <HAL_RCCEx_PeriphCLKConfig+0xd2>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
|
|
8002f84: 4b1a ldr r3, [pc, #104] ; (8002ff0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8002f86: 6a1b ldr r3, [r3, #32]
|
|
8002f88: f423 7240 bic.w r2, r3, #768 ; 0x300
|
|
8002f8c: 687b ldr r3, [r7, #4]
|
|
8002f8e: 685b ldr r3, [r3, #4]
|
|
8002f90: 4917 ldr r1, [pc, #92] ; (8002ff0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8002f92: 4313 orrs r3, r2
|
|
8002f94: 620b str r3, [r1, #32]
|
|
|
|
/* Require to disable power clock if necessary */
|
|
if (pwrclkchanged == SET)
|
|
8002f96: 7dfb ldrb r3, [r7, #23]
|
|
8002f98: 2b01 cmp r3, #1
|
|
8002f9a: d105 bne.n 8002fa8 <HAL_RCCEx_PeriphCLKConfig+0x118>
|
|
{
|
|
__HAL_RCC_PWR_CLK_DISABLE();
|
|
8002f9c: 4b14 ldr r3, [pc, #80] ; (8002ff0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8002f9e: 69db ldr r3, [r3, #28]
|
|
8002fa0: 4a13 ldr r2, [pc, #76] ; (8002ff0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8002fa2: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
|
|
8002fa6: 61d3 str r3, [r2, #28]
|
|
}
|
|
}
|
|
|
|
/*------------------------------ ADC clock Configuration ------------------*/
|
|
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
|
|
8002fa8: 687b ldr r3, [r7, #4]
|
|
8002faa: 681b ldr r3, [r3, #0]
|
|
8002fac: f003 0302 and.w r3, r3, #2
|
|
8002fb0: 2b00 cmp r3, #0
|
|
8002fb2: d008 beq.n 8002fc6 <HAL_RCCEx_PeriphCLKConfig+0x136>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection));
|
|
|
|
/* Configure the ADC clock source */
|
|
__HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
|
|
8002fb4: 4b0e ldr r3, [pc, #56] ; (8002ff0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8002fb6: 685b ldr r3, [r3, #4]
|
|
8002fb8: f423 4240 bic.w r2, r3, #49152 ; 0xc000
|
|
8002fbc: 687b ldr r3, [r7, #4]
|
|
8002fbe: 689b ldr r3, [r3, #8]
|
|
8002fc0: 490b ldr r1, [pc, #44] ; (8002ff0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8002fc2: 4313 orrs r3, r2
|
|
8002fc4: 604b str r3, [r1, #4]
|
|
|
|
#if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\
|
|
|| defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\
|
|
|| defined(STM32F105xC) || defined(STM32F107xC)
|
|
/*------------------------------ USB clock Configuration ------------------*/
|
|
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
|
|
8002fc6: 687b ldr r3, [r7, #4]
|
|
8002fc8: 681b ldr r3, [r3, #0]
|
|
8002fca: f003 0310 and.w r3, r3, #16
|
|
8002fce: 2b00 cmp r3, #0
|
|
8002fd0: d008 beq.n 8002fe4 <HAL_RCCEx_PeriphCLKConfig+0x154>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection));
|
|
|
|
/* Configure the USB clock source */
|
|
__HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
|
|
8002fd2: 4b07 ldr r3, [pc, #28] ; (8002ff0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8002fd4: 685b ldr r3, [r3, #4]
|
|
8002fd6: f423 0280 bic.w r2, r3, #4194304 ; 0x400000
|
|
8002fda: 687b ldr r3, [r7, #4]
|
|
8002fdc: 68db ldr r3, [r3, #12]
|
|
8002fde: 4904 ldr r1, [pc, #16] ; (8002ff0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8002fe0: 4313 orrs r3, r2
|
|
8002fe2: 604b str r3, [r1, #4]
|
|
}
|
|
#endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
|
|
|
|
return HAL_OK;
|
|
8002fe4: 2300 movs r3, #0
|
|
}
|
|
8002fe6: 4618 mov r0, r3
|
|
8002fe8: 3718 adds r7, #24
|
|
8002fea: 46bd mov sp, r7
|
|
8002fec: bd80 pop {r7, pc}
|
|
8002fee: bf00 nop
|
|
8002ff0: 40021000 .word 0x40021000
|
|
8002ff4: 40007000 .word 0x40007000
|
|
8002ff8: 42420440 .word 0x42420440
|
|
|
|
08002ffc <HAL_RCCEx_GetPeriphCLKFreq>:
|
|
* @arg @ref RCC_PERIPHCLK_USB USB peripheral clock
|
|
@endif
|
|
* @retval Frequency in Hz (0: means that no available frequency for the peripheral)
|
|
*/
|
|
uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk)
|
|
{
|
|
8002ffc: b590 push {r4, r7, lr}
|
|
8002ffe: b08d sub sp, #52 ; 0x34
|
|
8003000: af00 add r7, sp, #0
|
|
8003002: 6078 str r0, [r7, #4]
|
|
uint32_t prediv1 = 0U, pllclk = 0U, pllmul = 0U;
|
|
uint32_t pll2mul = 0U, pll3mul = 0U, prediv2 = 0U;
|
|
#endif /* STM32F105xC || STM32F107xC */
|
|
#if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6) || \
|
|
defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)
|
|
const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
|
|
8003004: 4b55 ldr r3, [pc, #340] ; (800315c <HAL_RCCEx_GetPeriphCLKFreq+0x160>)
|
|
8003006: f107 040c add.w r4, r7, #12
|
|
800300a: cb0f ldmia r3, {r0, r1, r2, r3}
|
|
800300c: e884 000f stmia.w r4, {r0, r1, r2, r3}
|
|
const uint8_t aPredivFactorTable[2] = {1, 2};
|
|
8003010: 4b53 ldr r3, [pc, #332] ; (8003160 <HAL_RCCEx_GetPeriphCLKFreq+0x164>)
|
|
8003012: 881b ldrh r3, [r3, #0]
|
|
8003014: 813b strh r3, [r7, #8]
|
|
|
|
uint32_t prediv1 = 0U, pllclk = 0U, pllmul = 0U;
|
|
8003016: 2300 movs r3, #0
|
|
8003018: 627b str r3, [r7, #36] ; 0x24
|
|
800301a: 2300 movs r3, #0
|
|
800301c: 62fb str r3, [r7, #44] ; 0x2c
|
|
800301e: 2300 movs r3, #0
|
|
8003020: 623b str r3, [r7, #32]
|
|
#endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG */
|
|
uint32_t temp_reg = 0U, frequency = 0U;
|
|
8003022: 2300 movs r3, #0
|
|
8003024: 61fb str r3, [r7, #28]
|
|
8003026: 2300 movs r3, #0
|
|
8003028: 62bb str r3, [r7, #40] ; 0x28
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_PERIPHCLOCK(PeriphClk));
|
|
|
|
switch (PeriphClk)
|
|
800302a: 687b ldr r3, [r7, #4]
|
|
800302c: 2b02 cmp r3, #2
|
|
800302e: d07f beq.n 8003130 <HAL_RCCEx_GetPeriphCLKFreq+0x134>
|
|
8003030: 2b10 cmp r3, #16
|
|
8003032: d002 beq.n 800303a <HAL_RCCEx_GetPeriphCLKFreq+0x3e>
|
|
8003034: 2b01 cmp r3, #1
|
|
8003036: d048 beq.n 80030ca <HAL_RCCEx_GetPeriphCLKFreq+0xce>
|
|
frequency = HAL_RCC_GetPCLK2Freq() / (((__HAL_RCC_GET_ADC_SOURCE() >> RCC_CFGR_ADCPRE_Pos) + 1) * 2);
|
|
break;
|
|
}
|
|
default:
|
|
{
|
|
break;
|
|
8003038: e08b b.n 8003152 <HAL_RCCEx_GetPeriphCLKFreq+0x156>
|
|
temp_reg = RCC->CFGR;
|
|
800303a: 4b4a ldr r3, [pc, #296] ; (8003164 <HAL_RCCEx_GetPeriphCLKFreq+0x168>)
|
|
800303c: 685b ldr r3, [r3, #4]
|
|
800303e: 61fb str r3, [r7, #28]
|
|
if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLON))
|
|
8003040: 4b48 ldr r3, [pc, #288] ; (8003164 <HAL_RCCEx_GetPeriphCLKFreq+0x168>)
|
|
8003042: 681b ldr r3, [r3, #0]
|
|
8003044: f003 7380 and.w r3, r3, #16777216 ; 0x1000000
|
|
8003048: 2b00 cmp r3, #0
|
|
800304a: d07f beq.n 800314c <HAL_RCCEx_GetPeriphCLKFreq+0x150>
|
|
pllmul = aPLLMULFactorTable[(uint32_t)(temp_reg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
|
|
800304c: 69fb ldr r3, [r7, #28]
|
|
800304e: 0c9b lsrs r3, r3, #18
|
|
8003050: f003 030f and.w r3, r3, #15
|
|
8003054: f107 0230 add.w r2, r7, #48 ; 0x30
|
|
8003058: 4413 add r3, r2
|
|
800305a: f813 3c24 ldrb.w r3, [r3, #-36]
|
|
800305e: 623b str r3, [r7, #32]
|
|
if ((temp_reg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
|
|
8003060: 69fb ldr r3, [r7, #28]
|
|
8003062: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
|
8003066: 2b00 cmp r3, #0
|
|
8003068: d018 beq.n 800309c <HAL_RCCEx_GetPeriphCLKFreq+0xa0>
|
|
prediv1 = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
|
|
800306a: 4b3e ldr r3, [pc, #248] ; (8003164 <HAL_RCCEx_GetPeriphCLKFreq+0x168>)
|
|
800306c: 685b ldr r3, [r3, #4]
|
|
800306e: 0c5b lsrs r3, r3, #17
|
|
8003070: f003 0301 and.w r3, r3, #1
|
|
8003074: f107 0230 add.w r2, r7, #48 ; 0x30
|
|
8003078: 4413 add r3, r2
|
|
800307a: f813 3c28 ldrb.w r3, [r3, #-40]
|
|
800307e: 627b str r3, [r7, #36] ; 0x24
|
|
if ((temp_reg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
|
|
8003080: 69fb ldr r3, [r7, #28]
|
|
8003082: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
|
8003086: 2b00 cmp r3, #0
|
|
8003088: d00d beq.n 80030a6 <HAL_RCCEx_GetPeriphCLKFreq+0xaa>
|
|
pllclk = (uint32_t)((HSE_VALUE / prediv1) * pllmul);
|
|
800308a: 4a37 ldr r2, [pc, #220] ; (8003168 <HAL_RCCEx_GetPeriphCLKFreq+0x16c>)
|
|
800308c: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
800308e: fbb2 f2f3 udiv r2, r2, r3
|
|
8003092: 6a3b ldr r3, [r7, #32]
|
|
8003094: fb02 f303 mul.w r3, r2, r3
|
|
8003098: 62fb str r3, [r7, #44] ; 0x2c
|
|
800309a: e004 b.n 80030a6 <HAL_RCCEx_GetPeriphCLKFreq+0xaa>
|
|
pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
|
|
800309c: 6a3b ldr r3, [r7, #32]
|
|
800309e: 4a33 ldr r2, [pc, #204] ; (800316c <HAL_RCCEx_GetPeriphCLKFreq+0x170>)
|
|
80030a0: fb02 f303 mul.w r3, r2, r3
|
|
80030a4: 62fb str r3, [r7, #44] ; 0x2c
|
|
if (__HAL_RCC_GET_USB_SOURCE() == RCC_USBCLKSOURCE_PLL)
|
|
80030a6: 4b2f ldr r3, [pc, #188] ; (8003164 <HAL_RCCEx_GetPeriphCLKFreq+0x168>)
|
|
80030a8: 685b ldr r3, [r3, #4]
|
|
80030aa: f403 0380 and.w r3, r3, #4194304 ; 0x400000
|
|
80030ae: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000
|
|
80030b2: d102 bne.n 80030ba <HAL_RCCEx_GetPeriphCLKFreq+0xbe>
|
|
frequency = pllclk;
|
|
80030b4: 6afb ldr r3, [r7, #44] ; 0x2c
|
|
80030b6: 62bb str r3, [r7, #40] ; 0x28
|
|
break;
|
|
80030b8: e048 b.n 800314c <HAL_RCCEx_GetPeriphCLKFreq+0x150>
|
|
frequency = (pllclk * 2) / 3;
|
|
80030ba: 6afb ldr r3, [r7, #44] ; 0x2c
|
|
80030bc: 005b lsls r3, r3, #1
|
|
80030be: 4a2c ldr r2, [pc, #176] ; (8003170 <HAL_RCCEx_GetPeriphCLKFreq+0x174>)
|
|
80030c0: fba2 2303 umull r2, r3, r2, r3
|
|
80030c4: 085b lsrs r3, r3, #1
|
|
80030c6: 62bb str r3, [r7, #40] ; 0x28
|
|
break;
|
|
80030c8: e040 b.n 800314c <HAL_RCCEx_GetPeriphCLKFreq+0x150>
|
|
temp_reg = RCC->BDCR;
|
|
80030ca: 4b26 ldr r3, [pc, #152] ; (8003164 <HAL_RCCEx_GetPeriphCLKFreq+0x168>)
|
|
80030cc: 6a1b ldr r3, [r3, #32]
|
|
80030ce: 61fb str r3, [r7, #28]
|
|
if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSERDY)))
|
|
80030d0: 69fb ldr r3, [r7, #28]
|
|
80030d2: f403 7340 and.w r3, r3, #768 ; 0x300
|
|
80030d6: f5b3 7f80 cmp.w r3, #256 ; 0x100
|
|
80030da: d108 bne.n 80030ee <HAL_RCCEx_GetPeriphCLKFreq+0xf2>
|
|
80030dc: 69fb ldr r3, [r7, #28]
|
|
80030de: f003 0302 and.w r3, r3, #2
|
|
80030e2: 2b00 cmp r3, #0
|
|
80030e4: d003 beq.n 80030ee <HAL_RCCEx_GetPeriphCLKFreq+0xf2>
|
|
frequency = LSE_VALUE;
|
|
80030e6: f44f 4300 mov.w r3, #32768 ; 0x8000
|
|
80030ea: 62bb str r3, [r7, #40] ; 0x28
|
|
80030ec: e01f b.n 800312e <HAL_RCCEx_GetPeriphCLKFreq+0x132>
|
|
else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY)))
|
|
80030ee: 69fb ldr r3, [r7, #28]
|
|
80030f0: f403 7340 and.w r3, r3, #768 ; 0x300
|
|
80030f4: f5b3 7f00 cmp.w r3, #512 ; 0x200
|
|
80030f8: d109 bne.n 800310e <HAL_RCCEx_GetPeriphCLKFreq+0x112>
|
|
80030fa: 4b1a ldr r3, [pc, #104] ; (8003164 <HAL_RCCEx_GetPeriphCLKFreq+0x168>)
|
|
80030fc: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
80030fe: f003 0302 and.w r3, r3, #2
|
|
8003102: 2b00 cmp r3, #0
|
|
8003104: d003 beq.n 800310e <HAL_RCCEx_GetPeriphCLKFreq+0x112>
|
|
frequency = LSI_VALUE;
|
|
8003106: f649 4340 movw r3, #40000 ; 0x9c40
|
|
800310a: 62bb str r3, [r7, #40] ; 0x28
|
|
800310c: e00f b.n 800312e <HAL_RCCEx_GetPeriphCLKFreq+0x132>
|
|
else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_HSE_DIV128) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)))
|
|
800310e: 69fb ldr r3, [r7, #28]
|
|
8003110: f403 7340 and.w r3, r3, #768 ; 0x300
|
|
8003114: f5b3 7f40 cmp.w r3, #768 ; 0x300
|
|
8003118: d11a bne.n 8003150 <HAL_RCCEx_GetPeriphCLKFreq+0x154>
|
|
800311a: 4b12 ldr r3, [pc, #72] ; (8003164 <HAL_RCCEx_GetPeriphCLKFreq+0x168>)
|
|
800311c: 681b ldr r3, [r3, #0]
|
|
800311e: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
|
8003122: 2b00 cmp r3, #0
|
|
8003124: d014 beq.n 8003150 <HAL_RCCEx_GetPeriphCLKFreq+0x154>
|
|
frequency = HSE_VALUE / 128U;
|
|
8003126: f24f 4324 movw r3, #62500 ; 0xf424
|
|
800312a: 62bb str r3, [r7, #40] ; 0x28
|
|
break;
|
|
800312c: e010 b.n 8003150 <HAL_RCCEx_GetPeriphCLKFreq+0x154>
|
|
800312e: e00f b.n 8003150 <HAL_RCCEx_GetPeriphCLKFreq+0x154>
|
|
frequency = HAL_RCC_GetPCLK2Freq() / (((__HAL_RCC_GET_ADC_SOURCE() >> RCC_CFGR_ADCPRE_Pos) + 1) * 2);
|
|
8003130: f7ff fe7c bl 8002e2c <HAL_RCC_GetPCLK2Freq>
|
|
8003134: 4602 mov r2, r0
|
|
8003136: 4b0b ldr r3, [pc, #44] ; (8003164 <HAL_RCCEx_GetPeriphCLKFreq+0x168>)
|
|
8003138: 685b ldr r3, [r3, #4]
|
|
800313a: 0b9b lsrs r3, r3, #14
|
|
800313c: f003 0303 and.w r3, r3, #3
|
|
8003140: 3301 adds r3, #1
|
|
8003142: 005b lsls r3, r3, #1
|
|
8003144: fbb2 f3f3 udiv r3, r2, r3
|
|
8003148: 62bb str r3, [r7, #40] ; 0x28
|
|
break;
|
|
800314a: e002 b.n 8003152 <HAL_RCCEx_GetPeriphCLKFreq+0x156>
|
|
break;
|
|
800314c: bf00 nop
|
|
800314e: e000 b.n 8003152 <HAL_RCCEx_GetPeriphCLKFreq+0x156>
|
|
break;
|
|
8003150: bf00 nop
|
|
}
|
|
}
|
|
return (frequency);
|
|
8003152: 6abb ldr r3, [r7, #40] ; 0x28
|
|
}
|
|
8003154: 4618 mov r0, r3
|
|
8003156: 3734 adds r7, #52 ; 0x34
|
|
8003158: 46bd mov sp, r7
|
|
800315a: bd90 pop {r4, r7, pc}
|
|
800315c: 0800c654 .word 0x0800c654
|
|
8003160: 0800c664 .word 0x0800c664
|
|
8003164: 40021000 .word 0x40021000
|
|
8003168: 007a1200 .word 0x007a1200
|
|
800316c: 003d0900 .word 0x003d0900
|
|
8003170: aaaaaaab .word 0xaaaaaaab
|
|
|
|
08003174 <HAL_RTC_Init>:
|
|
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
|
|
* the configuration information for RTC.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc)
|
|
{
|
|
8003174: b580 push {r7, lr}
|
|
8003176: b084 sub sp, #16
|
|
8003178: af00 add r7, sp, #0
|
|
800317a: 6078 str r0, [r7, #4]
|
|
uint32_t prescaler = 0U;
|
|
800317c: 2300 movs r3, #0
|
|
800317e: 60fb str r3, [r7, #12]
|
|
/* Check input parameters */
|
|
if (hrtc == NULL)
|
|
8003180: 687b ldr r3, [r7, #4]
|
|
8003182: 2b00 cmp r3, #0
|
|
8003184: d101 bne.n 800318a <HAL_RTC_Init+0x16>
|
|
{
|
|
return HAL_ERROR;
|
|
8003186: 2301 movs r3, #1
|
|
8003188: e084 b.n 8003294 <HAL_RTC_Init+0x120>
|
|
{
|
|
hrtc->MspDeInitCallback = HAL_RTC_MspDeInit;
|
|
}
|
|
}
|
|
#else
|
|
if (hrtc->State == HAL_RTC_STATE_RESET)
|
|
800318a: 687b ldr r3, [r7, #4]
|
|
800318c: 7c5b ldrb r3, [r3, #17]
|
|
800318e: b2db uxtb r3, r3
|
|
8003190: 2b00 cmp r3, #0
|
|
8003192: d105 bne.n 80031a0 <HAL_RTC_Init+0x2c>
|
|
{
|
|
/* Allocate lock resource and initialize it */
|
|
hrtc->Lock = HAL_UNLOCKED;
|
|
8003194: 687b ldr r3, [r7, #4]
|
|
8003196: 2200 movs r2, #0
|
|
8003198: 741a strb r2, [r3, #16]
|
|
|
|
/* Initialize RTC MSP */
|
|
HAL_RTC_MspInit(hrtc);
|
|
800319a: 6878 ldr r0, [r7, #4]
|
|
800319c: f006 ff4c bl 800a038 <HAL_RTC_MspInit>
|
|
}
|
|
#endif /* (USE_HAL_RTC_REGISTER_CALLBACKS) */
|
|
|
|
/* Set RTC state */
|
|
hrtc->State = HAL_RTC_STATE_BUSY;
|
|
80031a0: 687b ldr r3, [r7, #4]
|
|
80031a2: 2202 movs r2, #2
|
|
80031a4: 745a strb r2, [r3, #17]
|
|
|
|
/* Waiting for synchro */
|
|
if (HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
|
|
80031a6: 6878 ldr r0, [r7, #4]
|
|
80031a8: f000 faa0 bl 80036ec <HAL_RTC_WaitForSynchro>
|
|
80031ac: 4603 mov r3, r0
|
|
80031ae: 2b00 cmp r3, #0
|
|
80031b0: d004 beq.n 80031bc <HAL_RTC_Init+0x48>
|
|
{
|
|
/* Set RTC state */
|
|
hrtc->State = HAL_RTC_STATE_ERROR;
|
|
80031b2: 687b ldr r3, [r7, #4]
|
|
80031b4: 2204 movs r2, #4
|
|
80031b6: 745a strb r2, [r3, #17]
|
|
|
|
return HAL_ERROR;
|
|
80031b8: 2301 movs r3, #1
|
|
80031ba: e06b b.n 8003294 <HAL_RTC_Init+0x120>
|
|
}
|
|
|
|
/* Set Initialization mode */
|
|
if (RTC_EnterInitMode(hrtc) != HAL_OK)
|
|
80031bc: 6878 ldr r0, [r7, #4]
|
|
80031be: f000 fb59 bl 8003874 <RTC_EnterInitMode>
|
|
80031c2: 4603 mov r3, r0
|
|
80031c4: 2b00 cmp r3, #0
|
|
80031c6: d004 beq.n 80031d2 <HAL_RTC_Init+0x5e>
|
|
{
|
|
/* Set RTC state */
|
|
hrtc->State = HAL_RTC_STATE_ERROR;
|
|
80031c8: 687b ldr r3, [r7, #4]
|
|
80031ca: 2204 movs r2, #4
|
|
80031cc: 745a strb r2, [r3, #17]
|
|
|
|
return HAL_ERROR;
|
|
80031ce: 2301 movs r3, #1
|
|
80031d0: e060 b.n 8003294 <HAL_RTC_Init+0x120>
|
|
}
|
|
else
|
|
{
|
|
/* Clear Flags Bits */
|
|
CLEAR_BIT(hrtc->Instance->CRL, (RTC_FLAG_OW | RTC_FLAG_ALRAF | RTC_FLAG_SEC));
|
|
80031d2: 687b ldr r3, [r7, #4]
|
|
80031d4: 681b ldr r3, [r3, #0]
|
|
80031d6: 685a ldr r2, [r3, #4]
|
|
80031d8: 687b ldr r3, [r7, #4]
|
|
80031da: 681b ldr r3, [r3, #0]
|
|
80031dc: f022 0207 bic.w r2, r2, #7
|
|
80031e0: 605a str r2, [r3, #4]
|
|
|
|
if (hrtc->Init.OutPut != RTC_OUTPUTSOURCE_NONE)
|
|
80031e2: 687b ldr r3, [r7, #4]
|
|
80031e4: 689b ldr r3, [r3, #8]
|
|
80031e6: 2b00 cmp r3, #0
|
|
80031e8: d005 beq.n 80031f6 <HAL_RTC_Init+0x82>
|
|
{
|
|
/* Disable the selected Tamper pin */
|
|
CLEAR_BIT(BKP->CR, BKP_CR_TPE);
|
|
80031ea: 4b2c ldr r3, [pc, #176] ; (800329c <HAL_RTC_Init+0x128>)
|
|
80031ec: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
80031ee: 4a2b ldr r2, [pc, #172] ; (800329c <HAL_RTC_Init+0x128>)
|
|
80031f0: f023 0301 bic.w r3, r3, #1
|
|
80031f4: 6313 str r3, [r2, #48] ; 0x30
|
|
}
|
|
|
|
/* Set the signal which will be routed to RTC Tamper pin*/
|
|
MODIFY_REG(BKP->RTCCR, (BKP_RTCCR_CCO | BKP_RTCCR_ASOE | BKP_RTCCR_ASOS), hrtc->Init.OutPut);
|
|
80031f6: 4b29 ldr r3, [pc, #164] ; (800329c <HAL_RTC_Init+0x128>)
|
|
80031f8: 6adb ldr r3, [r3, #44] ; 0x2c
|
|
80031fa: f423 7260 bic.w r2, r3, #896 ; 0x380
|
|
80031fe: 687b ldr r3, [r7, #4]
|
|
8003200: 689b ldr r3, [r3, #8]
|
|
8003202: 4926 ldr r1, [pc, #152] ; (800329c <HAL_RTC_Init+0x128>)
|
|
8003204: 4313 orrs r3, r2
|
|
8003206: 62cb str r3, [r1, #44] ; 0x2c
|
|
|
|
if (hrtc->Init.AsynchPrediv != RTC_AUTO_1_SECOND)
|
|
8003208: 687b ldr r3, [r7, #4]
|
|
800320a: 685b ldr r3, [r3, #4]
|
|
800320c: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
|
8003210: d003 beq.n 800321a <HAL_RTC_Init+0xa6>
|
|
{
|
|
/* RTC Prescaler provided directly by end-user*/
|
|
prescaler = hrtc->Init.AsynchPrediv;
|
|
8003212: 687b ldr r3, [r7, #4]
|
|
8003214: 685b ldr r3, [r3, #4]
|
|
8003216: 60fb str r3, [r7, #12]
|
|
8003218: e00e b.n 8003238 <HAL_RTC_Init+0xc4>
|
|
}
|
|
else
|
|
{
|
|
/* RTC Prescaler will be automatically calculated to get 1 second timebase */
|
|
/* Get the RTCCLK frequency */
|
|
prescaler = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_RTC);
|
|
800321a: 2001 movs r0, #1
|
|
800321c: f7ff feee bl 8002ffc <HAL_RCCEx_GetPeriphCLKFreq>
|
|
8003220: 60f8 str r0, [r7, #12]
|
|
|
|
/* Check that RTC clock is enabled*/
|
|
if (prescaler == 0U)
|
|
8003222: 68fb ldr r3, [r7, #12]
|
|
8003224: 2b00 cmp r3, #0
|
|
8003226: d104 bne.n 8003232 <HAL_RTC_Init+0xbe>
|
|
{
|
|
/* Should not happen. Frequency is not available*/
|
|
hrtc->State = HAL_RTC_STATE_ERROR;
|
|
8003228: 687b ldr r3, [r7, #4]
|
|
800322a: 2204 movs r2, #4
|
|
800322c: 745a strb r2, [r3, #17]
|
|
return HAL_ERROR;
|
|
800322e: 2301 movs r3, #1
|
|
8003230: e030 b.n 8003294 <HAL_RTC_Init+0x120>
|
|
}
|
|
else
|
|
{
|
|
/* RTC period = RTCCLK/(RTC_PR + 1) */
|
|
prescaler = prescaler - 1U;
|
|
8003232: 68fb ldr r3, [r7, #12]
|
|
8003234: 3b01 subs r3, #1
|
|
8003236: 60fb str r3, [r7, #12]
|
|
}
|
|
}
|
|
|
|
/* Configure the RTC_PRLH / RTC_PRLL */
|
|
MODIFY_REG(hrtc->Instance->PRLH, RTC_PRLH_PRL, (prescaler >> 16U));
|
|
8003238: 687b ldr r3, [r7, #4]
|
|
800323a: 681b ldr r3, [r3, #0]
|
|
800323c: 689b ldr r3, [r3, #8]
|
|
800323e: f023 010f bic.w r1, r3, #15
|
|
8003242: 68fb ldr r3, [r7, #12]
|
|
8003244: 0c1a lsrs r2, r3, #16
|
|
8003246: 687b ldr r3, [r7, #4]
|
|
8003248: 681b ldr r3, [r3, #0]
|
|
800324a: 430a orrs r2, r1
|
|
800324c: 609a str r2, [r3, #8]
|
|
MODIFY_REG(hrtc->Instance->PRLL, RTC_PRLL_PRL, (prescaler & RTC_PRLL_PRL));
|
|
800324e: 687b ldr r3, [r7, #4]
|
|
8003250: 681b ldr r3, [r3, #0]
|
|
8003252: 68db ldr r3, [r3, #12]
|
|
8003254: 0c1b lsrs r3, r3, #16
|
|
8003256: 041b lsls r3, r3, #16
|
|
8003258: 68fa ldr r2, [r7, #12]
|
|
800325a: b291 uxth r1, r2
|
|
800325c: 687a ldr r2, [r7, #4]
|
|
800325e: 6812 ldr r2, [r2, #0]
|
|
8003260: 430b orrs r3, r1
|
|
8003262: 60d3 str r3, [r2, #12]
|
|
|
|
/* Wait for synchro */
|
|
if (RTC_ExitInitMode(hrtc) != HAL_OK)
|
|
8003264: 6878 ldr r0, [r7, #4]
|
|
8003266: f000 fb2d bl 80038c4 <RTC_ExitInitMode>
|
|
800326a: 4603 mov r3, r0
|
|
800326c: 2b00 cmp r3, #0
|
|
800326e: d004 beq.n 800327a <HAL_RTC_Init+0x106>
|
|
{
|
|
hrtc->State = HAL_RTC_STATE_ERROR;
|
|
8003270: 687b ldr r3, [r7, #4]
|
|
8003272: 2204 movs r2, #4
|
|
8003274: 745a strb r2, [r3, #17]
|
|
|
|
return HAL_ERROR;
|
|
8003276: 2301 movs r3, #1
|
|
8003278: e00c b.n 8003294 <HAL_RTC_Init+0x120>
|
|
}
|
|
|
|
/* Initialize date to 1st of January 2000 */
|
|
hrtc->DateToUpdate.Year = 0x00U;
|
|
800327a: 687b ldr r3, [r7, #4]
|
|
800327c: 2200 movs r2, #0
|
|
800327e: 73da strb r2, [r3, #15]
|
|
hrtc->DateToUpdate.Month = RTC_MONTH_JANUARY;
|
|
8003280: 687b ldr r3, [r7, #4]
|
|
8003282: 2201 movs r2, #1
|
|
8003284: 735a strb r2, [r3, #13]
|
|
hrtc->DateToUpdate.Date = 0x01U;
|
|
8003286: 687b ldr r3, [r7, #4]
|
|
8003288: 2201 movs r2, #1
|
|
800328a: 739a strb r2, [r3, #14]
|
|
|
|
/* Set RTC state */
|
|
hrtc->State = HAL_RTC_STATE_READY;
|
|
800328c: 687b ldr r3, [r7, #4]
|
|
800328e: 2201 movs r2, #1
|
|
8003290: 745a strb r2, [r3, #17]
|
|
|
|
return HAL_OK;
|
|
8003292: 2300 movs r3, #0
|
|
}
|
|
}
|
|
8003294: 4618 mov r0, r3
|
|
8003296: 3710 adds r7, #16
|
|
8003298: 46bd mov sp, r7
|
|
800329a: bd80 pop {r7, pc}
|
|
800329c: 40006c00 .word 0x40006c00
|
|
|
|
080032a0 <HAL_RTC_SetTime>:
|
|
* @arg RTC_FORMAT_BIN: Binary data format
|
|
* @arg RTC_FORMAT_BCD: BCD data format
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format)
|
|
{
|
|
80032a0: b590 push {r4, r7, lr}
|
|
80032a2: b087 sub sp, #28
|
|
80032a4: af00 add r7, sp, #0
|
|
80032a6: 60f8 str r0, [r7, #12]
|
|
80032a8: 60b9 str r1, [r7, #8]
|
|
80032aa: 607a str r2, [r7, #4]
|
|
uint32_t counter_time = 0U, counter_alarm = 0U;
|
|
80032ac: 2300 movs r3, #0
|
|
80032ae: 617b str r3, [r7, #20]
|
|
80032b0: 2300 movs r3, #0
|
|
80032b2: 613b str r3, [r7, #16]
|
|
|
|
/* Check input parameters */
|
|
if ((hrtc == NULL) || (sTime == NULL))
|
|
80032b4: 68fb ldr r3, [r7, #12]
|
|
80032b6: 2b00 cmp r3, #0
|
|
80032b8: d002 beq.n 80032c0 <HAL_RTC_SetTime+0x20>
|
|
80032ba: 68bb ldr r3, [r7, #8]
|
|
80032bc: 2b00 cmp r3, #0
|
|
80032be: d101 bne.n 80032c4 <HAL_RTC_SetTime+0x24>
|
|
{
|
|
return HAL_ERROR;
|
|
80032c0: 2301 movs r3, #1
|
|
80032c2: e080 b.n 80033c6 <HAL_RTC_SetTime+0x126>
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_RTC_FORMAT(Format));
|
|
|
|
/* Process Locked */
|
|
__HAL_LOCK(hrtc);
|
|
80032c4: 68fb ldr r3, [r7, #12]
|
|
80032c6: 7c1b ldrb r3, [r3, #16]
|
|
80032c8: 2b01 cmp r3, #1
|
|
80032ca: d101 bne.n 80032d0 <HAL_RTC_SetTime+0x30>
|
|
80032cc: 2302 movs r3, #2
|
|
80032ce: e07a b.n 80033c6 <HAL_RTC_SetTime+0x126>
|
|
80032d0: 68fb ldr r3, [r7, #12]
|
|
80032d2: 2201 movs r2, #1
|
|
80032d4: 741a strb r2, [r3, #16]
|
|
|
|
hrtc->State = HAL_RTC_STATE_BUSY;
|
|
80032d6: 68fb ldr r3, [r7, #12]
|
|
80032d8: 2202 movs r2, #2
|
|
80032da: 745a strb r2, [r3, #17]
|
|
|
|
if (Format == RTC_FORMAT_BIN)
|
|
80032dc: 687b ldr r3, [r7, #4]
|
|
80032de: 2b00 cmp r3, #0
|
|
80032e0: d113 bne.n 800330a <HAL_RTC_SetTime+0x6a>
|
|
{
|
|
assert_param(IS_RTC_HOUR24(sTime->Hours));
|
|
assert_param(IS_RTC_MINUTES(sTime->Minutes));
|
|
assert_param(IS_RTC_SECONDS(sTime->Seconds));
|
|
|
|
counter_time = (uint32_t)(((uint32_t)sTime->Hours * 3600U) + \
|
|
80032e2: 68bb ldr r3, [r7, #8]
|
|
80032e4: 781b ldrb r3, [r3, #0]
|
|
80032e6: 461a mov r2, r3
|
|
80032e8: f44f 6361 mov.w r3, #3600 ; 0xe10
|
|
80032ec: fb03 f202 mul.w r2, r3, r2
|
|
((uint32_t)sTime->Minutes * 60U) + \
|
|
80032f0: 68bb ldr r3, [r7, #8]
|
|
80032f2: 785b ldrb r3, [r3, #1]
|
|
80032f4: 4619 mov r1, r3
|
|
80032f6: 460b mov r3, r1
|
|
80032f8: 011b lsls r3, r3, #4
|
|
80032fa: 1a5b subs r3, r3, r1
|
|
80032fc: 009b lsls r3, r3, #2
|
|
counter_time = (uint32_t)(((uint32_t)sTime->Hours * 3600U) + \
|
|
80032fe: 4413 add r3, r2
|
|
((uint32_t)sTime->Seconds));
|
|
8003300: 68ba ldr r2, [r7, #8]
|
|
8003302: 7892 ldrb r2, [r2, #2]
|
|
counter_time = (uint32_t)(((uint32_t)sTime->Hours * 3600U) + \
|
|
8003304: 4413 add r3, r2
|
|
8003306: 617b str r3, [r7, #20]
|
|
8003308: e01e b.n 8003348 <HAL_RTC_SetTime+0xa8>
|
|
{
|
|
assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sTime->Hours)));
|
|
assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sTime->Minutes)));
|
|
assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sTime->Seconds)));
|
|
|
|
counter_time = (((uint32_t)(RTC_Bcd2ToByte(sTime->Hours)) * 3600U) + \
|
|
800330a: 68bb ldr r3, [r7, #8]
|
|
800330c: 781b ldrb r3, [r3, #0]
|
|
800330e: 4618 mov r0, r3
|
|
8003310: f000 fb1d bl 800394e <RTC_Bcd2ToByte>
|
|
8003314: 4603 mov r3, r0
|
|
8003316: 461a mov r2, r3
|
|
8003318: f44f 6361 mov.w r3, #3600 ; 0xe10
|
|
800331c: fb03 f402 mul.w r4, r3, r2
|
|
((uint32_t)(RTC_Bcd2ToByte(sTime->Minutes)) * 60U) + \
|
|
8003320: 68bb ldr r3, [r7, #8]
|
|
8003322: 785b ldrb r3, [r3, #1]
|
|
8003324: 4618 mov r0, r3
|
|
8003326: f000 fb12 bl 800394e <RTC_Bcd2ToByte>
|
|
800332a: 4603 mov r3, r0
|
|
800332c: 461a mov r2, r3
|
|
800332e: 4613 mov r3, r2
|
|
8003330: 011b lsls r3, r3, #4
|
|
8003332: 1a9b subs r3, r3, r2
|
|
8003334: 009b lsls r3, r3, #2
|
|
counter_time = (((uint32_t)(RTC_Bcd2ToByte(sTime->Hours)) * 3600U) + \
|
|
8003336: 441c add r4, r3
|
|
((uint32_t)(RTC_Bcd2ToByte(sTime->Seconds))));
|
|
8003338: 68bb ldr r3, [r7, #8]
|
|
800333a: 789b ldrb r3, [r3, #2]
|
|
800333c: 4618 mov r0, r3
|
|
800333e: f000 fb06 bl 800394e <RTC_Bcd2ToByte>
|
|
8003342: 4603 mov r3, r0
|
|
counter_time = (((uint32_t)(RTC_Bcd2ToByte(sTime->Hours)) * 3600U) + \
|
|
8003344: 4423 add r3, r4
|
|
8003346: 617b str r3, [r7, #20]
|
|
}
|
|
|
|
/* Write time counter in RTC registers */
|
|
if (RTC_WriteTimeCounter(hrtc, counter_time) != HAL_OK)
|
|
8003348: 6979 ldr r1, [r7, #20]
|
|
800334a: 68f8 ldr r0, [r7, #12]
|
|
800334c: f000 fa2b bl 80037a6 <RTC_WriteTimeCounter>
|
|
8003350: 4603 mov r3, r0
|
|
8003352: 2b00 cmp r3, #0
|
|
8003354: d007 beq.n 8003366 <HAL_RTC_SetTime+0xc6>
|
|
{
|
|
/* Set RTC state */
|
|
hrtc->State = HAL_RTC_STATE_ERROR;
|
|
8003356: 68fb ldr r3, [r7, #12]
|
|
8003358: 2204 movs r2, #4
|
|
800335a: 745a strb r2, [r3, #17]
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hrtc);
|
|
800335c: 68fb ldr r3, [r7, #12]
|
|
800335e: 2200 movs r2, #0
|
|
8003360: 741a strb r2, [r3, #16]
|
|
|
|
return HAL_ERROR;
|
|
8003362: 2301 movs r3, #1
|
|
8003364: e02f b.n 80033c6 <HAL_RTC_SetTime+0x126>
|
|
}
|
|
else
|
|
{
|
|
/* Clear Second and overflow flags */
|
|
CLEAR_BIT(hrtc->Instance->CRL, (RTC_FLAG_SEC | RTC_FLAG_OW));
|
|
8003366: 68fb ldr r3, [r7, #12]
|
|
8003368: 681b ldr r3, [r3, #0]
|
|
800336a: 685a ldr r2, [r3, #4]
|
|
800336c: 68fb ldr r3, [r7, #12]
|
|
800336e: 681b ldr r3, [r3, #0]
|
|
8003370: f022 0205 bic.w r2, r2, #5
|
|
8003374: 605a str r2, [r3, #4]
|
|
|
|
/* Read current Alarm counter in RTC registers */
|
|
counter_alarm = RTC_ReadAlarmCounter(hrtc);
|
|
8003376: 68f8 ldr r0, [r7, #12]
|
|
8003378: f000 fa3c bl 80037f4 <RTC_ReadAlarmCounter>
|
|
800337c: 6138 str r0, [r7, #16]
|
|
|
|
/* Set again alarm to match with new time if enabled */
|
|
if (counter_alarm != RTC_ALARM_RESETVALUE)
|
|
800337e: 693b ldr r3, [r7, #16]
|
|
8003380: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
|
8003384: d018 beq.n 80033b8 <HAL_RTC_SetTime+0x118>
|
|
{
|
|
if (counter_alarm < counter_time)
|
|
8003386: 693a ldr r2, [r7, #16]
|
|
8003388: 697b ldr r3, [r7, #20]
|
|
800338a: 429a cmp r2, r3
|
|
800338c: d214 bcs.n 80033b8 <HAL_RTC_SetTime+0x118>
|
|
{
|
|
/* Add 1 day to alarm counter*/
|
|
counter_alarm += (uint32_t)(24U * 3600U);
|
|
800338e: 693b ldr r3, [r7, #16]
|
|
8003390: f503 33a8 add.w r3, r3, #86016 ; 0x15000
|
|
8003394: f503 73c0 add.w r3, r3, #384 ; 0x180
|
|
8003398: 613b str r3, [r7, #16]
|
|
|
|
/* Write new Alarm counter in RTC registers */
|
|
if (RTC_WriteAlarmCounter(hrtc, counter_alarm) != HAL_OK)
|
|
800339a: 6939 ldr r1, [r7, #16]
|
|
800339c: 68f8 ldr r0, [r7, #12]
|
|
800339e: f000 fa42 bl 8003826 <RTC_WriteAlarmCounter>
|
|
80033a2: 4603 mov r3, r0
|
|
80033a4: 2b00 cmp r3, #0
|
|
80033a6: d007 beq.n 80033b8 <HAL_RTC_SetTime+0x118>
|
|
{
|
|
/* Set RTC state */
|
|
hrtc->State = HAL_RTC_STATE_ERROR;
|
|
80033a8: 68fb ldr r3, [r7, #12]
|
|
80033aa: 2204 movs r2, #4
|
|
80033ac: 745a strb r2, [r3, #17]
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hrtc);
|
|
80033ae: 68fb ldr r3, [r7, #12]
|
|
80033b0: 2200 movs r2, #0
|
|
80033b2: 741a strb r2, [r3, #16]
|
|
|
|
return HAL_ERROR;
|
|
80033b4: 2301 movs r3, #1
|
|
80033b6: e006 b.n 80033c6 <HAL_RTC_SetTime+0x126>
|
|
}
|
|
}
|
|
}
|
|
|
|
hrtc->State = HAL_RTC_STATE_READY;
|
|
80033b8: 68fb ldr r3, [r7, #12]
|
|
80033ba: 2201 movs r2, #1
|
|
80033bc: 745a strb r2, [r3, #17]
|
|
|
|
__HAL_UNLOCK(hrtc);
|
|
80033be: 68fb ldr r3, [r7, #12]
|
|
80033c0: 2200 movs r2, #0
|
|
80033c2: 741a strb r2, [r3, #16]
|
|
|
|
return HAL_OK;
|
|
80033c4: 2300 movs r3, #0
|
|
}
|
|
}
|
|
80033c6: 4618 mov r0, r3
|
|
80033c8: 371c adds r7, #28
|
|
80033ca: 46bd mov sp, r7
|
|
80033cc: bd90 pop {r4, r7, pc}
|
|
...
|
|
|
|
080033d0 <HAL_RTC_GetTime>:
|
|
* @arg RTC_FORMAT_BIN: Binary data format
|
|
* @arg RTC_FORMAT_BCD: BCD data format
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format)
|
|
{
|
|
80033d0: b580 push {r7, lr}
|
|
80033d2: b088 sub sp, #32
|
|
80033d4: af00 add r7, sp, #0
|
|
80033d6: 60f8 str r0, [r7, #12]
|
|
80033d8: 60b9 str r1, [r7, #8]
|
|
80033da: 607a str r2, [r7, #4]
|
|
uint32_t counter_time = 0U, counter_alarm = 0U, days_elapsed = 0U, hours = 0U;
|
|
80033dc: 2300 movs r3, #0
|
|
80033de: 61bb str r3, [r7, #24]
|
|
80033e0: 2300 movs r3, #0
|
|
80033e2: 61fb str r3, [r7, #28]
|
|
80033e4: 2300 movs r3, #0
|
|
80033e6: 617b str r3, [r7, #20]
|
|
80033e8: 2300 movs r3, #0
|
|
80033ea: 613b str r3, [r7, #16]
|
|
|
|
/* Check input parameters */
|
|
if ((hrtc == NULL) || (sTime == NULL))
|
|
80033ec: 68fb ldr r3, [r7, #12]
|
|
80033ee: 2b00 cmp r3, #0
|
|
80033f0: d002 beq.n 80033f8 <HAL_RTC_GetTime+0x28>
|
|
80033f2: 68bb ldr r3, [r7, #8]
|
|
80033f4: 2b00 cmp r3, #0
|
|
80033f6: d101 bne.n 80033fc <HAL_RTC_GetTime+0x2c>
|
|
{
|
|
return HAL_ERROR;
|
|
80033f8: 2301 movs r3, #1
|
|
80033fa: e0b5 b.n 8003568 <HAL_RTC_GetTime+0x198>
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_RTC_FORMAT(Format));
|
|
|
|
/* Check if counter overflow occurred */
|
|
if (__HAL_RTC_OVERFLOW_GET_FLAG(hrtc, RTC_FLAG_OW))
|
|
80033fc: 68fb ldr r3, [r7, #12]
|
|
80033fe: 681b ldr r3, [r3, #0]
|
|
8003400: 685b ldr r3, [r3, #4]
|
|
8003402: f003 0304 and.w r3, r3, #4
|
|
8003406: 2b00 cmp r3, #0
|
|
8003408: d001 beq.n 800340e <HAL_RTC_GetTime+0x3e>
|
|
{
|
|
return HAL_ERROR;
|
|
800340a: 2301 movs r3, #1
|
|
800340c: e0ac b.n 8003568 <HAL_RTC_GetTime+0x198>
|
|
}
|
|
|
|
/* Read the time counter*/
|
|
counter_time = RTC_ReadTimeCounter(hrtc);
|
|
800340e: 68f8 ldr r0, [r7, #12]
|
|
8003410: f000 f999 bl 8003746 <RTC_ReadTimeCounter>
|
|
8003414: 61b8 str r0, [r7, #24]
|
|
|
|
/* Fill the structure fields with the read parameters */
|
|
hours = counter_time / 3600U;
|
|
8003416: 69bb ldr r3, [r7, #24]
|
|
8003418: 4a55 ldr r2, [pc, #340] ; (8003570 <HAL_RTC_GetTime+0x1a0>)
|
|
800341a: fba2 2303 umull r2, r3, r2, r3
|
|
800341e: 0adb lsrs r3, r3, #11
|
|
8003420: 613b str r3, [r7, #16]
|
|
sTime->Minutes = (uint8_t)((counter_time % 3600U) / 60U);
|
|
8003422: 69ba ldr r2, [r7, #24]
|
|
8003424: 4b52 ldr r3, [pc, #328] ; (8003570 <HAL_RTC_GetTime+0x1a0>)
|
|
8003426: fba3 1302 umull r1, r3, r3, r2
|
|
800342a: 0adb lsrs r3, r3, #11
|
|
800342c: f44f 6161 mov.w r1, #3600 ; 0xe10
|
|
8003430: fb01 f303 mul.w r3, r1, r3
|
|
8003434: 1ad3 subs r3, r2, r3
|
|
8003436: 4a4f ldr r2, [pc, #316] ; (8003574 <HAL_RTC_GetTime+0x1a4>)
|
|
8003438: fba2 2303 umull r2, r3, r2, r3
|
|
800343c: 095b lsrs r3, r3, #5
|
|
800343e: b2da uxtb r2, r3
|
|
8003440: 68bb ldr r3, [r7, #8]
|
|
8003442: 705a strb r2, [r3, #1]
|
|
sTime->Seconds = (uint8_t)((counter_time % 3600U) % 60U);
|
|
8003444: 69bb ldr r3, [r7, #24]
|
|
8003446: 4a4a ldr r2, [pc, #296] ; (8003570 <HAL_RTC_GetTime+0x1a0>)
|
|
8003448: fba2 1203 umull r1, r2, r2, r3
|
|
800344c: 0ad2 lsrs r2, r2, #11
|
|
800344e: f44f 6161 mov.w r1, #3600 ; 0xe10
|
|
8003452: fb01 f202 mul.w r2, r1, r2
|
|
8003456: 1a9a subs r2, r3, r2
|
|
8003458: 4b46 ldr r3, [pc, #280] ; (8003574 <HAL_RTC_GetTime+0x1a4>)
|
|
800345a: fba3 1302 umull r1, r3, r3, r2
|
|
800345e: 0959 lsrs r1, r3, #5
|
|
8003460: 460b mov r3, r1
|
|
8003462: 011b lsls r3, r3, #4
|
|
8003464: 1a5b subs r3, r3, r1
|
|
8003466: 009b lsls r3, r3, #2
|
|
8003468: 1ad1 subs r1, r2, r3
|
|
800346a: b2ca uxtb r2, r1
|
|
800346c: 68bb ldr r3, [r7, #8]
|
|
800346e: 709a strb r2, [r3, #2]
|
|
|
|
if (hours >= 24U)
|
|
8003470: 693b ldr r3, [r7, #16]
|
|
8003472: 2b17 cmp r3, #23
|
|
8003474: d955 bls.n 8003522 <HAL_RTC_GetTime+0x152>
|
|
{
|
|
/* Get number of days elapsed from last calculation */
|
|
days_elapsed = (hours / 24U);
|
|
8003476: 693b ldr r3, [r7, #16]
|
|
8003478: 4a3f ldr r2, [pc, #252] ; (8003578 <HAL_RTC_GetTime+0x1a8>)
|
|
800347a: fba2 2303 umull r2, r3, r2, r3
|
|
800347e: 091b lsrs r3, r3, #4
|
|
8003480: 617b str r3, [r7, #20]
|
|
|
|
/* Set Hours in RTC_TimeTypeDef structure*/
|
|
sTime->Hours = (hours % 24U);
|
|
8003482: 6939 ldr r1, [r7, #16]
|
|
8003484: 4b3c ldr r3, [pc, #240] ; (8003578 <HAL_RTC_GetTime+0x1a8>)
|
|
8003486: fba3 2301 umull r2, r3, r3, r1
|
|
800348a: 091a lsrs r2, r3, #4
|
|
800348c: 4613 mov r3, r2
|
|
800348e: 005b lsls r3, r3, #1
|
|
8003490: 4413 add r3, r2
|
|
8003492: 00db lsls r3, r3, #3
|
|
8003494: 1aca subs r2, r1, r3
|
|
8003496: b2d2 uxtb r2, r2
|
|
8003498: 68bb ldr r3, [r7, #8]
|
|
800349a: 701a strb r2, [r3, #0]
|
|
|
|
/* Read Alarm counter in RTC registers */
|
|
counter_alarm = RTC_ReadAlarmCounter(hrtc);
|
|
800349c: 68f8 ldr r0, [r7, #12]
|
|
800349e: f000 f9a9 bl 80037f4 <RTC_ReadAlarmCounter>
|
|
80034a2: 61f8 str r0, [r7, #28]
|
|
|
|
/* Calculate remaining time to reach alarm (only if set and not yet expired)*/
|
|
if ((counter_alarm != RTC_ALARM_RESETVALUE) && (counter_alarm > counter_time))
|
|
80034a4: 69fb ldr r3, [r7, #28]
|
|
80034a6: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
|
80034aa: d008 beq.n 80034be <HAL_RTC_GetTime+0xee>
|
|
80034ac: 69fa ldr r2, [r7, #28]
|
|
80034ae: 69bb ldr r3, [r7, #24]
|
|
80034b0: 429a cmp r2, r3
|
|
80034b2: d904 bls.n 80034be <HAL_RTC_GetTime+0xee>
|
|
{
|
|
counter_alarm -= counter_time;
|
|
80034b4: 69fa ldr r2, [r7, #28]
|
|
80034b6: 69bb ldr r3, [r7, #24]
|
|
80034b8: 1ad3 subs r3, r2, r3
|
|
80034ba: 61fb str r3, [r7, #28]
|
|
80034bc: e002 b.n 80034c4 <HAL_RTC_GetTime+0xf4>
|
|
}
|
|
else
|
|
{
|
|
/* In case of counter_alarm < counter_time */
|
|
/* Alarm expiration already occurred but alarm not deactivated */
|
|
counter_alarm = RTC_ALARM_RESETVALUE;
|
|
80034be: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
|
|
80034c2: 61fb str r3, [r7, #28]
|
|
}
|
|
|
|
/* Set updated time in decreasing counter by number of days elapsed */
|
|
counter_time -= (days_elapsed * 24U * 3600U);
|
|
80034c4: 697b ldr r3, [r7, #20]
|
|
80034c6: 4a2d ldr r2, [pc, #180] ; (800357c <HAL_RTC_GetTime+0x1ac>)
|
|
80034c8: fb02 f303 mul.w r3, r2, r3
|
|
80034cc: 69ba ldr r2, [r7, #24]
|
|
80034ce: 1ad3 subs r3, r2, r3
|
|
80034d0: 61bb str r3, [r7, #24]
|
|
|
|
/* Write time counter in RTC registers */
|
|
if (RTC_WriteTimeCounter(hrtc, counter_time) != HAL_OK)
|
|
80034d2: 69b9 ldr r1, [r7, #24]
|
|
80034d4: 68f8 ldr r0, [r7, #12]
|
|
80034d6: f000 f966 bl 80037a6 <RTC_WriteTimeCounter>
|
|
80034da: 4603 mov r3, r0
|
|
80034dc: 2b00 cmp r3, #0
|
|
80034de: d001 beq.n 80034e4 <HAL_RTC_GetTime+0x114>
|
|
{
|
|
return HAL_ERROR;
|
|
80034e0: 2301 movs r3, #1
|
|
80034e2: e041 b.n 8003568 <HAL_RTC_GetTime+0x198>
|
|
}
|
|
|
|
/* Set updated alarm to be set */
|
|
if (counter_alarm != RTC_ALARM_RESETVALUE)
|
|
80034e4: 69fb ldr r3, [r7, #28]
|
|
80034e6: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
|
80034ea: d00c beq.n 8003506 <HAL_RTC_GetTime+0x136>
|
|
{
|
|
counter_alarm += counter_time;
|
|
80034ec: 69fa ldr r2, [r7, #28]
|
|
80034ee: 69bb ldr r3, [r7, #24]
|
|
80034f0: 4413 add r3, r2
|
|
80034f2: 61fb str r3, [r7, #28]
|
|
|
|
/* Write time counter in RTC registers */
|
|
if (RTC_WriteAlarmCounter(hrtc, counter_alarm) != HAL_OK)
|
|
80034f4: 69f9 ldr r1, [r7, #28]
|
|
80034f6: 68f8 ldr r0, [r7, #12]
|
|
80034f8: f000 f995 bl 8003826 <RTC_WriteAlarmCounter>
|
|
80034fc: 4603 mov r3, r0
|
|
80034fe: 2b00 cmp r3, #0
|
|
8003500: d00a beq.n 8003518 <HAL_RTC_GetTime+0x148>
|
|
{
|
|
return HAL_ERROR;
|
|
8003502: 2301 movs r3, #1
|
|
8003504: e030 b.n 8003568 <HAL_RTC_GetTime+0x198>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Alarm already occurred. Set it to reset values to avoid unexpected expiration */
|
|
if (RTC_WriteAlarmCounter(hrtc, counter_alarm) != HAL_OK)
|
|
8003506: 69f9 ldr r1, [r7, #28]
|
|
8003508: 68f8 ldr r0, [r7, #12]
|
|
800350a: f000 f98c bl 8003826 <RTC_WriteAlarmCounter>
|
|
800350e: 4603 mov r3, r0
|
|
8003510: 2b00 cmp r3, #0
|
|
8003512: d001 beq.n 8003518 <HAL_RTC_GetTime+0x148>
|
|
{
|
|
return HAL_ERROR;
|
|
8003514: 2301 movs r3, #1
|
|
8003516: e027 b.n 8003568 <HAL_RTC_GetTime+0x198>
|
|
}
|
|
}
|
|
|
|
/* Update date */
|
|
RTC_DateUpdate(hrtc, days_elapsed);
|
|
8003518: 6979 ldr r1, [r7, #20]
|
|
800351a: 68f8 ldr r0, [r7, #12]
|
|
800351c: f000 fa34 bl 8003988 <RTC_DateUpdate>
|
|
8003520: e003 b.n 800352a <HAL_RTC_GetTime+0x15a>
|
|
}
|
|
else
|
|
{
|
|
sTime->Hours = hours;
|
|
8003522: 693b ldr r3, [r7, #16]
|
|
8003524: b2da uxtb r2, r3
|
|
8003526: 68bb ldr r3, [r7, #8]
|
|
8003528: 701a strb r2, [r3, #0]
|
|
}
|
|
|
|
/* Check the input parameters format */
|
|
if (Format != RTC_FORMAT_BIN)
|
|
800352a: 687b ldr r3, [r7, #4]
|
|
800352c: 2b00 cmp r3, #0
|
|
800352e: d01a beq.n 8003566 <HAL_RTC_GetTime+0x196>
|
|
{
|
|
/* Convert the time structure parameters to BCD format */
|
|
sTime->Hours = (uint8_t)RTC_ByteToBcd2(sTime->Hours);
|
|
8003530: 68bb ldr r3, [r7, #8]
|
|
8003532: 781b ldrb r3, [r3, #0]
|
|
8003534: 4618 mov r0, r3
|
|
8003536: f000 f9ed bl 8003914 <RTC_ByteToBcd2>
|
|
800353a: 4603 mov r3, r0
|
|
800353c: 461a mov r2, r3
|
|
800353e: 68bb ldr r3, [r7, #8]
|
|
8003540: 701a strb r2, [r3, #0]
|
|
sTime->Minutes = (uint8_t)RTC_ByteToBcd2(sTime->Minutes);
|
|
8003542: 68bb ldr r3, [r7, #8]
|
|
8003544: 785b ldrb r3, [r3, #1]
|
|
8003546: 4618 mov r0, r3
|
|
8003548: f000 f9e4 bl 8003914 <RTC_ByteToBcd2>
|
|
800354c: 4603 mov r3, r0
|
|
800354e: 461a mov r2, r3
|
|
8003550: 68bb ldr r3, [r7, #8]
|
|
8003552: 705a strb r2, [r3, #1]
|
|
sTime->Seconds = (uint8_t)RTC_ByteToBcd2(sTime->Seconds);
|
|
8003554: 68bb ldr r3, [r7, #8]
|
|
8003556: 789b ldrb r3, [r3, #2]
|
|
8003558: 4618 mov r0, r3
|
|
800355a: f000 f9db bl 8003914 <RTC_ByteToBcd2>
|
|
800355e: 4603 mov r3, r0
|
|
8003560: 461a mov r2, r3
|
|
8003562: 68bb ldr r3, [r7, #8]
|
|
8003564: 709a strb r2, [r3, #2]
|
|
}
|
|
|
|
return HAL_OK;
|
|
8003566: 2300 movs r3, #0
|
|
}
|
|
8003568: 4618 mov r0, r3
|
|
800356a: 3720 adds r7, #32
|
|
800356c: 46bd mov sp, r7
|
|
800356e: bd80 pop {r7, pc}
|
|
8003570: 91a2b3c5 .word 0x91a2b3c5
|
|
8003574: 88888889 .word 0x88888889
|
|
8003578: aaaaaaab .word 0xaaaaaaab
|
|
800357c: 00015180 .word 0x00015180
|
|
|
|
08003580 <HAL_RTC_SetDate>:
|
|
* @arg RTC_FORMAT_BIN: Binary data format
|
|
* @arg RTC_FORMAT_BCD: BCD data format
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_RTC_SetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format)
|
|
{
|
|
8003580: b580 push {r7, lr}
|
|
8003582: b088 sub sp, #32
|
|
8003584: af00 add r7, sp, #0
|
|
8003586: 60f8 str r0, [r7, #12]
|
|
8003588: 60b9 str r1, [r7, #8]
|
|
800358a: 607a str r2, [r7, #4]
|
|
uint32_t counter_time = 0U, counter_alarm = 0U, hours = 0U;
|
|
800358c: 2300 movs r3, #0
|
|
800358e: 61fb str r3, [r7, #28]
|
|
8003590: 2300 movs r3, #0
|
|
8003592: 61bb str r3, [r7, #24]
|
|
8003594: 2300 movs r3, #0
|
|
8003596: 617b str r3, [r7, #20]
|
|
|
|
/* Check input parameters */
|
|
if ((hrtc == NULL) || (sDate == NULL))
|
|
8003598: 68fb ldr r3, [r7, #12]
|
|
800359a: 2b00 cmp r3, #0
|
|
800359c: d002 beq.n 80035a4 <HAL_RTC_SetDate+0x24>
|
|
800359e: 68bb ldr r3, [r7, #8]
|
|
80035a0: 2b00 cmp r3, #0
|
|
80035a2: d101 bne.n 80035a8 <HAL_RTC_SetDate+0x28>
|
|
{
|
|
return HAL_ERROR;
|
|
80035a4: 2301 movs r3, #1
|
|
80035a6: e097 b.n 80036d8 <HAL_RTC_SetDate+0x158>
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_RTC_FORMAT(Format));
|
|
|
|
/* Process Locked */
|
|
__HAL_LOCK(hrtc);
|
|
80035a8: 68fb ldr r3, [r7, #12]
|
|
80035aa: 7c1b ldrb r3, [r3, #16]
|
|
80035ac: 2b01 cmp r3, #1
|
|
80035ae: d101 bne.n 80035b4 <HAL_RTC_SetDate+0x34>
|
|
80035b0: 2302 movs r3, #2
|
|
80035b2: e091 b.n 80036d8 <HAL_RTC_SetDate+0x158>
|
|
80035b4: 68fb ldr r3, [r7, #12]
|
|
80035b6: 2201 movs r2, #1
|
|
80035b8: 741a strb r2, [r3, #16]
|
|
|
|
hrtc->State = HAL_RTC_STATE_BUSY;
|
|
80035ba: 68fb ldr r3, [r7, #12]
|
|
80035bc: 2202 movs r2, #2
|
|
80035be: 745a strb r2, [r3, #17]
|
|
|
|
if (Format == RTC_FORMAT_BIN)
|
|
80035c0: 687b ldr r3, [r7, #4]
|
|
80035c2: 2b00 cmp r3, #0
|
|
80035c4: d10c bne.n 80035e0 <HAL_RTC_SetDate+0x60>
|
|
assert_param(IS_RTC_YEAR(sDate->Year));
|
|
assert_param(IS_RTC_MONTH(sDate->Month));
|
|
assert_param(IS_RTC_DATE(sDate->Date));
|
|
|
|
/* Change the current date */
|
|
hrtc->DateToUpdate.Year = sDate->Year;
|
|
80035c6: 68bb ldr r3, [r7, #8]
|
|
80035c8: 78da ldrb r2, [r3, #3]
|
|
80035ca: 68fb ldr r3, [r7, #12]
|
|
80035cc: 73da strb r2, [r3, #15]
|
|
hrtc->DateToUpdate.Month = sDate->Month;
|
|
80035ce: 68bb ldr r3, [r7, #8]
|
|
80035d0: 785a ldrb r2, [r3, #1]
|
|
80035d2: 68fb ldr r3, [r7, #12]
|
|
80035d4: 735a strb r2, [r3, #13]
|
|
hrtc->DateToUpdate.Date = sDate->Date;
|
|
80035d6: 68bb ldr r3, [r7, #8]
|
|
80035d8: 789a ldrb r2, [r3, #2]
|
|
80035da: 68fb ldr r3, [r7, #12]
|
|
80035dc: 739a strb r2, [r3, #14]
|
|
80035de: e01a b.n 8003616 <HAL_RTC_SetDate+0x96>
|
|
assert_param(IS_RTC_YEAR(RTC_Bcd2ToByte(sDate->Year)));
|
|
assert_param(IS_RTC_MONTH(RTC_Bcd2ToByte(sDate->Month)));
|
|
assert_param(IS_RTC_DATE(RTC_Bcd2ToByte(sDate->Date)));
|
|
|
|
/* Change the current date */
|
|
hrtc->DateToUpdate.Year = RTC_Bcd2ToByte(sDate->Year);
|
|
80035e0: 68bb ldr r3, [r7, #8]
|
|
80035e2: 78db ldrb r3, [r3, #3]
|
|
80035e4: 4618 mov r0, r3
|
|
80035e6: f000 f9b2 bl 800394e <RTC_Bcd2ToByte>
|
|
80035ea: 4603 mov r3, r0
|
|
80035ec: 461a mov r2, r3
|
|
80035ee: 68fb ldr r3, [r7, #12]
|
|
80035f0: 73da strb r2, [r3, #15]
|
|
hrtc->DateToUpdate.Month = RTC_Bcd2ToByte(sDate->Month);
|
|
80035f2: 68bb ldr r3, [r7, #8]
|
|
80035f4: 785b ldrb r3, [r3, #1]
|
|
80035f6: 4618 mov r0, r3
|
|
80035f8: f000 f9a9 bl 800394e <RTC_Bcd2ToByte>
|
|
80035fc: 4603 mov r3, r0
|
|
80035fe: 461a mov r2, r3
|
|
8003600: 68fb ldr r3, [r7, #12]
|
|
8003602: 735a strb r2, [r3, #13]
|
|
hrtc->DateToUpdate.Date = RTC_Bcd2ToByte(sDate->Date);
|
|
8003604: 68bb ldr r3, [r7, #8]
|
|
8003606: 789b ldrb r3, [r3, #2]
|
|
8003608: 4618 mov r0, r3
|
|
800360a: f000 f9a0 bl 800394e <RTC_Bcd2ToByte>
|
|
800360e: 4603 mov r3, r0
|
|
8003610: 461a mov r2, r3
|
|
8003612: 68fb ldr r3, [r7, #12]
|
|
8003614: 739a strb r2, [r3, #14]
|
|
}
|
|
|
|
/* WeekDay set by user can be ignored because automatically calculated */
|
|
hrtc->DateToUpdate.WeekDay = RTC_WeekDayNum(hrtc->DateToUpdate.Year, hrtc->DateToUpdate.Month, hrtc->DateToUpdate.Date);
|
|
8003616: 68fb ldr r3, [r7, #12]
|
|
8003618: 7bdb ldrb r3, [r3, #15]
|
|
800361a: 4618 mov r0, r3
|
|
800361c: 68fb ldr r3, [r7, #12]
|
|
800361e: 7b59 ldrb r1, [r3, #13]
|
|
8003620: 68fb ldr r3, [r7, #12]
|
|
8003622: 7b9b ldrb r3, [r3, #14]
|
|
8003624: 461a mov r2, r3
|
|
8003626: f000 fa8b bl 8003b40 <RTC_WeekDayNum>
|
|
800362a: 4603 mov r3, r0
|
|
800362c: 461a mov r2, r3
|
|
800362e: 68fb ldr r3, [r7, #12]
|
|
8003630: 731a strb r2, [r3, #12]
|
|
sDate->WeekDay = hrtc->DateToUpdate.WeekDay;
|
|
8003632: 68fb ldr r3, [r7, #12]
|
|
8003634: 7b1a ldrb r2, [r3, #12]
|
|
8003636: 68bb ldr r3, [r7, #8]
|
|
8003638: 701a strb r2, [r3, #0]
|
|
|
|
/* Reset time to be aligned on the same day */
|
|
/* Read the time counter*/
|
|
counter_time = RTC_ReadTimeCounter(hrtc);
|
|
800363a: 68f8 ldr r0, [r7, #12]
|
|
800363c: f000 f883 bl 8003746 <RTC_ReadTimeCounter>
|
|
8003640: 61f8 str r0, [r7, #28]
|
|
|
|
/* Fill the structure fields with the read parameters */
|
|
hours = counter_time / 3600U;
|
|
8003642: 69fb ldr r3, [r7, #28]
|
|
8003644: 4a26 ldr r2, [pc, #152] ; (80036e0 <HAL_RTC_SetDate+0x160>)
|
|
8003646: fba2 2303 umull r2, r3, r2, r3
|
|
800364a: 0adb lsrs r3, r3, #11
|
|
800364c: 617b str r3, [r7, #20]
|
|
if (hours > 24U)
|
|
800364e: 697b ldr r3, [r7, #20]
|
|
8003650: 2b18 cmp r3, #24
|
|
8003652: d93a bls.n 80036ca <HAL_RTC_SetDate+0x14a>
|
|
{
|
|
/* Set updated time in decreasing counter by number of days elapsed */
|
|
counter_time -= ((hours / 24U) * 24U * 3600U);
|
|
8003654: 697b ldr r3, [r7, #20]
|
|
8003656: 4a23 ldr r2, [pc, #140] ; (80036e4 <HAL_RTC_SetDate+0x164>)
|
|
8003658: fba2 2303 umull r2, r3, r2, r3
|
|
800365c: 091b lsrs r3, r3, #4
|
|
800365e: 4a22 ldr r2, [pc, #136] ; (80036e8 <HAL_RTC_SetDate+0x168>)
|
|
8003660: fb02 f303 mul.w r3, r2, r3
|
|
8003664: 69fa ldr r2, [r7, #28]
|
|
8003666: 1ad3 subs r3, r2, r3
|
|
8003668: 61fb str r3, [r7, #28]
|
|
/* Write time counter in RTC registers */
|
|
if (RTC_WriteTimeCounter(hrtc, counter_time) != HAL_OK)
|
|
800366a: 69f9 ldr r1, [r7, #28]
|
|
800366c: 68f8 ldr r0, [r7, #12]
|
|
800366e: f000 f89a bl 80037a6 <RTC_WriteTimeCounter>
|
|
8003672: 4603 mov r3, r0
|
|
8003674: 2b00 cmp r3, #0
|
|
8003676: d007 beq.n 8003688 <HAL_RTC_SetDate+0x108>
|
|
{
|
|
/* Set RTC state */
|
|
hrtc->State = HAL_RTC_STATE_ERROR;
|
|
8003678: 68fb ldr r3, [r7, #12]
|
|
800367a: 2204 movs r2, #4
|
|
800367c: 745a strb r2, [r3, #17]
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hrtc);
|
|
800367e: 68fb ldr r3, [r7, #12]
|
|
8003680: 2200 movs r2, #0
|
|
8003682: 741a strb r2, [r3, #16]
|
|
|
|
return HAL_ERROR;
|
|
8003684: 2301 movs r3, #1
|
|
8003686: e027 b.n 80036d8 <HAL_RTC_SetDate+0x158>
|
|
}
|
|
|
|
/* Read current Alarm counter in RTC registers */
|
|
counter_alarm = RTC_ReadAlarmCounter(hrtc);
|
|
8003688: 68f8 ldr r0, [r7, #12]
|
|
800368a: f000 f8b3 bl 80037f4 <RTC_ReadAlarmCounter>
|
|
800368e: 61b8 str r0, [r7, #24]
|
|
|
|
/* Set again alarm to match with new time if enabled */
|
|
if (counter_alarm != RTC_ALARM_RESETVALUE)
|
|
8003690: 69bb ldr r3, [r7, #24]
|
|
8003692: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
|
8003696: d018 beq.n 80036ca <HAL_RTC_SetDate+0x14a>
|
|
{
|
|
if (counter_alarm < counter_time)
|
|
8003698: 69ba ldr r2, [r7, #24]
|
|
800369a: 69fb ldr r3, [r7, #28]
|
|
800369c: 429a cmp r2, r3
|
|
800369e: d214 bcs.n 80036ca <HAL_RTC_SetDate+0x14a>
|
|
{
|
|
/* Add 1 day to alarm counter*/
|
|
counter_alarm += (uint32_t)(24U * 3600U);
|
|
80036a0: 69bb ldr r3, [r7, #24]
|
|
80036a2: f503 33a8 add.w r3, r3, #86016 ; 0x15000
|
|
80036a6: f503 73c0 add.w r3, r3, #384 ; 0x180
|
|
80036aa: 61bb str r3, [r7, #24]
|
|
|
|
/* Write new Alarm counter in RTC registers */
|
|
if (RTC_WriteAlarmCounter(hrtc, counter_alarm) != HAL_OK)
|
|
80036ac: 69b9 ldr r1, [r7, #24]
|
|
80036ae: 68f8 ldr r0, [r7, #12]
|
|
80036b0: f000 f8b9 bl 8003826 <RTC_WriteAlarmCounter>
|
|
80036b4: 4603 mov r3, r0
|
|
80036b6: 2b00 cmp r3, #0
|
|
80036b8: d007 beq.n 80036ca <HAL_RTC_SetDate+0x14a>
|
|
{
|
|
/* Set RTC state */
|
|
hrtc->State = HAL_RTC_STATE_ERROR;
|
|
80036ba: 68fb ldr r3, [r7, #12]
|
|
80036bc: 2204 movs r2, #4
|
|
80036be: 745a strb r2, [r3, #17]
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hrtc);
|
|
80036c0: 68fb ldr r3, [r7, #12]
|
|
80036c2: 2200 movs r2, #0
|
|
80036c4: 741a strb r2, [r3, #16]
|
|
|
|
return HAL_ERROR;
|
|
80036c6: 2301 movs r3, #1
|
|
80036c8: e006 b.n 80036d8 <HAL_RTC_SetDate+0x158>
|
|
}
|
|
|
|
|
|
}
|
|
|
|
hrtc->State = HAL_RTC_STATE_READY ;
|
|
80036ca: 68fb ldr r3, [r7, #12]
|
|
80036cc: 2201 movs r2, #1
|
|
80036ce: 745a strb r2, [r3, #17]
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hrtc);
|
|
80036d0: 68fb ldr r3, [r7, #12]
|
|
80036d2: 2200 movs r2, #0
|
|
80036d4: 741a strb r2, [r3, #16]
|
|
|
|
return HAL_OK;
|
|
80036d6: 2300 movs r3, #0
|
|
}
|
|
80036d8: 4618 mov r0, r3
|
|
80036da: 3720 adds r7, #32
|
|
80036dc: 46bd mov sp, r7
|
|
80036de: bd80 pop {r7, pc}
|
|
80036e0: 91a2b3c5 .word 0x91a2b3c5
|
|
80036e4: aaaaaaab .word 0xaaaaaaab
|
|
80036e8: 00015180 .word 0x00015180
|
|
|
|
080036ec <HAL_RTC_WaitForSynchro>:
|
|
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
|
|
* the configuration information for RTC.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef *hrtc)
|
|
{
|
|
80036ec: b580 push {r7, lr}
|
|
80036ee: b084 sub sp, #16
|
|
80036f0: af00 add r7, sp, #0
|
|
80036f2: 6078 str r0, [r7, #4]
|
|
uint32_t tickstart = 0U;
|
|
80036f4: 2300 movs r3, #0
|
|
80036f6: 60fb str r3, [r7, #12]
|
|
|
|
/* Check input parameters */
|
|
if (hrtc == NULL)
|
|
80036f8: 687b ldr r3, [r7, #4]
|
|
80036fa: 2b00 cmp r3, #0
|
|
80036fc: d101 bne.n 8003702 <HAL_RTC_WaitForSynchro+0x16>
|
|
{
|
|
return HAL_ERROR;
|
|
80036fe: 2301 movs r3, #1
|
|
8003700: e01d b.n 800373e <HAL_RTC_WaitForSynchro+0x52>
|
|
}
|
|
|
|
/* Clear RSF flag */
|
|
CLEAR_BIT(hrtc->Instance->CRL, RTC_FLAG_RSF);
|
|
8003702: 687b ldr r3, [r7, #4]
|
|
8003704: 681b ldr r3, [r3, #0]
|
|
8003706: 685a ldr r2, [r3, #4]
|
|
8003708: 687b ldr r3, [r7, #4]
|
|
800370a: 681b ldr r3, [r3, #0]
|
|
800370c: f022 0208 bic.w r2, r2, #8
|
|
8003710: 605a str r2, [r3, #4]
|
|
|
|
tickstart = HAL_GetTick();
|
|
8003712: f7fd fcc7 bl 80010a4 <HAL_GetTick>
|
|
8003716: 60f8 str r0, [r7, #12]
|
|
|
|
/* Wait the registers to be synchronised */
|
|
while ((hrtc->Instance->CRL & RTC_FLAG_RSF) == (uint32_t)RESET)
|
|
8003718: e009 b.n 800372e <HAL_RTC_WaitForSynchro+0x42>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
|
|
800371a: f7fd fcc3 bl 80010a4 <HAL_GetTick>
|
|
800371e: 4602 mov r2, r0
|
|
8003720: 68fb ldr r3, [r7, #12]
|
|
8003722: 1ad3 subs r3, r2, r3
|
|
8003724: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8
|
|
8003728: d901 bls.n 800372e <HAL_RTC_WaitForSynchro+0x42>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
800372a: 2303 movs r3, #3
|
|
800372c: e007 b.n 800373e <HAL_RTC_WaitForSynchro+0x52>
|
|
while ((hrtc->Instance->CRL & RTC_FLAG_RSF) == (uint32_t)RESET)
|
|
800372e: 687b ldr r3, [r7, #4]
|
|
8003730: 681b ldr r3, [r3, #0]
|
|
8003732: 685b ldr r3, [r3, #4]
|
|
8003734: f003 0308 and.w r3, r3, #8
|
|
8003738: 2b00 cmp r3, #0
|
|
800373a: d0ee beq.n 800371a <HAL_RTC_WaitForSynchro+0x2e>
|
|
}
|
|
}
|
|
|
|
return HAL_OK;
|
|
800373c: 2300 movs r3, #0
|
|
}
|
|
800373e: 4618 mov r0, r3
|
|
8003740: 3710 adds r7, #16
|
|
8003742: 46bd mov sp, r7
|
|
8003744: bd80 pop {r7, pc}
|
|
|
|
08003746 <RTC_ReadTimeCounter>:
|
|
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
|
|
* the configuration information for RTC.
|
|
* @retval Time counter
|
|
*/
|
|
static uint32_t RTC_ReadTimeCounter(RTC_HandleTypeDef *hrtc)
|
|
{
|
|
8003746: b480 push {r7}
|
|
8003748: b087 sub sp, #28
|
|
800374a: af00 add r7, sp, #0
|
|
800374c: 6078 str r0, [r7, #4]
|
|
uint16_t high1 = 0U, high2 = 0U, low = 0U;
|
|
800374e: 2300 movs r3, #0
|
|
8003750: 827b strh r3, [r7, #18]
|
|
8003752: 2300 movs r3, #0
|
|
8003754: 823b strh r3, [r7, #16]
|
|
8003756: 2300 movs r3, #0
|
|
8003758: 81fb strh r3, [r7, #14]
|
|
uint32_t timecounter = 0U;
|
|
800375a: 2300 movs r3, #0
|
|
800375c: 617b str r3, [r7, #20]
|
|
|
|
high1 = READ_REG(hrtc->Instance->CNTH & RTC_CNTH_RTC_CNT);
|
|
800375e: 687b ldr r3, [r7, #4]
|
|
8003760: 681b ldr r3, [r3, #0]
|
|
8003762: 699b ldr r3, [r3, #24]
|
|
8003764: 827b strh r3, [r7, #18]
|
|
low = READ_REG(hrtc->Instance->CNTL & RTC_CNTL_RTC_CNT);
|
|
8003766: 687b ldr r3, [r7, #4]
|
|
8003768: 681b ldr r3, [r3, #0]
|
|
800376a: 69db ldr r3, [r3, #28]
|
|
800376c: 81fb strh r3, [r7, #14]
|
|
high2 = READ_REG(hrtc->Instance->CNTH & RTC_CNTH_RTC_CNT);
|
|
800376e: 687b ldr r3, [r7, #4]
|
|
8003770: 681b ldr r3, [r3, #0]
|
|
8003772: 699b ldr r3, [r3, #24]
|
|
8003774: 823b strh r3, [r7, #16]
|
|
|
|
if (high1 != high2)
|
|
8003776: 8a7a ldrh r2, [r7, #18]
|
|
8003778: 8a3b ldrh r3, [r7, #16]
|
|
800377a: 429a cmp r2, r3
|
|
800377c: d008 beq.n 8003790 <RTC_ReadTimeCounter+0x4a>
|
|
{
|
|
/* In this case the counter roll over during reading of CNTL and CNTH registers,
|
|
read again CNTL register then return the counter value */
|
|
timecounter = (((uint32_t) high2 << 16U) | READ_REG(hrtc->Instance->CNTL & RTC_CNTL_RTC_CNT));
|
|
800377e: 8a3b ldrh r3, [r7, #16]
|
|
8003780: 041a lsls r2, r3, #16
|
|
8003782: 687b ldr r3, [r7, #4]
|
|
8003784: 681b ldr r3, [r3, #0]
|
|
8003786: 69db ldr r3, [r3, #28]
|
|
8003788: b29b uxth r3, r3
|
|
800378a: 4313 orrs r3, r2
|
|
800378c: 617b str r3, [r7, #20]
|
|
800378e: e004 b.n 800379a <RTC_ReadTimeCounter+0x54>
|
|
}
|
|
else
|
|
{
|
|
/* No counter roll over during reading of CNTL and CNTH registers, counter
|
|
value is equal to first value of CNTL and CNTH */
|
|
timecounter = (((uint32_t) high1 << 16U) | low);
|
|
8003790: 8a7b ldrh r3, [r7, #18]
|
|
8003792: 041a lsls r2, r3, #16
|
|
8003794: 89fb ldrh r3, [r7, #14]
|
|
8003796: 4313 orrs r3, r2
|
|
8003798: 617b str r3, [r7, #20]
|
|
}
|
|
|
|
return timecounter;
|
|
800379a: 697b ldr r3, [r7, #20]
|
|
}
|
|
800379c: 4618 mov r0, r3
|
|
800379e: 371c adds r7, #28
|
|
80037a0: 46bd mov sp, r7
|
|
80037a2: bc80 pop {r7}
|
|
80037a4: 4770 bx lr
|
|
|
|
080037a6 <RTC_WriteTimeCounter>:
|
|
* the configuration information for RTC.
|
|
* @param TimeCounter: Counter to write in RTC_CNT registers
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef RTC_WriteTimeCounter(RTC_HandleTypeDef *hrtc, uint32_t TimeCounter)
|
|
{
|
|
80037a6: b580 push {r7, lr}
|
|
80037a8: b084 sub sp, #16
|
|
80037aa: af00 add r7, sp, #0
|
|
80037ac: 6078 str r0, [r7, #4]
|
|
80037ae: 6039 str r1, [r7, #0]
|
|
HAL_StatusTypeDef status = HAL_OK;
|
|
80037b0: 2300 movs r3, #0
|
|
80037b2: 73fb strb r3, [r7, #15]
|
|
|
|
/* Set Initialization mode */
|
|
if (RTC_EnterInitMode(hrtc) != HAL_OK)
|
|
80037b4: 6878 ldr r0, [r7, #4]
|
|
80037b6: f000 f85d bl 8003874 <RTC_EnterInitMode>
|
|
80037ba: 4603 mov r3, r0
|
|
80037bc: 2b00 cmp r3, #0
|
|
80037be: d002 beq.n 80037c6 <RTC_WriteTimeCounter+0x20>
|
|
{
|
|
status = HAL_ERROR;
|
|
80037c0: 2301 movs r3, #1
|
|
80037c2: 73fb strb r3, [r7, #15]
|
|
80037c4: e011 b.n 80037ea <RTC_WriteTimeCounter+0x44>
|
|
}
|
|
else
|
|
{
|
|
/* Set RTC COUNTER MSB word */
|
|
WRITE_REG(hrtc->Instance->CNTH, (TimeCounter >> 16U));
|
|
80037c6: 687b ldr r3, [r7, #4]
|
|
80037c8: 681b ldr r3, [r3, #0]
|
|
80037ca: 683a ldr r2, [r7, #0]
|
|
80037cc: 0c12 lsrs r2, r2, #16
|
|
80037ce: 619a str r2, [r3, #24]
|
|
/* Set RTC COUNTER LSB word */
|
|
WRITE_REG(hrtc->Instance->CNTL, (TimeCounter & RTC_CNTL_RTC_CNT));
|
|
80037d0: 687b ldr r3, [r7, #4]
|
|
80037d2: 681b ldr r3, [r3, #0]
|
|
80037d4: 683a ldr r2, [r7, #0]
|
|
80037d6: b292 uxth r2, r2
|
|
80037d8: 61da str r2, [r3, #28]
|
|
|
|
/* Wait for synchro */
|
|
if (RTC_ExitInitMode(hrtc) != HAL_OK)
|
|
80037da: 6878 ldr r0, [r7, #4]
|
|
80037dc: f000 f872 bl 80038c4 <RTC_ExitInitMode>
|
|
80037e0: 4603 mov r3, r0
|
|
80037e2: 2b00 cmp r3, #0
|
|
80037e4: d001 beq.n 80037ea <RTC_WriteTimeCounter+0x44>
|
|
{
|
|
status = HAL_ERROR;
|
|
80037e6: 2301 movs r3, #1
|
|
80037e8: 73fb strb r3, [r7, #15]
|
|
}
|
|
}
|
|
|
|
return status;
|
|
80037ea: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
80037ec: 4618 mov r0, r3
|
|
80037ee: 3710 adds r7, #16
|
|
80037f0: 46bd mov sp, r7
|
|
80037f2: bd80 pop {r7, pc}
|
|
|
|
080037f4 <RTC_ReadAlarmCounter>:
|
|
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
|
|
* the configuration information for RTC.
|
|
* @retval Time counter
|
|
*/
|
|
static uint32_t RTC_ReadAlarmCounter(RTC_HandleTypeDef *hrtc)
|
|
{
|
|
80037f4: b480 push {r7}
|
|
80037f6: b085 sub sp, #20
|
|
80037f8: af00 add r7, sp, #0
|
|
80037fa: 6078 str r0, [r7, #4]
|
|
uint16_t high1 = 0U, low = 0U;
|
|
80037fc: 2300 movs r3, #0
|
|
80037fe: 81fb strh r3, [r7, #14]
|
|
8003800: 2300 movs r3, #0
|
|
8003802: 81bb strh r3, [r7, #12]
|
|
|
|
high1 = READ_REG(hrtc->Instance->ALRH & RTC_CNTH_RTC_CNT);
|
|
8003804: 687b ldr r3, [r7, #4]
|
|
8003806: 681b ldr r3, [r3, #0]
|
|
8003808: 6a1b ldr r3, [r3, #32]
|
|
800380a: 81fb strh r3, [r7, #14]
|
|
low = READ_REG(hrtc->Instance->ALRL & RTC_CNTL_RTC_CNT);
|
|
800380c: 687b ldr r3, [r7, #4]
|
|
800380e: 681b ldr r3, [r3, #0]
|
|
8003810: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
8003812: 81bb strh r3, [r7, #12]
|
|
|
|
return (((uint32_t) high1 << 16U) | low);
|
|
8003814: 89fb ldrh r3, [r7, #14]
|
|
8003816: 041a lsls r2, r3, #16
|
|
8003818: 89bb ldrh r3, [r7, #12]
|
|
800381a: 4313 orrs r3, r2
|
|
}
|
|
800381c: 4618 mov r0, r3
|
|
800381e: 3714 adds r7, #20
|
|
8003820: 46bd mov sp, r7
|
|
8003822: bc80 pop {r7}
|
|
8003824: 4770 bx lr
|
|
|
|
08003826 <RTC_WriteAlarmCounter>:
|
|
* the configuration information for RTC.
|
|
* @param AlarmCounter: Counter to write in RTC_ALR registers
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef RTC_WriteAlarmCounter(RTC_HandleTypeDef *hrtc, uint32_t AlarmCounter)
|
|
{
|
|
8003826: b580 push {r7, lr}
|
|
8003828: b084 sub sp, #16
|
|
800382a: af00 add r7, sp, #0
|
|
800382c: 6078 str r0, [r7, #4]
|
|
800382e: 6039 str r1, [r7, #0]
|
|
HAL_StatusTypeDef status = HAL_OK;
|
|
8003830: 2300 movs r3, #0
|
|
8003832: 73fb strb r3, [r7, #15]
|
|
|
|
/* Set Initialization mode */
|
|
if (RTC_EnterInitMode(hrtc) != HAL_OK)
|
|
8003834: 6878 ldr r0, [r7, #4]
|
|
8003836: f000 f81d bl 8003874 <RTC_EnterInitMode>
|
|
800383a: 4603 mov r3, r0
|
|
800383c: 2b00 cmp r3, #0
|
|
800383e: d002 beq.n 8003846 <RTC_WriteAlarmCounter+0x20>
|
|
{
|
|
status = HAL_ERROR;
|
|
8003840: 2301 movs r3, #1
|
|
8003842: 73fb strb r3, [r7, #15]
|
|
8003844: e011 b.n 800386a <RTC_WriteAlarmCounter+0x44>
|
|
}
|
|
else
|
|
{
|
|
/* Set RTC COUNTER MSB word */
|
|
WRITE_REG(hrtc->Instance->ALRH, (AlarmCounter >> 16U));
|
|
8003846: 687b ldr r3, [r7, #4]
|
|
8003848: 681b ldr r3, [r3, #0]
|
|
800384a: 683a ldr r2, [r7, #0]
|
|
800384c: 0c12 lsrs r2, r2, #16
|
|
800384e: 621a str r2, [r3, #32]
|
|
/* Set RTC COUNTER LSB word */
|
|
WRITE_REG(hrtc->Instance->ALRL, (AlarmCounter & RTC_ALRL_RTC_ALR));
|
|
8003850: 687b ldr r3, [r7, #4]
|
|
8003852: 681b ldr r3, [r3, #0]
|
|
8003854: 683a ldr r2, [r7, #0]
|
|
8003856: b292 uxth r2, r2
|
|
8003858: 625a str r2, [r3, #36] ; 0x24
|
|
|
|
/* Wait for synchro */
|
|
if (RTC_ExitInitMode(hrtc) != HAL_OK)
|
|
800385a: 6878 ldr r0, [r7, #4]
|
|
800385c: f000 f832 bl 80038c4 <RTC_ExitInitMode>
|
|
8003860: 4603 mov r3, r0
|
|
8003862: 2b00 cmp r3, #0
|
|
8003864: d001 beq.n 800386a <RTC_WriteAlarmCounter+0x44>
|
|
{
|
|
status = HAL_ERROR;
|
|
8003866: 2301 movs r3, #1
|
|
8003868: 73fb strb r3, [r7, #15]
|
|
}
|
|
}
|
|
|
|
return status;
|
|
800386a: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
800386c: 4618 mov r0, r3
|
|
800386e: 3710 adds r7, #16
|
|
8003870: 46bd mov sp, r7
|
|
8003872: bd80 pop {r7, pc}
|
|
|
|
08003874 <RTC_EnterInitMode>:
|
|
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
|
|
* the configuration information for RTC.
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef *hrtc)
|
|
{
|
|
8003874: b580 push {r7, lr}
|
|
8003876: b084 sub sp, #16
|
|
8003878: af00 add r7, sp, #0
|
|
800387a: 6078 str r0, [r7, #4]
|
|
uint32_t tickstart = 0U;
|
|
800387c: 2300 movs r3, #0
|
|
800387e: 60fb str r3, [r7, #12]
|
|
|
|
tickstart = HAL_GetTick();
|
|
8003880: f7fd fc10 bl 80010a4 <HAL_GetTick>
|
|
8003884: 60f8 str r0, [r7, #12]
|
|
/* Wait till RTC is in INIT state and if Time out is reached exit */
|
|
while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET)
|
|
8003886: e009 b.n 800389c <RTC_EnterInitMode+0x28>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
|
|
8003888: f7fd fc0c bl 80010a4 <HAL_GetTick>
|
|
800388c: 4602 mov r2, r0
|
|
800388e: 68fb ldr r3, [r7, #12]
|
|
8003890: 1ad3 subs r3, r2, r3
|
|
8003892: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8
|
|
8003896: d901 bls.n 800389c <RTC_EnterInitMode+0x28>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8003898: 2303 movs r3, #3
|
|
800389a: e00f b.n 80038bc <RTC_EnterInitMode+0x48>
|
|
while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET)
|
|
800389c: 687b ldr r3, [r7, #4]
|
|
800389e: 681b ldr r3, [r3, #0]
|
|
80038a0: 685b ldr r3, [r3, #4]
|
|
80038a2: f003 0320 and.w r3, r3, #32
|
|
80038a6: 2b00 cmp r3, #0
|
|
80038a8: d0ee beq.n 8003888 <RTC_EnterInitMode+0x14>
|
|
}
|
|
}
|
|
|
|
/* Disable the write protection for RTC registers */
|
|
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
|
|
80038aa: 687b ldr r3, [r7, #4]
|
|
80038ac: 681b ldr r3, [r3, #0]
|
|
80038ae: 685a ldr r2, [r3, #4]
|
|
80038b0: 687b ldr r3, [r7, #4]
|
|
80038b2: 681b ldr r3, [r3, #0]
|
|
80038b4: f042 0210 orr.w r2, r2, #16
|
|
80038b8: 605a str r2, [r3, #4]
|
|
|
|
|
|
return HAL_OK;
|
|
80038ba: 2300 movs r3, #0
|
|
}
|
|
80038bc: 4618 mov r0, r3
|
|
80038be: 3710 adds r7, #16
|
|
80038c0: 46bd mov sp, r7
|
|
80038c2: bd80 pop {r7, pc}
|
|
|
|
080038c4 <RTC_ExitInitMode>:
|
|
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
|
|
* the configuration information for RTC.
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef RTC_ExitInitMode(RTC_HandleTypeDef *hrtc)
|
|
{
|
|
80038c4: b580 push {r7, lr}
|
|
80038c6: b084 sub sp, #16
|
|
80038c8: af00 add r7, sp, #0
|
|
80038ca: 6078 str r0, [r7, #4]
|
|
uint32_t tickstart = 0U;
|
|
80038cc: 2300 movs r3, #0
|
|
80038ce: 60fb str r3, [r7, #12]
|
|
|
|
/* Disable the write protection for RTC registers */
|
|
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
|
|
80038d0: 687b ldr r3, [r7, #4]
|
|
80038d2: 681b ldr r3, [r3, #0]
|
|
80038d4: 685a ldr r2, [r3, #4]
|
|
80038d6: 687b ldr r3, [r7, #4]
|
|
80038d8: 681b ldr r3, [r3, #0]
|
|
80038da: f022 0210 bic.w r2, r2, #16
|
|
80038de: 605a str r2, [r3, #4]
|
|
|
|
tickstart = HAL_GetTick();
|
|
80038e0: f7fd fbe0 bl 80010a4 <HAL_GetTick>
|
|
80038e4: 60f8 str r0, [r7, #12]
|
|
/* Wait till RTC is in INIT state and if Time out is reached exit */
|
|
while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET)
|
|
80038e6: e009 b.n 80038fc <RTC_ExitInitMode+0x38>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
|
|
80038e8: f7fd fbdc bl 80010a4 <HAL_GetTick>
|
|
80038ec: 4602 mov r2, r0
|
|
80038ee: 68fb ldr r3, [r7, #12]
|
|
80038f0: 1ad3 subs r3, r2, r3
|
|
80038f2: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8
|
|
80038f6: d901 bls.n 80038fc <RTC_ExitInitMode+0x38>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
80038f8: 2303 movs r3, #3
|
|
80038fa: e007 b.n 800390c <RTC_ExitInitMode+0x48>
|
|
while ((hrtc->Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET)
|
|
80038fc: 687b ldr r3, [r7, #4]
|
|
80038fe: 681b ldr r3, [r3, #0]
|
|
8003900: 685b ldr r3, [r3, #4]
|
|
8003902: f003 0320 and.w r3, r3, #32
|
|
8003906: 2b00 cmp r3, #0
|
|
8003908: d0ee beq.n 80038e8 <RTC_ExitInitMode+0x24>
|
|
}
|
|
}
|
|
|
|
return HAL_OK;
|
|
800390a: 2300 movs r3, #0
|
|
}
|
|
800390c: 4618 mov r0, r3
|
|
800390e: 3710 adds r7, #16
|
|
8003910: 46bd mov sp, r7
|
|
8003912: bd80 pop {r7, pc}
|
|
|
|
08003914 <RTC_ByteToBcd2>:
|
|
* @brief Converts a 2 digit decimal to BCD format.
|
|
* @param Value: Byte to be converted
|
|
* @retval Converted byte
|
|
*/
|
|
static uint8_t RTC_ByteToBcd2(uint8_t Value)
|
|
{
|
|
8003914: b480 push {r7}
|
|
8003916: b085 sub sp, #20
|
|
8003918: af00 add r7, sp, #0
|
|
800391a: 4603 mov r3, r0
|
|
800391c: 71fb strb r3, [r7, #7]
|
|
uint32_t bcdhigh = 0U;
|
|
800391e: 2300 movs r3, #0
|
|
8003920: 60fb str r3, [r7, #12]
|
|
|
|
while (Value >= 10U)
|
|
8003922: e005 b.n 8003930 <RTC_ByteToBcd2+0x1c>
|
|
{
|
|
bcdhigh++;
|
|
8003924: 68fb ldr r3, [r7, #12]
|
|
8003926: 3301 adds r3, #1
|
|
8003928: 60fb str r3, [r7, #12]
|
|
Value -= 10U;
|
|
800392a: 79fb ldrb r3, [r7, #7]
|
|
800392c: 3b0a subs r3, #10
|
|
800392e: 71fb strb r3, [r7, #7]
|
|
while (Value >= 10U)
|
|
8003930: 79fb ldrb r3, [r7, #7]
|
|
8003932: 2b09 cmp r3, #9
|
|
8003934: d8f6 bhi.n 8003924 <RTC_ByteToBcd2+0x10>
|
|
}
|
|
|
|
return ((uint8_t)(bcdhigh << 4U) | Value);
|
|
8003936: 68fb ldr r3, [r7, #12]
|
|
8003938: b2db uxtb r3, r3
|
|
800393a: 011b lsls r3, r3, #4
|
|
800393c: b2da uxtb r2, r3
|
|
800393e: 79fb ldrb r3, [r7, #7]
|
|
8003940: 4313 orrs r3, r2
|
|
8003942: b2db uxtb r3, r3
|
|
}
|
|
8003944: 4618 mov r0, r3
|
|
8003946: 3714 adds r7, #20
|
|
8003948: 46bd mov sp, r7
|
|
800394a: bc80 pop {r7}
|
|
800394c: 4770 bx lr
|
|
|
|
0800394e <RTC_Bcd2ToByte>:
|
|
* @brief Converts from 2 digit BCD to Binary.
|
|
* @param Value: BCD value to be converted
|
|
* @retval Converted word
|
|
*/
|
|
static uint8_t RTC_Bcd2ToByte(uint8_t Value)
|
|
{
|
|
800394e: b480 push {r7}
|
|
8003950: b085 sub sp, #20
|
|
8003952: af00 add r7, sp, #0
|
|
8003954: 4603 mov r3, r0
|
|
8003956: 71fb strb r3, [r7, #7]
|
|
uint32_t tmp = 0U;
|
|
8003958: 2300 movs r3, #0
|
|
800395a: 60fb str r3, [r7, #12]
|
|
tmp = ((uint8_t)(Value & (uint8_t)0xF0) >> (uint8_t)0x4) * 10U;
|
|
800395c: 79fb ldrb r3, [r7, #7]
|
|
800395e: 091b lsrs r3, r3, #4
|
|
8003960: b2db uxtb r3, r3
|
|
8003962: 461a mov r2, r3
|
|
8003964: 4613 mov r3, r2
|
|
8003966: 009b lsls r3, r3, #2
|
|
8003968: 4413 add r3, r2
|
|
800396a: 005b lsls r3, r3, #1
|
|
800396c: 60fb str r3, [r7, #12]
|
|
return (tmp + (Value & (uint8_t)0x0F));
|
|
800396e: 79fb ldrb r3, [r7, #7]
|
|
8003970: f003 030f and.w r3, r3, #15
|
|
8003974: b2da uxtb r2, r3
|
|
8003976: 68fb ldr r3, [r7, #12]
|
|
8003978: b2db uxtb r3, r3
|
|
800397a: 4413 add r3, r2
|
|
800397c: b2db uxtb r3, r3
|
|
}
|
|
800397e: 4618 mov r0, r3
|
|
8003980: 3714 adds r7, #20
|
|
8003982: 46bd mov sp, r7
|
|
8003984: bc80 pop {r7}
|
|
8003986: 4770 bx lr
|
|
|
|
08003988 <RTC_DateUpdate>:
|
|
* the configuration information for RTC.
|
|
* @param DayElapsed: Number of days elapsed from last date update
|
|
* @retval None
|
|
*/
|
|
static void RTC_DateUpdate(RTC_HandleTypeDef *hrtc, uint32_t DayElapsed)
|
|
{
|
|
8003988: b580 push {r7, lr}
|
|
800398a: b086 sub sp, #24
|
|
800398c: af00 add r7, sp, #0
|
|
800398e: 6078 str r0, [r7, #4]
|
|
8003990: 6039 str r1, [r7, #0]
|
|
uint32_t year = 0U, month = 0U, day = 0U;
|
|
8003992: 2300 movs r3, #0
|
|
8003994: 617b str r3, [r7, #20]
|
|
8003996: 2300 movs r3, #0
|
|
8003998: 613b str r3, [r7, #16]
|
|
800399a: 2300 movs r3, #0
|
|
800399c: 60fb str r3, [r7, #12]
|
|
uint32_t loop = 0U;
|
|
800399e: 2300 movs r3, #0
|
|
80039a0: 60bb str r3, [r7, #8]
|
|
|
|
/* Get the current year*/
|
|
year = hrtc->DateToUpdate.Year;
|
|
80039a2: 687b ldr r3, [r7, #4]
|
|
80039a4: 7bdb ldrb r3, [r3, #15]
|
|
80039a6: 617b str r3, [r7, #20]
|
|
|
|
/* Get the current month and day */
|
|
month = hrtc->DateToUpdate.Month;
|
|
80039a8: 687b ldr r3, [r7, #4]
|
|
80039aa: 7b5b ldrb r3, [r3, #13]
|
|
80039ac: 613b str r3, [r7, #16]
|
|
day = hrtc->DateToUpdate.Date;
|
|
80039ae: 687b ldr r3, [r7, #4]
|
|
80039b0: 7b9b ldrb r3, [r3, #14]
|
|
80039b2: 60fb str r3, [r7, #12]
|
|
|
|
for (loop = 0U; loop < DayElapsed; loop++)
|
|
80039b4: 2300 movs r3, #0
|
|
80039b6: 60bb str r3, [r7, #8]
|
|
80039b8: e06f b.n 8003a9a <RTC_DateUpdate+0x112>
|
|
{
|
|
if ((month == 1U) || (month == 3U) || (month == 5U) || (month == 7U) || \
|
|
80039ba: 693b ldr r3, [r7, #16]
|
|
80039bc: 2b01 cmp r3, #1
|
|
80039be: d011 beq.n 80039e4 <RTC_DateUpdate+0x5c>
|
|
80039c0: 693b ldr r3, [r7, #16]
|
|
80039c2: 2b03 cmp r3, #3
|
|
80039c4: d00e beq.n 80039e4 <RTC_DateUpdate+0x5c>
|
|
80039c6: 693b ldr r3, [r7, #16]
|
|
80039c8: 2b05 cmp r3, #5
|
|
80039ca: d00b beq.n 80039e4 <RTC_DateUpdate+0x5c>
|
|
80039cc: 693b ldr r3, [r7, #16]
|
|
80039ce: 2b07 cmp r3, #7
|
|
80039d0: d008 beq.n 80039e4 <RTC_DateUpdate+0x5c>
|
|
80039d2: 693b ldr r3, [r7, #16]
|
|
80039d4: 2b08 cmp r3, #8
|
|
80039d6: d005 beq.n 80039e4 <RTC_DateUpdate+0x5c>
|
|
(month == 8U) || (month == 10U) || (month == 12U))
|
|
80039d8: 693b ldr r3, [r7, #16]
|
|
80039da: 2b0a cmp r3, #10
|
|
80039dc: d002 beq.n 80039e4 <RTC_DateUpdate+0x5c>
|
|
80039de: 693b ldr r3, [r7, #16]
|
|
80039e0: 2b0c cmp r3, #12
|
|
80039e2: d117 bne.n 8003a14 <RTC_DateUpdate+0x8c>
|
|
{
|
|
if (day < 31U)
|
|
80039e4: 68fb ldr r3, [r7, #12]
|
|
80039e6: 2b1e cmp r3, #30
|
|
80039e8: d803 bhi.n 80039f2 <RTC_DateUpdate+0x6a>
|
|
{
|
|
day++;
|
|
80039ea: 68fb ldr r3, [r7, #12]
|
|
80039ec: 3301 adds r3, #1
|
|
80039ee: 60fb str r3, [r7, #12]
|
|
if (day < 31U)
|
|
80039f0: e050 b.n 8003a94 <RTC_DateUpdate+0x10c>
|
|
}
|
|
/* Date structure member: day = 31 */
|
|
else
|
|
{
|
|
if (month != 12U)
|
|
80039f2: 693b ldr r3, [r7, #16]
|
|
80039f4: 2b0c cmp r3, #12
|
|
80039f6: d005 beq.n 8003a04 <RTC_DateUpdate+0x7c>
|
|
{
|
|
month++;
|
|
80039f8: 693b ldr r3, [r7, #16]
|
|
80039fa: 3301 adds r3, #1
|
|
80039fc: 613b str r3, [r7, #16]
|
|
day = 1U;
|
|
80039fe: 2301 movs r3, #1
|
|
8003a00: 60fb str r3, [r7, #12]
|
|
if (day < 31U)
|
|
8003a02: e047 b.n 8003a94 <RTC_DateUpdate+0x10c>
|
|
}
|
|
/* Date structure member: day = 31 & month =12 */
|
|
else
|
|
{
|
|
month = 1U;
|
|
8003a04: 2301 movs r3, #1
|
|
8003a06: 613b str r3, [r7, #16]
|
|
day = 1U;
|
|
8003a08: 2301 movs r3, #1
|
|
8003a0a: 60fb str r3, [r7, #12]
|
|
year++;
|
|
8003a0c: 697b ldr r3, [r7, #20]
|
|
8003a0e: 3301 adds r3, #1
|
|
8003a10: 617b str r3, [r7, #20]
|
|
if (day < 31U)
|
|
8003a12: e03f b.n 8003a94 <RTC_DateUpdate+0x10c>
|
|
}
|
|
}
|
|
}
|
|
else if ((month == 4U) || (month == 6U) || (month == 9U) || (month == 11U))
|
|
8003a14: 693b ldr r3, [r7, #16]
|
|
8003a16: 2b04 cmp r3, #4
|
|
8003a18: d008 beq.n 8003a2c <RTC_DateUpdate+0xa4>
|
|
8003a1a: 693b ldr r3, [r7, #16]
|
|
8003a1c: 2b06 cmp r3, #6
|
|
8003a1e: d005 beq.n 8003a2c <RTC_DateUpdate+0xa4>
|
|
8003a20: 693b ldr r3, [r7, #16]
|
|
8003a22: 2b09 cmp r3, #9
|
|
8003a24: d002 beq.n 8003a2c <RTC_DateUpdate+0xa4>
|
|
8003a26: 693b ldr r3, [r7, #16]
|
|
8003a28: 2b0b cmp r3, #11
|
|
8003a2a: d10c bne.n 8003a46 <RTC_DateUpdate+0xbe>
|
|
{
|
|
if (day < 30U)
|
|
8003a2c: 68fb ldr r3, [r7, #12]
|
|
8003a2e: 2b1d cmp r3, #29
|
|
8003a30: d803 bhi.n 8003a3a <RTC_DateUpdate+0xb2>
|
|
{
|
|
day++;
|
|
8003a32: 68fb ldr r3, [r7, #12]
|
|
8003a34: 3301 adds r3, #1
|
|
8003a36: 60fb str r3, [r7, #12]
|
|
if (day < 30U)
|
|
8003a38: e02c b.n 8003a94 <RTC_DateUpdate+0x10c>
|
|
}
|
|
/* Date structure member: day = 30 */
|
|
else
|
|
{
|
|
month++;
|
|
8003a3a: 693b ldr r3, [r7, #16]
|
|
8003a3c: 3301 adds r3, #1
|
|
8003a3e: 613b str r3, [r7, #16]
|
|
day = 1U;
|
|
8003a40: 2301 movs r3, #1
|
|
8003a42: 60fb str r3, [r7, #12]
|
|
if (day < 30U)
|
|
8003a44: e026 b.n 8003a94 <RTC_DateUpdate+0x10c>
|
|
}
|
|
}
|
|
else if (month == 2U)
|
|
8003a46: 693b ldr r3, [r7, #16]
|
|
8003a48: 2b02 cmp r3, #2
|
|
8003a4a: d123 bne.n 8003a94 <RTC_DateUpdate+0x10c>
|
|
{
|
|
if (day < 28U)
|
|
8003a4c: 68fb ldr r3, [r7, #12]
|
|
8003a4e: 2b1b cmp r3, #27
|
|
8003a50: d803 bhi.n 8003a5a <RTC_DateUpdate+0xd2>
|
|
{
|
|
day++;
|
|
8003a52: 68fb ldr r3, [r7, #12]
|
|
8003a54: 3301 adds r3, #1
|
|
8003a56: 60fb str r3, [r7, #12]
|
|
8003a58: e01c b.n 8003a94 <RTC_DateUpdate+0x10c>
|
|
}
|
|
else if (day == 28U)
|
|
8003a5a: 68fb ldr r3, [r7, #12]
|
|
8003a5c: 2b1c cmp r3, #28
|
|
8003a5e: d111 bne.n 8003a84 <RTC_DateUpdate+0xfc>
|
|
{
|
|
/* Leap year */
|
|
if (RTC_IsLeapYear(year))
|
|
8003a60: 697b ldr r3, [r7, #20]
|
|
8003a62: b29b uxth r3, r3
|
|
8003a64: 4618 mov r0, r3
|
|
8003a66: f000 f839 bl 8003adc <RTC_IsLeapYear>
|
|
8003a6a: 4603 mov r3, r0
|
|
8003a6c: 2b00 cmp r3, #0
|
|
8003a6e: d003 beq.n 8003a78 <RTC_DateUpdate+0xf0>
|
|
{
|
|
day++;
|
|
8003a70: 68fb ldr r3, [r7, #12]
|
|
8003a72: 3301 adds r3, #1
|
|
8003a74: 60fb str r3, [r7, #12]
|
|
8003a76: e00d b.n 8003a94 <RTC_DateUpdate+0x10c>
|
|
}
|
|
else
|
|
{
|
|
month++;
|
|
8003a78: 693b ldr r3, [r7, #16]
|
|
8003a7a: 3301 adds r3, #1
|
|
8003a7c: 613b str r3, [r7, #16]
|
|
day = 1U;
|
|
8003a7e: 2301 movs r3, #1
|
|
8003a80: 60fb str r3, [r7, #12]
|
|
8003a82: e007 b.n 8003a94 <RTC_DateUpdate+0x10c>
|
|
}
|
|
}
|
|
else if (day == 29U)
|
|
8003a84: 68fb ldr r3, [r7, #12]
|
|
8003a86: 2b1d cmp r3, #29
|
|
8003a88: d104 bne.n 8003a94 <RTC_DateUpdate+0x10c>
|
|
{
|
|
month++;
|
|
8003a8a: 693b ldr r3, [r7, #16]
|
|
8003a8c: 3301 adds r3, #1
|
|
8003a8e: 613b str r3, [r7, #16]
|
|
day = 1U;
|
|
8003a90: 2301 movs r3, #1
|
|
8003a92: 60fb str r3, [r7, #12]
|
|
for (loop = 0U; loop < DayElapsed; loop++)
|
|
8003a94: 68bb ldr r3, [r7, #8]
|
|
8003a96: 3301 adds r3, #1
|
|
8003a98: 60bb str r3, [r7, #8]
|
|
8003a9a: 68ba ldr r2, [r7, #8]
|
|
8003a9c: 683b ldr r3, [r7, #0]
|
|
8003a9e: 429a cmp r2, r3
|
|
8003aa0: d38b bcc.n 80039ba <RTC_DateUpdate+0x32>
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Update year */
|
|
hrtc->DateToUpdate.Year = year;
|
|
8003aa2: 697b ldr r3, [r7, #20]
|
|
8003aa4: b2da uxtb r2, r3
|
|
8003aa6: 687b ldr r3, [r7, #4]
|
|
8003aa8: 73da strb r2, [r3, #15]
|
|
|
|
/* Update day and month */
|
|
hrtc->DateToUpdate.Month = month;
|
|
8003aaa: 693b ldr r3, [r7, #16]
|
|
8003aac: b2da uxtb r2, r3
|
|
8003aae: 687b ldr r3, [r7, #4]
|
|
8003ab0: 735a strb r2, [r3, #13]
|
|
hrtc->DateToUpdate.Date = day;
|
|
8003ab2: 68fb ldr r3, [r7, #12]
|
|
8003ab4: b2da uxtb r2, r3
|
|
8003ab6: 687b ldr r3, [r7, #4]
|
|
8003ab8: 739a strb r2, [r3, #14]
|
|
|
|
/* Update day of the week */
|
|
hrtc->DateToUpdate.WeekDay = RTC_WeekDayNum(year, month, day);
|
|
8003aba: 693b ldr r3, [r7, #16]
|
|
8003abc: b2db uxtb r3, r3
|
|
8003abe: 68fa ldr r2, [r7, #12]
|
|
8003ac0: b2d2 uxtb r2, r2
|
|
8003ac2: 4619 mov r1, r3
|
|
8003ac4: 6978 ldr r0, [r7, #20]
|
|
8003ac6: f000 f83b bl 8003b40 <RTC_WeekDayNum>
|
|
8003aca: 4603 mov r3, r0
|
|
8003acc: 461a mov r2, r3
|
|
8003ace: 687b ldr r3, [r7, #4]
|
|
8003ad0: 731a strb r2, [r3, #12]
|
|
}
|
|
8003ad2: bf00 nop
|
|
8003ad4: 3718 adds r7, #24
|
|
8003ad6: 46bd mov sp, r7
|
|
8003ad8: bd80 pop {r7, pc}
|
|
...
|
|
|
|
08003adc <RTC_IsLeapYear>:
|
|
* @param nYear year to check
|
|
* @retval 1: leap year
|
|
* 0: not leap year
|
|
*/
|
|
static uint8_t RTC_IsLeapYear(uint16_t nYear)
|
|
{
|
|
8003adc: b480 push {r7}
|
|
8003ade: b083 sub sp, #12
|
|
8003ae0: af00 add r7, sp, #0
|
|
8003ae2: 4603 mov r3, r0
|
|
8003ae4: 80fb strh r3, [r7, #6]
|
|
if ((nYear % 4U) != 0U)
|
|
8003ae6: 88fb ldrh r3, [r7, #6]
|
|
8003ae8: f003 0303 and.w r3, r3, #3
|
|
8003aec: b29b uxth r3, r3
|
|
8003aee: 2b00 cmp r3, #0
|
|
8003af0: d001 beq.n 8003af6 <RTC_IsLeapYear+0x1a>
|
|
{
|
|
return 0U;
|
|
8003af2: 2300 movs r3, #0
|
|
8003af4: e01d b.n 8003b32 <RTC_IsLeapYear+0x56>
|
|
}
|
|
|
|
if ((nYear % 100U) != 0U)
|
|
8003af6: 88fb ldrh r3, [r7, #6]
|
|
8003af8: 4a10 ldr r2, [pc, #64] ; (8003b3c <RTC_IsLeapYear+0x60>)
|
|
8003afa: fba2 1203 umull r1, r2, r2, r3
|
|
8003afe: 0952 lsrs r2, r2, #5
|
|
8003b00: 2164 movs r1, #100 ; 0x64
|
|
8003b02: fb01 f202 mul.w r2, r1, r2
|
|
8003b06: 1a9b subs r3, r3, r2
|
|
8003b08: b29b uxth r3, r3
|
|
8003b0a: 2b00 cmp r3, #0
|
|
8003b0c: d001 beq.n 8003b12 <RTC_IsLeapYear+0x36>
|
|
{
|
|
return 1U;
|
|
8003b0e: 2301 movs r3, #1
|
|
8003b10: e00f b.n 8003b32 <RTC_IsLeapYear+0x56>
|
|
}
|
|
|
|
if ((nYear % 400U) == 0U)
|
|
8003b12: 88fb ldrh r3, [r7, #6]
|
|
8003b14: 4a09 ldr r2, [pc, #36] ; (8003b3c <RTC_IsLeapYear+0x60>)
|
|
8003b16: fba2 1203 umull r1, r2, r2, r3
|
|
8003b1a: 09d2 lsrs r2, r2, #7
|
|
8003b1c: f44f 71c8 mov.w r1, #400 ; 0x190
|
|
8003b20: fb01 f202 mul.w r2, r1, r2
|
|
8003b24: 1a9b subs r3, r3, r2
|
|
8003b26: b29b uxth r3, r3
|
|
8003b28: 2b00 cmp r3, #0
|
|
8003b2a: d101 bne.n 8003b30 <RTC_IsLeapYear+0x54>
|
|
{
|
|
return 1U;
|
|
8003b2c: 2301 movs r3, #1
|
|
8003b2e: e000 b.n 8003b32 <RTC_IsLeapYear+0x56>
|
|
}
|
|
else
|
|
{
|
|
return 0U;
|
|
8003b30: 2300 movs r3, #0
|
|
}
|
|
}
|
|
8003b32: 4618 mov r0, r3
|
|
8003b34: 370c adds r7, #12
|
|
8003b36: 46bd mov sp, r7
|
|
8003b38: bc80 pop {r7}
|
|
8003b3a: 4770 bx lr
|
|
8003b3c: 51eb851f .word 0x51eb851f
|
|
|
|
08003b40 <RTC_WeekDayNum>:
|
|
* @arg RTC_WEEKDAY_FRIDAY
|
|
* @arg RTC_WEEKDAY_SATURDAY
|
|
* @arg RTC_WEEKDAY_SUNDAY
|
|
*/
|
|
static uint8_t RTC_WeekDayNum(uint32_t nYear, uint8_t nMonth, uint8_t nDay)
|
|
{
|
|
8003b40: b480 push {r7}
|
|
8003b42: b085 sub sp, #20
|
|
8003b44: af00 add r7, sp, #0
|
|
8003b46: 6078 str r0, [r7, #4]
|
|
8003b48: 460b mov r3, r1
|
|
8003b4a: 70fb strb r3, [r7, #3]
|
|
8003b4c: 4613 mov r3, r2
|
|
8003b4e: 70bb strb r3, [r7, #2]
|
|
uint32_t year = 0U, weekday = 0U;
|
|
8003b50: 2300 movs r3, #0
|
|
8003b52: 60bb str r3, [r7, #8]
|
|
8003b54: 2300 movs r3, #0
|
|
8003b56: 60fb str r3, [r7, #12]
|
|
|
|
year = 2000U + nYear;
|
|
8003b58: 687b ldr r3, [r7, #4]
|
|
8003b5a: f503 63fa add.w r3, r3, #2000 ; 0x7d0
|
|
8003b5e: 60bb str r3, [r7, #8]
|
|
|
|
if (nMonth < 3U)
|
|
8003b60: 78fb ldrb r3, [r7, #3]
|
|
8003b62: 2b02 cmp r3, #2
|
|
8003b64: d82d bhi.n 8003bc2 <RTC_WeekDayNum+0x82>
|
|
{
|
|
/*D = { [(23 x month)/9] + day + 4 + year + [(year-1)/4] - [(year-1)/100] + [(year-1)/400] } mod 7*/
|
|
weekday = (((23U * nMonth) / 9U) + nDay + 4U + year + ((year - 1U) / 4U) - ((year - 1U) / 100U) + ((year - 1U) / 400U)) % 7U;
|
|
8003b66: 78fa ldrb r2, [r7, #3]
|
|
8003b68: 4613 mov r3, r2
|
|
8003b6a: 005b lsls r3, r3, #1
|
|
8003b6c: 4413 add r3, r2
|
|
8003b6e: 00db lsls r3, r3, #3
|
|
8003b70: 1a9b subs r3, r3, r2
|
|
8003b72: 4a2c ldr r2, [pc, #176] ; (8003c24 <RTC_WeekDayNum+0xe4>)
|
|
8003b74: fba2 2303 umull r2, r3, r2, r3
|
|
8003b78: 085a lsrs r2, r3, #1
|
|
8003b7a: 78bb ldrb r3, [r7, #2]
|
|
8003b7c: 441a add r2, r3
|
|
8003b7e: 68bb ldr r3, [r7, #8]
|
|
8003b80: 441a add r2, r3
|
|
8003b82: 68bb ldr r3, [r7, #8]
|
|
8003b84: 3b01 subs r3, #1
|
|
8003b86: 089b lsrs r3, r3, #2
|
|
8003b88: 441a add r2, r3
|
|
8003b8a: 68bb ldr r3, [r7, #8]
|
|
8003b8c: 3b01 subs r3, #1
|
|
8003b8e: 4926 ldr r1, [pc, #152] ; (8003c28 <RTC_WeekDayNum+0xe8>)
|
|
8003b90: fba1 1303 umull r1, r3, r1, r3
|
|
8003b94: 095b lsrs r3, r3, #5
|
|
8003b96: 1ad2 subs r2, r2, r3
|
|
8003b98: 68bb ldr r3, [r7, #8]
|
|
8003b9a: 3b01 subs r3, #1
|
|
8003b9c: 4922 ldr r1, [pc, #136] ; (8003c28 <RTC_WeekDayNum+0xe8>)
|
|
8003b9e: fba1 1303 umull r1, r3, r1, r3
|
|
8003ba2: 09db lsrs r3, r3, #7
|
|
8003ba4: 4413 add r3, r2
|
|
8003ba6: 1d1a adds r2, r3, #4
|
|
8003ba8: 4b20 ldr r3, [pc, #128] ; (8003c2c <RTC_WeekDayNum+0xec>)
|
|
8003baa: fba3 1302 umull r1, r3, r3, r2
|
|
8003bae: 1ad1 subs r1, r2, r3
|
|
8003bb0: 0849 lsrs r1, r1, #1
|
|
8003bb2: 440b add r3, r1
|
|
8003bb4: 0899 lsrs r1, r3, #2
|
|
8003bb6: 460b mov r3, r1
|
|
8003bb8: 00db lsls r3, r3, #3
|
|
8003bba: 1a5b subs r3, r3, r1
|
|
8003bbc: 1ad3 subs r3, r2, r3
|
|
8003bbe: 60fb str r3, [r7, #12]
|
|
8003bc0: e029 b.n 8003c16 <RTC_WeekDayNum+0xd6>
|
|
}
|
|
else
|
|
{
|
|
/*D = { [(23 x month)/9] + day + 4 + year + [year/4] - [year/100] + [year/400] - 2 } mod 7*/
|
|
weekday = (((23U * nMonth) / 9U) + nDay + 4U + year + (year / 4U) - (year / 100U) + (year / 400U) - 2U) % 7U;
|
|
8003bc2: 78fa ldrb r2, [r7, #3]
|
|
8003bc4: 4613 mov r3, r2
|
|
8003bc6: 005b lsls r3, r3, #1
|
|
8003bc8: 4413 add r3, r2
|
|
8003bca: 00db lsls r3, r3, #3
|
|
8003bcc: 1a9b subs r3, r3, r2
|
|
8003bce: 4a15 ldr r2, [pc, #84] ; (8003c24 <RTC_WeekDayNum+0xe4>)
|
|
8003bd0: fba2 2303 umull r2, r3, r2, r3
|
|
8003bd4: 085a lsrs r2, r3, #1
|
|
8003bd6: 78bb ldrb r3, [r7, #2]
|
|
8003bd8: 441a add r2, r3
|
|
8003bda: 68bb ldr r3, [r7, #8]
|
|
8003bdc: 441a add r2, r3
|
|
8003bde: 68bb ldr r3, [r7, #8]
|
|
8003be0: 089b lsrs r3, r3, #2
|
|
8003be2: 441a add r2, r3
|
|
8003be4: 68bb ldr r3, [r7, #8]
|
|
8003be6: 4910 ldr r1, [pc, #64] ; (8003c28 <RTC_WeekDayNum+0xe8>)
|
|
8003be8: fba1 1303 umull r1, r3, r1, r3
|
|
8003bec: 095b lsrs r3, r3, #5
|
|
8003bee: 1ad2 subs r2, r2, r3
|
|
8003bf0: 68bb ldr r3, [r7, #8]
|
|
8003bf2: 490d ldr r1, [pc, #52] ; (8003c28 <RTC_WeekDayNum+0xe8>)
|
|
8003bf4: fba1 1303 umull r1, r3, r1, r3
|
|
8003bf8: 09db lsrs r3, r3, #7
|
|
8003bfa: 4413 add r3, r2
|
|
8003bfc: 1c9a adds r2, r3, #2
|
|
8003bfe: 4b0b ldr r3, [pc, #44] ; (8003c2c <RTC_WeekDayNum+0xec>)
|
|
8003c00: fba3 1302 umull r1, r3, r3, r2
|
|
8003c04: 1ad1 subs r1, r2, r3
|
|
8003c06: 0849 lsrs r1, r1, #1
|
|
8003c08: 440b add r3, r1
|
|
8003c0a: 0899 lsrs r1, r3, #2
|
|
8003c0c: 460b mov r3, r1
|
|
8003c0e: 00db lsls r3, r3, #3
|
|
8003c10: 1a5b subs r3, r3, r1
|
|
8003c12: 1ad3 subs r3, r2, r3
|
|
8003c14: 60fb str r3, [r7, #12]
|
|
}
|
|
|
|
return (uint8_t)weekday;
|
|
8003c16: 68fb ldr r3, [r7, #12]
|
|
8003c18: b2db uxtb r3, r3
|
|
}
|
|
8003c1a: 4618 mov r0, r3
|
|
8003c1c: 3714 adds r7, #20
|
|
8003c1e: 46bd mov sp, r7
|
|
8003c20: bc80 pop {r7}
|
|
8003c22: 4770 bx lr
|
|
8003c24: 38e38e39 .word 0x38e38e39
|
|
8003c28: 51eb851f .word 0x51eb851f
|
|
8003c2c: 24924925 .word 0x24924925
|
|
|
|
08003c30 <HAL_SPI_Init>:
|
|
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
|
|
* the configuration information for SPI module.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
|
|
{
|
|
8003c30: b580 push {r7, lr}
|
|
8003c32: b082 sub sp, #8
|
|
8003c34: af00 add r7, sp, #0
|
|
8003c36: 6078 str r0, [r7, #4]
|
|
/* Check the SPI handle allocation */
|
|
if (hspi == NULL)
|
|
8003c38: 687b ldr r3, [r7, #4]
|
|
8003c3a: 2b00 cmp r3, #0
|
|
8003c3c: d101 bne.n 8003c42 <HAL_SPI_Init+0x12>
|
|
{
|
|
return HAL_ERROR;
|
|
8003c3e: 2301 movs r3, #1
|
|
8003c40: e053 b.n 8003cea <HAL_SPI_Init+0xba>
|
|
if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
|
|
{
|
|
assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
|
|
}
|
|
#else
|
|
hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
|
|
8003c42: 687b ldr r3, [r7, #4]
|
|
8003c44: 2200 movs r2, #0
|
|
8003c46: 629a str r2, [r3, #40] ; 0x28
|
|
#endif /* USE_SPI_CRC */
|
|
|
|
if (hspi->State == HAL_SPI_STATE_RESET)
|
|
8003c48: 687b ldr r3, [r7, #4]
|
|
8003c4a: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
|
|
8003c4e: b2db uxtb r3, r3
|
|
8003c50: 2b00 cmp r3, #0
|
|
8003c52: d106 bne.n 8003c62 <HAL_SPI_Init+0x32>
|
|
{
|
|
/* Allocate lock resource and initialize it */
|
|
hspi->Lock = HAL_UNLOCKED;
|
|
8003c54: 687b ldr r3, [r7, #4]
|
|
8003c56: 2200 movs r2, #0
|
|
8003c58: f883 2050 strb.w r2, [r3, #80] ; 0x50
|
|
|
|
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
|
|
hspi->MspInitCallback(hspi);
|
|
#else
|
|
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
|
|
HAL_SPI_MspInit(hspi);
|
|
8003c5c: 6878 ldr r0, [r7, #4]
|
|
8003c5e: f006 fa0f bl 800a080 <HAL_SPI_MspInit>
|
|
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
|
|
}
|
|
|
|
hspi->State = HAL_SPI_STATE_BUSY;
|
|
8003c62: 687b ldr r3, [r7, #4]
|
|
8003c64: 2202 movs r2, #2
|
|
8003c66: f883 2051 strb.w r2, [r3, #81] ; 0x51
|
|
|
|
/* Disable the selected SPI peripheral */
|
|
__HAL_SPI_DISABLE(hspi);
|
|
8003c6a: 687b ldr r3, [r7, #4]
|
|
8003c6c: 681b ldr r3, [r3, #0]
|
|
8003c6e: 681a ldr r2, [r3, #0]
|
|
8003c70: 687b ldr r3, [r7, #4]
|
|
8003c72: 681b ldr r3, [r3, #0]
|
|
8003c74: f022 0240 bic.w r2, r2, #64 ; 0x40
|
|
8003c78: 601a str r2, [r3, #0]
|
|
|
|
/*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
|
|
/* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
|
|
Communication speed, First bit and CRC calculation state */
|
|
WRITE_REG(hspi->Instance->CR1, (hspi->Init.Mode | hspi->Init.Direction | hspi->Init.DataSize |
|
|
8003c7a: 687b ldr r3, [r7, #4]
|
|
8003c7c: 685a ldr r2, [r3, #4]
|
|
8003c7e: 687b ldr r3, [r7, #4]
|
|
8003c80: 689b ldr r3, [r3, #8]
|
|
8003c82: 431a orrs r2, r3
|
|
8003c84: 687b ldr r3, [r7, #4]
|
|
8003c86: 68db ldr r3, [r3, #12]
|
|
8003c88: 431a orrs r2, r3
|
|
8003c8a: 687b ldr r3, [r7, #4]
|
|
8003c8c: 691b ldr r3, [r3, #16]
|
|
8003c8e: 431a orrs r2, r3
|
|
8003c90: 687b ldr r3, [r7, #4]
|
|
8003c92: 695b ldr r3, [r3, #20]
|
|
8003c94: 431a orrs r2, r3
|
|
8003c96: 687b ldr r3, [r7, #4]
|
|
8003c98: 699b ldr r3, [r3, #24]
|
|
8003c9a: f403 7300 and.w r3, r3, #512 ; 0x200
|
|
8003c9e: 431a orrs r2, r3
|
|
8003ca0: 687b ldr r3, [r7, #4]
|
|
8003ca2: 69db ldr r3, [r3, #28]
|
|
8003ca4: 431a orrs r2, r3
|
|
8003ca6: 687b ldr r3, [r7, #4]
|
|
8003ca8: 6a1b ldr r3, [r3, #32]
|
|
8003caa: ea42 0103 orr.w r1, r2, r3
|
|
8003cae: 687b ldr r3, [r7, #4]
|
|
8003cb0: 6a9a ldr r2, [r3, #40] ; 0x28
|
|
8003cb2: 687b ldr r3, [r7, #4]
|
|
8003cb4: 681b ldr r3, [r3, #0]
|
|
8003cb6: 430a orrs r2, r1
|
|
8003cb8: 601a str r2, [r3, #0]
|
|
hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS & SPI_CR1_SSM) |
|
|
hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit | hspi->Init.CRCCalculation));
|
|
|
|
/* Configure : NSS management */
|
|
WRITE_REG(hspi->Instance->CR2, ((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE));
|
|
8003cba: 687b ldr r3, [r7, #4]
|
|
8003cbc: 699b ldr r3, [r3, #24]
|
|
8003cbe: 0c1a lsrs r2, r3, #16
|
|
8003cc0: 687b ldr r3, [r7, #4]
|
|
8003cc2: 681b ldr r3, [r3, #0]
|
|
8003cc4: f002 0204 and.w r2, r2, #4
|
|
8003cc8: 605a str r2, [r3, #4]
|
|
}
|
|
#endif /* USE_SPI_CRC */
|
|
|
|
#if defined(SPI_I2SCFGR_I2SMOD)
|
|
/* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
|
|
CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
|
|
8003cca: 687b ldr r3, [r7, #4]
|
|
8003ccc: 681b ldr r3, [r3, #0]
|
|
8003cce: 69da ldr r2, [r3, #28]
|
|
8003cd0: 687b ldr r3, [r7, #4]
|
|
8003cd2: 681b ldr r3, [r3, #0]
|
|
8003cd4: f422 6200 bic.w r2, r2, #2048 ; 0x800
|
|
8003cd8: 61da str r2, [r3, #28]
|
|
#endif /* SPI_I2SCFGR_I2SMOD */
|
|
|
|
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
|
|
8003cda: 687b ldr r3, [r7, #4]
|
|
8003cdc: 2200 movs r2, #0
|
|
8003cde: 655a str r2, [r3, #84] ; 0x54
|
|
hspi->State = HAL_SPI_STATE_READY;
|
|
8003ce0: 687b ldr r3, [r7, #4]
|
|
8003ce2: 2201 movs r2, #1
|
|
8003ce4: f883 2051 strb.w r2, [r3, #81] ; 0x51
|
|
|
|
return HAL_OK;
|
|
8003ce8: 2300 movs r3, #0
|
|
}
|
|
8003cea: 4618 mov r0, r3
|
|
8003cec: 3708 adds r7, #8
|
|
8003cee: 46bd mov sp, r7
|
|
8003cf0: bd80 pop {r7, pc}
|
|
|
|
08003cf2 <HAL_SPI_Transmit>:
|
|
* @param Size amount of data to be sent
|
|
* @param Timeout Timeout duration
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
|
|
{
|
|
8003cf2: b580 push {r7, lr}
|
|
8003cf4: b088 sub sp, #32
|
|
8003cf6: af00 add r7, sp, #0
|
|
8003cf8: 60f8 str r0, [r7, #12]
|
|
8003cfa: 60b9 str r1, [r7, #8]
|
|
8003cfc: 603b str r3, [r7, #0]
|
|
8003cfe: 4613 mov r3, r2
|
|
8003d00: 80fb strh r3, [r7, #6]
|
|
uint32_t tickstart;
|
|
HAL_StatusTypeDef errorcode = HAL_OK;
|
|
8003d02: 2300 movs r3, #0
|
|
8003d04: 77fb strb r3, [r7, #31]
|
|
|
|
/* Check Direction parameter */
|
|
assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
|
|
|
|
/* Process Locked */
|
|
__HAL_LOCK(hspi);
|
|
8003d06: 68fb ldr r3, [r7, #12]
|
|
8003d08: f893 3050 ldrb.w r3, [r3, #80] ; 0x50
|
|
8003d0c: 2b01 cmp r3, #1
|
|
8003d0e: d101 bne.n 8003d14 <HAL_SPI_Transmit+0x22>
|
|
8003d10: 2302 movs r3, #2
|
|
8003d12: e11e b.n 8003f52 <HAL_SPI_Transmit+0x260>
|
|
8003d14: 68fb ldr r3, [r7, #12]
|
|
8003d16: 2201 movs r2, #1
|
|
8003d18: f883 2050 strb.w r2, [r3, #80] ; 0x50
|
|
|
|
/* Init tickstart for timeout management*/
|
|
tickstart = HAL_GetTick();
|
|
8003d1c: f7fd f9c2 bl 80010a4 <HAL_GetTick>
|
|
8003d20: 61b8 str r0, [r7, #24]
|
|
initial_TxXferCount = Size;
|
|
8003d22: 88fb ldrh r3, [r7, #6]
|
|
8003d24: 82fb strh r3, [r7, #22]
|
|
|
|
if (hspi->State != HAL_SPI_STATE_READY)
|
|
8003d26: 68fb ldr r3, [r7, #12]
|
|
8003d28: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
|
|
8003d2c: b2db uxtb r3, r3
|
|
8003d2e: 2b01 cmp r3, #1
|
|
8003d30: d002 beq.n 8003d38 <HAL_SPI_Transmit+0x46>
|
|
{
|
|
errorcode = HAL_BUSY;
|
|
8003d32: 2302 movs r3, #2
|
|
8003d34: 77fb strb r3, [r7, #31]
|
|
goto error;
|
|
8003d36: e103 b.n 8003f40 <HAL_SPI_Transmit+0x24e>
|
|
}
|
|
|
|
if ((pData == NULL) || (Size == 0U))
|
|
8003d38: 68bb ldr r3, [r7, #8]
|
|
8003d3a: 2b00 cmp r3, #0
|
|
8003d3c: d002 beq.n 8003d44 <HAL_SPI_Transmit+0x52>
|
|
8003d3e: 88fb ldrh r3, [r7, #6]
|
|
8003d40: 2b00 cmp r3, #0
|
|
8003d42: d102 bne.n 8003d4a <HAL_SPI_Transmit+0x58>
|
|
{
|
|
errorcode = HAL_ERROR;
|
|
8003d44: 2301 movs r3, #1
|
|
8003d46: 77fb strb r3, [r7, #31]
|
|
goto error;
|
|
8003d48: e0fa b.n 8003f40 <HAL_SPI_Transmit+0x24e>
|
|
}
|
|
|
|
/* Set the transaction information */
|
|
hspi->State = HAL_SPI_STATE_BUSY_TX;
|
|
8003d4a: 68fb ldr r3, [r7, #12]
|
|
8003d4c: 2203 movs r2, #3
|
|
8003d4e: f883 2051 strb.w r2, [r3, #81] ; 0x51
|
|
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
|
|
8003d52: 68fb ldr r3, [r7, #12]
|
|
8003d54: 2200 movs r2, #0
|
|
8003d56: 655a str r2, [r3, #84] ; 0x54
|
|
hspi->pTxBuffPtr = (uint8_t *)pData;
|
|
8003d58: 68fb ldr r3, [r7, #12]
|
|
8003d5a: 68ba ldr r2, [r7, #8]
|
|
8003d5c: 631a str r2, [r3, #48] ; 0x30
|
|
hspi->TxXferSize = Size;
|
|
8003d5e: 68fb ldr r3, [r7, #12]
|
|
8003d60: 88fa ldrh r2, [r7, #6]
|
|
8003d62: 869a strh r2, [r3, #52] ; 0x34
|
|
hspi->TxXferCount = Size;
|
|
8003d64: 68fb ldr r3, [r7, #12]
|
|
8003d66: 88fa ldrh r2, [r7, #6]
|
|
8003d68: 86da strh r2, [r3, #54] ; 0x36
|
|
|
|
/*Init field not used in handle to zero */
|
|
hspi->pRxBuffPtr = (uint8_t *)NULL;
|
|
8003d6a: 68fb ldr r3, [r7, #12]
|
|
8003d6c: 2200 movs r2, #0
|
|
8003d6e: 639a str r2, [r3, #56] ; 0x38
|
|
hspi->RxXferSize = 0U;
|
|
8003d70: 68fb ldr r3, [r7, #12]
|
|
8003d72: 2200 movs r2, #0
|
|
8003d74: 879a strh r2, [r3, #60] ; 0x3c
|
|
hspi->RxXferCount = 0U;
|
|
8003d76: 68fb ldr r3, [r7, #12]
|
|
8003d78: 2200 movs r2, #0
|
|
8003d7a: 87da strh r2, [r3, #62] ; 0x3e
|
|
hspi->TxISR = NULL;
|
|
8003d7c: 68fb ldr r3, [r7, #12]
|
|
8003d7e: 2200 movs r2, #0
|
|
8003d80: 645a str r2, [r3, #68] ; 0x44
|
|
hspi->RxISR = NULL;
|
|
8003d82: 68fb ldr r3, [r7, #12]
|
|
8003d84: 2200 movs r2, #0
|
|
8003d86: 641a str r2, [r3, #64] ; 0x40
|
|
|
|
/* Configure communication direction : 1Line */
|
|
if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
|
|
8003d88: 68fb ldr r3, [r7, #12]
|
|
8003d8a: 689b ldr r3, [r3, #8]
|
|
8003d8c: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
|
|
8003d90: d107 bne.n 8003da2 <HAL_SPI_Transmit+0xb0>
|
|
{
|
|
SPI_1LINE_TX(hspi);
|
|
8003d92: 68fb ldr r3, [r7, #12]
|
|
8003d94: 681b ldr r3, [r3, #0]
|
|
8003d96: 681a ldr r2, [r3, #0]
|
|
8003d98: 68fb ldr r3, [r7, #12]
|
|
8003d9a: 681b ldr r3, [r3, #0]
|
|
8003d9c: f442 4280 orr.w r2, r2, #16384 ; 0x4000
|
|
8003da0: 601a str r2, [r3, #0]
|
|
SPI_RESET_CRC(hspi);
|
|
}
|
|
#endif /* USE_SPI_CRC */
|
|
|
|
/* Check if the SPI is already enabled */
|
|
if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
|
|
8003da2: 68fb ldr r3, [r7, #12]
|
|
8003da4: 681b ldr r3, [r3, #0]
|
|
8003da6: 681b ldr r3, [r3, #0]
|
|
8003da8: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
8003dac: 2b40 cmp r3, #64 ; 0x40
|
|
8003dae: d007 beq.n 8003dc0 <HAL_SPI_Transmit+0xce>
|
|
{
|
|
/* Enable SPI peripheral */
|
|
__HAL_SPI_ENABLE(hspi);
|
|
8003db0: 68fb ldr r3, [r7, #12]
|
|
8003db2: 681b ldr r3, [r3, #0]
|
|
8003db4: 681a ldr r2, [r3, #0]
|
|
8003db6: 68fb ldr r3, [r7, #12]
|
|
8003db8: 681b ldr r3, [r3, #0]
|
|
8003dba: f042 0240 orr.w r2, r2, #64 ; 0x40
|
|
8003dbe: 601a str r2, [r3, #0]
|
|
}
|
|
|
|
/* Transmit data in 16 Bit mode */
|
|
if (hspi->Init.DataSize == SPI_DATASIZE_16BIT)
|
|
8003dc0: 68fb ldr r3, [r7, #12]
|
|
8003dc2: 68db ldr r3, [r3, #12]
|
|
8003dc4: f5b3 6f00 cmp.w r3, #2048 ; 0x800
|
|
8003dc8: d14b bne.n 8003e62 <HAL_SPI_Transmit+0x170>
|
|
{
|
|
if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
|
|
8003dca: 68fb ldr r3, [r7, #12]
|
|
8003dcc: 685b ldr r3, [r3, #4]
|
|
8003dce: 2b00 cmp r3, #0
|
|
8003dd0: d002 beq.n 8003dd8 <HAL_SPI_Transmit+0xe6>
|
|
8003dd2: 8afb ldrh r3, [r7, #22]
|
|
8003dd4: 2b01 cmp r3, #1
|
|
8003dd6: d13e bne.n 8003e56 <HAL_SPI_Transmit+0x164>
|
|
{
|
|
hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
|
|
8003dd8: 68fb ldr r3, [r7, #12]
|
|
8003dda: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
8003ddc: 881a ldrh r2, [r3, #0]
|
|
8003dde: 68fb ldr r3, [r7, #12]
|
|
8003de0: 681b ldr r3, [r3, #0]
|
|
8003de2: 60da str r2, [r3, #12]
|
|
hspi->pTxBuffPtr += sizeof(uint16_t);
|
|
8003de4: 68fb ldr r3, [r7, #12]
|
|
8003de6: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
8003de8: 1c9a adds r2, r3, #2
|
|
8003dea: 68fb ldr r3, [r7, #12]
|
|
8003dec: 631a str r2, [r3, #48] ; 0x30
|
|
hspi->TxXferCount--;
|
|
8003dee: 68fb ldr r3, [r7, #12]
|
|
8003df0: 8edb ldrh r3, [r3, #54] ; 0x36
|
|
8003df2: b29b uxth r3, r3
|
|
8003df4: 3b01 subs r3, #1
|
|
8003df6: b29a uxth r2, r3
|
|
8003df8: 68fb ldr r3, [r7, #12]
|
|
8003dfa: 86da strh r2, [r3, #54] ; 0x36
|
|
}
|
|
/* Transmit data in 16 Bit mode */
|
|
while (hspi->TxXferCount > 0U)
|
|
8003dfc: e02b b.n 8003e56 <HAL_SPI_Transmit+0x164>
|
|
{
|
|
/* Wait until TXE flag is set to send data */
|
|
if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))
|
|
8003dfe: 68fb ldr r3, [r7, #12]
|
|
8003e00: 681b ldr r3, [r3, #0]
|
|
8003e02: 689b ldr r3, [r3, #8]
|
|
8003e04: f003 0302 and.w r3, r3, #2
|
|
8003e08: 2b02 cmp r3, #2
|
|
8003e0a: d112 bne.n 8003e32 <HAL_SPI_Transmit+0x140>
|
|
{
|
|
hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
|
|
8003e0c: 68fb ldr r3, [r7, #12]
|
|
8003e0e: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
8003e10: 881a ldrh r2, [r3, #0]
|
|
8003e12: 68fb ldr r3, [r7, #12]
|
|
8003e14: 681b ldr r3, [r3, #0]
|
|
8003e16: 60da str r2, [r3, #12]
|
|
hspi->pTxBuffPtr += sizeof(uint16_t);
|
|
8003e18: 68fb ldr r3, [r7, #12]
|
|
8003e1a: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
8003e1c: 1c9a adds r2, r3, #2
|
|
8003e1e: 68fb ldr r3, [r7, #12]
|
|
8003e20: 631a str r2, [r3, #48] ; 0x30
|
|
hspi->TxXferCount--;
|
|
8003e22: 68fb ldr r3, [r7, #12]
|
|
8003e24: 8edb ldrh r3, [r3, #54] ; 0x36
|
|
8003e26: b29b uxth r3, r3
|
|
8003e28: 3b01 subs r3, #1
|
|
8003e2a: b29a uxth r2, r3
|
|
8003e2c: 68fb ldr r3, [r7, #12]
|
|
8003e2e: 86da strh r2, [r3, #54] ; 0x36
|
|
8003e30: e011 b.n 8003e56 <HAL_SPI_Transmit+0x164>
|
|
}
|
|
else
|
|
{
|
|
/* Timeout management */
|
|
if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
|
|
8003e32: f7fd f937 bl 80010a4 <HAL_GetTick>
|
|
8003e36: 4602 mov r2, r0
|
|
8003e38: 69bb ldr r3, [r7, #24]
|
|
8003e3a: 1ad3 subs r3, r2, r3
|
|
8003e3c: 683a ldr r2, [r7, #0]
|
|
8003e3e: 429a cmp r2, r3
|
|
8003e40: d803 bhi.n 8003e4a <HAL_SPI_Transmit+0x158>
|
|
8003e42: 683b ldr r3, [r7, #0]
|
|
8003e44: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
|
8003e48: d102 bne.n 8003e50 <HAL_SPI_Transmit+0x15e>
|
|
8003e4a: 683b ldr r3, [r7, #0]
|
|
8003e4c: 2b00 cmp r3, #0
|
|
8003e4e: d102 bne.n 8003e56 <HAL_SPI_Transmit+0x164>
|
|
{
|
|
errorcode = HAL_TIMEOUT;
|
|
8003e50: 2303 movs r3, #3
|
|
8003e52: 77fb strb r3, [r7, #31]
|
|
goto error;
|
|
8003e54: e074 b.n 8003f40 <HAL_SPI_Transmit+0x24e>
|
|
while (hspi->TxXferCount > 0U)
|
|
8003e56: 68fb ldr r3, [r7, #12]
|
|
8003e58: 8edb ldrh r3, [r3, #54] ; 0x36
|
|
8003e5a: b29b uxth r3, r3
|
|
8003e5c: 2b00 cmp r3, #0
|
|
8003e5e: d1ce bne.n 8003dfe <HAL_SPI_Transmit+0x10c>
|
|
8003e60: e04c b.n 8003efc <HAL_SPI_Transmit+0x20a>
|
|
}
|
|
}
|
|
/* Transmit data in 8 Bit mode */
|
|
else
|
|
{
|
|
if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
|
|
8003e62: 68fb ldr r3, [r7, #12]
|
|
8003e64: 685b ldr r3, [r3, #4]
|
|
8003e66: 2b00 cmp r3, #0
|
|
8003e68: d002 beq.n 8003e70 <HAL_SPI_Transmit+0x17e>
|
|
8003e6a: 8afb ldrh r3, [r7, #22]
|
|
8003e6c: 2b01 cmp r3, #1
|
|
8003e6e: d140 bne.n 8003ef2 <HAL_SPI_Transmit+0x200>
|
|
{
|
|
*((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
|
|
8003e70: 68fb ldr r3, [r7, #12]
|
|
8003e72: 6b1a ldr r2, [r3, #48] ; 0x30
|
|
8003e74: 68fb ldr r3, [r7, #12]
|
|
8003e76: 681b ldr r3, [r3, #0]
|
|
8003e78: 330c adds r3, #12
|
|
8003e7a: 7812 ldrb r2, [r2, #0]
|
|
8003e7c: 701a strb r2, [r3, #0]
|
|
hspi->pTxBuffPtr += sizeof(uint8_t);
|
|
8003e7e: 68fb ldr r3, [r7, #12]
|
|
8003e80: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
8003e82: 1c5a adds r2, r3, #1
|
|
8003e84: 68fb ldr r3, [r7, #12]
|
|
8003e86: 631a str r2, [r3, #48] ; 0x30
|
|
hspi->TxXferCount--;
|
|
8003e88: 68fb ldr r3, [r7, #12]
|
|
8003e8a: 8edb ldrh r3, [r3, #54] ; 0x36
|
|
8003e8c: b29b uxth r3, r3
|
|
8003e8e: 3b01 subs r3, #1
|
|
8003e90: b29a uxth r2, r3
|
|
8003e92: 68fb ldr r3, [r7, #12]
|
|
8003e94: 86da strh r2, [r3, #54] ; 0x36
|
|
}
|
|
while (hspi->TxXferCount > 0U)
|
|
8003e96: e02c b.n 8003ef2 <HAL_SPI_Transmit+0x200>
|
|
{
|
|
/* Wait until TXE flag is set to send data */
|
|
if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))
|
|
8003e98: 68fb ldr r3, [r7, #12]
|
|
8003e9a: 681b ldr r3, [r3, #0]
|
|
8003e9c: 689b ldr r3, [r3, #8]
|
|
8003e9e: f003 0302 and.w r3, r3, #2
|
|
8003ea2: 2b02 cmp r3, #2
|
|
8003ea4: d113 bne.n 8003ece <HAL_SPI_Transmit+0x1dc>
|
|
{
|
|
*((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
|
|
8003ea6: 68fb ldr r3, [r7, #12]
|
|
8003ea8: 6b1a ldr r2, [r3, #48] ; 0x30
|
|
8003eaa: 68fb ldr r3, [r7, #12]
|
|
8003eac: 681b ldr r3, [r3, #0]
|
|
8003eae: 330c adds r3, #12
|
|
8003eb0: 7812 ldrb r2, [r2, #0]
|
|
8003eb2: 701a strb r2, [r3, #0]
|
|
hspi->pTxBuffPtr += sizeof(uint8_t);
|
|
8003eb4: 68fb ldr r3, [r7, #12]
|
|
8003eb6: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
8003eb8: 1c5a adds r2, r3, #1
|
|
8003eba: 68fb ldr r3, [r7, #12]
|
|
8003ebc: 631a str r2, [r3, #48] ; 0x30
|
|
hspi->TxXferCount--;
|
|
8003ebe: 68fb ldr r3, [r7, #12]
|
|
8003ec0: 8edb ldrh r3, [r3, #54] ; 0x36
|
|
8003ec2: b29b uxth r3, r3
|
|
8003ec4: 3b01 subs r3, #1
|
|
8003ec6: b29a uxth r2, r3
|
|
8003ec8: 68fb ldr r3, [r7, #12]
|
|
8003eca: 86da strh r2, [r3, #54] ; 0x36
|
|
8003ecc: e011 b.n 8003ef2 <HAL_SPI_Transmit+0x200>
|
|
}
|
|
else
|
|
{
|
|
/* Timeout management */
|
|
if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
|
|
8003ece: f7fd f8e9 bl 80010a4 <HAL_GetTick>
|
|
8003ed2: 4602 mov r2, r0
|
|
8003ed4: 69bb ldr r3, [r7, #24]
|
|
8003ed6: 1ad3 subs r3, r2, r3
|
|
8003ed8: 683a ldr r2, [r7, #0]
|
|
8003eda: 429a cmp r2, r3
|
|
8003edc: d803 bhi.n 8003ee6 <HAL_SPI_Transmit+0x1f4>
|
|
8003ede: 683b ldr r3, [r7, #0]
|
|
8003ee0: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
|
8003ee4: d102 bne.n 8003eec <HAL_SPI_Transmit+0x1fa>
|
|
8003ee6: 683b ldr r3, [r7, #0]
|
|
8003ee8: 2b00 cmp r3, #0
|
|
8003eea: d102 bne.n 8003ef2 <HAL_SPI_Transmit+0x200>
|
|
{
|
|
errorcode = HAL_TIMEOUT;
|
|
8003eec: 2303 movs r3, #3
|
|
8003eee: 77fb strb r3, [r7, #31]
|
|
goto error;
|
|
8003ef0: e026 b.n 8003f40 <HAL_SPI_Transmit+0x24e>
|
|
while (hspi->TxXferCount > 0U)
|
|
8003ef2: 68fb ldr r3, [r7, #12]
|
|
8003ef4: 8edb ldrh r3, [r3, #54] ; 0x36
|
|
8003ef6: b29b uxth r3, r3
|
|
8003ef8: 2b00 cmp r3, #0
|
|
8003efa: d1cd bne.n 8003e98 <HAL_SPI_Transmit+0x1a6>
|
|
SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
|
|
}
|
|
#endif /* USE_SPI_CRC */
|
|
|
|
/* Check the end of the transaction */
|
|
if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK)
|
|
8003efc: 69ba ldr r2, [r7, #24]
|
|
8003efe: 6839 ldr r1, [r7, #0]
|
|
8003f00: 68f8 ldr r0, [r7, #12]
|
|
8003f02: f000 f894 bl 800402e <SPI_EndRxTxTransaction>
|
|
8003f06: 4603 mov r3, r0
|
|
8003f08: 2b00 cmp r3, #0
|
|
8003f0a: d002 beq.n 8003f12 <HAL_SPI_Transmit+0x220>
|
|
{
|
|
hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
|
|
8003f0c: 68fb ldr r3, [r7, #12]
|
|
8003f0e: 2220 movs r2, #32
|
|
8003f10: 655a str r2, [r3, #84] ; 0x54
|
|
}
|
|
|
|
/* Clear overrun flag in 2 Lines communication mode because received is not read */
|
|
if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
|
|
8003f12: 68fb ldr r3, [r7, #12]
|
|
8003f14: 689b ldr r3, [r3, #8]
|
|
8003f16: 2b00 cmp r3, #0
|
|
8003f18: d10a bne.n 8003f30 <HAL_SPI_Transmit+0x23e>
|
|
{
|
|
__HAL_SPI_CLEAR_OVRFLAG(hspi);
|
|
8003f1a: 2300 movs r3, #0
|
|
8003f1c: 613b str r3, [r7, #16]
|
|
8003f1e: 68fb ldr r3, [r7, #12]
|
|
8003f20: 681b ldr r3, [r3, #0]
|
|
8003f22: 68db ldr r3, [r3, #12]
|
|
8003f24: 613b str r3, [r7, #16]
|
|
8003f26: 68fb ldr r3, [r7, #12]
|
|
8003f28: 681b ldr r3, [r3, #0]
|
|
8003f2a: 689b ldr r3, [r3, #8]
|
|
8003f2c: 613b str r3, [r7, #16]
|
|
8003f2e: 693b ldr r3, [r7, #16]
|
|
}
|
|
|
|
if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
|
|
8003f30: 68fb ldr r3, [r7, #12]
|
|
8003f32: 6d5b ldr r3, [r3, #84] ; 0x54
|
|
8003f34: 2b00 cmp r3, #0
|
|
8003f36: d002 beq.n 8003f3e <HAL_SPI_Transmit+0x24c>
|
|
{
|
|
errorcode = HAL_ERROR;
|
|
8003f38: 2301 movs r3, #1
|
|
8003f3a: 77fb strb r3, [r7, #31]
|
|
8003f3c: e000 b.n 8003f40 <HAL_SPI_Transmit+0x24e>
|
|
}
|
|
|
|
error:
|
|
8003f3e: bf00 nop
|
|
hspi->State = HAL_SPI_STATE_READY;
|
|
8003f40: 68fb ldr r3, [r7, #12]
|
|
8003f42: 2201 movs r2, #1
|
|
8003f44: f883 2051 strb.w r2, [r3, #81] ; 0x51
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hspi);
|
|
8003f48: 68fb ldr r3, [r7, #12]
|
|
8003f4a: 2200 movs r2, #0
|
|
8003f4c: f883 2050 strb.w r2, [r3, #80] ; 0x50
|
|
return errorcode;
|
|
8003f50: 7ffb ldrb r3, [r7, #31]
|
|
}
|
|
8003f52: 4618 mov r0, r3
|
|
8003f54: 3720 adds r7, #32
|
|
8003f56: 46bd mov sp, r7
|
|
8003f58: bd80 pop {r7, pc}
|
|
|
|
08003f5a <SPI_WaitFlagStateUntilTimeout>:
|
|
* @param Tickstart tick start value
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus State,
|
|
uint32_t Timeout, uint32_t Tickstart)
|
|
{
|
|
8003f5a: b580 push {r7, lr}
|
|
8003f5c: b084 sub sp, #16
|
|
8003f5e: af00 add r7, sp, #0
|
|
8003f60: 60f8 str r0, [r7, #12]
|
|
8003f62: 60b9 str r1, [r7, #8]
|
|
8003f64: 603b str r3, [r7, #0]
|
|
8003f66: 4613 mov r3, r2
|
|
8003f68: 71fb strb r3, [r7, #7]
|
|
while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State)
|
|
8003f6a: e04c b.n 8004006 <SPI_WaitFlagStateUntilTimeout+0xac>
|
|
{
|
|
if (Timeout != HAL_MAX_DELAY)
|
|
8003f6c: 683b ldr r3, [r7, #0]
|
|
8003f6e: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
|
8003f72: d048 beq.n 8004006 <SPI_WaitFlagStateUntilTimeout+0xac>
|
|
{
|
|
if (((HAL_GetTick() - Tickstart) >= Timeout) || (Timeout == 0U))
|
|
8003f74: f7fd f896 bl 80010a4 <HAL_GetTick>
|
|
8003f78: 4602 mov r2, r0
|
|
8003f7a: 69bb ldr r3, [r7, #24]
|
|
8003f7c: 1ad3 subs r3, r2, r3
|
|
8003f7e: 683a ldr r2, [r7, #0]
|
|
8003f80: 429a cmp r2, r3
|
|
8003f82: d902 bls.n 8003f8a <SPI_WaitFlagStateUntilTimeout+0x30>
|
|
8003f84: 683b ldr r3, [r7, #0]
|
|
8003f86: 2b00 cmp r3, #0
|
|
8003f88: d13d bne.n 8004006 <SPI_WaitFlagStateUntilTimeout+0xac>
|
|
/* Disable the SPI and reset the CRC: the CRC value should be cleared
|
|
on both master and slave sides in order to resynchronize the master
|
|
and slave for their respective CRC calculation */
|
|
|
|
/* Disable TXE, RXNE and ERR interrupts for the interrupt process */
|
|
__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
|
|
8003f8a: 68fb ldr r3, [r7, #12]
|
|
8003f8c: 681b ldr r3, [r3, #0]
|
|
8003f8e: 685a ldr r2, [r3, #4]
|
|
8003f90: 68fb ldr r3, [r7, #12]
|
|
8003f92: 681b ldr r3, [r3, #0]
|
|
8003f94: f022 02e0 bic.w r2, r2, #224 ; 0xe0
|
|
8003f98: 605a str r2, [r3, #4]
|
|
|
|
if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
|
|
8003f9a: 68fb ldr r3, [r7, #12]
|
|
8003f9c: 685b ldr r3, [r3, #4]
|
|
8003f9e: f5b3 7f82 cmp.w r3, #260 ; 0x104
|
|
8003fa2: d111 bne.n 8003fc8 <SPI_WaitFlagStateUntilTimeout+0x6e>
|
|
8003fa4: 68fb ldr r3, [r7, #12]
|
|
8003fa6: 689b ldr r3, [r3, #8]
|
|
8003fa8: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
|
|
8003fac: d004 beq.n 8003fb8 <SPI_WaitFlagStateUntilTimeout+0x5e>
|
|
|| (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
|
|
8003fae: 68fb ldr r3, [r7, #12]
|
|
8003fb0: 689b ldr r3, [r3, #8]
|
|
8003fb2: f5b3 6f80 cmp.w r3, #1024 ; 0x400
|
|
8003fb6: d107 bne.n 8003fc8 <SPI_WaitFlagStateUntilTimeout+0x6e>
|
|
{
|
|
/* Disable SPI peripheral */
|
|
__HAL_SPI_DISABLE(hspi);
|
|
8003fb8: 68fb ldr r3, [r7, #12]
|
|
8003fba: 681b ldr r3, [r3, #0]
|
|
8003fbc: 681a ldr r2, [r3, #0]
|
|
8003fbe: 68fb ldr r3, [r7, #12]
|
|
8003fc0: 681b ldr r3, [r3, #0]
|
|
8003fc2: f022 0240 bic.w r2, r2, #64 ; 0x40
|
|
8003fc6: 601a str r2, [r3, #0]
|
|
}
|
|
|
|
/* Reset CRC Calculation */
|
|
if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
|
|
8003fc8: 68fb ldr r3, [r7, #12]
|
|
8003fca: 6a9b ldr r3, [r3, #40] ; 0x28
|
|
8003fcc: f5b3 5f00 cmp.w r3, #8192 ; 0x2000
|
|
8003fd0: d10f bne.n 8003ff2 <SPI_WaitFlagStateUntilTimeout+0x98>
|
|
{
|
|
SPI_RESET_CRC(hspi);
|
|
8003fd2: 68fb ldr r3, [r7, #12]
|
|
8003fd4: 681b ldr r3, [r3, #0]
|
|
8003fd6: 681a ldr r2, [r3, #0]
|
|
8003fd8: 68fb ldr r3, [r7, #12]
|
|
8003fda: 681b ldr r3, [r3, #0]
|
|
8003fdc: f422 5200 bic.w r2, r2, #8192 ; 0x2000
|
|
8003fe0: 601a str r2, [r3, #0]
|
|
8003fe2: 68fb ldr r3, [r7, #12]
|
|
8003fe4: 681b ldr r3, [r3, #0]
|
|
8003fe6: 681a ldr r2, [r3, #0]
|
|
8003fe8: 68fb ldr r3, [r7, #12]
|
|
8003fea: 681b ldr r3, [r3, #0]
|
|
8003fec: f442 5200 orr.w r2, r2, #8192 ; 0x2000
|
|
8003ff0: 601a str r2, [r3, #0]
|
|
}
|
|
|
|
hspi->State = HAL_SPI_STATE_READY;
|
|
8003ff2: 68fb ldr r3, [r7, #12]
|
|
8003ff4: 2201 movs r2, #1
|
|
8003ff6: f883 2051 strb.w r2, [r3, #81] ; 0x51
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hspi);
|
|
8003ffa: 68fb ldr r3, [r7, #12]
|
|
8003ffc: 2200 movs r2, #0
|
|
8003ffe: f883 2050 strb.w r2, [r3, #80] ; 0x50
|
|
|
|
return HAL_TIMEOUT;
|
|
8004002: 2303 movs r3, #3
|
|
8004004: e00f b.n 8004026 <SPI_WaitFlagStateUntilTimeout+0xcc>
|
|
while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State)
|
|
8004006: 68fb ldr r3, [r7, #12]
|
|
8004008: 681b ldr r3, [r3, #0]
|
|
800400a: 689a ldr r2, [r3, #8]
|
|
800400c: 68bb ldr r3, [r7, #8]
|
|
800400e: 4013 ands r3, r2
|
|
8004010: 68ba ldr r2, [r7, #8]
|
|
8004012: 429a cmp r2, r3
|
|
8004014: bf0c ite eq
|
|
8004016: 2301 moveq r3, #1
|
|
8004018: 2300 movne r3, #0
|
|
800401a: b2db uxtb r3, r3
|
|
800401c: 461a mov r2, r3
|
|
800401e: 79fb ldrb r3, [r7, #7]
|
|
8004020: 429a cmp r2, r3
|
|
8004022: d1a3 bne.n 8003f6c <SPI_WaitFlagStateUntilTimeout+0x12>
|
|
}
|
|
}
|
|
}
|
|
|
|
return HAL_OK;
|
|
8004024: 2300 movs r3, #0
|
|
}
|
|
8004026: 4618 mov r0, r3
|
|
8004028: 3710 adds r7, #16
|
|
800402a: 46bd mov sp, r7
|
|
800402c: bd80 pop {r7, pc}
|
|
|
|
0800402e <SPI_EndRxTxTransaction>:
|
|
* @param Timeout Timeout duration
|
|
* @param Tickstart tick start value
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart)
|
|
{
|
|
800402e: b580 push {r7, lr}
|
|
8004030: b086 sub sp, #24
|
|
8004032: af02 add r7, sp, #8
|
|
8004034: 60f8 str r0, [r7, #12]
|
|
8004036: 60b9 str r1, [r7, #8]
|
|
8004038: 607a str r2, [r7, #4]
|
|
/* Control the BSY flag */
|
|
if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK)
|
|
800403a: 687b ldr r3, [r7, #4]
|
|
800403c: 9300 str r3, [sp, #0]
|
|
800403e: 68bb ldr r3, [r7, #8]
|
|
8004040: 2200 movs r2, #0
|
|
8004042: 2180 movs r1, #128 ; 0x80
|
|
8004044: 68f8 ldr r0, [r7, #12]
|
|
8004046: f7ff ff88 bl 8003f5a <SPI_WaitFlagStateUntilTimeout>
|
|
800404a: 4603 mov r3, r0
|
|
800404c: 2b00 cmp r3, #0
|
|
800404e: d007 beq.n 8004060 <SPI_EndRxTxTransaction+0x32>
|
|
{
|
|
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
|
|
8004050: 68fb ldr r3, [r7, #12]
|
|
8004052: 6d5b ldr r3, [r3, #84] ; 0x54
|
|
8004054: f043 0220 orr.w r2, r3, #32
|
|
8004058: 68fb ldr r3, [r7, #12]
|
|
800405a: 655a str r2, [r3, #84] ; 0x54
|
|
return HAL_TIMEOUT;
|
|
800405c: 2303 movs r3, #3
|
|
800405e: e000 b.n 8004062 <SPI_EndRxTxTransaction+0x34>
|
|
}
|
|
return HAL_OK;
|
|
8004060: 2300 movs r3, #0
|
|
}
|
|
8004062: 4618 mov r0, r3
|
|
8004064: 3710 adds r7, #16
|
|
8004066: 46bd mov sp, r7
|
|
8004068: bd80 pop {r7, pc}
|
|
|
|
0800406a <HAL_TIM_Encoder_Init>:
|
|
* @param htim TIM Encoder Interface handle
|
|
* @param sConfig TIM Encoder Interface configuration structure
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef *sConfig)
|
|
{
|
|
800406a: b580 push {r7, lr}
|
|
800406c: b086 sub sp, #24
|
|
800406e: af00 add r7, sp, #0
|
|
8004070: 6078 str r0, [r7, #4]
|
|
8004072: 6039 str r1, [r7, #0]
|
|
uint32_t tmpsmcr;
|
|
uint32_t tmpccmr1;
|
|
uint32_t tmpccer;
|
|
|
|
/* Check the TIM handle allocation */
|
|
if (htim == NULL)
|
|
8004074: 687b ldr r3, [r7, #4]
|
|
8004076: 2b00 cmp r3, #0
|
|
8004078: d101 bne.n 800407e <HAL_TIM_Encoder_Init+0x14>
|
|
{
|
|
return HAL_ERROR;
|
|
800407a: 2301 movs r3, #1
|
|
800407c: e07f b.n 800417e <HAL_TIM_Encoder_Init+0x114>
|
|
assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
|
|
assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler));
|
|
assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
|
|
assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter));
|
|
|
|
if (htim->State == HAL_TIM_STATE_RESET)
|
|
800407e: 687b ldr r3, [r7, #4]
|
|
8004080: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
|
|
8004084: b2db uxtb r3, r3
|
|
8004086: 2b00 cmp r3, #0
|
|
8004088: d106 bne.n 8004098 <HAL_TIM_Encoder_Init+0x2e>
|
|
{
|
|
/* Allocate lock resource and initialize it */
|
|
htim->Lock = HAL_UNLOCKED;
|
|
800408a: 687b ldr r3, [r7, #4]
|
|
800408c: 2200 movs r2, #0
|
|
800408e: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
|
}
|
|
/* Init the low level hardware : GPIO, CLOCK, NVIC */
|
|
htim->Encoder_MspInitCallback(htim);
|
|
#else
|
|
/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
|
|
HAL_TIM_Encoder_MspInit(htim);
|
|
8004092: 6878 ldr r0, [r7, #4]
|
|
8004094: f006 f840 bl 800a118 <HAL_TIM_Encoder_MspInit>
|
|
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
|
|
}
|
|
|
|
/* Set the TIM state */
|
|
htim->State = HAL_TIM_STATE_BUSY;
|
|
8004098: 687b ldr r3, [r7, #4]
|
|
800409a: 2202 movs r2, #2
|
|
800409c: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
|
|
/* Reset the SMS and ECE bits */
|
|
htim->Instance->SMCR &= ~(TIM_SMCR_SMS | TIM_SMCR_ECE);
|
|
80040a0: 687b ldr r3, [r7, #4]
|
|
80040a2: 681b ldr r3, [r3, #0]
|
|
80040a4: 689b ldr r3, [r3, #8]
|
|
80040a6: 687a ldr r2, [r7, #4]
|
|
80040a8: 6812 ldr r2, [r2, #0]
|
|
80040aa: f423 4380 bic.w r3, r3, #16384 ; 0x4000
|
|
80040ae: f023 0307 bic.w r3, r3, #7
|
|
80040b2: 6093 str r3, [r2, #8]
|
|
|
|
/* Configure the Time base in the Encoder Mode */
|
|
TIM_Base_SetConfig(htim->Instance, &htim->Init);
|
|
80040b4: 687b ldr r3, [r7, #4]
|
|
80040b6: 681a ldr r2, [r3, #0]
|
|
80040b8: 687b ldr r3, [r7, #4]
|
|
80040ba: 3304 adds r3, #4
|
|
80040bc: 4619 mov r1, r3
|
|
80040be: 4610 mov r0, r2
|
|
80040c0: f000 f898 bl 80041f4 <TIM_Base_SetConfig>
|
|
|
|
/* Get the TIMx SMCR register value */
|
|
tmpsmcr = htim->Instance->SMCR;
|
|
80040c4: 687b ldr r3, [r7, #4]
|
|
80040c6: 681b ldr r3, [r3, #0]
|
|
80040c8: 689b ldr r3, [r3, #8]
|
|
80040ca: 617b str r3, [r7, #20]
|
|
|
|
/* Get the TIMx CCMR1 register value */
|
|
tmpccmr1 = htim->Instance->CCMR1;
|
|
80040cc: 687b ldr r3, [r7, #4]
|
|
80040ce: 681b ldr r3, [r3, #0]
|
|
80040d0: 699b ldr r3, [r3, #24]
|
|
80040d2: 613b str r3, [r7, #16]
|
|
|
|
/* Get the TIMx CCER register value */
|
|
tmpccer = htim->Instance->CCER;
|
|
80040d4: 687b ldr r3, [r7, #4]
|
|
80040d6: 681b ldr r3, [r3, #0]
|
|
80040d8: 6a1b ldr r3, [r3, #32]
|
|
80040da: 60fb str r3, [r7, #12]
|
|
|
|
/* Set the encoder Mode */
|
|
tmpsmcr |= sConfig->EncoderMode;
|
|
80040dc: 683b ldr r3, [r7, #0]
|
|
80040de: 681b ldr r3, [r3, #0]
|
|
80040e0: 697a ldr r2, [r7, #20]
|
|
80040e2: 4313 orrs r3, r2
|
|
80040e4: 617b str r3, [r7, #20]
|
|
|
|
/* Select the Capture Compare 1 and the Capture Compare 2 as input */
|
|
tmpccmr1 &= ~(TIM_CCMR1_CC1S | TIM_CCMR1_CC2S);
|
|
80040e6: 693b ldr r3, [r7, #16]
|
|
80040e8: f423 7340 bic.w r3, r3, #768 ; 0x300
|
|
80040ec: f023 0303 bic.w r3, r3, #3
|
|
80040f0: 613b str r3, [r7, #16]
|
|
tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8U));
|
|
80040f2: 683b ldr r3, [r7, #0]
|
|
80040f4: 689a ldr r2, [r3, #8]
|
|
80040f6: 683b ldr r3, [r7, #0]
|
|
80040f8: 699b ldr r3, [r3, #24]
|
|
80040fa: 021b lsls r3, r3, #8
|
|
80040fc: 4313 orrs r3, r2
|
|
80040fe: 693a ldr r2, [r7, #16]
|
|
8004100: 4313 orrs r3, r2
|
|
8004102: 613b str r3, [r7, #16]
|
|
|
|
/* Set the Capture Compare 1 and the Capture Compare 2 prescalers and filters */
|
|
tmpccmr1 &= ~(TIM_CCMR1_IC1PSC | TIM_CCMR1_IC2PSC);
|
|
8004104: 693b ldr r3, [r7, #16]
|
|
8004106: f423 6340 bic.w r3, r3, #3072 ; 0xc00
|
|
800410a: f023 030c bic.w r3, r3, #12
|
|
800410e: 613b str r3, [r7, #16]
|
|
tmpccmr1 &= ~(TIM_CCMR1_IC1F | TIM_CCMR1_IC2F);
|
|
8004110: 693b ldr r3, [r7, #16]
|
|
8004112: f423 4370 bic.w r3, r3, #61440 ; 0xf000
|
|
8004116: f023 03f0 bic.w r3, r3, #240 ; 0xf0
|
|
800411a: 613b str r3, [r7, #16]
|
|
tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8U);
|
|
800411c: 683b ldr r3, [r7, #0]
|
|
800411e: 68da ldr r2, [r3, #12]
|
|
8004120: 683b ldr r3, [r7, #0]
|
|
8004122: 69db ldr r3, [r3, #28]
|
|
8004124: 021b lsls r3, r3, #8
|
|
8004126: 4313 orrs r3, r2
|
|
8004128: 693a ldr r2, [r7, #16]
|
|
800412a: 4313 orrs r3, r2
|
|
800412c: 613b str r3, [r7, #16]
|
|
tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U);
|
|
800412e: 683b ldr r3, [r7, #0]
|
|
8004130: 691b ldr r3, [r3, #16]
|
|
8004132: 011a lsls r2, r3, #4
|
|
8004134: 683b ldr r3, [r7, #0]
|
|
8004136: 6a1b ldr r3, [r3, #32]
|
|
8004138: 031b lsls r3, r3, #12
|
|
800413a: 4313 orrs r3, r2
|
|
800413c: 693a ldr r2, [r7, #16]
|
|
800413e: 4313 orrs r3, r2
|
|
8004140: 613b str r3, [r7, #16]
|
|
|
|
/* Set the TI1 and the TI2 Polarities */
|
|
tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC2P);
|
|
8004142: 68fb ldr r3, [r7, #12]
|
|
8004144: f023 0322 bic.w r3, r3, #34 ; 0x22
|
|
8004148: 60fb str r3, [r7, #12]
|
|
tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U);
|
|
800414a: 683b ldr r3, [r7, #0]
|
|
800414c: 685a ldr r2, [r3, #4]
|
|
800414e: 683b ldr r3, [r7, #0]
|
|
8004150: 695b ldr r3, [r3, #20]
|
|
8004152: 011b lsls r3, r3, #4
|
|
8004154: 4313 orrs r3, r2
|
|
8004156: 68fa ldr r2, [r7, #12]
|
|
8004158: 4313 orrs r3, r2
|
|
800415a: 60fb str r3, [r7, #12]
|
|
|
|
/* Write to TIMx SMCR */
|
|
htim->Instance->SMCR = tmpsmcr;
|
|
800415c: 687b ldr r3, [r7, #4]
|
|
800415e: 681b ldr r3, [r3, #0]
|
|
8004160: 697a ldr r2, [r7, #20]
|
|
8004162: 609a str r2, [r3, #8]
|
|
|
|
/* Write to TIMx CCMR1 */
|
|
htim->Instance->CCMR1 = tmpccmr1;
|
|
8004164: 687b ldr r3, [r7, #4]
|
|
8004166: 681b ldr r3, [r3, #0]
|
|
8004168: 693a ldr r2, [r7, #16]
|
|
800416a: 619a str r2, [r3, #24]
|
|
|
|
/* Write to TIMx CCER */
|
|
htim->Instance->CCER = tmpccer;
|
|
800416c: 687b ldr r3, [r7, #4]
|
|
800416e: 681b ldr r3, [r3, #0]
|
|
8004170: 68fa ldr r2, [r7, #12]
|
|
8004172: 621a str r2, [r3, #32]
|
|
|
|
/* Initialize the TIM state*/
|
|
htim->State = HAL_TIM_STATE_READY;
|
|
8004174: 687b ldr r3, [r7, #4]
|
|
8004176: 2201 movs r2, #1
|
|
8004178: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
|
|
return HAL_OK;
|
|
800417c: 2300 movs r3, #0
|
|
}
|
|
800417e: 4618 mov r0, r3
|
|
8004180: 3718 adds r7, #24
|
|
8004182: 46bd mov sp, r7
|
|
8004184: bd80 pop {r7, pc}
|
|
|
|
08004186 <HAL_TIM_Encoder_Start>:
|
|
* @arg TIM_CHANNEL_2: TIM Channel 2 selected
|
|
* @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
|
|
{
|
|
8004186: b580 push {r7, lr}
|
|
8004188: b082 sub sp, #8
|
|
800418a: af00 add r7, sp, #0
|
|
800418c: 6078 str r0, [r7, #4]
|
|
800418e: 6039 str r1, [r7, #0]
|
|
/* Check the parameters */
|
|
assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
|
|
|
|
/* Enable the encoder interface channels */
|
|
switch (Channel)
|
|
8004190: 683b ldr r3, [r7, #0]
|
|
8004192: 2b00 cmp r3, #0
|
|
8004194: d002 beq.n 800419c <HAL_TIM_Encoder_Start+0x16>
|
|
8004196: 2b04 cmp r3, #4
|
|
8004198: d008 beq.n 80041ac <HAL_TIM_Encoder_Start+0x26>
|
|
800419a: e00f b.n 80041bc <HAL_TIM_Encoder_Start+0x36>
|
|
{
|
|
case TIM_CHANNEL_1:
|
|
{
|
|
TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
|
|
800419c: 687b ldr r3, [r7, #4]
|
|
800419e: 681b ldr r3, [r3, #0]
|
|
80041a0: 2201 movs r2, #1
|
|
80041a2: 2100 movs r1, #0
|
|
80041a4: 4618 mov r0, r3
|
|
80041a6: f000 f887 bl 80042b8 <TIM_CCxChannelCmd>
|
|
break;
|
|
80041aa: e016 b.n 80041da <HAL_TIM_Encoder_Start+0x54>
|
|
}
|
|
|
|
case TIM_CHANNEL_2:
|
|
{
|
|
TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
|
|
80041ac: 687b ldr r3, [r7, #4]
|
|
80041ae: 681b ldr r3, [r3, #0]
|
|
80041b0: 2201 movs r2, #1
|
|
80041b2: 2104 movs r1, #4
|
|
80041b4: 4618 mov r0, r3
|
|
80041b6: f000 f87f bl 80042b8 <TIM_CCxChannelCmd>
|
|
break;
|
|
80041ba: e00e b.n 80041da <HAL_TIM_Encoder_Start+0x54>
|
|
}
|
|
|
|
default :
|
|
{
|
|
TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
|
|
80041bc: 687b ldr r3, [r7, #4]
|
|
80041be: 681b ldr r3, [r3, #0]
|
|
80041c0: 2201 movs r2, #1
|
|
80041c2: 2100 movs r1, #0
|
|
80041c4: 4618 mov r0, r3
|
|
80041c6: f000 f877 bl 80042b8 <TIM_CCxChannelCmd>
|
|
TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
|
|
80041ca: 687b ldr r3, [r7, #4]
|
|
80041cc: 681b ldr r3, [r3, #0]
|
|
80041ce: 2201 movs r2, #1
|
|
80041d0: 2104 movs r1, #4
|
|
80041d2: 4618 mov r0, r3
|
|
80041d4: f000 f870 bl 80042b8 <TIM_CCxChannelCmd>
|
|
break;
|
|
80041d8: bf00 nop
|
|
}
|
|
}
|
|
/* Enable the Peripheral */
|
|
__HAL_TIM_ENABLE(htim);
|
|
80041da: 687b ldr r3, [r7, #4]
|
|
80041dc: 681b ldr r3, [r3, #0]
|
|
80041de: 681a ldr r2, [r3, #0]
|
|
80041e0: 687b ldr r3, [r7, #4]
|
|
80041e2: 681b ldr r3, [r3, #0]
|
|
80041e4: f042 0201 orr.w r2, r2, #1
|
|
80041e8: 601a str r2, [r3, #0]
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
80041ea: 2300 movs r3, #0
|
|
}
|
|
80041ec: 4618 mov r0, r3
|
|
80041ee: 3708 adds r7, #8
|
|
80041f0: 46bd mov sp, r7
|
|
80041f2: bd80 pop {r7, pc}
|
|
|
|
080041f4 <TIM_Base_SetConfig>:
|
|
* @param TIMx TIM peripheral
|
|
* @param Structure TIM Base configuration structure
|
|
* @retval None
|
|
*/
|
|
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure)
|
|
{
|
|
80041f4: b480 push {r7}
|
|
80041f6: b085 sub sp, #20
|
|
80041f8: af00 add r7, sp, #0
|
|
80041fa: 6078 str r0, [r7, #4]
|
|
80041fc: 6039 str r1, [r7, #0]
|
|
uint32_t tmpcr1;
|
|
tmpcr1 = TIMx->CR1;
|
|
80041fe: 687b ldr r3, [r7, #4]
|
|
8004200: 681b ldr r3, [r3, #0]
|
|
8004202: 60fb str r3, [r7, #12]
|
|
|
|
/* Set TIM Time Base Unit parameters ---------------------------------------*/
|
|
if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
|
|
8004204: 687b ldr r3, [r7, #4]
|
|
8004206: 4a29 ldr r2, [pc, #164] ; (80042ac <TIM_Base_SetConfig+0xb8>)
|
|
8004208: 4293 cmp r3, r2
|
|
800420a: d00b beq.n 8004224 <TIM_Base_SetConfig+0x30>
|
|
800420c: 687b ldr r3, [r7, #4]
|
|
800420e: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000
|
|
8004212: d007 beq.n 8004224 <TIM_Base_SetConfig+0x30>
|
|
8004214: 687b ldr r3, [r7, #4]
|
|
8004216: 4a26 ldr r2, [pc, #152] ; (80042b0 <TIM_Base_SetConfig+0xbc>)
|
|
8004218: 4293 cmp r3, r2
|
|
800421a: d003 beq.n 8004224 <TIM_Base_SetConfig+0x30>
|
|
800421c: 687b ldr r3, [r7, #4]
|
|
800421e: 4a25 ldr r2, [pc, #148] ; (80042b4 <TIM_Base_SetConfig+0xc0>)
|
|
8004220: 4293 cmp r3, r2
|
|
8004222: d108 bne.n 8004236 <TIM_Base_SetConfig+0x42>
|
|
{
|
|
/* Select the Counter Mode */
|
|
tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
|
|
8004224: 68fb ldr r3, [r7, #12]
|
|
8004226: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
800422a: 60fb str r3, [r7, #12]
|
|
tmpcr1 |= Structure->CounterMode;
|
|
800422c: 683b ldr r3, [r7, #0]
|
|
800422e: 685b ldr r3, [r3, #4]
|
|
8004230: 68fa ldr r2, [r7, #12]
|
|
8004232: 4313 orrs r3, r2
|
|
8004234: 60fb str r3, [r7, #12]
|
|
}
|
|
|
|
if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
|
|
8004236: 687b ldr r3, [r7, #4]
|
|
8004238: 4a1c ldr r2, [pc, #112] ; (80042ac <TIM_Base_SetConfig+0xb8>)
|
|
800423a: 4293 cmp r3, r2
|
|
800423c: d00b beq.n 8004256 <TIM_Base_SetConfig+0x62>
|
|
800423e: 687b ldr r3, [r7, #4]
|
|
8004240: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000
|
|
8004244: d007 beq.n 8004256 <TIM_Base_SetConfig+0x62>
|
|
8004246: 687b ldr r3, [r7, #4]
|
|
8004248: 4a19 ldr r2, [pc, #100] ; (80042b0 <TIM_Base_SetConfig+0xbc>)
|
|
800424a: 4293 cmp r3, r2
|
|
800424c: d003 beq.n 8004256 <TIM_Base_SetConfig+0x62>
|
|
800424e: 687b ldr r3, [r7, #4]
|
|
8004250: 4a18 ldr r2, [pc, #96] ; (80042b4 <TIM_Base_SetConfig+0xc0>)
|
|
8004252: 4293 cmp r3, r2
|
|
8004254: d108 bne.n 8004268 <TIM_Base_SetConfig+0x74>
|
|
{
|
|
/* Set the clock division */
|
|
tmpcr1 &= ~TIM_CR1_CKD;
|
|
8004256: 68fb ldr r3, [r7, #12]
|
|
8004258: f423 7340 bic.w r3, r3, #768 ; 0x300
|
|
800425c: 60fb str r3, [r7, #12]
|
|
tmpcr1 |= (uint32_t)Structure->ClockDivision;
|
|
800425e: 683b ldr r3, [r7, #0]
|
|
8004260: 68db ldr r3, [r3, #12]
|
|
8004262: 68fa ldr r2, [r7, #12]
|
|
8004264: 4313 orrs r3, r2
|
|
8004266: 60fb str r3, [r7, #12]
|
|
}
|
|
|
|
/* Set the auto-reload preload */
|
|
MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
|
|
8004268: 68fb ldr r3, [r7, #12]
|
|
800426a: f023 0280 bic.w r2, r3, #128 ; 0x80
|
|
800426e: 683b ldr r3, [r7, #0]
|
|
8004270: 695b ldr r3, [r3, #20]
|
|
8004272: 4313 orrs r3, r2
|
|
8004274: 60fb str r3, [r7, #12]
|
|
|
|
TIMx->CR1 = tmpcr1;
|
|
8004276: 687b ldr r3, [r7, #4]
|
|
8004278: 68fa ldr r2, [r7, #12]
|
|
800427a: 601a str r2, [r3, #0]
|
|
|
|
/* Set the Autoreload value */
|
|
TIMx->ARR = (uint32_t)Structure->Period ;
|
|
800427c: 683b ldr r3, [r7, #0]
|
|
800427e: 689a ldr r2, [r3, #8]
|
|
8004280: 687b ldr r3, [r7, #4]
|
|
8004282: 62da str r2, [r3, #44] ; 0x2c
|
|
|
|
/* Set the Prescaler value */
|
|
TIMx->PSC = Structure->Prescaler;
|
|
8004284: 683b ldr r3, [r7, #0]
|
|
8004286: 681a ldr r2, [r3, #0]
|
|
8004288: 687b ldr r3, [r7, #4]
|
|
800428a: 629a str r2, [r3, #40] ; 0x28
|
|
|
|
if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
|
|
800428c: 687b ldr r3, [r7, #4]
|
|
800428e: 4a07 ldr r2, [pc, #28] ; (80042ac <TIM_Base_SetConfig+0xb8>)
|
|
8004290: 4293 cmp r3, r2
|
|
8004292: d103 bne.n 800429c <TIM_Base_SetConfig+0xa8>
|
|
{
|
|
/* Set the Repetition Counter value */
|
|
TIMx->RCR = Structure->RepetitionCounter;
|
|
8004294: 683b ldr r3, [r7, #0]
|
|
8004296: 691a ldr r2, [r3, #16]
|
|
8004298: 687b ldr r3, [r7, #4]
|
|
800429a: 631a str r2, [r3, #48] ; 0x30
|
|
}
|
|
|
|
/* Generate an update event to reload the Prescaler
|
|
and the repetition counter (only for advanced timer) value immediately */
|
|
TIMx->EGR = TIM_EGR_UG;
|
|
800429c: 687b ldr r3, [r7, #4]
|
|
800429e: 2201 movs r2, #1
|
|
80042a0: 615a str r2, [r3, #20]
|
|
}
|
|
80042a2: bf00 nop
|
|
80042a4: 3714 adds r7, #20
|
|
80042a6: 46bd mov sp, r7
|
|
80042a8: bc80 pop {r7}
|
|
80042aa: 4770 bx lr
|
|
80042ac: 40012c00 .word 0x40012c00
|
|
80042b0: 40000400 .word 0x40000400
|
|
80042b4: 40000800 .word 0x40000800
|
|
|
|
080042b8 <TIM_CCxChannelCmd>:
|
|
* @param ChannelState specifies the TIM Channel CCxE bit new state.
|
|
* This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE.
|
|
* @retval None
|
|
*/
|
|
void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState)
|
|
{
|
|
80042b8: b480 push {r7}
|
|
80042ba: b087 sub sp, #28
|
|
80042bc: af00 add r7, sp, #0
|
|
80042be: 60f8 str r0, [r7, #12]
|
|
80042c0: 60b9 str r1, [r7, #8]
|
|
80042c2: 607a str r2, [r7, #4]
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_TIM_CC1_INSTANCE(TIMx));
|
|
assert_param(IS_TIM_CHANNELS(Channel));
|
|
|
|
tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
|
|
80042c4: 68bb ldr r3, [r7, #8]
|
|
80042c6: f003 031f and.w r3, r3, #31
|
|
80042ca: 2201 movs r2, #1
|
|
80042cc: fa02 f303 lsl.w r3, r2, r3
|
|
80042d0: 617b str r3, [r7, #20]
|
|
|
|
/* Reset the CCxE Bit */
|
|
TIMx->CCER &= ~tmp;
|
|
80042d2: 68fb ldr r3, [r7, #12]
|
|
80042d4: 6a1a ldr r2, [r3, #32]
|
|
80042d6: 697b ldr r3, [r7, #20]
|
|
80042d8: 43db mvns r3, r3
|
|
80042da: 401a ands r2, r3
|
|
80042dc: 68fb ldr r3, [r7, #12]
|
|
80042de: 621a str r2, [r3, #32]
|
|
|
|
/* Set or reset the CCxE Bit */
|
|
TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
|
|
80042e0: 68fb ldr r3, [r7, #12]
|
|
80042e2: 6a1a ldr r2, [r3, #32]
|
|
80042e4: 68bb ldr r3, [r7, #8]
|
|
80042e6: f003 031f and.w r3, r3, #31
|
|
80042ea: 6879 ldr r1, [r7, #4]
|
|
80042ec: fa01 f303 lsl.w r3, r1, r3
|
|
80042f0: 431a orrs r2, r3
|
|
80042f2: 68fb ldr r3, [r7, #12]
|
|
80042f4: 621a str r2, [r3, #32]
|
|
}
|
|
80042f6: bf00 nop
|
|
80042f8: 371c adds r7, #28
|
|
80042fa: 46bd mov sp, r7
|
|
80042fc: bc80 pop {r7}
|
|
80042fe: 4770 bx lr
|
|
|
|
08004300 <HAL_TIMEx_MasterConfigSynchronization>:
|
|
* mode.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
|
|
TIM_MasterConfigTypeDef *sMasterConfig)
|
|
{
|
|
8004300: b480 push {r7}
|
|
8004302: b085 sub sp, #20
|
|
8004304: af00 add r7, sp, #0
|
|
8004306: 6078 str r0, [r7, #4]
|
|
8004308: 6039 str r1, [r7, #0]
|
|
assert_param(IS_TIM_SYNCHRO_INSTANCE(htim->Instance));
|
|
assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
|
|
assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
|
|
|
|
/* Check input state */
|
|
__HAL_LOCK(htim);
|
|
800430a: 687b ldr r3, [r7, #4]
|
|
800430c: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
|
|
8004310: 2b01 cmp r3, #1
|
|
8004312: d101 bne.n 8004318 <HAL_TIMEx_MasterConfigSynchronization+0x18>
|
|
8004314: 2302 movs r3, #2
|
|
8004316: e032 b.n 800437e <HAL_TIMEx_MasterConfigSynchronization+0x7e>
|
|
8004318: 687b ldr r3, [r7, #4]
|
|
800431a: 2201 movs r2, #1
|
|
800431c: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
|
|
|
/* Change the handler state */
|
|
htim->State = HAL_TIM_STATE_BUSY;
|
|
8004320: 687b ldr r3, [r7, #4]
|
|
8004322: 2202 movs r2, #2
|
|
8004324: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
|
|
/* Get the TIMx CR2 register value */
|
|
tmpcr2 = htim->Instance->CR2;
|
|
8004328: 687b ldr r3, [r7, #4]
|
|
800432a: 681b ldr r3, [r3, #0]
|
|
800432c: 685b ldr r3, [r3, #4]
|
|
800432e: 60fb str r3, [r7, #12]
|
|
|
|
/* Get the TIMx SMCR register value */
|
|
tmpsmcr = htim->Instance->SMCR;
|
|
8004330: 687b ldr r3, [r7, #4]
|
|
8004332: 681b ldr r3, [r3, #0]
|
|
8004334: 689b ldr r3, [r3, #8]
|
|
8004336: 60bb str r3, [r7, #8]
|
|
|
|
/* Reset the MMS Bits */
|
|
tmpcr2 &= ~TIM_CR2_MMS;
|
|
8004338: 68fb ldr r3, [r7, #12]
|
|
800433a: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
800433e: 60fb str r3, [r7, #12]
|
|
/* Select the TRGO source */
|
|
tmpcr2 |= sMasterConfig->MasterOutputTrigger;
|
|
8004340: 683b ldr r3, [r7, #0]
|
|
8004342: 681b ldr r3, [r3, #0]
|
|
8004344: 68fa ldr r2, [r7, #12]
|
|
8004346: 4313 orrs r3, r2
|
|
8004348: 60fb str r3, [r7, #12]
|
|
|
|
/* Reset the MSM Bit */
|
|
tmpsmcr &= ~TIM_SMCR_MSM;
|
|
800434a: 68bb ldr r3, [r7, #8]
|
|
800434c: f023 0380 bic.w r3, r3, #128 ; 0x80
|
|
8004350: 60bb str r3, [r7, #8]
|
|
/* Set master mode */
|
|
tmpsmcr |= sMasterConfig->MasterSlaveMode;
|
|
8004352: 683b ldr r3, [r7, #0]
|
|
8004354: 685b ldr r3, [r3, #4]
|
|
8004356: 68ba ldr r2, [r7, #8]
|
|
8004358: 4313 orrs r3, r2
|
|
800435a: 60bb str r3, [r7, #8]
|
|
|
|
/* Update TIMx CR2 */
|
|
htim->Instance->CR2 = tmpcr2;
|
|
800435c: 687b ldr r3, [r7, #4]
|
|
800435e: 681b ldr r3, [r3, #0]
|
|
8004360: 68fa ldr r2, [r7, #12]
|
|
8004362: 605a str r2, [r3, #4]
|
|
|
|
/* Update TIMx SMCR */
|
|
htim->Instance->SMCR = tmpsmcr;
|
|
8004364: 687b ldr r3, [r7, #4]
|
|
8004366: 681b ldr r3, [r3, #0]
|
|
8004368: 68ba ldr r2, [r7, #8]
|
|
800436a: 609a str r2, [r3, #8]
|
|
|
|
/* Change the htim state */
|
|
htim->State = HAL_TIM_STATE_READY;
|
|
800436c: 687b ldr r3, [r7, #4]
|
|
800436e: 2201 movs r2, #1
|
|
8004370: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
|
|
__HAL_UNLOCK(htim);
|
|
8004374: 687b ldr r3, [r7, #4]
|
|
8004376: 2200 movs r2, #0
|
|
8004378: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
|
|
|
return HAL_OK;
|
|
800437c: 2300 movs r3, #0
|
|
}
|
|
800437e: 4618 mov r0, r3
|
|
8004380: 3714 adds r7, #20
|
|
8004382: 46bd mov sp, r7
|
|
8004384: bc80 pop {r7}
|
|
8004386: 4770 bx lr
|
|
|
|
08004388 <HAL_UART_Init>:
|
|
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
|
* the configuration information for the specified UART module.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
|
|
{
|
|
8004388: b580 push {r7, lr}
|
|
800438a: b082 sub sp, #8
|
|
800438c: af00 add r7, sp, #0
|
|
800438e: 6078 str r0, [r7, #4]
|
|
/* Check the UART handle allocation */
|
|
if (huart == NULL)
|
|
8004390: 687b ldr r3, [r7, #4]
|
|
8004392: 2b00 cmp r3, #0
|
|
8004394: d101 bne.n 800439a <HAL_UART_Init+0x12>
|
|
{
|
|
return HAL_ERROR;
|
|
8004396: 2301 movs r3, #1
|
|
8004398: e03f b.n 800441a <HAL_UART_Init+0x92>
|
|
assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
|
|
#if defined(USART_CR1_OVER8)
|
|
assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
|
|
#endif /* USART_CR1_OVER8 */
|
|
|
|
if (huart->gState == HAL_UART_STATE_RESET)
|
|
800439a: 687b ldr r3, [r7, #4]
|
|
800439c: f893 3039 ldrb.w r3, [r3, #57] ; 0x39
|
|
80043a0: b2db uxtb r3, r3
|
|
80043a2: 2b00 cmp r3, #0
|
|
80043a4: d106 bne.n 80043b4 <HAL_UART_Init+0x2c>
|
|
{
|
|
/* Allocate lock resource and initialize it */
|
|
huart->Lock = HAL_UNLOCKED;
|
|
80043a6: 687b ldr r3, [r7, #4]
|
|
80043a8: 2200 movs r2, #0
|
|
80043aa: f883 2038 strb.w r2, [r3, #56] ; 0x38
|
|
|
|
/* Init the low level hardware */
|
|
huart->MspInitCallback(huart);
|
|
#else
|
|
/* Init the low level hardware : GPIO, CLOCK */
|
|
HAL_UART_MspInit(huart);
|
|
80043ae: 6878 ldr r0, [r7, #4]
|
|
80043b0: f005 feee bl 800a190 <HAL_UART_MspInit>
|
|
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
|
|
}
|
|
|
|
huart->gState = HAL_UART_STATE_BUSY;
|
|
80043b4: 687b ldr r3, [r7, #4]
|
|
80043b6: 2224 movs r2, #36 ; 0x24
|
|
80043b8: f883 2039 strb.w r2, [r3, #57] ; 0x39
|
|
|
|
/* Disable the peripheral */
|
|
__HAL_UART_DISABLE(huart);
|
|
80043bc: 687b ldr r3, [r7, #4]
|
|
80043be: 681b ldr r3, [r3, #0]
|
|
80043c0: 68da ldr r2, [r3, #12]
|
|
80043c2: 687b ldr r3, [r7, #4]
|
|
80043c4: 681b ldr r3, [r3, #0]
|
|
80043c6: f422 5200 bic.w r2, r2, #8192 ; 0x2000
|
|
80043ca: 60da str r2, [r3, #12]
|
|
|
|
/* Set the UART Communication parameters */
|
|
UART_SetConfig(huart);
|
|
80043cc: 6878 ldr r0, [r7, #4]
|
|
80043ce: f000 f829 bl 8004424 <UART_SetConfig>
|
|
|
|
/* In asynchronous mode, the following bits must be kept cleared:
|
|
- LINEN and CLKEN bits in the USART_CR2 register,
|
|
- SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
|
|
CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
|
|
80043d2: 687b ldr r3, [r7, #4]
|
|
80043d4: 681b ldr r3, [r3, #0]
|
|
80043d6: 691a ldr r2, [r3, #16]
|
|
80043d8: 687b ldr r3, [r7, #4]
|
|
80043da: 681b ldr r3, [r3, #0]
|
|
80043dc: f422 4290 bic.w r2, r2, #18432 ; 0x4800
|
|
80043e0: 611a str r2, [r3, #16]
|
|
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
|
|
80043e2: 687b ldr r3, [r7, #4]
|
|
80043e4: 681b ldr r3, [r3, #0]
|
|
80043e6: 695a ldr r2, [r3, #20]
|
|
80043e8: 687b ldr r3, [r7, #4]
|
|
80043ea: 681b ldr r3, [r3, #0]
|
|
80043ec: f022 022a bic.w r2, r2, #42 ; 0x2a
|
|
80043f0: 615a str r2, [r3, #20]
|
|
|
|
/* Enable the peripheral */
|
|
__HAL_UART_ENABLE(huart);
|
|
80043f2: 687b ldr r3, [r7, #4]
|
|
80043f4: 681b ldr r3, [r3, #0]
|
|
80043f6: 68da ldr r2, [r3, #12]
|
|
80043f8: 687b ldr r3, [r7, #4]
|
|
80043fa: 681b ldr r3, [r3, #0]
|
|
80043fc: f442 5200 orr.w r2, r2, #8192 ; 0x2000
|
|
8004400: 60da str r2, [r3, #12]
|
|
|
|
/* Initialize the UART state */
|
|
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
|
8004402: 687b ldr r3, [r7, #4]
|
|
8004404: 2200 movs r2, #0
|
|
8004406: 63da str r2, [r3, #60] ; 0x3c
|
|
huart->gState = HAL_UART_STATE_READY;
|
|
8004408: 687b ldr r3, [r7, #4]
|
|
800440a: 2220 movs r2, #32
|
|
800440c: f883 2039 strb.w r2, [r3, #57] ; 0x39
|
|
huart->RxState = HAL_UART_STATE_READY;
|
|
8004410: 687b ldr r3, [r7, #4]
|
|
8004412: 2220 movs r2, #32
|
|
8004414: f883 203a strb.w r2, [r3, #58] ; 0x3a
|
|
|
|
return HAL_OK;
|
|
8004418: 2300 movs r3, #0
|
|
}
|
|
800441a: 4618 mov r0, r3
|
|
800441c: 3708 adds r7, #8
|
|
800441e: 46bd mov sp, r7
|
|
8004420: bd80 pop {r7, pc}
|
|
...
|
|
|
|
08004424 <UART_SetConfig>:
|
|
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
|
* the configuration information for the specified UART module.
|
|
* @retval None
|
|
*/
|
|
static void UART_SetConfig(UART_HandleTypeDef *huart)
|
|
{
|
|
8004424: b580 push {r7, lr}
|
|
8004426: b084 sub sp, #16
|
|
8004428: af00 add r7, sp, #0
|
|
800442a: 6078 str r0, [r7, #4]
|
|
assert_param(IS_UART_MODE(huart->Init.Mode));
|
|
|
|
/*-------------------------- USART CR2 Configuration -----------------------*/
|
|
/* Configure the UART Stop Bits: Set STOP[13:12] bits
|
|
according to huart->Init.StopBits value */
|
|
MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
|
|
800442c: 687b ldr r3, [r7, #4]
|
|
800442e: 681b ldr r3, [r3, #0]
|
|
8004430: 691b ldr r3, [r3, #16]
|
|
8004432: f423 5140 bic.w r1, r3, #12288 ; 0x3000
|
|
8004436: 687b ldr r3, [r7, #4]
|
|
8004438: 68da ldr r2, [r3, #12]
|
|
800443a: 687b ldr r3, [r7, #4]
|
|
800443c: 681b ldr r3, [r3, #0]
|
|
800443e: 430a orrs r2, r1
|
|
8004440: 611a str r2, [r3, #16]
|
|
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
|
|
MODIFY_REG(huart->Instance->CR1,
|
|
(uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
|
|
tmpreg);
|
|
#else
|
|
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
|
|
8004442: 687b ldr r3, [r7, #4]
|
|
8004444: 689a ldr r2, [r3, #8]
|
|
8004446: 687b ldr r3, [r7, #4]
|
|
8004448: 691b ldr r3, [r3, #16]
|
|
800444a: 431a orrs r2, r3
|
|
800444c: 687b ldr r3, [r7, #4]
|
|
800444e: 695b ldr r3, [r3, #20]
|
|
8004450: 4313 orrs r3, r2
|
|
8004452: 60fb str r3, [r7, #12]
|
|
MODIFY_REG(huart->Instance->CR1,
|
|
8004454: 687b ldr r3, [r7, #4]
|
|
8004456: 681b ldr r3, [r3, #0]
|
|
8004458: 68db ldr r3, [r3, #12]
|
|
800445a: f423 53b0 bic.w r3, r3, #5632 ; 0x1600
|
|
800445e: f023 030c bic.w r3, r3, #12
|
|
8004462: 687a ldr r2, [r7, #4]
|
|
8004464: 6812 ldr r2, [r2, #0]
|
|
8004466: 68f9 ldr r1, [r7, #12]
|
|
8004468: 430b orrs r3, r1
|
|
800446a: 60d3 str r3, [r2, #12]
|
|
tmpreg);
|
|
#endif /* USART_CR1_OVER8 */
|
|
|
|
/*-------------------------- USART CR3 Configuration -----------------------*/
|
|
/* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
|
|
MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
|
|
800446c: 687b ldr r3, [r7, #4]
|
|
800446e: 681b ldr r3, [r3, #0]
|
|
8004470: 695b ldr r3, [r3, #20]
|
|
8004472: f423 7140 bic.w r1, r3, #768 ; 0x300
|
|
8004476: 687b ldr r3, [r7, #4]
|
|
8004478: 699a ldr r2, [r3, #24]
|
|
800447a: 687b ldr r3, [r7, #4]
|
|
800447c: 681b ldr r3, [r3, #0]
|
|
800447e: 430a orrs r2, r1
|
|
8004480: 615a str r2, [r3, #20]
|
|
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
|
|
}
|
|
}
|
|
#else
|
|
/*-------------------------- USART BRR Configuration ---------------------*/
|
|
if(huart->Instance == USART1)
|
|
8004482: 687b ldr r3, [r7, #4]
|
|
8004484: 681b ldr r3, [r3, #0]
|
|
8004486: 4a52 ldr r2, [pc, #328] ; (80045d0 <UART_SetConfig+0x1ac>)
|
|
8004488: 4293 cmp r3, r2
|
|
800448a: d14e bne.n 800452a <UART_SetConfig+0x106>
|
|
{
|
|
pclk = HAL_RCC_GetPCLK2Freq();
|
|
800448c: f7fe fcce bl 8002e2c <HAL_RCC_GetPCLK2Freq>
|
|
8004490: 60b8 str r0, [r7, #8]
|
|
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
|
|
8004492: 68ba ldr r2, [r7, #8]
|
|
8004494: 4613 mov r3, r2
|
|
8004496: 009b lsls r3, r3, #2
|
|
8004498: 4413 add r3, r2
|
|
800449a: 009a lsls r2, r3, #2
|
|
800449c: 441a add r2, r3
|
|
800449e: 687b ldr r3, [r7, #4]
|
|
80044a0: 685b ldr r3, [r3, #4]
|
|
80044a2: 009b lsls r3, r3, #2
|
|
80044a4: fbb2 f3f3 udiv r3, r2, r3
|
|
80044a8: 4a4a ldr r2, [pc, #296] ; (80045d4 <UART_SetConfig+0x1b0>)
|
|
80044aa: fba2 2303 umull r2, r3, r2, r3
|
|
80044ae: 095b lsrs r3, r3, #5
|
|
80044b0: 0119 lsls r1, r3, #4
|
|
80044b2: 68ba ldr r2, [r7, #8]
|
|
80044b4: 4613 mov r3, r2
|
|
80044b6: 009b lsls r3, r3, #2
|
|
80044b8: 4413 add r3, r2
|
|
80044ba: 009a lsls r2, r3, #2
|
|
80044bc: 441a add r2, r3
|
|
80044be: 687b ldr r3, [r7, #4]
|
|
80044c0: 685b ldr r3, [r3, #4]
|
|
80044c2: 009b lsls r3, r3, #2
|
|
80044c4: fbb2 f2f3 udiv r2, r2, r3
|
|
80044c8: 4b42 ldr r3, [pc, #264] ; (80045d4 <UART_SetConfig+0x1b0>)
|
|
80044ca: fba3 0302 umull r0, r3, r3, r2
|
|
80044ce: 095b lsrs r3, r3, #5
|
|
80044d0: 2064 movs r0, #100 ; 0x64
|
|
80044d2: fb00 f303 mul.w r3, r0, r3
|
|
80044d6: 1ad3 subs r3, r2, r3
|
|
80044d8: 011b lsls r3, r3, #4
|
|
80044da: 3332 adds r3, #50 ; 0x32
|
|
80044dc: 4a3d ldr r2, [pc, #244] ; (80045d4 <UART_SetConfig+0x1b0>)
|
|
80044de: fba2 2303 umull r2, r3, r2, r3
|
|
80044e2: 095b lsrs r3, r3, #5
|
|
80044e4: f003 03f0 and.w r3, r3, #240 ; 0xf0
|
|
80044e8: 4419 add r1, r3
|
|
80044ea: 68ba ldr r2, [r7, #8]
|
|
80044ec: 4613 mov r3, r2
|
|
80044ee: 009b lsls r3, r3, #2
|
|
80044f0: 4413 add r3, r2
|
|
80044f2: 009a lsls r2, r3, #2
|
|
80044f4: 441a add r2, r3
|
|
80044f6: 687b ldr r3, [r7, #4]
|
|
80044f8: 685b ldr r3, [r3, #4]
|
|
80044fa: 009b lsls r3, r3, #2
|
|
80044fc: fbb2 f2f3 udiv r2, r2, r3
|
|
8004500: 4b34 ldr r3, [pc, #208] ; (80045d4 <UART_SetConfig+0x1b0>)
|
|
8004502: fba3 0302 umull r0, r3, r3, r2
|
|
8004506: 095b lsrs r3, r3, #5
|
|
8004508: 2064 movs r0, #100 ; 0x64
|
|
800450a: fb00 f303 mul.w r3, r0, r3
|
|
800450e: 1ad3 subs r3, r2, r3
|
|
8004510: 011b lsls r3, r3, #4
|
|
8004512: 3332 adds r3, #50 ; 0x32
|
|
8004514: 4a2f ldr r2, [pc, #188] ; (80045d4 <UART_SetConfig+0x1b0>)
|
|
8004516: fba2 2303 umull r2, r3, r2, r3
|
|
800451a: 095b lsrs r3, r3, #5
|
|
800451c: f003 020f and.w r2, r3, #15
|
|
8004520: 687b ldr r3, [r7, #4]
|
|
8004522: 681b ldr r3, [r3, #0]
|
|
8004524: 440a add r2, r1
|
|
8004526: 609a str r2, [r3, #8]
|
|
{
|
|
pclk = HAL_RCC_GetPCLK1Freq();
|
|
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
|
|
}
|
|
#endif /* USART_CR1_OVER8 */
|
|
}
|
|
8004528: e04d b.n 80045c6 <UART_SetConfig+0x1a2>
|
|
pclk = HAL_RCC_GetPCLK1Freq();
|
|
800452a: f7fe fc6b bl 8002e04 <HAL_RCC_GetPCLK1Freq>
|
|
800452e: 60b8 str r0, [r7, #8]
|
|
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
|
|
8004530: 68ba ldr r2, [r7, #8]
|
|
8004532: 4613 mov r3, r2
|
|
8004534: 009b lsls r3, r3, #2
|
|
8004536: 4413 add r3, r2
|
|
8004538: 009a lsls r2, r3, #2
|
|
800453a: 441a add r2, r3
|
|
800453c: 687b ldr r3, [r7, #4]
|
|
800453e: 685b ldr r3, [r3, #4]
|
|
8004540: 009b lsls r3, r3, #2
|
|
8004542: fbb2 f3f3 udiv r3, r2, r3
|
|
8004546: 4a23 ldr r2, [pc, #140] ; (80045d4 <UART_SetConfig+0x1b0>)
|
|
8004548: fba2 2303 umull r2, r3, r2, r3
|
|
800454c: 095b lsrs r3, r3, #5
|
|
800454e: 0119 lsls r1, r3, #4
|
|
8004550: 68ba ldr r2, [r7, #8]
|
|
8004552: 4613 mov r3, r2
|
|
8004554: 009b lsls r3, r3, #2
|
|
8004556: 4413 add r3, r2
|
|
8004558: 009a lsls r2, r3, #2
|
|
800455a: 441a add r2, r3
|
|
800455c: 687b ldr r3, [r7, #4]
|
|
800455e: 685b ldr r3, [r3, #4]
|
|
8004560: 009b lsls r3, r3, #2
|
|
8004562: fbb2 f2f3 udiv r2, r2, r3
|
|
8004566: 4b1b ldr r3, [pc, #108] ; (80045d4 <UART_SetConfig+0x1b0>)
|
|
8004568: fba3 0302 umull r0, r3, r3, r2
|
|
800456c: 095b lsrs r3, r3, #5
|
|
800456e: 2064 movs r0, #100 ; 0x64
|
|
8004570: fb00 f303 mul.w r3, r0, r3
|
|
8004574: 1ad3 subs r3, r2, r3
|
|
8004576: 011b lsls r3, r3, #4
|
|
8004578: 3332 adds r3, #50 ; 0x32
|
|
800457a: 4a16 ldr r2, [pc, #88] ; (80045d4 <UART_SetConfig+0x1b0>)
|
|
800457c: fba2 2303 umull r2, r3, r2, r3
|
|
8004580: 095b lsrs r3, r3, #5
|
|
8004582: f003 03f0 and.w r3, r3, #240 ; 0xf0
|
|
8004586: 4419 add r1, r3
|
|
8004588: 68ba ldr r2, [r7, #8]
|
|
800458a: 4613 mov r3, r2
|
|
800458c: 009b lsls r3, r3, #2
|
|
800458e: 4413 add r3, r2
|
|
8004590: 009a lsls r2, r3, #2
|
|
8004592: 441a add r2, r3
|
|
8004594: 687b ldr r3, [r7, #4]
|
|
8004596: 685b ldr r3, [r3, #4]
|
|
8004598: 009b lsls r3, r3, #2
|
|
800459a: fbb2 f2f3 udiv r2, r2, r3
|
|
800459e: 4b0d ldr r3, [pc, #52] ; (80045d4 <UART_SetConfig+0x1b0>)
|
|
80045a0: fba3 0302 umull r0, r3, r3, r2
|
|
80045a4: 095b lsrs r3, r3, #5
|
|
80045a6: 2064 movs r0, #100 ; 0x64
|
|
80045a8: fb00 f303 mul.w r3, r0, r3
|
|
80045ac: 1ad3 subs r3, r2, r3
|
|
80045ae: 011b lsls r3, r3, #4
|
|
80045b0: 3332 adds r3, #50 ; 0x32
|
|
80045b2: 4a08 ldr r2, [pc, #32] ; (80045d4 <UART_SetConfig+0x1b0>)
|
|
80045b4: fba2 2303 umull r2, r3, r2, r3
|
|
80045b8: 095b lsrs r3, r3, #5
|
|
80045ba: f003 020f and.w r2, r3, #15
|
|
80045be: 687b ldr r3, [r7, #4]
|
|
80045c0: 681b ldr r3, [r3, #0]
|
|
80045c2: 440a add r2, r1
|
|
80045c4: 609a str r2, [r3, #8]
|
|
}
|
|
80045c6: bf00 nop
|
|
80045c8: 3710 adds r7, #16
|
|
80045ca: 46bd mov sp, r7
|
|
80045cc: bd80 pop {r7, pc}
|
|
80045ce: bf00 nop
|
|
80045d0: 40013800 .word 0x40013800
|
|
80045d4: 51eb851f .word 0x51eb851f
|
|
|
|
080045d8 <USB_CoreInit>:
|
|
* @param cfg : pointer to a USB_CfgTypeDef structure that contains
|
|
* the configuration information for the specified USBx peripheral.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
|
|
{
|
|
80045d8: b084 sub sp, #16
|
|
80045da: b480 push {r7}
|
|
80045dc: b083 sub sp, #12
|
|
80045de: af00 add r7, sp, #0
|
|
80045e0: 6078 str r0, [r7, #4]
|
|
80045e2: f107 0014 add.w r0, r7, #20
|
|
80045e6: e880 000e stmia.w r0, {r1, r2, r3}
|
|
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
|
only by USB OTG FS peripheral.
|
|
- This function is added to ensure compatibility across platforms.
|
|
*/
|
|
|
|
return HAL_OK;
|
|
80045ea: 2300 movs r3, #0
|
|
}
|
|
80045ec: 4618 mov r0, r3
|
|
80045ee: 370c adds r7, #12
|
|
80045f0: 46bd mov sp, r7
|
|
80045f2: bc80 pop {r7}
|
|
80045f4: b004 add sp, #16
|
|
80045f6: 4770 bx lr
|
|
|
|
080045f8 <USB_EnableGlobalInt>:
|
|
* Enables the controller's Global Int in the AHB Config reg
|
|
* @param USBx : Selected device
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx)
|
|
{
|
|
80045f8: b480 push {r7}
|
|
80045fa: b085 sub sp, #20
|
|
80045fc: af00 add r7, sp, #0
|
|
80045fe: 6078 str r0, [r7, #4]
|
|
uint16_t winterruptmask;
|
|
|
|
/* Set winterruptmask variable */
|
|
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
|
|
8004600: f44f 433f mov.w r3, #48896 ; 0xbf00
|
|
8004604: 81fb strh r3, [r7, #14]
|
|
USB_CNTR_SUSPM | USB_CNTR_ERRM |
|
|
USB_CNTR_SOFM | USB_CNTR_ESOFM |
|
|
USB_CNTR_RESETM;
|
|
|
|
/* Set interrupt mask */
|
|
USBx->CNTR |= winterruptmask;
|
|
8004606: 687b ldr r3, [r7, #4]
|
|
8004608: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
|
|
800460c: b29a uxth r2, r3
|
|
800460e: 89fb ldrh r3, [r7, #14]
|
|
8004610: 4313 orrs r3, r2
|
|
8004612: b29a uxth r2, r3
|
|
8004614: 687b ldr r3, [r7, #4]
|
|
8004616: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
|
|
|
|
return HAL_OK;
|
|
800461a: 2300 movs r3, #0
|
|
}
|
|
800461c: 4618 mov r0, r3
|
|
800461e: 3714 adds r7, #20
|
|
8004620: 46bd mov sp, r7
|
|
8004622: bc80 pop {r7}
|
|
8004624: 4770 bx lr
|
|
|
|
08004626 <USB_DisableGlobalInt>:
|
|
* Disable the controller's Global Int in the AHB Config reg
|
|
* @param USBx : Selected device
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx)
|
|
{
|
|
8004626: b480 push {r7}
|
|
8004628: b085 sub sp, #20
|
|
800462a: af00 add r7, sp, #0
|
|
800462c: 6078 str r0, [r7, #4]
|
|
uint16_t winterruptmask;
|
|
|
|
/* Set winterruptmask variable */
|
|
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
|
|
800462e: f44f 433f mov.w r3, #48896 ; 0xbf00
|
|
8004632: 81fb strh r3, [r7, #14]
|
|
USB_CNTR_SUSPM | USB_CNTR_ERRM |
|
|
USB_CNTR_SOFM | USB_CNTR_ESOFM |
|
|
USB_CNTR_RESETM;
|
|
|
|
/* Clear interrupt mask */
|
|
USBx->CNTR &= ~winterruptmask;
|
|
8004634: 687b ldr r3, [r7, #4]
|
|
8004636: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
|
|
800463a: b29b uxth r3, r3
|
|
800463c: b21a sxth r2, r3
|
|
800463e: f9b7 300e ldrsh.w r3, [r7, #14]
|
|
8004642: 43db mvns r3, r3
|
|
8004644: b21b sxth r3, r3
|
|
8004646: 4013 ands r3, r2
|
|
8004648: b21b sxth r3, r3
|
|
800464a: b29a uxth r2, r3
|
|
800464c: 687b ldr r3, [r7, #4]
|
|
800464e: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
|
|
|
|
return HAL_OK;
|
|
8004652: 2300 movs r3, #0
|
|
}
|
|
8004654: 4618 mov r0, r3
|
|
8004656: 3714 adds r7, #20
|
|
8004658: 46bd mov sp, r7
|
|
800465a: bc80 pop {r7}
|
|
800465c: 4770 bx lr
|
|
|
|
0800465e <USB_SetCurrentMode>:
|
|
* This parameter can be one of the these values:
|
|
* @arg USB_DEVICE_MODE: Peripheral mode mode
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode)
|
|
{
|
|
800465e: b480 push {r7}
|
|
8004660: b083 sub sp, #12
|
|
8004662: af00 add r7, sp, #0
|
|
8004664: 6078 str r0, [r7, #4]
|
|
8004666: 460b mov r3, r1
|
|
8004668: 70fb strb r3, [r7, #3]
|
|
|
|
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
|
only by USB OTG FS peripheral.
|
|
- This function is added to ensure compatibility across platforms.
|
|
*/
|
|
return HAL_OK;
|
|
800466a: 2300 movs r3, #0
|
|
}
|
|
800466c: 4618 mov r0, r3
|
|
800466e: 370c adds r7, #12
|
|
8004670: 46bd mov sp, r7
|
|
8004672: bc80 pop {r7}
|
|
8004674: 4770 bx lr
|
|
|
|
08004676 <USB_DevInit>:
|
|
* @param cfg : pointer to a USB_CfgTypeDef structure that contains
|
|
* the configuration information for the specified USBx peripheral.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
|
|
{
|
|
8004676: b084 sub sp, #16
|
|
8004678: b580 push {r7, lr}
|
|
800467a: b082 sub sp, #8
|
|
800467c: af00 add r7, sp, #0
|
|
800467e: 6078 str r0, [r7, #4]
|
|
8004680: f107 0014 add.w r0, r7, #20
|
|
8004684: e880 000e stmia.w r0, {r1, r2, r3}
|
|
/* Prevent unused argument(s) compilation warning */
|
|
UNUSED(cfg);
|
|
|
|
/* Init Device */
|
|
/*CNTR_FRES = 1*/
|
|
USBx->CNTR = USB_CNTR_FRES;
|
|
8004688: 687b ldr r3, [r7, #4]
|
|
800468a: 2201 movs r2, #1
|
|
800468c: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
|
|
|
|
/*CNTR_FRES = 0*/
|
|
USBx->CNTR = 0;
|
|
8004690: 687b ldr r3, [r7, #4]
|
|
8004692: 2200 movs r2, #0
|
|
8004694: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
|
|
|
|
/*Clear pending interrupts*/
|
|
USBx->ISTR = 0;
|
|
8004698: 687b ldr r3, [r7, #4]
|
|
800469a: 2200 movs r2, #0
|
|
800469c: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
|
|
|
|
/*Set Btable Address*/
|
|
USBx->BTABLE = BTABLE_ADDRESS;
|
|
80046a0: 687b ldr r3, [r7, #4]
|
|
80046a2: 2200 movs r2, #0
|
|
80046a4: f8a3 2050 strh.w r2, [r3, #80] ; 0x50
|
|
|
|
/* Enable USB Device Interrupt mask */
|
|
(void)USB_EnableGlobalInt(USBx);
|
|
80046a8: 6878 ldr r0, [r7, #4]
|
|
80046aa: f7ff ffa5 bl 80045f8 <USB_EnableGlobalInt>
|
|
|
|
return HAL_OK;
|
|
80046ae: 2300 movs r3, #0
|
|
}
|
|
80046b0: 4618 mov r0, r3
|
|
80046b2: 3708 adds r7, #8
|
|
80046b4: 46bd mov sp, r7
|
|
80046b6: e8bd 4080 ldmia.w sp!, {r7, lr}
|
|
80046ba: b004 add sp, #16
|
|
80046bc: 4770 bx lr
|
|
...
|
|
|
|
080046c0 <USB_ActivateEndpoint>:
|
|
* @param USBx : Selected device
|
|
* @param ep: pointer to endpoint structure
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
|
|
{
|
|
80046c0: b490 push {r4, r7}
|
|
80046c2: b084 sub sp, #16
|
|
80046c4: af00 add r7, sp, #0
|
|
80046c6: 6078 str r0, [r7, #4]
|
|
80046c8: 6039 str r1, [r7, #0]
|
|
HAL_StatusTypeDef ret = HAL_OK;
|
|
80046ca: 2300 movs r3, #0
|
|
80046cc: 73fb strb r3, [r7, #15]
|
|
uint16_t wEpRegVal;
|
|
|
|
wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK;
|
|
80046ce: 687a ldr r2, [r7, #4]
|
|
80046d0: 683b ldr r3, [r7, #0]
|
|
80046d2: 781b ldrb r3, [r3, #0]
|
|
80046d4: 009b lsls r3, r3, #2
|
|
80046d6: 4413 add r3, r2
|
|
80046d8: 881b ldrh r3, [r3, #0]
|
|
80046da: b29b uxth r3, r3
|
|
80046dc: f423 43ec bic.w r3, r3, #30208 ; 0x7600
|
|
80046e0: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
80046e4: 81bb strh r3, [r7, #12]
|
|
|
|
/* initialize Endpoint */
|
|
switch (ep->type)
|
|
80046e6: 683b ldr r3, [r7, #0]
|
|
80046e8: 78db ldrb r3, [r3, #3]
|
|
80046ea: 2b03 cmp r3, #3
|
|
80046ec: d819 bhi.n 8004722 <USB_ActivateEndpoint+0x62>
|
|
80046ee: a201 add r2, pc, #4 ; (adr r2, 80046f4 <USB_ActivateEndpoint+0x34>)
|
|
80046f0: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
80046f4: 08004705 .word 0x08004705
|
|
80046f8: 08004719 .word 0x08004719
|
|
80046fc: 08004729 .word 0x08004729
|
|
8004700: 0800470f .word 0x0800470f
|
|
{
|
|
case EP_TYPE_CTRL:
|
|
wEpRegVal |= USB_EP_CONTROL;
|
|
8004704: 89bb ldrh r3, [r7, #12]
|
|
8004706: f443 7300 orr.w r3, r3, #512 ; 0x200
|
|
800470a: 81bb strh r3, [r7, #12]
|
|
break;
|
|
800470c: e00d b.n 800472a <USB_ActivateEndpoint+0x6a>
|
|
case EP_TYPE_BULK:
|
|
wEpRegVal |= USB_EP_BULK;
|
|
break;
|
|
|
|
case EP_TYPE_INTR:
|
|
wEpRegVal |= USB_EP_INTERRUPT;
|
|
800470e: 89bb ldrh r3, [r7, #12]
|
|
8004710: f443 63c0 orr.w r3, r3, #1536 ; 0x600
|
|
8004714: 81bb strh r3, [r7, #12]
|
|
break;
|
|
8004716: e008 b.n 800472a <USB_ActivateEndpoint+0x6a>
|
|
|
|
case EP_TYPE_ISOC:
|
|
wEpRegVal |= USB_EP_ISOCHRONOUS;
|
|
8004718: 89bb ldrh r3, [r7, #12]
|
|
800471a: f443 6380 orr.w r3, r3, #1024 ; 0x400
|
|
800471e: 81bb strh r3, [r7, #12]
|
|
break;
|
|
8004720: e003 b.n 800472a <USB_ActivateEndpoint+0x6a>
|
|
|
|
default:
|
|
ret = HAL_ERROR;
|
|
8004722: 2301 movs r3, #1
|
|
8004724: 73fb strb r3, [r7, #15]
|
|
break;
|
|
8004726: e000 b.n 800472a <USB_ActivateEndpoint+0x6a>
|
|
break;
|
|
8004728: bf00 nop
|
|
}
|
|
|
|
PCD_SET_ENDPOINT(USBx, ep->num, wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX);
|
|
800472a: 687a ldr r2, [r7, #4]
|
|
800472c: 683b ldr r3, [r7, #0]
|
|
800472e: 781b ldrb r3, [r3, #0]
|
|
8004730: 009b lsls r3, r3, #2
|
|
8004732: 441a add r2, r3
|
|
8004734: 89bb ldrh r3, [r7, #12]
|
|
8004736: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
|
|
800473a: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
|
|
800473e: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8004742: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
8004746: b29b uxth r3, r3
|
|
8004748: 8013 strh r3, [r2, #0]
|
|
|
|
PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num);
|
|
800474a: 687a ldr r2, [r7, #4]
|
|
800474c: 683b ldr r3, [r7, #0]
|
|
800474e: 781b ldrb r3, [r3, #0]
|
|
8004750: 009b lsls r3, r3, #2
|
|
8004752: 4413 add r3, r2
|
|
8004754: 881b ldrh r3, [r3, #0]
|
|
8004756: b29b uxth r3, r3
|
|
8004758: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
800475c: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8004760: b29a uxth r2, r3
|
|
8004762: 683b ldr r3, [r7, #0]
|
|
8004764: 781b ldrb r3, [r3, #0]
|
|
8004766: b29b uxth r3, r3
|
|
8004768: 4313 orrs r3, r2
|
|
800476a: b29c uxth r4, r3
|
|
800476c: 687a ldr r2, [r7, #4]
|
|
800476e: 683b ldr r3, [r7, #0]
|
|
8004770: 781b ldrb r3, [r3, #0]
|
|
8004772: 009b lsls r3, r3, #2
|
|
8004774: 441a add r2, r3
|
|
8004776: 4b8a ldr r3, [pc, #552] ; (80049a0 <USB_ActivateEndpoint+0x2e0>)
|
|
8004778: 4323 orrs r3, r4
|
|
800477a: b29b uxth r3, r3
|
|
800477c: 8013 strh r3, [r2, #0]
|
|
|
|
if (ep->doublebuffer == 0U)
|
|
800477e: 683b ldr r3, [r7, #0]
|
|
8004780: 7b1b ldrb r3, [r3, #12]
|
|
8004782: 2b00 cmp r3, #0
|
|
8004784: f040 8112 bne.w 80049ac <USB_ActivateEndpoint+0x2ec>
|
|
{
|
|
if (ep->is_in != 0U)
|
|
8004788: 683b ldr r3, [r7, #0]
|
|
800478a: 785b ldrb r3, [r3, #1]
|
|
800478c: 2b00 cmp r3, #0
|
|
800478e: d067 beq.n 8004860 <USB_ActivateEndpoint+0x1a0>
|
|
{
|
|
/*Set the endpoint Transmit buffer address */
|
|
PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress);
|
|
8004790: 687c ldr r4, [r7, #4]
|
|
8004792: 687b ldr r3, [r7, #4]
|
|
8004794: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8004798: b29b uxth r3, r3
|
|
800479a: 441c add r4, r3
|
|
800479c: 683b ldr r3, [r7, #0]
|
|
800479e: 781b ldrb r3, [r3, #0]
|
|
80047a0: 011b lsls r3, r3, #4
|
|
80047a2: 4423 add r3, r4
|
|
80047a4: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
80047a8: 461c mov r4, r3
|
|
80047aa: 683b ldr r3, [r7, #0]
|
|
80047ac: 88db ldrh r3, [r3, #6]
|
|
80047ae: 085b lsrs r3, r3, #1
|
|
80047b0: b29b uxth r3, r3
|
|
80047b2: 005b lsls r3, r3, #1
|
|
80047b4: b29b uxth r3, r3
|
|
80047b6: 8023 strh r3, [r4, #0]
|
|
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
|
80047b8: 687a ldr r2, [r7, #4]
|
|
80047ba: 683b ldr r3, [r7, #0]
|
|
80047bc: 781b ldrb r3, [r3, #0]
|
|
80047be: 009b lsls r3, r3, #2
|
|
80047c0: 4413 add r3, r2
|
|
80047c2: 881b ldrh r3, [r3, #0]
|
|
80047c4: b29c uxth r4, r3
|
|
80047c6: 4623 mov r3, r4
|
|
80047c8: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
80047cc: 2b00 cmp r3, #0
|
|
80047ce: d014 beq.n 80047fa <USB_ActivateEndpoint+0x13a>
|
|
80047d0: 687a ldr r2, [r7, #4]
|
|
80047d2: 683b ldr r3, [r7, #0]
|
|
80047d4: 781b ldrb r3, [r3, #0]
|
|
80047d6: 009b lsls r3, r3, #2
|
|
80047d8: 4413 add r3, r2
|
|
80047da: 881b ldrh r3, [r3, #0]
|
|
80047dc: b29b uxth r3, r3
|
|
80047de: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
80047e2: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
80047e6: b29c uxth r4, r3
|
|
80047e8: 687a ldr r2, [r7, #4]
|
|
80047ea: 683b ldr r3, [r7, #0]
|
|
80047ec: 781b ldrb r3, [r3, #0]
|
|
80047ee: 009b lsls r3, r3, #2
|
|
80047f0: 441a add r2, r3
|
|
80047f2: 4b6c ldr r3, [pc, #432] ; (80049a4 <USB_ActivateEndpoint+0x2e4>)
|
|
80047f4: 4323 orrs r3, r4
|
|
80047f6: b29b uxth r3, r3
|
|
80047f8: 8013 strh r3, [r2, #0]
|
|
|
|
if (ep->type != EP_TYPE_ISOC)
|
|
80047fa: 683b ldr r3, [r7, #0]
|
|
80047fc: 78db ldrb r3, [r3, #3]
|
|
80047fe: 2b01 cmp r3, #1
|
|
8004800: d018 beq.n 8004834 <USB_ActivateEndpoint+0x174>
|
|
{
|
|
/* Configure NAK status for the Endpoint */
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
|
|
8004802: 687a ldr r2, [r7, #4]
|
|
8004804: 683b ldr r3, [r7, #0]
|
|
8004806: 781b ldrb r3, [r3, #0]
|
|
8004808: 009b lsls r3, r3, #2
|
|
800480a: 4413 add r3, r2
|
|
800480c: 881b ldrh r3, [r3, #0]
|
|
800480e: b29b uxth r3, r3
|
|
8004810: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8004814: f023 0340 bic.w r3, r3, #64 ; 0x40
|
|
8004818: b29c uxth r4, r3
|
|
800481a: f084 0320 eor.w r3, r4, #32
|
|
800481e: b29c uxth r4, r3
|
|
8004820: 687a ldr r2, [r7, #4]
|
|
8004822: 683b ldr r3, [r7, #0]
|
|
8004824: 781b ldrb r3, [r3, #0]
|
|
8004826: 009b lsls r3, r3, #2
|
|
8004828: 441a add r2, r3
|
|
800482a: 4b5d ldr r3, [pc, #372] ; (80049a0 <USB_ActivateEndpoint+0x2e0>)
|
|
800482c: 4323 orrs r3, r4
|
|
800482e: b29b uxth r3, r3
|
|
8004830: 8013 strh r3, [r2, #0]
|
|
8004832: e22b b.n 8004c8c <USB_ActivateEndpoint+0x5cc>
|
|
}
|
|
else
|
|
{
|
|
/* Configure TX Endpoint to disabled state */
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
|
|
8004834: 687a ldr r2, [r7, #4]
|
|
8004836: 683b ldr r3, [r7, #0]
|
|
8004838: 781b ldrb r3, [r3, #0]
|
|
800483a: 009b lsls r3, r3, #2
|
|
800483c: 4413 add r3, r2
|
|
800483e: 881b ldrh r3, [r3, #0]
|
|
8004840: b29b uxth r3, r3
|
|
8004842: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8004846: f023 0340 bic.w r3, r3, #64 ; 0x40
|
|
800484a: b29c uxth r4, r3
|
|
800484c: 687a ldr r2, [r7, #4]
|
|
800484e: 683b ldr r3, [r7, #0]
|
|
8004850: 781b ldrb r3, [r3, #0]
|
|
8004852: 009b lsls r3, r3, #2
|
|
8004854: 441a add r2, r3
|
|
8004856: 4b52 ldr r3, [pc, #328] ; (80049a0 <USB_ActivateEndpoint+0x2e0>)
|
|
8004858: 4323 orrs r3, r4
|
|
800485a: b29b uxth r3, r3
|
|
800485c: 8013 strh r3, [r2, #0]
|
|
800485e: e215 b.n 8004c8c <USB_ActivateEndpoint+0x5cc>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/*Set the endpoint Receive buffer address */
|
|
PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress);
|
|
8004860: 687c ldr r4, [r7, #4]
|
|
8004862: 687b ldr r3, [r7, #4]
|
|
8004864: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8004868: b29b uxth r3, r3
|
|
800486a: 441c add r4, r3
|
|
800486c: 683b ldr r3, [r7, #0]
|
|
800486e: 781b ldrb r3, [r3, #0]
|
|
8004870: 011b lsls r3, r3, #4
|
|
8004872: 4423 add r3, r4
|
|
8004874: f503 6381 add.w r3, r3, #1032 ; 0x408
|
|
8004878: 461c mov r4, r3
|
|
800487a: 683b ldr r3, [r7, #0]
|
|
800487c: 88db ldrh r3, [r3, #6]
|
|
800487e: 085b lsrs r3, r3, #1
|
|
8004880: b29b uxth r3, r3
|
|
8004882: 005b lsls r3, r3, #1
|
|
8004884: b29b uxth r3, r3
|
|
8004886: 8023 strh r3, [r4, #0]
|
|
/*Set the endpoint Receive buffer counter*/
|
|
PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket);
|
|
8004888: 687c ldr r4, [r7, #4]
|
|
800488a: 687b ldr r3, [r7, #4]
|
|
800488c: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8004890: b29b uxth r3, r3
|
|
8004892: 441c add r4, r3
|
|
8004894: 683b ldr r3, [r7, #0]
|
|
8004896: 781b ldrb r3, [r3, #0]
|
|
8004898: 011b lsls r3, r3, #4
|
|
800489a: 4423 add r3, r4
|
|
800489c: f203 430c addw r3, r3, #1036 ; 0x40c
|
|
80048a0: 461c mov r4, r3
|
|
80048a2: 683b ldr r3, [r7, #0]
|
|
80048a4: 691b ldr r3, [r3, #16]
|
|
80048a6: 2b00 cmp r3, #0
|
|
80048a8: d10e bne.n 80048c8 <USB_ActivateEndpoint+0x208>
|
|
80048aa: 8823 ldrh r3, [r4, #0]
|
|
80048ac: b29b uxth r3, r3
|
|
80048ae: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
|
|
80048b2: b29b uxth r3, r3
|
|
80048b4: 8023 strh r3, [r4, #0]
|
|
80048b6: 8823 ldrh r3, [r4, #0]
|
|
80048b8: b29b uxth r3, r3
|
|
80048ba: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
80048be: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
80048c2: b29b uxth r3, r3
|
|
80048c4: 8023 strh r3, [r4, #0]
|
|
80048c6: e02d b.n 8004924 <USB_ActivateEndpoint+0x264>
|
|
80048c8: 683b ldr r3, [r7, #0]
|
|
80048ca: 691b ldr r3, [r3, #16]
|
|
80048cc: 2b3e cmp r3, #62 ; 0x3e
|
|
80048ce: d812 bhi.n 80048f6 <USB_ActivateEndpoint+0x236>
|
|
80048d0: 683b ldr r3, [r7, #0]
|
|
80048d2: 691b ldr r3, [r3, #16]
|
|
80048d4: 085b lsrs r3, r3, #1
|
|
80048d6: 60bb str r3, [r7, #8]
|
|
80048d8: 683b ldr r3, [r7, #0]
|
|
80048da: 691b ldr r3, [r3, #16]
|
|
80048dc: f003 0301 and.w r3, r3, #1
|
|
80048e0: 2b00 cmp r3, #0
|
|
80048e2: d002 beq.n 80048ea <USB_ActivateEndpoint+0x22a>
|
|
80048e4: 68bb ldr r3, [r7, #8]
|
|
80048e6: 3301 adds r3, #1
|
|
80048e8: 60bb str r3, [r7, #8]
|
|
80048ea: 68bb ldr r3, [r7, #8]
|
|
80048ec: b29b uxth r3, r3
|
|
80048ee: 029b lsls r3, r3, #10
|
|
80048f0: b29b uxth r3, r3
|
|
80048f2: 8023 strh r3, [r4, #0]
|
|
80048f4: e016 b.n 8004924 <USB_ActivateEndpoint+0x264>
|
|
80048f6: 683b ldr r3, [r7, #0]
|
|
80048f8: 691b ldr r3, [r3, #16]
|
|
80048fa: 095b lsrs r3, r3, #5
|
|
80048fc: 60bb str r3, [r7, #8]
|
|
80048fe: 683b ldr r3, [r7, #0]
|
|
8004900: 691b ldr r3, [r3, #16]
|
|
8004902: f003 031f and.w r3, r3, #31
|
|
8004906: 2b00 cmp r3, #0
|
|
8004908: d102 bne.n 8004910 <USB_ActivateEndpoint+0x250>
|
|
800490a: 68bb ldr r3, [r7, #8]
|
|
800490c: 3b01 subs r3, #1
|
|
800490e: 60bb str r3, [r7, #8]
|
|
8004910: 68bb ldr r3, [r7, #8]
|
|
8004912: b29b uxth r3, r3
|
|
8004914: 029b lsls r3, r3, #10
|
|
8004916: b29b uxth r3, r3
|
|
8004918: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
800491c: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8004920: b29b uxth r3, r3
|
|
8004922: 8023 strh r3, [r4, #0]
|
|
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
|
8004924: 687a ldr r2, [r7, #4]
|
|
8004926: 683b ldr r3, [r7, #0]
|
|
8004928: 781b ldrb r3, [r3, #0]
|
|
800492a: 009b lsls r3, r3, #2
|
|
800492c: 4413 add r3, r2
|
|
800492e: 881b ldrh r3, [r3, #0]
|
|
8004930: b29c uxth r4, r3
|
|
8004932: 4623 mov r3, r4
|
|
8004934: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
8004938: 2b00 cmp r3, #0
|
|
800493a: d014 beq.n 8004966 <USB_ActivateEndpoint+0x2a6>
|
|
800493c: 687a ldr r2, [r7, #4]
|
|
800493e: 683b ldr r3, [r7, #0]
|
|
8004940: 781b ldrb r3, [r3, #0]
|
|
8004942: 009b lsls r3, r3, #2
|
|
8004944: 4413 add r3, r2
|
|
8004946: 881b ldrh r3, [r3, #0]
|
|
8004948: b29b uxth r3, r3
|
|
800494a: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
800494e: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8004952: b29c uxth r4, r3
|
|
8004954: 687a ldr r2, [r7, #4]
|
|
8004956: 683b ldr r3, [r7, #0]
|
|
8004958: 781b ldrb r3, [r3, #0]
|
|
800495a: 009b lsls r3, r3, #2
|
|
800495c: 441a add r2, r3
|
|
800495e: 4b12 ldr r3, [pc, #72] ; (80049a8 <USB_ActivateEndpoint+0x2e8>)
|
|
8004960: 4323 orrs r3, r4
|
|
8004962: b29b uxth r3, r3
|
|
8004964: 8013 strh r3, [r2, #0]
|
|
/* Configure VALID status for the Endpoint*/
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
|
|
8004966: 687a ldr r2, [r7, #4]
|
|
8004968: 683b ldr r3, [r7, #0]
|
|
800496a: 781b ldrb r3, [r3, #0]
|
|
800496c: 009b lsls r3, r3, #2
|
|
800496e: 4413 add r3, r2
|
|
8004970: 881b ldrh r3, [r3, #0]
|
|
8004972: b29b uxth r3, r3
|
|
8004974: f423 4380 bic.w r3, r3, #16384 ; 0x4000
|
|
8004978: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
800497c: b29c uxth r4, r3
|
|
800497e: f484 5380 eor.w r3, r4, #4096 ; 0x1000
|
|
8004982: b29c uxth r4, r3
|
|
8004984: f484 5300 eor.w r3, r4, #8192 ; 0x2000
|
|
8004988: b29c uxth r4, r3
|
|
800498a: 687a ldr r2, [r7, #4]
|
|
800498c: 683b ldr r3, [r7, #0]
|
|
800498e: 781b ldrb r3, [r3, #0]
|
|
8004990: 009b lsls r3, r3, #2
|
|
8004992: 441a add r2, r3
|
|
8004994: 4b02 ldr r3, [pc, #8] ; (80049a0 <USB_ActivateEndpoint+0x2e0>)
|
|
8004996: 4323 orrs r3, r4
|
|
8004998: b29b uxth r3, r3
|
|
800499a: 8013 strh r3, [r2, #0]
|
|
800499c: e176 b.n 8004c8c <USB_ActivateEndpoint+0x5cc>
|
|
800499e: bf00 nop
|
|
80049a0: ffff8080 .word 0xffff8080
|
|
80049a4: ffff80c0 .word 0xffff80c0
|
|
80049a8: ffffc080 .word 0xffffc080
|
|
}
|
|
/*Double Buffer*/
|
|
else
|
|
{
|
|
/* Set the endpoint as double buffered */
|
|
PCD_SET_EP_DBUF(USBx, ep->num);
|
|
80049ac: 687a ldr r2, [r7, #4]
|
|
80049ae: 683b ldr r3, [r7, #0]
|
|
80049b0: 781b ldrb r3, [r3, #0]
|
|
80049b2: 009b lsls r3, r3, #2
|
|
80049b4: 4413 add r3, r2
|
|
80049b6: 881b ldrh r3, [r3, #0]
|
|
80049b8: b29b uxth r3, r3
|
|
80049ba: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
80049be: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
80049c2: b29c uxth r4, r3
|
|
80049c4: 687a ldr r2, [r7, #4]
|
|
80049c6: 683b ldr r3, [r7, #0]
|
|
80049c8: 781b ldrb r3, [r3, #0]
|
|
80049ca: 009b lsls r3, r3, #2
|
|
80049cc: 441a add r2, r3
|
|
80049ce: 4b96 ldr r3, [pc, #600] ; (8004c28 <USB_ActivateEndpoint+0x568>)
|
|
80049d0: 4323 orrs r3, r4
|
|
80049d2: b29b uxth r3, r3
|
|
80049d4: 8013 strh r3, [r2, #0]
|
|
/* Set buffer address for double buffered mode */
|
|
PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1);
|
|
80049d6: 687c ldr r4, [r7, #4]
|
|
80049d8: 687b ldr r3, [r7, #4]
|
|
80049da: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
80049de: b29b uxth r3, r3
|
|
80049e0: 441c add r4, r3
|
|
80049e2: 683b ldr r3, [r7, #0]
|
|
80049e4: 781b ldrb r3, [r3, #0]
|
|
80049e6: 011b lsls r3, r3, #4
|
|
80049e8: 4423 add r3, r4
|
|
80049ea: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
80049ee: 461c mov r4, r3
|
|
80049f0: 683b ldr r3, [r7, #0]
|
|
80049f2: 891b ldrh r3, [r3, #8]
|
|
80049f4: 085b lsrs r3, r3, #1
|
|
80049f6: b29b uxth r3, r3
|
|
80049f8: 005b lsls r3, r3, #1
|
|
80049fa: b29b uxth r3, r3
|
|
80049fc: 8023 strh r3, [r4, #0]
|
|
80049fe: 687c ldr r4, [r7, #4]
|
|
8004a00: 687b ldr r3, [r7, #4]
|
|
8004a02: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8004a06: b29b uxth r3, r3
|
|
8004a08: 441c add r4, r3
|
|
8004a0a: 683b ldr r3, [r7, #0]
|
|
8004a0c: 781b ldrb r3, [r3, #0]
|
|
8004a0e: 011b lsls r3, r3, #4
|
|
8004a10: 4423 add r3, r4
|
|
8004a12: f503 6381 add.w r3, r3, #1032 ; 0x408
|
|
8004a16: 461c mov r4, r3
|
|
8004a18: 683b ldr r3, [r7, #0]
|
|
8004a1a: 895b ldrh r3, [r3, #10]
|
|
8004a1c: 085b lsrs r3, r3, #1
|
|
8004a1e: b29b uxth r3, r3
|
|
8004a20: 005b lsls r3, r3, #1
|
|
8004a22: b29b uxth r3, r3
|
|
8004a24: 8023 strh r3, [r4, #0]
|
|
|
|
if (ep->is_in == 0U)
|
|
8004a26: 683b ldr r3, [r7, #0]
|
|
8004a28: 785b ldrb r3, [r3, #1]
|
|
8004a2a: 2b00 cmp r3, #0
|
|
8004a2c: f040 8088 bne.w 8004b40 <USB_ActivateEndpoint+0x480>
|
|
{
|
|
/* Clear the data toggle bits for the endpoint IN/OUT */
|
|
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
|
8004a30: 687a ldr r2, [r7, #4]
|
|
8004a32: 683b ldr r3, [r7, #0]
|
|
8004a34: 781b ldrb r3, [r3, #0]
|
|
8004a36: 009b lsls r3, r3, #2
|
|
8004a38: 4413 add r3, r2
|
|
8004a3a: 881b ldrh r3, [r3, #0]
|
|
8004a3c: b29c uxth r4, r3
|
|
8004a3e: 4623 mov r3, r4
|
|
8004a40: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
8004a44: 2b00 cmp r3, #0
|
|
8004a46: d014 beq.n 8004a72 <USB_ActivateEndpoint+0x3b2>
|
|
8004a48: 687a ldr r2, [r7, #4]
|
|
8004a4a: 683b ldr r3, [r7, #0]
|
|
8004a4c: 781b ldrb r3, [r3, #0]
|
|
8004a4e: 009b lsls r3, r3, #2
|
|
8004a50: 4413 add r3, r2
|
|
8004a52: 881b ldrh r3, [r3, #0]
|
|
8004a54: b29b uxth r3, r3
|
|
8004a56: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8004a5a: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8004a5e: b29c uxth r4, r3
|
|
8004a60: 687a ldr r2, [r7, #4]
|
|
8004a62: 683b ldr r3, [r7, #0]
|
|
8004a64: 781b ldrb r3, [r3, #0]
|
|
8004a66: 009b lsls r3, r3, #2
|
|
8004a68: 441a add r2, r3
|
|
8004a6a: 4b70 ldr r3, [pc, #448] ; (8004c2c <USB_ActivateEndpoint+0x56c>)
|
|
8004a6c: 4323 orrs r3, r4
|
|
8004a6e: b29b uxth r3, r3
|
|
8004a70: 8013 strh r3, [r2, #0]
|
|
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
|
8004a72: 687a ldr r2, [r7, #4]
|
|
8004a74: 683b ldr r3, [r7, #0]
|
|
8004a76: 781b ldrb r3, [r3, #0]
|
|
8004a78: 009b lsls r3, r3, #2
|
|
8004a7a: 4413 add r3, r2
|
|
8004a7c: 881b ldrh r3, [r3, #0]
|
|
8004a7e: b29c uxth r4, r3
|
|
8004a80: 4623 mov r3, r4
|
|
8004a82: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
8004a86: 2b00 cmp r3, #0
|
|
8004a88: d014 beq.n 8004ab4 <USB_ActivateEndpoint+0x3f4>
|
|
8004a8a: 687a ldr r2, [r7, #4]
|
|
8004a8c: 683b ldr r3, [r7, #0]
|
|
8004a8e: 781b ldrb r3, [r3, #0]
|
|
8004a90: 009b lsls r3, r3, #2
|
|
8004a92: 4413 add r3, r2
|
|
8004a94: 881b ldrh r3, [r3, #0]
|
|
8004a96: b29b uxth r3, r3
|
|
8004a98: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8004a9c: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8004aa0: b29c uxth r4, r3
|
|
8004aa2: 687a ldr r2, [r7, #4]
|
|
8004aa4: 683b ldr r3, [r7, #0]
|
|
8004aa6: 781b ldrb r3, [r3, #0]
|
|
8004aa8: 009b lsls r3, r3, #2
|
|
8004aaa: 441a add r2, r3
|
|
8004aac: 4b60 ldr r3, [pc, #384] ; (8004c30 <USB_ActivateEndpoint+0x570>)
|
|
8004aae: 4323 orrs r3, r4
|
|
8004ab0: b29b uxth r3, r3
|
|
8004ab2: 8013 strh r3, [r2, #0]
|
|
|
|
/* Reset value of the data toggle bits for the endpoint out */
|
|
PCD_TX_DTOG(USBx, ep->num);
|
|
8004ab4: 687a ldr r2, [r7, #4]
|
|
8004ab6: 683b ldr r3, [r7, #0]
|
|
8004ab8: 781b ldrb r3, [r3, #0]
|
|
8004aba: 009b lsls r3, r3, #2
|
|
8004abc: 4413 add r3, r2
|
|
8004abe: 881b ldrh r3, [r3, #0]
|
|
8004ac0: b29b uxth r3, r3
|
|
8004ac2: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8004ac6: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8004aca: b29c uxth r4, r3
|
|
8004acc: 687a ldr r2, [r7, #4]
|
|
8004ace: 683b ldr r3, [r7, #0]
|
|
8004ad0: 781b ldrb r3, [r3, #0]
|
|
8004ad2: 009b lsls r3, r3, #2
|
|
8004ad4: 441a add r2, r3
|
|
8004ad6: 4b56 ldr r3, [pc, #344] ; (8004c30 <USB_ActivateEndpoint+0x570>)
|
|
8004ad8: 4323 orrs r3, r4
|
|
8004ada: b29b uxth r3, r3
|
|
8004adc: 8013 strh r3, [r2, #0]
|
|
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
|
|
8004ade: 687a ldr r2, [r7, #4]
|
|
8004ae0: 683b ldr r3, [r7, #0]
|
|
8004ae2: 781b ldrb r3, [r3, #0]
|
|
8004ae4: 009b lsls r3, r3, #2
|
|
8004ae6: 4413 add r3, r2
|
|
8004ae8: 881b ldrh r3, [r3, #0]
|
|
8004aea: b29b uxth r3, r3
|
|
8004aec: f423 4380 bic.w r3, r3, #16384 ; 0x4000
|
|
8004af0: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8004af4: b29c uxth r4, r3
|
|
8004af6: f484 5380 eor.w r3, r4, #4096 ; 0x1000
|
|
8004afa: b29c uxth r4, r3
|
|
8004afc: f484 5300 eor.w r3, r4, #8192 ; 0x2000
|
|
8004b00: b29c uxth r4, r3
|
|
8004b02: 687a ldr r2, [r7, #4]
|
|
8004b04: 683b ldr r3, [r7, #0]
|
|
8004b06: 781b ldrb r3, [r3, #0]
|
|
8004b08: 009b lsls r3, r3, #2
|
|
8004b0a: 441a add r2, r3
|
|
8004b0c: 4b49 ldr r3, [pc, #292] ; (8004c34 <USB_ActivateEndpoint+0x574>)
|
|
8004b0e: 4323 orrs r3, r4
|
|
8004b10: b29b uxth r3, r3
|
|
8004b12: 8013 strh r3, [r2, #0]
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
|
|
8004b14: 687a ldr r2, [r7, #4]
|
|
8004b16: 683b ldr r3, [r7, #0]
|
|
8004b18: 781b ldrb r3, [r3, #0]
|
|
8004b1a: 009b lsls r3, r3, #2
|
|
8004b1c: 4413 add r3, r2
|
|
8004b1e: 881b ldrh r3, [r3, #0]
|
|
8004b20: b29b uxth r3, r3
|
|
8004b22: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8004b26: f023 0340 bic.w r3, r3, #64 ; 0x40
|
|
8004b2a: b29c uxth r4, r3
|
|
8004b2c: 687a ldr r2, [r7, #4]
|
|
8004b2e: 683b ldr r3, [r7, #0]
|
|
8004b30: 781b ldrb r3, [r3, #0]
|
|
8004b32: 009b lsls r3, r3, #2
|
|
8004b34: 441a add r2, r3
|
|
8004b36: 4b3f ldr r3, [pc, #252] ; (8004c34 <USB_ActivateEndpoint+0x574>)
|
|
8004b38: 4323 orrs r3, r4
|
|
8004b3a: b29b uxth r3, r3
|
|
8004b3c: 8013 strh r3, [r2, #0]
|
|
8004b3e: e0a5 b.n 8004c8c <USB_ActivateEndpoint+0x5cc>
|
|
}
|
|
else
|
|
{
|
|
/* Clear the data toggle bits for the endpoint IN/OUT */
|
|
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
|
8004b40: 687a ldr r2, [r7, #4]
|
|
8004b42: 683b ldr r3, [r7, #0]
|
|
8004b44: 781b ldrb r3, [r3, #0]
|
|
8004b46: 009b lsls r3, r3, #2
|
|
8004b48: 4413 add r3, r2
|
|
8004b4a: 881b ldrh r3, [r3, #0]
|
|
8004b4c: b29c uxth r4, r3
|
|
8004b4e: 4623 mov r3, r4
|
|
8004b50: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
8004b54: 2b00 cmp r3, #0
|
|
8004b56: d014 beq.n 8004b82 <USB_ActivateEndpoint+0x4c2>
|
|
8004b58: 687a ldr r2, [r7, #4]
|
|
8004b5a: 683b ldr r3, [r7, #0]
|
|
8004b5c: 781b ldrb r3, [r3, #0]
|
|
8004b5e: 009b lsls r3, r3, #2
|
|
8004b60: 4413 add r3, r2
|
|
8004b62: 881b ldrh r3, [r3, #0]
|
|
8004b64: b29b uxth r3, r3
|
|
8004b66: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8004b6a: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8004b6e: b29c uxth r4, r3
|
|
8004b70: 687a ldr r2, [r7, #4]
|
|
8004b72: 683b ldr r3, [r7, #0]
|
|
8004b74: 781b ldrb r3, [r3, #0]
|
|
8004b76: 009b lsls r3, r3, #2
|
|
8004b78: 441a add r2, r3
|
|
8004b7a: 4b2c ldr r3, [pc, #176] ; (8004c2c <USB_ActivateEndpoint+0x56c>)
|
|
8004b7c: 4323 orrs r3, r4
|
|
8004b7e: b29b uxth r3, r3
|
|
8004b80: 8013 strh r3, [r2, #0]
|
|
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
|
8004b82: 687a ldr r2, [r7, #4]
|
|
8004b84: 683b ldr r3, [r7, #0]
|
|
8004b86: 781b ldrb r3, [r3, #0]
|
|
8004b88: 009b lsls r3, r3, #2
|
|
8004b8a: 4413 add r3, r2
|
|
8004b8c: 881b ldrh r3, [r3, #0]
|
|
8004b8e: b29c uxth r4, r3
|
|
8004b90: 4623 mov r3, r4
|
|
8004b92: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
8004b96: 2b00 cmp r3, #0
|
|
8004b98: d014 beq.n 8004bc4 <USB_ActivateEndpoint+0x504>
|
|
8004b9a: 687a ldr r2, [r7, #4]
|
|
8004b9c: 683b ldr r3, [r7, #0]
|
|
8004b9e: 781b ldrb r3, [r3, #0]
|
|
8004ba0: 009b lsls r3, r3, #2
|
|
8004ba2: 4413 add r3, r2
|
|
8004ba4: 881b ldrh r3, [r3, #0]
|
|
8004ba6: b29b uxth r3, r3
|
|
8004ba8: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8004bac: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8004bb0: b29c uxth r4, r3
|
|
8004bb2: 687a ldr r2, [r7, #4]
|
|
8004bb4: 683b ldr r3, [r7, #0]
|
|
8004bb6: 781b ldrb r3, [r3, #0]
|
|
8004bb8: 009b lsls r3, r3, #2
|
|
8004bba: 441a add r2, r3
|
|
8004bbc: 4b1c ldr r3, [pc, #112] ; (8004c30 <USB_ActivateEndpoint+0x570>)
|
|
8004bbe: 4323 orrs r3, r4
|
|
8004bc0: b29b uxth r3, r3
|
|
8004bc2: 8013 strh r3, [r2, #0]
|
|
PCD_RX_DTOG(USBx, ep->num);
|
|
8004bc4: 687a ldr r2, [r7, #4]
|
|
8004bc6: 683b ldr r3, [r7, #0]
|
|
8004bc8: 781b ldrb r3, [r3, #0]
|
|
8004bca: 009b lsls r3, r3, #2
|
|
8004bcc: 4413 add r3, r2
|
|
8004bce: 881b ldrh r3, [r3, #0]
|
|
8004bd0: b29b uxth r3, r3
|
|
8004bd2: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8004bd6: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8004bda: b29c uxth r4, r3
|
|
8004bdc: 687a ldr r2, [r7, #4]
|
|
8004bde: 683b ldr r3, [r7, #0]
|
|
8004be0: 781b ldrb r3, [r3, #0]
|
|
8004be2: 009b lsls r3, r3, #2
|
|
8004be4: 441a add r2, r3
|
|
8004be6: 4b11 ldr r3, [pc, #68] ; (8004c2c <USB_ActivateEndpoint+0x56c>)
|
|
8004be8: 4323 orrs r3, r4
|
|
8004bea: b29b uxth r3, r3
|
|
8004bec: 8013 strh r3, [r2, #0]
|
|
|
|
if (ep->type != EP_TYPE_ISOC)
|
|
8004bee: 683b ldr r3, [r7, #0]
|
|
8004bf0: 78db ldrb r3, [r3, #3]
|
|
8004bf2: 2b01 cmp r3, #1
|
|
8004bf4: d020 beq.n 8004c38 <USB_ActivateEndpoint+0x578>
|
|
{
|
|
/* Configure NAK status for the Endpoint */
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
|
|
8004bf6: 687a ldr r2, [r7, #4]
|
|
8004bf8: 683b ldr r3, [r7, #0]
|
|
8004bfa: 781b ldrb r3, [r3, #0]
|
|
8004bfc: 009b lsls r3, r3, #2
|
|
8004bfe: 4413 add r3, r2
|
|
8004c00: 881b ldrh r3, [r3, #0]
|
|
8004c02: b29b uxth r3, r3
|
|
8004c04: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8004c08: f023 0340 bic.w r3, r3, #64 ; 0x40
|
|
8004c0c: b29c uxth r4, r3
|
|
8004c0e: f084 0320 eor.w r3, r4, #32
|
|
8004c12: b29c uxth r4, r3
|
|
8004c14: 687a ldr r2, [r7, #4]
|
|
8004c16: 683b ldr r3, [r7, #0]
|
|
8004c18: 781b ldrb r3, [r3, #0]
|
|
8004c1a: 009b lsls r3, r3, #2
|
|
8004c1c: 441a add r2, r3
|
|
8004c1e: 4b05 ldr r3, [pc, #20] ; (8004c34 <USB_ActivateEndpoint+0x574>)
|
|
8004c20: 4323 orrs r3, r4
|
|
8004c22: b29b uxth r3, r3
|
|
8004c24: 8013 strh r3, [r2, #0]
|
|
8004c26: e01c b.n 8004c62 <USB_ActivateEndpoint+0x5a2>
|
|
8004c28: ffff8180 .word 0xffff8180
|
|
8004c2c: ffffc080 .word 0xffffc080
|
|
8004c30: ffff80c0 .word 0xffff80c0
|
|
8004c34: ffff8080 .word 0xffff8080
|
|
}
|
|
else
|
|
{
|
|
/* Configure TX Endpoint to disabled state */
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
|
|
8004c38: 687a ldr r2, [r7, #4]
|
|
8004c3a: 683b ldr r3, [r7, #0]
|
|
8004c3c: 781b ldrb r3, [r3, #0]
|
|
8004c3e: 009b lsls r3, r3, #2
|
|
8004c40: 4413 add r3, r2
|
|
8004c42: 881b ldrh r3, [r3, #0]
|
|
8004c44: b29b uxth r3, r3
|
|
8004c46: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8004c4a: f023 0340 bic.w r3, r3, #64 ; 0x40
|
|
8004c4e: b29c uxth r4, r3
|
|
8004c50: 687a ldr r2, [r7, #4]
|
|
8004c52: 683b ldr r3, [r7, #0]
|
|
8004c54: 781b ldrb r3, [r3, #0]
|
|
8004c56: 009b lsls r3, r3, #2
|
|
8004c58: 441a add r2, r3
|
|
8004c5a: 4b0f ldr r3, [pc, #60] ; (8004c98 <USB_ActivateEndpoint+0x5d8>)
|
|
8004c5c: 4323 orrs r3, r4
|
|
8004c5e: b29b uxth r3, r3
|
|
8004c60: 8013 strh r3, [r2, #0]
|
|
}
|
|
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
|
|
8004c62: 687a ldr r2, [r7, #4]
|
|
8004c64: 683b ldr r3, [r7, #0]
|
|
8004c66: 781b ldrb r3, [r3, #0]
|
|
8004c68: 009b lsls r3, r3, #2
|
|
8004c6a: 4413 add r3, r2
|
|
8004c6c: 881b ldrh r3, [r3, #0]
|
|
8004c6e: b29b uxth r3, r3
|
|
8004c70: f423 4380 bic.w r3, r3, #16384 ; 0x4000
|
|
8004c74: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8004c78: b29c uxth r4, r3
|
|
8004c7a: 687a ldr r2, [r7, #4]
|
|
8004c7c: 683b ldr r3, [r7, #0]
|
|
8004c7e: 781b ldrb r3, [r3, #0]
|
|
8004c80: 009b lsls r3, r3, #2
|
|
8004c82: 441a add r2, r3
|
|
8004c84: 4b04 ldr r3, [pc, #16] ; (8004c98 <USB_ActivateEndpoint+0x5d8>)
|
|
8004c86: 4323 orrs r3, r4
|
|
8004c88: b29b uxth r3, r3
|
|
8004c8a: 8013 strh r3, [r2, #0]
|
|
}
|
|
}
|
|
|
|
return ret;
|
|
8004c8c: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
8004c8e: 4618 mov r0, r3
|
|
8004c90: 3710 adds r7, #16
|
|
8004c92: 46bd mov sp, r7
|
|
8004c94: bc90 pop {r4, r7}
|
|
8004c96: 4770 bx lr
|
|
8004c98: ffff8080 .word 0xffff8080
|
|
|
|
08004c9c <USB_DeactivateEndpoint>:
|
|
* @param USBx : Selected device
|
|
* @param ep: pointer to endpoint structure
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
|
|
{
|
|
8004c9c: b490 push {r4, r7}
|
|
8004c9e: b082 sub sp, #8
|
|
8004ca0: af00 add r7, sp, #0
|
|
8004ca2: 6078 str r0, [r7, #4]
|
|
8004ca4: 6039 str r1, [r7, #0]
|
|
if (ep->doublebuffer == 0U)
|
|
8004ca6: 683b ldr r3, [r7, #0]
|
|
8004ca8: 7b1b ldrb r3, [r3, #12]
|
|
8004caa: 2b00 cmp r3, #0
|
|
8004cac: d171 bne.n 8004d92 <USB_DeactivateEndpoint+0xf6>
|
|
{
|
|
if (ep->is_in != 0U)
|
|
8004cae: 683b ldr r3, [r7, #0]
|
|
8004cb0: 785b ldrb r3, [r3, #1]
|
|
8004cb2: 2b00 cmp r3, #0
|
|
8004cb4: d036 beq.n 8004d24 <USB_DeactivateEndpoint+0x88>
|
|
{
|
|
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
|
8004cb6: 687a ldr r2, [r7, #4]
|
|
8004cb8: 683b ldr r3, [r7, #0]
|
|
8004cba: 781b ldrb r3, [r3, #0]
|
|
8004cbc: 009b lsls r3, r3, #2
|
|
8004cbe: 4413 add r3, r2
|
|
8004cc0: 881b ldrh r3, [r3, #0]
|
|
8004cc2: b29c uxth r4, r3
|
|
8004cc4: 4623 mov r3, r4
|
|
8004cc6: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
8004cca: 2b00 cmp r3, #0
|
|
8004ccc: d014 beq.n 8004cf8 <USB_DeactivateEndpoint+0x5c>
|
|
8004cce: 687a ldr r2, [r7, #4]
|
|
8004cd0: 683b ldr r3, [r7, #0]
|
|
8004cd2: 781b ldrb r3, [r3, #0]
|
|
8004cd4: 009b lsls r3, r3, #2
|
|
8004cd6: 4413 add r3, r2
|
|
8004cd8: 881b ldrh r3, [r3, #0]
|
|
8004cda: b29b uxth r3, r3
|
|
8004cdc: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8004ce0: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8004ce4: b29c uxth r4, r3
|
|
8004ce6: 687a ldr r2, [r7, #4]
|
|
8004ce8: 683b ldr r3, [r7, #0]
|
|
8004cea: 781b ldrb r3, [r3, #0]
|
|
8004cec: 009b lsls r3, r3, #2
|
|
8004cee: 441a add r2, r3
|
|
8004cf0: 4b6b ldr r3, [pc, #428] ; (8004ea0 <USB_DeactivateEndpoint+0x204>)
|
|
8004cf2: 4323 orrs r3, r4
|
|
8004cf4: b29b uxth r3, r3
|
|
8004cf6: 8013 strh r3, [r2, #0]
|
|
/* Configure DISABLE status for the Endpoint*/
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
|
|
8004cf8: 687a ldr r2, [r7, #4]
|
|
8004cfa: 683b ldr r3, [r7, #0]
|
|
8004cfc: 781b ldrb r3, [r3, #0]
|
|
8004cfe: 009b lsls r3, r3, #2
|
|
8004d00: 4413 add r3, r2
|
|
8004d02: 881b ldrh r3, [r3, #0]
|
|
8004d04: b29b uxth r3, r3
|
|
8004d06: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8004d0a: f023 0340 bic.w r3, r3, #64 ; 0x40
|
|
8004d0e: b29c uxth r4, r3
|
|
8004d10: 687a ldr r2, [r7, #4]
|
|
8004d12: 683b ldr r3, [r7, #0]
|
|
8004d14: 781b ldrb r3, [r3, #0]
|
|
8004d16: 009b lsls r3, r3, #2
|
|
8004d18: 441a add r2, r3
|
|
8004d1a: 4b62 ldr r3, [pc, #392] ; (8004ea4 <USB_DeactivateEndpoint+0x208>)
|
|
8004d1c: 4323 orrs r3, r4
|
|
8004d1e: b29b uxth r3, r3
|
|
8004d20: 8013 strh r3, [r2, #0]
|
|
8004d22: e144 b.n 8004fae <USB_DeactivateEndpoint+0x312>
|
|
}
|
|
else
|
|
{
|
|
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
|
8004d24: 687a ldr r2, [r7, #4]
|
|
8004d26: 683b ldr r3, [r7, #0]
|
|
8004d28: 781b ldrb r3, [r3, #0]
|
|
8004d2a: 009b lsls r3, r3, #2
|
|
8004d2c: 4413 add r3, r2
|
|
8004d2e: 881b ldrh r3, [r3, #0]
|
|
8004d30: b29c uxth r4, r3
|
|
8004d32: 4623 mov r3, r4
|
|
8004d34: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
8004d38: 2b00 cmp r3, #0
|
|
8004d3a: d014 beq.n 8004d66 <USB_DeactivateEndpoint+0xca>
|
|
8004d3c: 687a ldr r2, [r7, #4]
|
|
8004d3e: 683b ldr r3, [r7, #0]
|
|
8004d40: 781b ldrb r3, [r3, #0]
|
|
8004d42: 009b lsls r3, r3, #2
|
|
8004d44: 4413 add r3, r2
|
|
8004d46: 881b ldrh r3, [r3, #0]
|
|
8004d48: b29b uxth r3, r3
|
|
8004d4a: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8004d4e: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8004d52: b29c uxth r4, r3
|
|
8004d54: 687a ldr r2, [r7, #4]
|
|
8004d56: 683b ldr r3, [r7, #0]
|
|
8004d58: 781b ldrb r3, [r3, #0]
|
|
8004d5a: 009b lsls r3, r3, #2
|
|
8004d5c: 441a add r2, r3
|
|
8004d5e: 4b52 ldr r3, [pc, #328] ; (8004ea8 <USB_DeactivateEndpoint+0x20c>)
|
|
8004d60: 4323 orrs r3, r4
|
|
8004d62: b29b uxth r3, r3
|
|
8004d64: 8013 strh r3, [r2, #0]
|
|
/* Configure DISABLE status for the Endpoint*/
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
|
|
8004d66: 687a ldr r2, [r7, #4]
|
|
8004d68: 683b ldr r3, [r7, #0]
|
|
8004d6a: 781b ldrb r3, [r3, #0]
|
|
8004d6c: 009b lsls r3, r3, #2
|
|
8004d6e: 4413 add r3, r2
|
|
8004d70: 881b ldrh r3, [r3, #0]
|
|
8004d72: b29b uxth r3, r3
|
|
8004d74: f423 4380 bic.w r3, r3, #16384 ; 0x4000
|
|
8004d78: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8004d7c: b29c uxth r4, r3
|
|
8004d7e: 687a ldr r2, [r7, #4]
|
|
8004d80: 683b ldr r3, [r7, #0]
|
|
8004d82: 781b ldrb r3, [r3, #0]
|
|
8004d84: 009b lsls r3, r3, #2
|
|
8004d86: 441a add r2, r3
|
|
8004d88: 4b46 ldr r3, [pc, #280] ; (8004ea4 <USB_DeactivateEndpoint+0x208>)
|
|
8004d8a: 4323 orrs r3, r4
|
|
8004d8c: b29b uxth r3, r3
|
|
8004d8e: 8013 strh r3, [r2, #0]
|
|
8004d90: e10d b.n 8004fae <USB_DeactivateEndpoint+0x312>
|
|
}
|
|
}
|
|
/*Double Buffer*/
|
|
else
|
|
{
|
|
if (ep->is_in == 0U)
|
|
8004d92: 683b ldr r3, [r7, #0]
|
|
8004d94: 785b ldrb r3, [r3, #1]
|
|
8004d96: 2b00 cmp r3, #0
|
|
8004d98: f040 8088 bne.w 8004eac <USB_DeactivateEndpoint+0x210>
|
|
{
|
|
/* Clear the data toggle bits for the endpoint IN/OUT*/
|
|
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
|
8004d9c: 687a ldr r2, [r7, #4]
|
|
8004d9e: 683b ldr r3, [r7, #0]
|
|
8004da0: 781b ldrb r3, [r3, #0]
|
|
8004da2: 009b lsls r3, r3, #2
|
|
8004da4: 4413 add r3, r2
|
|
8004da6: 881b ldrh r3, [r3, #0]
|
|
8004da8: b29c uxth r4, r3
|
|
8004daa: 4623 mov r3, r4
|
|
8004dac: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
8004db0: 2b00 cmp r3, #0
|
|
8004db2: d014 beq.n 8004dde <USB_DeactivateEndpoint+0x142>
|
|
8004db4: 687a ldr r2, [r7, #4]
|
|
8004db6: 683b ldr r3, [r7, #0]
|
|
8004db8: 781b ldrb r3, [r3, #0]
|
|
8004dba: 009b lsls r3, r3, #2
|
|
8004dbc: 4413 add r3, r2
|
|
8004dbe: 881b ldrh r3, [r3, #0]
|
|
8004dc0: b29b uxth r3, r3
|
|
8004dc2: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8004dc6: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8004dca: b29c uxth r4, r3
|
|
8004dcc: 687a ldr r2, [r7, #4]
|
|
8004dce: 683b ldr r3, [r7, #0]
|
|
8004dd0: 781b ldrb r3, [r3, #0]
|
|
8004dd2: 009b lsls r3, r3, #2
|
|
8004dd4: 441a add r2, r3
|
|
8004dd6: 4b34 ldr r3, [pc, #208] ; (8004ea8 <USB_DeactivateEndpoint+0x20c>)
|
|
8004dd8: 4323 orrs r3, r4
|
|
8004dda: b29b uxth r3, r3
|
|
8004ddc: 8013 strh r3, [r2, #0]
|
|
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
|
8004dde: 687a ldr r2, [r7, #4]
|
|
8004de0: 683b ldr r3, [r7, #0]
|
|
8004de2: 781b ldrb r3, [r3, #0]
|
|
8004de4: 009b lsls r3, r3, #2
|
|
8004de6: 4413 add r3, r2
|
|
8004de8: 881b ldrh r3, [r3, #0]
|
|
8004dea: b29c uxth r4, r3
|
|
8004dec: 4623 mov r3, r4
|
|
8004dee: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
8004df2: 2b00 cmp r3, #0
|
|
8004df4: d014 beq.n 8004e20 <USB_DeactivateEndpoint+0x184>
|
|
8004df6: 687a ldr r2, [r7, #4]
|
|
8004df8: 683b ldr r3, [r7, #0]
|
|
8004dfa: 781b ldrb r3, [r3, #0]
|
|
8004dfc: 009b lsls r3, r3, #2
|
|
8004dfe: 4413 add r3, r2
|
|
8004e00: 881b ldrh r3, [r3, #0]
|
|
8004e02: b29b uxth r3, r3
|
|
8004e04: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8004e08: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8004e0c: b29c uxth r4, r3
|
|
8004e0e: 687a ldr r2, [r7, #4]
|
|
8004e10: 683b ldr r3, [r7, #0]
|
|
8004e12: 781b ldrb r3, [r3, #0]
|
|
8004e14: 009b lsls r3, r3, #2
|
|
8004e16: 441a add r2, r3
|
|
8004e18: 4b21 ldr r3, [pc, #132] ; (8004ea0 <USB_DeactivateEndpoint+0x204>)
|
|
8004e1a: 4323 orrs r3, r4
|
|
8004e1c: b29b uxth r3, r3
|
|
8004e1e: 8013 strh r3, [r2, #0]
|
|
|
|
/* Reset value of the data toggle bits for the endpoint out*/
|
|
PCD_TX_DTOG(USBx, ep->num);
|
|
8004e20: 687a ldr r2, [r7, #4]
|
|
8004e22: 683b ldr r3, [r7, #0]
|
|
8004e24: 781b ldrb r3, [r3, #0]
|
|
8004e26: 009b lsls r3, r3, #2
|
|
8004e28: 4413 add r3, r2
|
|
8004e2a: 881b ldrh r3, [r3, #0]
|
|
8004e2c: b29b uxth r3, r3
|
|
8004e2e: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8004e32: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8004e36: b29c uxth r4, r3
|
|
8004e38: 687a ldr r2, [r7, #4]
|
|
8004e3a: 683b ldr r3, [r7, #0]
|
|
8004e3c: 781b ldrb r3, [r3, #0]
|
|
8004e3e: 009b lsls r3, r3, #2
|
|
8004e40: 441a add r2, r3
|
|
8004e42: 4b17 ldr r3, [pc, #92] ; (8004ea0 <USB_DeactivateEndpoint+0x204>)
|
|
8004e44: 4323 orrs r3, r4
|
|
8004e46: b29b uxth r3, r3
|
|
8004e48: 8013 strh r3, [r2, #0]
|
|
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
|
|
8004e4a: 687a ldr r2, [r7, #4]
|
|
8004e4c: 683b ldr r3, [r7, #0]
|
|
8004e4e: 781b ldrb r3, [r3, #0]
|
|
8004e50: 009b lsls r3, r3, #2
|
|
8004e52: 4413 add r3, r2
|
|
8004e54: 881b ldrh r3, [r3, #0]
|
|
8004e56: b29b uxth r3, r3
|
|
8004e58: f423 4380 bic.w r3, r3, #16384 ; 0x4000
|
|
8004e5c: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8004e60: b29c uxth r4, r3
|
|
8004e62: 687a ldr r2, [r7, #4]
|
|
8004e64: 683b ldr r3, [r7, #0]
|
|
8004e66: 781b ldrb r3, [r3, #0]
|
|
8004e68: 009b lsls r3, r3, #2
|
|
8004e6a: 441a add r2, r3
|
|
8004e6c: 4b0d ldr r3, [pc, #52] ; (8004ea4 <USB_DeactivateEndpoint+0x208>)
|
|
8004e6e: 4323 orrs r3, r4
|
|
8004e70: b29b uxth r3, r3
|
|
8004e72: 8013 strh r3, [r2, #0]
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
|
|
8004e74: 687a ldr r2, [r7, #4]
|
|
8004e76: 683b ldr r3, [r7, #0]
|
|
8004e78: 781b ldrb r3, [r3, #0]
|
|
8004e7a: 009b lsls r3, r3, #2
|
|
8004e7c: 4413 add r3, r2
|
|
8004e7e: 881b ldrh r3, [r3, #0]
|
|
8004e80: b29b uxth r3, r3
|
|
8004e82: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8004e86: f023 0340 bic.w r3, r3, #64 ; 0x40
|
|
8004e8a: b29c uxth r4, r3
|
|
8004e8c: 687a ldr r2, [r7, #4]
|
|
8004e8e: 683b ldr r3, [r7, #0]
|
|
8004e90: 781b ldrb r3, [r3, #0]
|
|
8004e92: 009b lsls r3, r3, #2
|
|
8004e94: 441a add r2, r3
|
|
8004e96: 4b03 ldr r3, [pc, #12] ; (8004ea4 <USB_DeactivateEndpoint+0x208>)
|
|
8004e98: 4323 orrs r3, r4
|
|
8004e9a: b29b uxth r3, r3
|
|
8004e9c: 8013 strh r3, [r2, #0]
|
|
8004e9e: e086 b.n 8004fae <USB_DeactivateEndpoint+0x312>
|
|
8004ea0: ffff80c0 .word 0xffff80c0
|
|
8004ea4: ffff8080 .word 0xffff8080
|
|
8004ea8: ffffc080 .word 0xffffc080
|
|
}
|
|
else
|
|
{
|
|
/* Clear the data toggle bits for the endpoint IN/OUT*/
|
|
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
|
8004eac: 687a ldr r2, [r7, #4]
|
|
8004eae: 683b ldr r3, [r7, #0]
|
|
8004eb0: 781b ldrb r3, [r3, #0]
|
|
8004eb2: 009b lsls r3, r3, #2
|
|
8004eb4: 4413 add r3, r2
|
|
8004eb6: 881b ldrh r3, [r3, #0]
|
|
8004eb8: b29c uxth r4, r3
|
|
8004eba: 4623 mov r3, r4
|
|
8004ebc: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
8004ec0: 2b00 cmp r3, #0
|
|
8004ec2: d014 beq.n 8004eee <USB_DeactivateEndpoint+0x252>
|
|
8004ec4: 687a ldr r2, [r7, #4]
|
|
8004ec6: 683b ldr r3, [r7, #0]
|
|
8004ec8: 781b ldrb r3, [r3, #0]
|
|
8004eca: 009b lsls r3, r3, #2
|
|
8004ecc: 4413 add r3, r2
|
|
8004ece: 881b ldrh r3, [r3, #0]
|
|
8004ed0: b29b uxth r3, r3
|
|
8004ed2: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8004ed6: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8004eda: b29c uxth r4, r3
|
|
8004edc: 687a ldr r2, [r7, #4]
|
|
8004ede: 683b ldr r3, [r7, #0]
|
|
8004ee0: 781b ldrb r3, [r3, #0]
|
|
8004ee2: 009b lsls r3, r3, #2
|
|
8004ee4: 441a add r2, r3
|
|
8004ee6: 4b35 ldr r3, [pc, #212] ; (8004fbc <USB_DeactivateEndpoint+0x320>)
|
|
8004ee8: 4323 orrs r3, r4
|
|
8004eea: b29b uxth r3, r3
|
|
8004eec: 8013 strh r3, [r2, #0]
|
|
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
|
8004eee: 687a ldr r2, [r7, #4]
|
|
8004ef0: 683b ldr r3, [r7, #0]
|
|
8004ef2: 781b ldrb r3, [r3, #0]
|
|
8004ef4: 009b lsls r3, r3, #2
|
|
8004ef6: 4413 add r3, r2
|
|
8004ef8: 881b ldrh r3, [r3, #0]
|
|
8004efa: b29c uxth r4, r3
|
|
8004efc: 4623 mov r3, r4
|
|
8004efe: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
8004f02: 2b00 cmp r3, #0
|
|
8004f04: d014 beq.n 8004f30 <USB_DeactivateEndpoint+0x294>
|
|
8004f06: 687a ldr r2, [r7, #4]
|
|
8004f08: 683b ldr r3, [r7, #0]
|
|
8004f0a: 781b ldrb r3, [r3, #0]
|
|
8004f0c: 009b lsls r3, r3, #2
|
|
8004f0e: 4413 add r3, r2
|
|
8004f10: 881b ldrh r3, [r3, #0]
|
|
8004f12: b29b uxth r3, r3
|
|
8004f14: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8004f18: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8004f1c: b29c uxth r4, r3
|
|
8004f1e: 687a ldr r2, [r7, #4]
|
|
8004f20: 683b ldr r3, [r7, #0]
|
|
8004f22: 781b ldrb r3, [r3, #0]
|
|
8004f24: 009b lsls r3, r3, #2
|
|
8004f26: 441a add r2, r3
|
|
8004f28: 4b25 ldr r3, [pc, #148] ; (8004fc0 <USB_DeactivateEndpoint+0x324>)
|
|
8004f2a: 4323 orrs r3, r4
|
|
8004f2c: b29b uxth r3, r3
|
|
8004f2e: 8013 strh r3, [r2, #0]
|
|
PCD_RX_DTOG(USBx, ep->num);
|
|
8004f30: 687a ldr r2, [r7, #4]
|
|
8004f32: 683b ldr r3, [r7, #0]
|
|
8004f34: 781b ldrb r3, [r3, #0]
|
|
8004f36: 009b lsls r3, r3, #2
|
|
8004f38: 4413 add r3, r2
|
|
8004f3a: 881b ldrh r3, [r3, #0]
|
|
8004f3c: b29b uxth r3, r3
|
|
8004f3e: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8004f42: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8004f46: b29c uxth r4, r3
|
|
8004f48: 687a ldr r2, [r7, #4]
|
|
8004f4a: 683b ldr r3, [r7, #0]
|
|
8004f4c: 781b ldrb r3, [r3, #0]
|
|
8004f4e: 009b lsls r3, r3, #2
|
|
8004f50: 441a add r2, r3
|
|
8004f52: 4b1a ldr r3, [pc, #104] ; (8004fbc <USB_DeactivateEndpoint+0x320>)
|
|
8004f54: 4323 orrs r3, r4
|
|
8004f56: b29b uxth r3, r3
|
|
8004f58: 8013 strh r3, [r2, #0]
|
|
/* Configure DISABLE status for the Endpoint*/
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
|
|
8004f5a: 687a ldr r2, [r7, #4]
|
|
8004f5c: 683b ldr r3, [r7, #0]
|
|
8004f5e: 781b ldrb r3, [r3, #0]
|
|
8004f60: 009b lsls r3, r3, #2
|
|
8004f62: 4413 add r3, r2
|
|
8004f64: 881b ldrh r3, [r3, #0]
|
|
8004f66: b29b uxth r3, r3
|
|
8004f68: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8004f6c: f023 0340 bic.w r3, r3, #64 ; 0x40
|
|
8004f70: b29c uxth r4, r3
|
|
8004f72: 687a ldr r2, [r7, #4]
|
|
8004f74: 683b ldr r3, [r7, #0]
|
|
8004f76: 781b ldrb r3, [r3, #0]
|
|
8004f78: 009b lsls r3, r3, #2
|
|
8004f7a: 441a add r2, r3
|
|
8004f7c: 4b11 ldr r3, [pc, #68] ; (8004fc4 <USB_DeactivateEndpoint+0x328>)
|
|
8004f7e: 4323 orrs r3, r4
|
|
8004f80: b29b uxth r3, r3
|
|
8004f82: 8013 strh r3, [r2, #0]
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
|
|
8004f84: 687a ldr r2, [r7, #4]
|
|
8004f86: 683b ldr r3, [r7, #0]
|
|
8004f88: 781b ldrb r3, [r3, #0]
|
|
8004f8a: 009b lsls r3, r3, #2
|
|
8004f8c: 4413 add r3, r2
|
|
8004f8e: 881b ldrh r3, [r3, #0]
|
|
8004f90: b29b uxth r3, r3
|
|
8004f92: f423 4380 bic.w r3, r3, #16384 ; 0x4000
|
|
8004f96: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8004f9a: b29c uxth r4, r3
|
|
8004f9c: 687a ldr r2, [r7, #4]
|
|
8004f9e: 683b ldr r3, [r7, #0]
|
|
8004fa0: 781b ldrb r3, [r3, #0]
|
|
8004fa2: 009b lsls r3, r3, #2
|
|
8004fa4: 441a add r2, r3
|
|
8004fa6: 4b07 ldr r3, [pc, #28] ; (8004fc4 <USB_DeactivateEndpoint+0x328>)
|
|
8004fa8: 4323 orrs r3, r4
|
|
8004faa: b29b uxth r3, r3
|
|
8004fac: 8013 strh r3, [r2, #0]
|
|
}
|
|
}
|
|
|
|
return HAL_OK;
|
|
8004fae: 2300 movs r3, #0
|
|
}
|
|
8004fb0: 4618 mov r0, r3
|
|
8004fb2: 3708 adds r7, #8
|
|
8004fb4: 46bd mov sp, r7
|
|
8004fb6: bc90 pop {r4, r7}
|
|
8004fb8: 4770 bx lr
|
|
8004fba: bf00 nop
|
|
8004fbc: ffffc080 .word 0xffffc080
|
|
8004fc0: ffff80c0 .word 0xffff80c0
|
|
8004fc4: ffff8080 .word 0xffff8080
|
|
|
|
08004fc8 <USB_EPStartXfer>:
|
|
* @param USBx : Selected device
|
|
* @param ep: pointer to endpoint structure
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
|
|
{
|
|
8004fc8: b590 push {r4, r7, lr}
|
|
8004fca: b08d sub sp, #52 ; 0x34
|
|
8004fcc: af00 add r7, sp, #0
|
|
8004fce: 6078 str r0, [r7, #4]
|
|
8004fd0: 6039 str r1, [r7, #0]
|
|
uint16_t pmabuffer;
|
|
uint32_t len;
|
|
|
|
/* IN endpoint */
|
|
if (ep->is_in == 1U)
|
|
8004fd2: 683b ldr r3, [r7, #0]
|
|
8004fd4: 785b ldrb r3, [r3, #1]
|
|
8004fd6: 2b01 cmp r3, #1
|
|
8004fd8: f040 8160 bne.w 800529c <USB_EPStartXfer+0x2d4>
|
|
{
|
|
/*Multi packet transfer*/
|
|
if (ep->xfer_len > ep->maxpacket)
|
|
8004fdc: 683b ldr r3, [r7, #0]
|
|
8004fde: 699a ldr r2, [r3, #24]
|
|
8004fe0: 683b ldr r3, [r7, #0]
|
|
8004fe2: 691b ldr r3, [r3, #16]
|
|
8004fe4: 429a cmp r2, r3
|
|
8004fe6: d909 bls.n 8004ffc <USB_EPStartXfer+0x34>
|
|
{
|
|
len = ep->maxpacket;
|
|
8004fe8: 683b ldr r3, [r7, #0]
|
|
8004fea: 691b ldr r3, [r3, #16]
|
|
8004fec: 62bb str r3, [r7, #40] ; 0x28
|
|
ep->xfer_len -= len;
|
|
8004fee: 683b ldr r3, [r7, #0]
|
|
8004ff0: 699a ldr r2, [r3, #24]
|
|
8004ff2: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8004ff4: 1ad2 subs r2, r2, r3
|
|
8004ff6: 683b ldr r3, [r7, #0]
|
|
8004ff8: 619a str r2, [r3, #24]
|
|
8004ffa: e005 b.n 8005008 <USB_EPStartXfer+0x40>
|
|
}
|
|
else
|
|
{
|
|
len = ep->xfer_len;
|
|
8004ffc: 683b ldr r3, [r7, #0]
|
|
8004ffe: 699b ldr r3, [r3, #24]
|
|
8005000: 62bb str r3, [r7, #40] ; 0x28
|
|
ep->xfer_len = 0U;
|
|
8005002: 683b ldr r3, [r7, #0]
|
|
8005004: 2200 movs r2, #0
|
|
8005006: 619a str r2, [r3, #24]
|
|
}
|
|
|
|
/* configure and validate Tx endpoint */
|
|
if (ep->doublebuffer == 0U)
|
|
8005008: 683b ldr r3, [r7, #0]
|
|
800500a: 7b1b ldrb r3, [r3, #12]
|
|
800500c: 2b00 cmp r3, #0
|
|
800500e: d119 bne.n 8005044 <USB_EPStartXfer+0x7c>
|
|
{
|
|
USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len);
|
|
8005010: 683b ldr r3, [r7, #0]
|
|
8005012: 6959 ldr r1, [r3, #20]
|
|
8005014: 683b ldr r3, [r7, #0]
|
|
8005016: 88da ldrh r2, [r3, #6]
|
|
8005018: 6abb ldr r3, [r7, #40] ; 0x28
|
|
800501a: b29b uxth r3, r3
|
|
800501c: 6878 ldr r0, [r7, #4]
|
|
800501e: f000 fba2 bl 8005766 <USB_WritePMA>
|
|
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
|
|
8005022: 687c ldr r4, [r7, #4]
|
|
8005024: 687b ldr r3, [r7, #4]
|
|
8005026: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
800502a: b29b uxth r3, r3
|
|
800502c: 441c add r4, r3
|
|
800502e: 683b ldr r3, [r7, #0]
|
|
8005030: 781b ldrb r3, [r3, #0]
|
|
8005032: 011b lsls r3, r3, #4
|
|
8005034: 4423 add r3, r4
|
|
8005036: f203 4304 addw r3, r3, #1028 ; 0x404
|
|
800503a: 461c mov r4, r3
|
|
800503c: 6abb ldr r3, [r7, #40] ; 0x28
|
|
800503e: b29b uxth r3, r3
|
|
8005040: 8023 strh r3, [r4, #0]
|
|
8005042: e10f b.n 8005264 <USB_EPStartXfer+0x29c>
|
|
}
|
|
else
|
|
{
|
|
/* Write the data to the USB endpoint */
|
|
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
|
|
8005044: 687a ldr r2, [r7, #4]
|
|
8005046: 683b ldr r3, [r7, #0]
|
|
8005048: 781b ldrb r3, [r3, #0]
|
|
800504a: 009b lsls r3, r3, #2
|
|
800504c: 4413 add r3, r2
|
|
800504e: 881b ldrh r3, [r3, #0]
|
|
8005050: b29b uxth r3, r3
|
|
8005052: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
8005056: 2b00 cmp r3, #0
|
|
8005058: d065 beq.n 8005126 <USB_EPStartXfer+0x15e>
|
|
{
|
|
/* Set the Double buffer counter for pmabuffer1 */
|
|
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
|
|
800505a: 687c ldr r4, [r7, #4]
|
|
800505c: 683b ldr r3, [r7, #0]
|
|
800505e: 785b ldrb r3, [r3, #1]
|
|
8005060: 2b00 cmp r3, #0
|
|
8005062: d148 bne.n 80050f6 <USB_EPStartXfer+0x12e>
|
|
8005064: 687c ldr r4, [r7, #4]
|
|
8005066: 687b ldr r3, [r7, #4]
|
|
8005068: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
800506c: b29b uxth r3, r3
|
|
800506e: 441c add r4, r3
|
|
8005070: 683b ldr r3, [r7, #0]
|
|
8005072: 781b ldrb r3, [r3, #0]
|
|
8005074: 011b lsls r3, r3, #4
|
|
8005076: 4423 add r3, r4
|
|
8005078: f203 430c addw r3, r3, #1036 ; 0x40c
|
|
800507c: 461c mov r4, r3
|
|
800507e: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8005080: 2b00 cmp r3, #0
|
|
8005082: d10e bne.n 80050a2 <USB_EPStartXfer+0xda>
|
|
8005084: 8823 ldrh r3, [r4, #0]
|
|
8005086: b29b uxth r3, r3
|
|
8005088: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
|
|
800508c: b29b uxth r3, r3
|
|
800508e: 8023 strh r3, [r4, #0]
|
|
8005090: 8823 ldrh r3, [r4, #0]
|
|
8005092: b29b uxth r3, r3
|
|
8005094: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8005098: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
800509c: b29b uxth r3, r3
|
|
800509e: 8023 strh r3, [r4, #0]
|
|
80050a0: e03d b.n 800511e <USB_EPStartXfer+0x156>
|
|
80050a2: 6abb ldr r3, [r7, #40] ; 0x28
|
|
80050a4: 2b3e cmp r3, #62 ; 0x3e
|
|
80050a6: d810 bhi.n 80050ca <USB_EPStartXfer+0x102>
|
|
80050a8: 6abb ldr r3, [r7, #40] ; 0x28
|
|
80050aa: 085b lsrs r3, r3, #1
|
|
80050ac: 627b str r3, [r7, #36] ; 0x24
|
|
80050ae: 6abb ldr r3, [r7, #40] ; 0x28
|
|
80050b0: f003 0301 and.w r3, r3, #1
|
|
80050b4: 2b00 cmp r3, #0
|
|
80050b6: d002 beq.n 80050be <USB_EPStartXfer+0xf6>
|
|
80050b8: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80050ba: 3301 adds r3, #1
|
|
80050bc: 627b str r3, [r7, #36] ; 0x24
|
|
80050be: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80050c0: b29b uxth r3, r3
|
|
80050c2: 029b lsls r3, r3, #10
|
|
80050c4: b29b uxth r3, r3
|
|
80050c6: 8023 strh r3, [r4, #0]
|
|
80050c8: e029 b.n 800511e <USB_EPStartXfer+0x156>
|
|
80050ca: 6abb ldr r3, [r7, #40] ; 0x28
|
|
80050cc: 095b lsrs r3, r3, #5
|
|
80050ce: 627b str r3, [r7, #36] ; 0x24
|
|
80050d0: 6abb ldr r3, [r7, #40] ; 0x28
|
|
80050d2: f003 031f and.w r3, r3, #31
|
|
80050d6: 2b00 cmp r3, #0
|
|
80050d8: d102 bne.n 80050e0 <USB_EPStartXfer+0x118>
|
|
80050da: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80050dc: 3b01 subs r3, #1
|
|
80050de: 627b str r3, [r7, #36] ; 0x24
|
|
80050e0: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80050e2: b29b uxth r3, r3
|
|
80050e4: 029b lsls r3, r3, #10
|
|
80050e6: b29b uxth r3, r3
|
|
80050e8: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
80050ec: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
80050f0: b29b uxth r3, r3
|
|
80050f2: 8023 strh r3, [r4, #0]
|
|
80050f4: e013 b.n 800511e <USB_EPStartXfer+0x156>
|
|
80050f6: 683b ldr r3, [r7, #0]
|
|
80050f8: 785b ldrb r3, [r3, #1]
|
|
80050fa: 2b01 cmp r3, #1
|
|
80050fc: d10f bne.n 800511e <USB_EPStartXfer+0x156>
|
|
80050fe: 687b ldr r3, [r7, #4]
|
|
8005100: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8005104: b29b uxth r3, r3
|
|
8005106: 441c add r4, r3
|
|
8005108: 683b ldr r3, [r7, #0]
|
|
800510a: 781b ldrb r3, [r3, #0]
|
|
800510c: 011b lsls r3, r3, #4
|
|
800510e: 4423 add r3, r4
|
|
8005110: f203 430c addw r3, r3, #1036 ; 0x40c
|
|
8005114: 60fb str r3, [r7, #12]
|
|
8005116: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8005118: b29a uxth r2, r3
|
|
800511a: 68fb ldr r3, [r7, #12]
|
|
800511c: 801a strh r2, [r3, #0]
|
|
pmabuffer = ep->pmaaddr1;
|
|
800511e: 683b ldr r3, [r7, #0]
|
|
8005120: 895b ldrh r3, [r3, #10]
|
|
8005122: 85fb strh r3, [r7, #46] ; 0x2e
|
|
8005124: e063 b.n 80051ee <USB_EPStartXfer+0x226>
|
|
}
|
|
else
|
|
{
|
|
/* Set the Double buffer counter for pmabuffer0 */
|
|
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
|
|
8005126: 683b ldr r3, [r7, #0]
|
|
8005128: 785b ldrb r3, [r3, #1]
|
|
800512a: 2b00 cmp r3, #0
|
|
800512c: d148 bne.n 80051c0 <USB_EPStartXfer+0x1f8>
|
|
800512e: 687c ldr r4, [r7, #4]
|
|
8005130: 687b ldr r3, [r7, #4]
|
|
8005132: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8005136: b29b uxth r3, r3
|
|
8005138: 441c add r4, r3
|
|
800513a: 683b ldr r3, [r7, #0]
|
|
800513c: 781b ldrb r3, [r3, #0]
|
|
800513e: 011b lsls r3, r3, #4
|
|
8005140: 4423 add r3, r4
|
|
8005142: f203 4304 addw r3, r3, #1028 ; 0x404
|
|
8005146: 461c mov r4, r3
|
|
8005148: 6abb ldr r3, [r7, #40] ; 0x28
|
|
800514a: 2b00 cmp r3, #0
|
|
800514c: d10e bne.n 800516c <USB_EPStartXfer+0x1a4>
|
|
800514e: 8823 ldrh r3, [r4, #0]
|
|
8005150: b29b uxth r3, r3
|
|
8005152: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
|
|
8005156: b29b uxth r3, r3
|
|
8005158: 8023 strh r3, [r4, #0]
|
|
800515a: 8823 ldrh r3, [r4, #0]
|
|
800515c: b29b uxth r3, r3
|
|
800515e: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8005162: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8005166: b29b uxth r3, r3
|
|
8005168: 8023 strh r3, [r4, #0]
|
|
800516a: e03d b.n 80051e8 <USB_EPStartXfer+0x220>
|
|
800516c: 6abb ldr r3, [r7, #40] ; 0x28
|
|
800516e: 2b3e cmp r3, #62 ; 0x3e
|
|
8005170: d810 bhi.n 8005194 <USB_EPStartXfer+0x1cc>
|
|
8005172: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8005174: 085b lsrs r3, r3, #1
|
|
8005176: 623b str r3, [r7, #32]
|
|
8005178: 6abb ldr r3, [r7, #40] ; 0x28
|
|
800517a: f003 0301 and.w r3, r3, #1
|
|
800517e: 2b00 cmp r3, #0
|
|
8005180: d002 beq.n 8005188 <USB_EPStartXfer+0x1c0>
|
|
8005182: 6a3b ldr r3, [r7, #32]
|
|
8005184: 3301 adds r3, #1
|
|
8005186: 623b str r3, [r7, #32]
|
|
8005188: 6a3b ldr r3, [r7, #32]
|
|
800518a: b29b uxth r3, r3
|
|
800518c: 029b lsls r3, r3, #10
|
|
800518e: b29b uxth r3, r3
|
|
8005190: 8023 strh r3, [r4, #0]
|
|
8005192: e029 b.n 80051e8 <USB_EPStartXfer+0x220>
|
|
8005194: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8005196: 095b lsrs r3, r3, #5
|
|
8005198: 623b str r3, [r7, #32]
|
|
800519a: 6abb ldr r3, [r7, #40] ; 0x28
|
|
800519c: f003 031f and.w r3, r3, #31
|
|
80051a0: 2b00 cmp r3, #0
|
|
80051a2: d102 bne.n 80051aa <USB_EPStartXfer+0x1e2>
|
|
80051a4: 6a3b ldr r3, [r7, #32]
|
|
80051a6: 3b01 subs r3, #1
|
|
80051a8: 623b str r3, [r7, #32]
|
|
80051aa: 6a3b ldr r3, [r7, #32]
|
|
80051ac: b29b uxth r3, r3
|
|
80051ae: 029b lsls r3, r3, #10
|
|
80051b0: b29b uxth r3, r3
|
|
80051b2: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
80051b6: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
80051ba: b29b uxth r3, r3
|
|
80051bc: 8023 strh r3, [r4, #0]
|
|
80051be: e013 b.n 80051e8 <USB_EPStartXfer+0x220>
|
|
80051c0: 683b ldr r3, [r7, #0]
|
|
80051c2: 785b ldrb r3, [r3, #1]
|
|
80051c4: 2b01 cmp r3, #1
|
|
80051c6: d10f bne.n 80051e8 <USB_EPStartXfer+0x220>
|
|
80051c8: 687c ldr r4, [r7, #4]
|
|
80051ca: 687b ldr r3, [r7, #4]
|
|
80051cc: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
80051d0: b29b uxth r3, r3
|
|
80051d2: 441c add r4, r3
|
|
80051d4: 683b ldr r3, [r7, #0]
|
|
80051d6: 781b ldrb r3, [r3, #0]
|
|
80051d8: 011b lsls r3, r3, #4
|
|
80051da: 4423 add r3, r4
|
|
80051dc: f203 4304 addw r3, r3, #1028 ; 0x404
|
|
80051e0: 461c mov r4, r3
|
|
80051e2: 6abb ldr r3, [r7, #40] ; 0x28
|
|
80051e4: b29b uxth r3, r3
|
|
80051e6: 8023 strh r3, [r4, #0]
|
|
pmabuffer = ep->pmaaddr0;
|
|
80051e8: 683b ldr r3, [r7, #0]
|
|
80051ea: 891b ldrh r3, [r3, #8]
|
|
80051ec: 85fb strh r3, [r7, #46] ; 0x2e
|
|
}
|
|
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
|
|
80051ee: 683b ldr r3, [r7, #0]
|
|
80051f0: 6959 ldr r1, [r3, #20]
|
|
80051f2: 6abb ldr r3, [r7, #40] ; 0x28
|
|
80051f4: b29b uxth r3, r3
|
|
80051f6: 8dfa ldrh r2, [r7, #46] ; 0x2e
|
|
80051f8: 6878 ldr r0, [r7, #4]
|
|
80051fa: f000 fab4 bl 8005766 <USB_WritePMA>
|
|
PCD_FreeUserBuffer(USBx, ep->num, ep->is_in);
|
|
80051fe: 683b ldr r3, [r7, #0]
|
|
8005200: 785b ldrb r3, [r3, #1]
|
|
8005202: 2b00 cmp r3, #0
|
|
8005204: d115 bne.n 8005232 <USB_EPStartXfer+0x26a>
|
|
8005206: 687a ldr r2, [r7, #4]
|
|
8005208: 683b ldr r3, [r7, #0]
|
|
800520a: 781b ldrb r3, [r3, #0]
|
|
800520c: 009b lsls r3, r3, #2
|
|
800520e: 4413 add r3, r2
|
|
8005210: 881b ldrh r3, [r3, #0]
|
|
8005212: b29b uxth r3, r3
|
|
8005214: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8005218: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
800521c: b29c uxth r4, r3
|
|
800521e: 687a ldr r2, [r7, #4]
|
|
8005220: 683b ldr r3, [r7, #0]
|
|
8005222: 781b ldrb r3, [r3, #0]
|
|
8005224: 009b lsls r3, r3, #2
|
|
8005226: 441a add r2, r3
|
|
8005228: 4b9a ldr r3, [pc, #616] ; (8005494 <USB_EPStartXfer+0x4cc>)
|
|
800522a: 4323 orrs r3, r4
|
|
800522c: b29b uxth r3, r3
|
|
800522e: 8013 strh r3, [r2, #0]
|
|
8005230: e018 b.n 8005264 <USB_EPStartXfer+0x29c>
|
|
8005232: 683b ldr r3, [r7, #0]
|
|
8005234: 785b ldrb r3, [r3, #1]
|
|
8005236: 2b01 cmp r3, #1
|
|
8005238: d114 bne.n 8005264 <USB_EPStartXfer+0x29c>
|
|
800523a: 687a ldr r2, [r7, #4]
|
|
800523c: 683b ldr r3, [r7, #0]
|
|
800523e: 781b ldrb r3, [r3, #0]
|
|
8005240: 009b lsls r3, r3, #2
|
|
8005242: 4413 add r3, r2
|
|
8005244: 881b ldrh r3, [r3, #0]
|
|
8005246: b29b uxth r3, r3
|
|
8005248: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
800524c: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8005250: b29c uxth r4, r3
|
|
8005252: 687a ldr r2, [r7, #4]
|
|
8005254: 683b ldr r3, [r7, #0]
|
|
8005256: 781b ldrb r3, [r3, #0]
|
|
8005258: 009b lsls r3, r3, #2
|
|
800525a: 441a add r2, r3
|
|
800525c: 4b8e ldr r3, [pc, #568] ; (8005498 <USB_EPStartXfer+0x4d0>)
|
|
800525e: 4323 orrs r3, r4
|
|
8005260: b29b uxth r3, r3
|
|
8005262: 8013 strh r3, [r2, #0]
|
|
}
|
|
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
|
|
8005264: 687a ldr r2, [r7, #4]
|
|
8005266: 683b ldr r3, [r7, #0]
|
|
8005268: 781b ldrb r3, [r3, #0]
|
|
800526a: 009b lsls r3, r3, #2
|
|
800526c: 4413 add r3, r2
|
|
800526e: 881b ldrh r3, [r3, #0]
|
|
8005270: b29b uxth r3, r3
|
|
8005272: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8005276: f023 0340 bic.w r3, r3, #64 ; 0x40
|
|
800527a: b29c uxth r4, r3
|
|
800527c: f084 0310 eor.w r3, r4, #16
|
|
8005280: b29c uxth r4, r3
|
|
8005282: f084 0320 eor.w r3, r4, #32
|
|
8005286: b29c uxth r4, r3
|
|
8005288: 687a ldr r2, [r7, #4]
|
|
800528a: 683b ldr r3, [r7, #0]
|
|
800528c: 781b ldrb r3, [r3, #0]
|
|
800528e: 009b lsls r3, r3, #2
|
|
8005290: 441a add r2, r3
|
|
8005292: 4b82 ldr r3, [pc, #520] ; (800549c <USB_EPStartXfer+0x4d4>)
|
|
8005294: 4323 orrs r3, r4
|
|
8005296: b29b uxth r3, r3
|
|
8005298: 8013 strh r3, [r2, #0]
|
|
800529a: e146 b.n 800552a <USB_EPStartXfer+0x562>
|
|
}
|
|
else /* OUT endpoint */
|
|
{
|
|
/* Multi packet transfer*/
|
|
if (ep->xfer_len > ep->maxpacket)
|
|
800529c: 683b ldr r3, [r7, #0]
|
|
800529e: 699a ldr r2, [r3, #24]
|
|
80052a0: 683b ldr r3, [r7, #0]
|
|
80052a2: 691b ldr r3, [r3, #16]
|
|
80052a4: 429a cmp r2, r3
|
|
80052a6: d909 bls.n 80052bc <USB_EPStartXfer+0x2f4>
|
|
{
|
|
len = ep->maxpacket;
|
|
80052a8: 683b ldr r3, [r7, #0]
|
|
80052aa: 691b ldr r3, [r3, #16]
|
|
80052ac: 62bb str r3, [r7, #40] ; 0x28
|
|
ep->xfer_len -= len;
|
|
80052ae: 683b ldr r3, [r7, #0]
|
|
80052b0: 699a ldr r2, [r3, #24]
|
|
80052b2: 6abb ldr r3, [r7, #40] ; 0x28
|
|
80052b4: 1ad2 subs r2, r2, r3
|
|
80052b6: 683b ldr r3, [r7, #0]
|
|
80052b8: 619a str r2, [r3, #24]
|
|
80052ba: e005 b.n 80052c8 <USB_EPStartXfer+0x300>
|
|
}
|
|
else
|
|
{
|
|
len = ep->xfer_len;
|
|
80052bc: 683b ldr r3, [r7, #0]
|
|
80052be: 699b ldr r3, [r3, #24]
|
|
80052c0: 62bb str r3, [r7, #40] ; 0x28
|
|
ep->xfer_len = 0U;
|
|
80052c2: 683b ldr r3, [r7, #0]
|
|
80052c4: 2200 movs r2, #0
|
|
80052c6: 619a str r2, [r3, #24]
|
|
}
|
|
|
|
/* configure and validate Rx endpoint */
|
|
if (ep->doublebuffer == 0U)
|
|
80052c8: 683b ldr r3, [r7, #0]
|
|
80052ca: 7b1b ldrb r3, [r3, #12]
|
|
80052cc: 2b00 cmp r3, #0
|
|
80052ce: d148 bne.n 8005362 <USB_EPStartXfer+0x39a>
|
|
{
|
|
/*Set RX buffer count*/
|
|
PCD_SET_EP_RX_CNT(USBx, ep->num, len);
|
|
80052d0: 687c ldr r4, [r7, #4]
|
|
80052d2: 687b ldr r3, [r7, #4]
|
|
80052d4: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
80052d8: b29b uxth r3, r3
|
|
80052da: 441c add r4, r3
|
|
80052dc: 683b ldr r3, [r7, #0]
|
|
80052de: 781b ldrb r3, [r3, #0]
|
|
80052e0: 011b lsls r3, r3, #4
|
|
80052e2: 4423 add r3, r4
|
|
80052e4: f203 430c addw r3, r3, #1036 ; 0x40c
|
|
80052e8: 461c mov r4, r3
|
|
80052ea: 6abb ldr r3, [r7, #40] ; 0x28
|
|
80052ec: 2b00 cmp r3, #0
|
|
80052ee: d10e bne.n 800530e <USB_EPStartXfer+0x346>
|
|
80052f0: 8823 ldrh r3, [r4, #0]
|
|
80052f2: b29b uxth r3, r3
|
|
80052f4: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
|
|
80052f8: b29b uxth r3, r3
|
|
80052fa: 8023 strh r3, [r4, #0]
|
|
80052fc: 8823 ldrh r3, [r4, #0]
|
|
80052fe: b29b uxth r3, r3
|
|
8005300: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8005304: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8005308: b29b uxth r3, r3
|
|
800530a: 8023 strh r3, [r4, #0]
|
|
800530c: e0f2 b.n 80054f4 <USB_EPStartXfer+0x52c>
|
|
800530e: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8005310: 2b3e cmp r3, #62 ; 0x3e
|
|
8005312: d810 bhi.n 8005336 <USB_EPStartXfer+0x36e>
|
|
8005314: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8005316: 085b lsrs r3, r3, #1
|
|
8005318: 61fb str r3, [r7, #28]
|
|
800531a: 6abb ldr r3, [r7, #40] ; 0x28
|
|
800531c: f003 0301 and.w r3, r3, #1
|
|
8005320: 2b00 cmp r3, #0
|
|
8005322: d002 beq.n 800532a <USB_EPStartXfer+0x362>
|
|
8005324: 69fb ldr r3, [r7, #28]
|
|
8005326: 3301 adds r3, #1
|
|
8005328: 61fb str r3, [r7, #28]
|
|
800532a: 69fb ldr r3, [r7, #28]
|
|
800532c: b29b uxth r3, r3
|
|
800532e: 029b lsls r3, r3, #10
|
|
8005330: b29b uxth r3, r3
|
|
8005332: 8023 strh r3, [r4, #0]
|
|
8005334: e0de b.n 80054f4 <USB_EPStartXfer+0x52c>
|
|
8005336: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8005338: 095b lsrs r3, r3, #5
|
|
800533a: 61fb str r3, [r7, #28]
|
|
800533c: 6abb ldr r3, [r7, #40] ; 0x28
|
|
800533e: f003 031f and.w r3, r3, #31
|
|
8005342: 2b00 cmp r3, #0
|
|
8005344: d102 bne.n 800534c <USB_EPStartXfer+0x384>
|
|
8005346: 69fb ldr r3, [r7, #28]
|
|
8005348: 3b01 subs r3, #1
|
|
800534a: 61fb str r3, [r7, #28]
|
|
800534c: 69fb ldr r3, [r7, #28]
|
|
800534e: b29b uxth r3, r3
|
|
8005350: 029b lsls r3, r3, #10
|
|
8005352: b29b uxth r3, r3
|
|
8005354: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8005358: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
800535c: b29b uxth r3, r3
|
|
800535e: 8023 strh r3, [r4, #0]
|
|
8005360: e0c8 b.n 80054f4 <USB_EPStartXfer+0x52c>
|
|
}
|
|
else
|
|
{
|
|
/*Set the Double buffer counter*/
|
|
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len);
|
|
8005362: 683b ldr r3, [r7, #0]
|
|
8005364: 785b ldrb r3, [r3, #1]
|
|
8005366: 2b00 cmp r3, #0
|
|
8005368: d148 bne.n 80053fc <USB_EPStartXfer+0x434>
|
|
800536a: 687c ldr r4, [r7, #4]
|
|
800536c: 687b ldr r3, [r7, #4]
|
|
800536e: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8005372: b29b uxth r3, r3
|
|
8005374: 441c add r4, r3
|
|
8005376: 683b ldr r3, [r7, #0]
|
|
8005378: 781b ldrb r3, [r3, #0]
|
|
800537a: 011b lsls r3, r3, #4
|
|
800537c: 4423 add r3, r4
|
|
800537e: f203 4304 addw r3, r3, #1028 ; 0x404
|
|
8005382: 461c mov r4, r3
|
|
8005384: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8005386: 2b00 cmp r3, #0
|
|
8005388: d10e bne.n 80053a8 <USB_EPStartXfer+0x3e0>
|
|
800538a: 8823 ldrh r3, [r4, #0]
|
|
800538c: b29b uxth r3, r3
|
|
800538e: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
|
|
8005392: b29b uxth r3, r3
|
|
8005394: 8023 strh r3, [r4, #0]
|
|
8005396: 8823 ldrh r3, [r4, #0]
|
|
8005398: b29b uxth r3, r3
|
|
800539a: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
800539e: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
80053a2: b29b uxth r3, r3
|
|
80053a4: 8023 strh r3, [r4, #0]
|
|
80053a6: e03d b.n 8005424 <USB_EPStartXfer+0x45c>
|
|
80053a8: 6abb ldr r3, [r7, #40] ; 0x28
|
|
80053aa: 2b3e cmp r3, #62 ; 0x3e
|
|
80053ac: d810 bhi.n 80053d0 <USB_EPStartXfer+0x408>
|
|
80053ae: 6abb ldr r3, [r7, #40] ; 0x28
|
|
80053b0: 085b lsrs r3, r3, #1
|
|
80053b2: 61bb str r3, [r7, #24]
|
|
80053b4: 6abb ldr r3, [r7, #40] ; 0x28
|
|
80053b6: f003 0301 and.w r3, r3, #1
|
|
80053ba: 2b00 cmp r3, #0
|
|
80053bc: d002 beq.n 80053c4 <USB_EPStartXfer+0x3fc>
|
|
80053be: 69bb ldr r3, [r7, #24]
|
|
80053c0: 3301 adds r3, #1
|
|
80053c2: 61bb str r3, [r7, #24]
|
|
80053c4: 69bb ldr r3, [r7, #24]
|
|
80053c6: b29b uxth r3, r3
|
|
80053c8: 029b lsls r3, r3, #10
|
|
80053ca: b29b uxth r3, r3
|
|
80053cc: 8023 strh r3, [r4, #0]
|
|
80053ce: e029 b.n 8005424 <USB_EPStartXfer+0x45c>
|
|
80053d0: 6abb ldr r3, [r7, #40] ; 0x28
|
|
80053d2: 095b lsrs r3, r3, #5
|
|
80053d4: 61bb str r3, [r7, #24]
|
|
80053d6: 6abb ldr r3, [r7, #40] ; 0x28
|
|
80053d8: f003 031f and.w r3, r3, #31
|
|
80053dc: 2b00 cmp r3, #0
|
|
80053de: d102 bne.n 80053e6 <USB_EPStartXfer+0x41e>
|
|
80053e0: 69bb ldr r3, [r7, #24]
|
|
80053e2: 3b01 subs r3, #1
|
|
80053e4: 61bb str r3, [r7, #24]
|
|
80053e6: 69bb ldr r3, [r7, #24]
|
|
80053e8: b29b uxth r3, r3
|
|
80053ea: 029b lsls r3, r3, #10
|
|
80053ec: b29b uxth r3, r3
|
|
80053ee: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
80053f2: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
80053f6: b29b uxth r3, r3
|
|
80053f8: 8023 strh r3, [r4, #0]
|
|
80053fa: e013 b.n 8005424 <USB_EPStartXfer+0x45c>
|
|
80053fc: 683b ldr r3, [r7, #0]
|
|
80053fe: 785b ldrb r3, [r3, #1]
|
|
8005400: 2b01 cmp r3, #1
|
|
8005402: d10f bne.n 8005424 <USB_EPStartXfer+0x45c>
|
|
8005404: 687c ldr r4, [r7, #4]
|
|
8005406: 687b ldr r3, [r7, #4]
|
|
8005408: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
800540c: b29b uxth r3, r3
|
|
800540e: 441c add r4, r3
|
|
8005410: 683b ldr r3, [r7, #0]
|
|
8005412: 781b ldrb r3, [r3, #0]
|
|
8005414: 011b lsls r3, r3, #4
|
|
8005416: 4423 add r3, r4
|
|
8005418: f203 4304 addw r3, r3, #1028 ; 0x404
|
|
800541c: 461c mov r4, r3
|
|
800541e: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8005420: b29b uxth r3, r3
|
|
8005422: 8023 strh r3, [r4, #0]
|
|
8005424: 687c ldr r4, [r7, #4]
|
|
8005426: 683b ldr r3, [r7, #0]
|
|
8005428: 785b ldrb r3, [r3, #1]
|
|
800542a: 2b00 cmp r3, #0
|
|
800542c: d14e bne.n 80054cc <USB_EPStartXfer+0x504>
|
|
800542e: 687c ldr r4, [r7, #4]
|
|
8005430: 687b ldr r3, [r7, #4]
|
|
8005432: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
8005436: b29b uxth r3, r3
|
|
8005438: 441c add r4, r3
|
|
800543a: 683b ldr r3, [r7, #0]
|
|
800543c: 781b ldrb r3, [r3, #0]
|
|
800543e: 011b lsls r3, r3, #4
|
|
8005440: 4423 add r3, r4
|
|
8005442: f203 430c addw r3, r3, #1036 ; 0x40c
|
|
8005446: 461c mov r4, r3
|
|
8005448: 6abb ldr r3, [r7, #40] ; 0x28
|
|
800544a: 2b00 cmp r3, #0
|
|
800544c: d10e bne.n 800546c <USB_EPStartXfer+0x4a4>
|
|
800544e: 8823 ldrh r3, [r4, #0]
|
|
8005450: b29b uxth r3, r3
|
|
8005452: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
|
|
8005456: b29b uxth r3, r3
|
|
8005458: 8023 strh r3, [r4, #0]
|
|
800545a: 8823 ldrh r3, [r4, #0]
|
|
800545c: b29b uxth r3, r3
|
|
800545e: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8005462: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8005466: b29b uxth r3, r3
|
|
8005468: 8023 strh r3, [r4, #0]
|
|
800546a: e043 b.n 80054f4 <USB_EPStartXfer+0x52c>
|
|
800546c: 6abb ldr r3, [r7, #40] ; 0x28
|
|
800546e: 2b3e cmp r3, #62 ; 0x3e
|
|
8005470: d816 bhi.n 80054a0 <USB_EPStartXfer+0x4d8>
|
|
8005472: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8005474: 085b lsrs r3, r3, #1
|
|
8005476: 617b str r3, [r7, #20]
|
|
8005478: 6abb ldr r3, [r7, #40] ; 0x28
|
|
800547a: f003 0301 and.w r3, r3, #1
|
|
800547e: 2b00 cmp r3, #0
|
|
8005480: d002 beq.n 8005488 <USB_EPStartXfer+0x4c0>
|
|
8005482: 697b ldr r3, [r7, #20]
|
|
8005484: 3301 adds r3, #1
|
|
8005486: 617b str r3, [r7, #20]
|
|
8005488: 697b ldr r3, [r7, #20]
|
|
800548a: b29b uxth r3, r3
|
|
800548c: 029b lsls r3, r3, #10
|
|
800548e: b29b uxth r3, r3
|
|
8005490: 8023 strh r3, [r4, #0]
|
|
8005492: e02f b.n 80054f4 <USB_EPStartXfer+0x52c>
|
|
8005494: ffff80c0 .word 0xffff80c0
|
|
8005498: ffffc080 .word 0xffffc080
|
|
800549c: ffff8080 .word 0xffff8080
|
|
80054a0: 6abb ldr r3, [r7, #40] ; 0x28
|
|
80054a2: 095b lsrs r3, r3, #5
|
|
80054a4: 617b str r3, [r7, #20]
|
|
80054a6: 6abb ldr r3, [r7, #40] ; 0x28
|
|
80054a8: f003 031f and.w r3, r3, #31
|
|
80054ac: 2b00 cmp r3, #0
|
|
80054ae: d102 bne.n 80054b6 <USB_EPStartXfer+0x4ee>
|
|
80054b0: 697b ldr r3, [r7, #20]
|
|
80054b2: 3b01 subs r3, #1
|
|
80054b4: 617b str r3, [r7, #20]
|
|
80054b6: 697b ldr r3, [r7, #20]
|
|
80054b8: b29b uxth r3, r3
|
|
80054ba: 029b lsls r3, r3, #10
|
|
80054bc: b29b uxth r3, r3
|
|
80054be: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
80054c2: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
80054c6: b29b uxth r3, r3
|
|
80054c8: 8023 strh r3, [r4, #0]
|
|
80054ca: e013 b.n 80054f4 <USB_EPStartXfer+0x52c>
|
|
80054cc: 683b ldr r3, [r7, #0]
|
|
80054ce: 785b ldrb r3, [r3, #1]
|
|
80054d0: 2b01 cmp r3, #1
|
|
80054d2: d10f bne.n 80054f4 <USB_EPStartXfer+0x52c>
|
|
80054d4: 687b ldr r3, [r7, #4]
|
|
80054d6: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
|
|
80054da: b29b uxth r3, r3
|
|
80054dc: 441c add r4, r3
|
|
80054de: 683b ldr r3, [r7, #0]
|
|
80054e0: 781b ldrb r3, [r3, #0]
|
|
80054e2: 011b lsls r3, r3, #4
|
|
80054e4: 4423 add r3, r4
|
|
80054e6: f203 430c addw r3, r3, #1036 ; 0x40c
|
|
80054ea: 613b str r3, [r7, #16]
|
|
80054ec: 6abb ldr r3, [r7, #40] ; 0x28
|
|
80054ee: b29a uxth r2, r3
|
|
80054f0: 693b ldr r3, [r7, #16]
|
|
80054f2: 801a strh r2, [r3, #0]
|
|
}
|
|
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
|
|
80054f4: 687a ldr r2, [r7, #4]
|
|
80054f6: 683b ldr r3, [r7, #0]
|
|
80054f8: 781b ldrb r3, [r3, #0]
|
|
80054fa: 009b lsls r3, r3, #2
|
|
80054fc: 4413 add r3, r2
|
|
80054fe: 881b ldrh r3, [r3, #0]
|
|
8005500: b29b uxth r3, r3
|
|
8005502: f423 4380 bic.w r3, r3, #16384 ; 0x4000
|
|
8005506: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
800550a: b29c uxth r4, r3
|
|
800550c: f484 5380 eor.w r3, r4, #4096 ; 0x1000
|
|
8005510: b29c uxth r4, r3
|
|
8005512: f484 5300 eor.w r3, r4, #8192 ; 0x2000
|
|
8005516: b29c uxth r4, r3
|
|
8005518: 687a ldr r2, [r7, #4]
|
|
800551a: 683b ldr r3, [r7, #0]
|
|
800551c: 781b ldrb r3, [r3, #0]
|
|
800551e: 009b lsls r3, r3, #2
|
|
8005520: 441a add r2, r3
|
|
8005522: 4b04 ldr r3, [pc, #16] ; (8005534 <USB_EPStartXfer+0x56c>)
|
|
8005524: 4323 orrs r3, r4
|
|
8005526: b29b uxth r3, r3
|
|
8005528: 8013 strh r3, [r2, #0]
|
|
}
|
|
|
|
return HAL_OK;
|
|
800552a: 2300 movs r3, #0
|
|
}
|
|
800552c: 4618 mov r0, r3
|
|
800552e: 3734 adds r7, #52 ; 0x34
|
|
8005530: 46bd mov sp, r7
|
|
8005532: bd90 pop {r4, r7, pc}
|
|
8005534: ffff8080 .word 0xffff8080
|
|
|
|
08005538 <USB_EPSetStall>:
|
|
* @param USBx : Selected device
|
|
* @param ep: pointer to endpoint structure
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
|
|
{
|
|
8005538: b490 push {r4, r7}
|
|
800553a: b082 sub sp, #8
|
|
800553c: af00 add r7, sp, #0
|
|
800553e: 6078 str r0, [r7, #4]
|
|
8005540: 6039 str r1, [r7, #0]
|
|
if (ep->is_in != 0U)
|
|
8005542: 683b ldr r3, [r7, #0]
|
|
8005544: 785b ldrb r3, [r3, #1]
|
|
8005546: 2b00 cmp r3, #0
|
|
8005548: d018 beq.n 800557c <USB_EPSetStall+0x44>
|
|
{
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL);
|
|
800554a: 687a ldr r2, [r7, #4]
|
|
800554c: 683b ldr r3, [r7, #0]
|
|
800554e: 781b ldrb r3, [r3, #0]
|
|
8005550: 009b lsls r3, r3, #2
|
|
8005552: 4413 add r3, r2
|
|
8005554: 881b ldrh r3, [r3, #0]
|
|
8005556: b29b uxth r3, r3
|
|
8005558: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
800555c: f023 0340 bic.w r3, r3, #64 ; 0x40
|
|
8005560: b29c uxth r4, r3
|
|
8005562: f084 0310 eor.w r3, r4, #16
|
|
8005566: b29c uxth r4, r3
|
|
8005568: 687a ldr r2, [r7, #4]
|
|
800556a: 683b ldr r3, [r7, #0]
|
|
800556c: 781b ldrb r3, [r3, #0]
|
|
800556e: 009b lsls r3, r3, #2
|
|
8005570: 441a add r2, r3
|
|
8005572: 4b11 ldr r3, [pc, #68] ; (80055b8 <USB_EPSetStall+0x80>)
|
|
8005574: 4323 orrs r3, r4
|
|
8005576: b29b uxth r3, r3
|
|
8005578: 8013 strh r3, [r2, #0]
|
|
800557a: e017 b.n 80055ac <USB_EPSetStall+0x74>
|
|
}
|
|
else
|
|
{
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL);
|
|
800557c: 687a ldr r2, [r7, #4]
|
|
800557e: 683b ldr r3, [r7, #0]
|
|
8005580: 781b ldrb r3, [r3, #0]
|
|
8005582: 009b lsls r3, r3, #2
|
|
8005584: 4413 add r3, r2
|
|
8005586: 881b ldrh r3, [r3, #0]
|
|
8005588: b29b uxth r3, r3
|
|
800558a: f423 4380 bic.w r3, r3, #16384 ; 0x4000
|
|
800558e: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8005592: b29c uxth r4, r3
|
|
8005594: f484 5380 eor.w r3, r4, #4096 ; 0x1000
|
|
8005598: b29c uxth r4, r3
|
|
800559a: 687a ldr r2, [r7, #4]
|
|
800559c: 683b ldr r3, [r7, #0]
|
|
800559e: 781b ldrb r3, [r3, #0]
|
|
80055a0: 009b lsls r3, r3, #2
|
|
80055a2: 441a add r2, r3
|
|
80055a4: 4b04 ldr r3, [pc, #16] ; (80055b8 <USB_EPSetStall+0x80>)
|
|
80055a6: 4323 orrs r3, r4
|
|
80055a8: b29b uxth r3, r3
|
|
80055aa: 8013 strh r3, [r2, #0]
|
|
}
|
|
|
|
return HAL_OK;
|
|
80055ac: 2300 movs r3, #0
|
|
}
|
|
80055ae: 4618 mov r0, r3
|
|
80055b0: 3708 adds r7, #8
|
|
80055b2: 46bd mov sp, r7
|
|
80055b4: bc90 pop {r4, r7}
|
|
80055b6: 4770 bx lr
|
|
80055b8: ffff8080 .word 0xffff8080
|
|
|
|
080055bc <USB_EPClearStall>:
|
|
* @param USBx : Selected device
|
|
* @param ep: pointer to endpoint structure
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
|
|
{
|
|
80055bc: b490 push {r4, r7}
|
|
80055be: b082 sub sp, #8
|
|
80055c0: af00 add r7, sp, #0
|
|
80055c2: 6078 str r0, [r7, #4]
|
|
80055c4: 6039 str r1, [r7, #0]
|
|
if (ep->doublebuffer == 0U)
|
|
80055c6: 683b ldr r3, [r7, #0]
|
|
80055c8: 7b1b ldrb r3, [r3, #12]
|
|
80055ca: 2b00 cmp r3, #0
|
|
80055cc: d17d bne.n 80056ca <USB_EPClearStall+0x10e>
|
|
{
|
|
if (ep->is_in != 0U)
|
|
80055ce: 683b ldr r3, [r7, #0]
|
|
80055d0: 785b ldrb r3, [r3, #1]
|
|
80055d2: 2b00 cmp r3, #0
|
|
80055d4: d03d beq.n 8005652 <USB_EPClearStall+0x96>
|
|
{
|
|
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
|
80055d6: 687a ldr r2, [r7, #4]
|
|
80055d8: 683b ldr r3, [r7, #0]
|
|
80055da: 781b ldrb r3, [r3, #0]
|
|
80055dc: 009b lsls r3, r3, #2
|
|
80055de: 4413 add r3, r2
|
|
80055e0: 881b ldrh r3, [r3, #0]
|
|
80055e2: b29c uxth r4, r3
|
|
80055e4: 4623 mov r3, r4
|
|
80055e6: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
80055ea: 2b00 cmp r3, #0
|
|
80055ec: d014 beq.n 8005618 <USB_EPClearStall+0x5c>
|
|
80055ee: 687a ldr r2, [r7, #4]
|
|
80055f0: 683b ldr r3, [r7, #0]
|
|
80055f2: 781b ldrb r3, [r3, #0]
|
|
80055f4: 009b lsls r3, r3, #2
|
|
80055f6: 4413 add r3, r2
|
|
80055f8: 881b ldrh r3, [r3, #0]
|
|
80055fa: b29b uxth r3, r3
|
|
80055fc: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8005600: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8005604: b29c uxth r4, r3
|
|
8005606: 687a ldr r2, [r7, #4]
|
|
8005608: 683b ldr r3, [r7, #0]
|
|
800560a: 781b ldrb r3, [r3, #0]
|
|
800560c: 009b lsls r3, r3, #2
|
|
800560e: 441a add r2, r3
|
|
8005610: 4b31 ldr r3, [pc, #196] ; (80056d8 <USB_EPClearStall+0x11c>)
|
|
8005612: 4323 orrs r3, r4
|
|
8005614: b29b uxth r3, r3
|
|
8005616: 8013 strh r3, [r2, #0]
|
|
|
|
if (ep->type != EP_TYPE_ISOC)
|
|
8005618: 683b ldr r3, [r7, #0]
|
|
800561a: 78db ldrb r3, [r3, #3]
|
|
800561c: 2b01 cmp r3, #1
|
|
800561e: d054 beq.n 80056ca <USB_EPClearStall+0x10e>
|
|
{
|
|
/* Configure NAK status for the Endpoint */
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
|
|
8005620: 687a ldr r2, [r7, #4]
|
|
8005622: 683b ldr r3, [r7, #0]
|
|
8005624: 781b ldrb r3, [r3, #0]
|
|
8005626: 009b lsls r3, r3, #2
|
|
8005628: 4413 add r3, r2
|
|
800562a: 881b ldrh r3, [r3, #0]
|
|
800562c: b29b uxth r3, r3
|
|
800562e: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
8005632: f023 0340 bic.w r3, r3, #64 ; 0x40
|
|
8005636: b29c uxth r4, r3
|
|
8005638: f084 0320 eor.w r3, r4, #32
|
|
800563c: b29c uxth r4, r3
|
|
800563e: 687a ldr r2, [r7, #4]
|
|
8005640: 683b ldr r3, [r7, #0]
|
|
8005642: 781b ldrb r3, [r3, #0]
|
|
8005644: 009b lsls r3, r3, #2
|
|
8005646: 441a add r2, r3
|
|
8005648: 4b24 ldr r3, [pc, #144] ; (80056dc <USB_EPClearStall+0x120>)
|
|
800564a: 4323 orrs r3, r4
|
|
800564c: b29b uxth r3, r3
|
|
800564e: 8013 strh r3, [r2, #0]
|
|
8005650: e03b b.n 80056ca <USB_EPClearStall+0x10e>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
|
8005652: 687a ldr r2, [r7, #4]
|
|
8005654: 683b ldr r3, [r7, #0]
|
|
8005656: 781b ldrb r3, [r3, #0]
|
|
8005658: 009b lsls r3, r3, #2
|
|
800565a: 4413 add r3, r2
|
|
800565c: 881b ldrh r3, [r3, #0]
|
|
800565e: b29c uxth r4, r3
|
|
8005660: 4623 mov r3, r4
|
|
8005662: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
8005666: 2b00 cmp r3, #0
|
|
8005668: d014 beq.n 8005694 <USB_EPClearStall+0xd8>
|
|
800566a: 687a ldr r2, [r7, #4]
|
|
800566c: 683b ldr r3, [r7, #0]
|
|
800566e: 781b ldrb r3, [r3, #0]
|
|
8005670: 009b lsls r3, r3, #2
|
|
8005672: 4413 add r3, r2
|
|
8005674: 881b ldrh r3, [r3, #0]
|
|
8005676: b29b uxth r3, r3
|
|
8005678: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
|
|
800567c: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
8005680: b29c uxth r4, r3
|
|
8005682: 687a ldr r2, [r7, #4]
|
|
8005684: 683b ldr r3, [r7, #0]
|
|
8005686: 781b ldrb r3, [r3, #0]
|
|
8005688: 009b lsls r3, r3, #2
|
|
800568a: 441a add r2, r3
|
|
800568c: 4b14 ldr r3, [pc, #80] ; (80056e0 <USB_EPClearStall+0x124>)
|
|
800568e: 4323 orrs r3, r4
|
|
8005690: b29b uxth r3, r3
|
|
8005692: 8013 strh r3, [r2, #0]
|
|
|
|
/* Configure VALID status for the Endpoint*/
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
|
|
8005694: 687a ldr r2, [r7, #4]
|
|
8005696: 683b ldr r3, [r7, #0]
|
|
8005698: 781b ldrb r3, [r3, #0]
|
|
800569a: 009b lsls r3, r3, #2
|
|
800569c: 4413 add r3, r2
|
|
800569e: 881b ldrh r3, [r3, #0]
|
|
80056a0: b29b uxth r3, r3
|
|
80056a2: f423 4380 bic.w r3, r3, #16384 ; 0x4000
|
|
80056a6: f023 0370 bic.w r3, r3, #112 ; 0x70
|
|
80056aa: b29c uxth r4, r3
|
|
80056ac: f484 5380 eor.w r3, r4, #4096 ; 0x1000
|
|
80056b0: b29c uxth r4, r3
|
|
80056b2: f484 5300 eor.w r3, r4, #8192 ; 0x2000
|
|
80056b6: b29c uxth r4, r3
|
|
80056b8: 687a ldr r2, [r7, #4]
|
|
80056ba: 683b ldr r3, [r7, #0]
|
|
80056bc: 781b ldrb r3, [r3, #0]
|
|
80056be: 009b lsls r3, r3, #2
|
|
80056c0: 441a add r2, r3
|
|
80056c2: 4b06 ldr r3, [pc, #24] ; (80056dc <USB_EPClearStall+0x120>)
|
|
80056c4: 4323 orrs r3, r4
|
|
80056c6: b29b uxth r3, r3
|
|
80056c8: 8013 strh r3, [r2, #0]
|
|
}
|
|
}
|
|
|
|
return HAL_OK;
|
|
80056ca: 2300 movs r3, #0
|
|
}
|
|
80056cc: 4618 mov r0, r3
|
|
80056ce: 3708 adds r7, #8
|
|
80056d0: 46bd mov sp, r7
|
|
80056d2: bc90 pop {r4, r7}
|
|
80056d4: 4770 bx lr
|
|
80056d6: bf00 nop
|
|
80056d8: ffff80c0 .word 0xffff80c0
|
|
80056dc: ffff8080 .word 0xffff8080
|
|
80056e0: ffffc080 .word 0xffffc080
|
|
|
|
080056e4 <USB_SetDevAddress>:
|
|
* @param address : new device address to be assigned
|
|
* This parameter can be a value from 0 to 255
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address)
|
|
{
|
|
80056e4: b480 push {r7}
|
|
80056e6: b083 sub sp, #12
|
|
80056e8: af00 add r7, sp, #0
|
|
80056ea: 6078 str r0, [r7, #4]
|
|
80056ec: 460b mov r3, r1
|
|
80056ee: 70fb strb r3, [r7, #3]
|
|
if (address == 0U)
|
|
80056f0: 78fb ldrb r3, [r7, #3]
|
|
80056f2: 2b00 cmp r3, #0
|
|
80056f4: d103 bne.n 80056fe <USB_SetDevAddress+0x1a>
|
|
{
|
|
/* set device address and enable function */
|
|
USBx->DADDR = USB_DADDR_EF;
|
|
80056f6: 687b ldr r3, [r7, #4]
|
|
80056f8: 2280 movs r2, #128 ; 0x80
|
|
80056fa: f8a3 204c strh.w r2, [r3, #76] ; 0x4c
|
|
}
|
|
|
|
return HAL_OK;
|
|
80056fe: 2300 movs r3, #0
|
|
}
|
|
8005700: 4618 mov r0, r3
|
|
8005702: 370c adds r7, #12
|
|
8005704: 46bd mov sp, r7
|
|
8005706: bc80 pop {r7}
|
|
8005708: 4770 bx lr
|
|
|
|
0800570a <USB_DevConnect>:
|
|
* @brief USB_DevConnect : Connect the USB device by enabling the pull-up/pull-down
|
|
* @param USBx : Selected device
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx)
|
|
{
|
|
800570a: b480 push {r7}
|
|
800570c: b083 sub sp, #12
|
|
800570e: af00 add r7, sp, #0
|
|
8005710: 6078 str r0, [r7, #4]
|
|
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
|
only by USB OTG FS peripheral.
|
|
- This function is added to ensure compatibility across platforms.
|
|
*/
|
|
|
|
return HAL_OK;
|
|
8005712: 2300 movs r3, #0
|
|
}
|
|
8005714: 4618 mov r0, r3
|
|
8005716: 370c adds r7, #12
|
|
8005718: 46bd mov sp, r7
|
|
800571a: bc80 pop {r7}
|
|
800571c: 4770 bx lr
|
|
|
|
0800571e <USB_DevDisconnect>:
|
|
* @brief USB_DevDisconnect : Disconnect the USB device by disabling the pull-up/pull-down
|
|
* @param USBx : Selected device
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx)
|
|
{
|
|
800571e: b480 push {r7}
|
|
8005720: b083 sub sp, #12
|
|
8005722: af00 add r7, sp, #0
|
|
8005724: 6078 str r0, [r7, #4]
|
|
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
|
only by USB OTG FS peripheral.
|
|
- This function is added to ensure compatibility across platforms.
|
|
*/
|
|
|
|
return HAL_OK;
|
|
8005726: 2300 movs r3, #0
|
|
}
|
|
8005728: 4618 mov r0, r3
|
|
800572a: 370c adds r7, #12
|
|
800572c: 46bd mov sp, r7
|
|
800572e: bc80 pop {r7}
|
|
8005730: 4770 bx lr
|
|
|
|
08005732 <USB_ReadInterrupts>:
|
|
* @brief USB_ReadInterrupts: return the global USB interrupt status
|
|
* @param USBx : Selected device
|
|
* @retval HAL status
|
|
*/
|
|
uint32_t USB_ReadInterrupts(USB_TypeDef *USBx)
|
|
{
|
|
8005732: b480 push {r7}
|
|
8005734: b085 sub sp, #20
|
|
8005736: af00 add r7, sp, #0
|
|
8005738: 6078 str r0, [r7, #4]
|
|
uint32_t tmpreg;
|
|
|
|
tmpreg = USBx->ISTR;
|
|
800573a: 687b ldr r3, [r7, #4]
|
|
800573c: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
|
|
8005740: b29b uxth r3, r3
|
|
8005742: 60fb str r3, [r7, #12]
|
|
return tmpreg;
|
|
8005744: 68fb ldr r3, [r7, #12]
|
|
}
|
|
8005746: 4618 mov r0, r3
|
|
8005748: 3714 adds r7, #20
|
|
800574a: 46bd mov sp, r7
|
|
800574c: bc80 pop {r7}
|
|
800574e: 4770 bx lr
|
|
|
|
08005750 <USB_EP0_OutStart>:
|
|
* @param USBx Selected device
|
|
* @param psetup pointer to setup packet
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup)
|
|
{
|
|
8005750: b480 push {r7}
|
|
8005752: b083 sub sp, #12
|
|
8005754: af00 add r7, sp, #0
|
|
8005756: 6078 str r0, [r7, #4]
|
|
8005758: 6039 str r1, [r7, #0]
|
|
UNUSED(psetup);
|
|
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
|
only by USB OTG FS peripheral.
|
|
- This function is added to ensure compatibility across platforms.
|
|
*/
|
|
return HAL_OK;
|
|
800575a: 2300 movs r3, #0
|
|
}
|
|
800575c: 4618 mov r0, r3
|
|
800575e: 370c adds r7, #12
|
|
8005760: 46bd mov sp, r7
|
|
8005762: bc80 pop {r7}
|
|
8005764: 4770 bx lr
|
|
|
|
08005766 <USB_WritePMA>:
|
|
* @param wPMABufAddr address into PMA.
|
|
* @param wNBytes: no. of bytes to be copied.
|
|
* @retval None
|
|
*/
|
|
void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
|
|
{
|
|
8005766: b480 push {r7}
|
|
8005768: b08d sub sp, #52 ; 0x34
|
|
800576a: af00 add r7, sp, #0
|
|
800576c: 60f8 str r0, [r7, #12]
|
|
800576e: 60b9 str r1, [r7, #8]
|
|
8005770: 4611 mov r1, r2
|
|
8005772: 461a mov r2, r3
|
|
8005774: 460b mov r3, r1
|
|
8005776: 80fb strh r3, [r7, #6]
|
|
8005778: 4613 mov r3, r2
|
|
800577a: 80bb strh r3, [r7, #4]
|
|
uint32_t n = ((uint32_t)wNBytes + 1U) >> 1;
|
|
800577c: 88bb ldrh r3, [r7, #4]
|
|
800577e: 3301 adds r3, #1
|
|
8005780: 085b lsrs r3, r3, #1
|
|
8005782: 623b str r3, [r7, #32]
|
|
uint32_t BaseAddr = (uint32_t)USBx;
|
|
8005784: 68fb ldr r3, [r7, #12]
|
|
8005786: 61fb str r3, [r7, #28]
|
|
uint32_t i, temp1, temp2;
|
|
__IO uint16_t *pdwVal;
|
|
uint8_t *pBuf = pbUsrBuf;
|
|
8005788: 68bb ldr r3, [r7, #8]
|
|
800578a: 627b str r3, [r7, #36] ; 0x24
|
|
|
|
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
|
|
800578c: 88fb ldrh r3, [r7, #6]
|
|
800578e: 005a lsls r2, r3, #1
|
|
8005790: 69fb ldr r3, [r7, #28]
|
|
8005792: 4413 add r3, r2
|
|
8005794: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
8005798: 62bb str r3, [r7, #40] ; 0x28
|
|
|
|
for (i = n; i != 0U; i--)
|
|
800579a: 6a3b ldr r3, [r7, #32]
|
|
800579c: 62fb str r3, [r7, #44] ; 0x2c
|
|
800579e: e01e b.n 80057de <USB_WritePMA+0x78>
|
|
{
|
|
temp1 = *pBuf;
|
|
80057a0: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80057a2: 781b ldrb r3, [r3, #0]
|
|
80057a4: 61bb str r3, [r7, #24]
|
|
pBuf++;
|
|
80057a6: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80057a8: 3301 adds r3, #1
|
|
80057aa: 627b str r3, [r7, #36] ; 0x24
|
|
temp2 = temp1 | ((uint16_t)((uint16_t) *pBuf << 8));
|
|
80057ac: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80057ae: 781b ldrb r3, [r3, #0]
|
|
80057b0: b29b uxth r3, r3
|
|
80057b2: 021b lsls r3, r3, #8
|
|
80057b4: b29b uxth r3, r3
|
|
80057b6: 461a mov r2, r3
|
|
80057b8: 69bb ldr r3, [r7, #24]
|
|
80057ba: 4313 orrs r3, r2
|
|
80057bc: 617b str r3, [r7, #20]
|
|
*pdwVal = (uint16_t)temp2;
|
|
80057be: 697b ldr r3, [r7, #20]
|
|
80057c0: b29a uxth r2, r3
|
|
80057c2: 6abb ldr r3, [r7, #40] ; 0x28
|
|
80057c4: 801a strh r2, [r3, #0]
|
|
pdwVal++;
|
|
80057c6: 6abb ldr r3, [r7, #40] ; 0x28
|
|
80057c8: 3302 adds r3, #2
|
|
80057ca: 62bb str r3, [r7, #40] ; 0x28
|
|
|
|
#if PMA_ACCESS > 1U
|
|
pdwVal++;
|
|
80057cc: 6abb ldr r3, [r7, #40] ; 0x28
|
|
80057ce: 3302 adds r3, #2
|
|
80057d0: 62bb str r3, [r7, #40] ; 0x28
|
|
#endif
|
|
|
|
pBuf++;
|
|
80057d2: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80057d4: 3301 adds r3, #1
|
|
80057d6: 627b str r3, [r7, #36] ; 0x24
|
|
for (i = n; i != 0U; i--)
|
|
80057d8: 6afb ldr r3, [r7, #44] ; 0x2c
|
|
80057da: 3b01 subs r3, #1
|
|
80057dc: 62fb str r3, [r7, #44] ; 0x2c
|
|
80057de: 6afb ldr r3, [r7, #44] ; 0x2c
|
|
80057e0: 2b00 cmp r3, #0
|
|
80057e2: d1dd bne.n 80057a0 <USB_WritePMA+0x3a>
|
|
}
|
|
}
|
|
80057e4: bf00 nop
|
|
80057e6: 3734 adds r7, #52 ; 0x34
|
|
80057e8: 46bd mov sp, r7
|
|
80057ea: bc80 pop {r7}
|
|
80057ec: 4770 bx lr
|
|
|
|
080057ee <USB_ReadPMA>:
|
|
* @param wPMABufAddr address into PMA.
|
|
* @param wNBytes: no. of bytes to be copied.
|
|
* @retval None
|
|
*/
|
|
void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
|
|
{
|
|
80057ee: b480 push {r7}
|
|
80057f0: b08b sub sp, #44 ; 0x2c
|
|
80057f2: af00 add r7, sp, #0
|
|
80057f4: 60f8 str r0, [r7, #12]
|
|
80057f6: 60b9 str r1, [r7, #8]
|
|
80057f8: 4611 mov r1, r2
|
|
80057fa: 461a mov r2, r3
|
|
80057fc: 460b mov r3, r1
|
|
80057fe: 80fb strh r3, [r7, #6]
|
|
8005800: 4613 mov r3, r2
|
|
8005802: 80bb strh r3, [r7, #4]
|
|
uint32_t n = (uint32_t)wNBytes >> 1;
|
|
8005804: 88bb ldrh r3, [r7, #4]
|
|
8005806: 085b lsrs r3, r3, #1
|
|
8005808: b29b uxth r3, r3
|
|
800580a: 61bb str r3, [r7, #24]
|
|
uint32_t BaseAddr = (uint32_t)USBx;
|
|
800580c: 68fb ldr r3, [r7, #12]
|
|
800580e: 617b str r3, [r7, #20]
|
|
uint32_t i, temp;
|
|
__IO uint16_t *pdwVal;
|
|
uint8_t *pBuf = pbUsrBuf;
|
|
8005810: 68bb ldr r3, [r7, #8]
|
|
8005812: 61fb str r3, [r7, #28]
|
|
|
|
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
|
|
8005814: 88fb ldrh r3, [r7, #6]
|
|
8005816: 005a lsls r2, r3, #1
|
|
8005818: 697b ldr r3, [r7, #20]
|
|
800581a: 4413 add r3, r2
|
|
800581c: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
8005820: 623b str r3, [r7, #32]
|
|
|
|
for (i = n; i != 0U; i--)
|
|
8005822: 69bb ldr r3, [r7, #24]
|
|
8005824: 627b str r3, [r7, #36] ; 0x24
|
|
8005826: e01b b.n 8005860 <USB_ReadPMA+0x72>
|
|
{
|
|
temp = *(__IO uint16_t *)pdwVal;
|
|
8005828: 6a3b ldr r3, [r7, #32]
|
|
800582a: 881b ldrh r3, [r3, #0]
|
|
800582c: b29b uxth r3, r3
|
|
800582e: 613b str r3, [r7, #16]
|
|
pdwVal++;
|
|
8005830: 6a3b ldr r3, [r7, #32]
|
|
8005832: 3302 adds r3, #2
|
|
8005834: 623b str r3, [r7, #32]
|
|
*pBuf = (uint8_t)((temp >> 0) & 0xFFU);
|
|
8005836: 693b ldr r3, [r7, #16]
|
|
8005838: b2da uxtb r2, r3
|
|
800583a: 69fb ldr r3, [r7, #28]
|
|
800583c: 701a strb r2, [r3, #0]
|
|
pBuf++;
|
|
800583e: 69fb ldr r3, [r7, #28]
|
|
8005840: 3301 adds r3, #1
|
|
8005842: 61fb str r3, [r7, #28]
|
|
*pBuf = (uint8_t)((temp >> 8) & 0xFFU);
|
|
8005844: 693b ldr r3, [r7, #16]
|
|
8005846: 0a1b lsrs r3, r3, #8
|
|
8005848: b2da uxtb r2, r3
|
|
800584a: 69fb ldr r3, [r7, #28]
|
|
800584c: 701a strb r2, [r3, #0]
|
|
pBuf++;
|
|
800584e: 69fb ldr r3, [r7, #28]
|
|
8005850: 3301 adds r3, #1
|
|
8005852: 61fb str r3, [r7, #28]
|
|
|
|
#if PMA_ACCESS > 1U
|
|
pdwVal++;
|
|
8005854: 6a3b ldr r3, [r7, #32]
|
|
8005856: 3302 adds r3, #2
|
|
8005858: 623b str r3, [r7, #32]
|
|
for (i = n; i != 0U; i--)
|
|
800585a: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
800585c: 3b01 subs r3, #1
|
|
800585e: 627b str r3, [r7, #36] ; 0x24
|
|
8005860: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8005862: 2b00 cmp r3, #0
|
|
8005864: d1e0 bne.n 8005828 <USB_ReadPMA+0x3a>
|
|
#endif
|
|
}
|
|
|
|
if ((wNBytes % 2U) != 0U)
|
|
8005866: 88bb ldrh r3, [r7, #4]
|
|
8005868: f003 0301 and.w r3, r3, #1
|
|
800586c: b29b uxth r3, r3
|
|
800586e: 2b00 cmp r3, #0
|
|
8005870: d007 beq.n 8005882 <USB_ReadPMA+0x94>
|
|
{
|
|
temp = *pdwVal;
|
|
8005872: 6a3b ldr r3, [r7, #32]
|
|
8005874: 881b ldrh r3, [r3, #0]
|
|
8005876: b29b uxth r3, r3
|
|
8005878: 613b str r3, [r7, #16]
|
|
*pBuf = (uint8_t)((temp >> 0) & 0xFFU);
|
|
800587a: 693b ldr r3, [r7, #16]
|
|
800587c: b2da uxtb r2, r3
|
|
800587e: 69fb ldr r3, [r7, #28]
|
|
8005880: 701a strb r2, [r3, #0]
|
|
}
|
|
}
|
|
8005882: bf00 nop
|
|
8005884: 372c adds r7, #44 ; 0x2c
|
|
8005886: 46bd mov sp, r7
|
|
8005888: bc80 pop {r7}
|
|
800588a: 4770 bx lr
|
|
|
|
0800588c <ILI9341_Select>:
|
|
|
|
#ifndef _swap_int16_t
|
|
#define _swap_int16_t(a, b) { int16_t t = a; a = b; b = t; }
|
|
#endif
|
|
|
|
static void ILI9341_Select() {
|
|
800588c: b580 push {r7, lr}
|
|
800588e: af00 add r7, sp, #0
|
|
HAL_GPIO_WritePin(ILI9341_CS_GPIO_Port, ILI9341_CS_Pin, GPIO_PIN_RESET);
|
|
8005890: 2200 movs r2, #0
|
|
8005892: 2140 movs r1, #64 ; 0x40
|
|
8005894: 4802 ldr r0, [pc, #8] ; (80058a0 <ILI9341_Select+0x14>)
|
|
8005896: f7fb feb0 bl 80015fa <HAL_GPIO_WritePin>
|
|
}
|
|
800589a: bf00 nop
|
|
800589c: bd80 pop {r7, pc}
|
|
800589e: bf00 nop
|
|
80058a0: 40010800 .word 0x40010800
|
|
|
|
080058a4 <ILI9341_Unselect>:
|
|
|
|
void ILI9341_Unselect() {
|
|
80058a4: b580 push {r7, lr}
|
|
80058a6: af00 add r7, sp, #0
|
|
HAL_GPIO_WritePin(ILI9341_CS_GPIO_Port, ILI9341_CS_Pin, GPIO_PIN_SET);
|
|
80058a8: 2201 movs r2, #1
|
|
80058aa: 2140 movs r1, #64 ; 0x40
|
|
80058ac: 4802 ldr r0, [pc, #8] ; (80058b8 <ILI9341_Unselect+0x14>)
|
|
80058ae: f7fb fea4 bl 80015fa <HAL_GPIO_WritePin>
|
|
}
|
|
80058b2: bf00 nop
|
|
80058b4: bd80 pop {r7, pc}
|
|
80058b6: bf00 nop
|
|
80058b8: 40010800 .word 0x40010800
|
|
|
|
080058bc <ILI9341_Reset>:
|
|
|
|
static void ILI9341_Reset() {
|
|
80058bc: b580 push {r7, lr}
|
|
80058be: af00 add r7, sp, #0
|
|
HAL_GPIO_WritePin(ILI9341_RES_GPIO_Port, ILI9341_RES_Pin, GPIO_PIN_RESET);
|
|
80058c0: 2200 movs r2, #0
|
|
80058c2: 2180 movs r1, #128 ; 0x80
|
|
80058c4: 4806 ldr r0, [pc, #24] ; (80058e0 <ILI9341_Reset+0x24>)
|
|
80058c6: f7fb fe98 bl 80015fa <HAL_GPIO_WritePin>
|
|
HAL_Delay(5);
|
|
80058ca: 2005 movs r0, #5
|
|
80058cc: f7fb fbf4 bl 80010b8 <HAL_Delay>
|
|
HAL_GPIO_WritePin(ILI9341_RES_GPIO_Port, ILI9341_RES_Pin, GPIO_PIN_SET);
|
|
80058d0: 2201 movs r2, #1
|
|
80058d2: 2180 movs r1, #128 ; 0x80
|
|
80058d4: 4802 ldr r0, [pc, #8] ; (80058e0 <ILI9341_Reset+0x24>)
|
|
80058d6: f7fb fe90 bl 80015fa <HAL_GPIO_WritePin>
|
|
}
|
|
80058da: bf00 nop
|
|
80058dc: bd80 pop {r7, pc}
|
|
80058de: bf00 nop
|
|
80058e0: 40010800 .word 0x40010800
|
|
|
|
080058e4 <ILI9341_WriteCommand>:
|
|
|
|
static void ILI9341_WriteCommand(uint8_t cmd) {
|
|
80058e4: b580 push {r7, lr}
|
|
80058e6: b082 sub sp, #8
|
|
80058e8: af00 add r7, sp, #0
|
|
80058ea: 4603 mov r3, r0
|
|
80058ec: 71fb strb r3, [r7, #7]
|
|
HAL_GPIO_WritePin(ILI9341_DC_GPIO_Port, ILI9341_DC_Pin, GPIO_PIN_RESET);
|
|
80058ee: 2200 movs r2, #0
|
|
80058f0: 2120 movs r1, #32
|
|
80058f2: 4807 ldr r0, [pc, #28] ; (8005910 <ILI9341_WriteCommand+0x2c>)
|
|
80058f4: f7fb fe81 bl 80015fa <HAL_GPIO_WritePin>
|
|
HAL_SPI_Transmit(&ILI9341_SPI_PORT, &cmd, sizeof(cmd), HAL_MAX_DELAY);
|
|
80058f8: 1df9 adds r1, r7, #7
|
|
80058fa: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
|
|
80058fe: 2201 movs r2, #1
|
|
8005900: 4804 ldr r0, [pc, #16] ; (8005914 <ILI9341_WriteCommand+0x30>)
|
|
8005902: f7fe f9f6 bl 8003cf2 <HAL_SPI_Transmit>
|
|
}
|
|
8005906: bf00 nop
|
|
8005908: 3708 adds r7, #8
|
|
800590a: 46bd mov sp, r7
|
|
800590c: bd80 pop {r7, pc}
|
|
800590e: bf00 nop
|
|
8005910: 40010800 .word 0x40010800
|
|
8005914: 200011fc .word 0x200011fc
|
|
|
|
08005918 <ILI9341_WriteData>:
|
|
|
|
static void ILI9341_WriteData(uint8_t* buff, size_t buff_size) {
|
|
8005918: b580 push {r7, lr}
|
|
800591a: b084 sub sp, #16
|
|
800591c: af00 add r7, sp, #0
|
|
800591e: 6078 str r0, [r7, #4]
|
|
8005920: 6039 str r1, [r7, #0]
|
|
HAL_GPIO_WritePin(ILI9341_DC_GPIO_Port, ILI9341_DC_Pin, GPIO_PIN_SET);
|
|
8005922: 2201 movs r2, #1
|
|
8005924: 2120 movs r1, #32
|
|
8005926: 4810 ldr r0, [pc, #64] ; (8005968 <ILI9341_WriteData+0x50>)
|
|
8005928: f7fb fe67 bl 80015fa <HAL_GPIO_WritePin>
|
|
|
|
// split data in small chunks because HAL can't send more then 64K at once
|
|
while(buff_size > 0) {
|
|
800592c: e015 b.n 800595a <ILI9341_WriteData+0x42>
|
|
uint16_t chunk_size = buff_size > 32768 ? 32768 : buff_size;
|
|
800592e: 683b ldr r3, [r7, #0]
|
|
8005930: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
|
|
8005934: bf28 it cs
|
|
8005936: f44f 4300 movcs.w r3, #32768 ; 0x8000
|
|
800593a: 81fb strh r3, [r7, #14]
|
|
HAL_SPI_Transmit(&ILI9341_SPI_PORT, buff, chunk_size, HAL_MAX_DELAY);
|
|
800593c: 89fa ldrh r2, [r7, #14]
|
|
800593e: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
|
|
8005942: 6879 ldr r1, [r7, #4]
|
|
8005944: 4809 ldr r0, [pc, #36] ; (800596c <ILI9341_WriteData+0x54>)
|
|
8005946: f7fe f9d4 bl 8003cf2 <HAL_SPI_Transmit>
|
|
buff += chunk_size;
|
|
800594a: 89fb ldrh r3, [r7, #14]
|
|
800594c: 687a ldr r2, [r7, #4]
|
|
800594e: 4413 add r3, r2
|
|
8005950: 607b str r3, [r7, #4]
|
|
buff_size -= chunk_size;
|
|
8005952: 89fb ldrh r3, [r7, #14]
|
|
8005954: 683a ldr r2, [r7, #0]
|
|
8005956: 1ad3 subs r3, r2, r3
|
|
8005958: 603b str r3, [r7, #0]
|
|
while(buff_size > 0) {
|
|
800595a: 683b ldr r3, [r7, #0]
|
|
800595c: 2b00 cmp r3, #0
|
|
800595e: d1e6 bne.n 800592e <ILI9341_WriteData+0x16>
|
|
}
|
|
}
|
|
8005960: bf00 nop
|
|
8005962: 3710 adds r7, #16
|
|
8005964: 46bd mov sp, r7
|
|
8005966: bd80 pop {r7, pc}
|
|
8005968: 40010800 .word 0x40010800
|
|
800596c: 200011fc .word 0x200011fc
|
|
|
|
08005970 <ILI9341_SetAddressWindow>:
|
|
|
|
static void ILI9341_SetAddressWindow(uint16_t x0, uint16_t y0, uint16_t x1, uint16_t y1) {
|
|
8005970: b590 push {r4, r7, lr}
|
|
8005972: b085 sub sp, #20
|
|
8005974: af00 add r7, sp, #0
|
|
8005976: 4604 mov r4, r0
|
|
8005978: 4608 mov r0, r1
|
|
800597a: 4611 mov r1, r2
|
|
800597c: 461a mov r2, r3
|
|
800597e: 4623 mov r3, r4
|
|
8005980: 80fb strh r3, [r7, #6]
|
|
8005982: 4603 mov r3, r0
|
|
8005984: 80bb strh r3, [r7, #4]
|
|
8005986: 460b mov r3, r1
|
|
8005988: 807b strh r3, [r7, #2]
|
|
800598a: 4613 mov r3, r2
|
|
800598c: 803b strh r3, [r7, #0]
|
|
// column address set
|
|
ILI9341_WriteCommand(0x2A); // CASET
|
|
800598e: 202a movs r0, #42 ; 0x2a
|
|
8005990: f7ff ffa8 bl 80058e4 <ILI9341_WriteCommand>
|
|
{
|
|
uint8_t data[] = { (x0 >> 8) & 0xFF, x0 & 0xFF, (x1 >> 8) & 0xFF, x1 & 0xFF };
|
|
8005994: 88fb ldrh r3, [r7, #6]
|
|
8005996: 0a1b lsrs r3, r3, #8
|
|
8005998: b29b uxth r3, r3
|
|
800599a: b2db uxtb r3, r3
|
|
800599c: 733b strb r3, [r7, #12]
|
|
800599e: 88fb ldrh r3, [r7, #6]
|
|
80059a0: b2db uxtb r3, r3
|
|
80059a2: 737b strb r3, [r7, #13]
|
|
80059a4: 887b ldrh r3, [r7, #2]
|
|
80059a6: 0a1b lsrs r3, r3, #8
|
|
80059a8: b29b uxth r3, r3
|
|
80059aa: b2db uxtb r3, r3
|
|
80059ac: 73bb strb r3, [r7, #14]
|
|
80059ae: 887b ldrh r3, [r7, #2]
|
|
80059b0: b2db uxtb r3, r3
|
|
80059b2: 73fb strb r3, [r7, #15]
|
|
ILI9341_WriteData(data, sizeof(data));
|
|
80059b4: f107 030c add.w r3, r7, #12
|
|
80059b8: 2104 movs r1, #4
|
|
80059ba: 4618 mov r0, r3
|
|
80059bc: f7ff ffac bl 8005918 <ILI9341_WriteData>
|
|
}
|
|
|
|
// row address set
|
|
ILI9341_WriteCommand(0x2B); // RASET
|
|
80059c0: 202b movs r0, #43 ; 0x2b
|
|
80059c2: f7ff ff8f bl 80058e4 <ILI9341_WriteCommand>
|
|
{
|
|
uint8_t data[] = { (y0 >> 8) & 0xFF, y0 & 0xFF, (y1 >> 8) & 0xFF, y1 & 0xFF };
|
|
80059c6: 88bb ldrh r3, [r7, #4]
|
|
80059c8: 0a1b lsrs r3, r3, #8
|
|
80059ca: b29b uxth r3, r3
|
|
80059cc: b2db uxtb r3, r3
|
|
80059ce: 723b strb r3, [r7, #8]
|
|
80059d0: 88bb ldrh r3, [r7, #4]
|
|
80059d2: b2db uxtb r3, r3
|
|
80059d4: 727b strb r3, [r7, #9]
|
|
80059d6: 883b ldrh r3, [r7, #0]
|
|
80059d8: 0a1b lsrs r3, r3, #8
|
|
80059da: b29b uxth r3, r3
|
|
80059dc: b2db uxtb r3, r3
|
|
80059de: 72bb strb r3, [r7, #10]
|
|
80059e0: 883b ldrh r3, [r7, #0]
|
|
80059e2: b2db uxtb r3, r3
|
|
80059e4: 72fb strb r3, [r7, #11]
|
|
ILI9341_WriteData(data, sizeof(data));
|
|
80059e6: f107 0308 add.w r3, r7, #8
|
|
80059ea: 2104 movs r1, #4
|
|
80059ec: 4618 mov r0, r3
|
|
80059ee: f7ff ff93 bl 8005918 <ILI9341_WriteData>
|
|
}
|
|
|
|
// write to RAM
|
|
ILI9341_WriteCommand(0x2C); // RAMWR
|
|
80059f2: 202c movs r0, #44 ; 0x2c
|
|
80059f4: f7ff ff76 bl 80058e4 <ILI9341_WriteCommand>
|
|
}
|
|
80059f8: bf00 nop
|
|
80059fa: 3714 adds r7, #20
|
|
80059fc: 46bd mov sp, r7
|
|
80059fe: bd90 pop {r4, r7, pc}
|
|
|
|
08005a00 <ILI9341_Init>:
|
|
|
|
void ILI9341_Init() {
|
|
8005a00: b590 push {r4, r7, lr}
|
|
8005a02: b09b sub sp, #108 ; 0x6c
|
|
8005a04: af00 add r7, sp, #0
|
|
ILI9341_Select();
|
|
8005a06: f7ff ff41 bl 800588c <ILI9341_Select>
|
|
ILI9341_Reset();
|
|
8005a0a: f7ff ff57 bl 80058bc <ILI9341_Reset>
|
|
|
|
// command list is based on https://github.com/martnak/STM32-ILI9341
|
|
|
|
// SOFTWARE RESET
|
|
ILI9341_WriteCommand(0x01);
|
|
8005a0e: 2001 movs r0, #1
|
|
8005a10: f7ff ff68 bl 80058e4 <ILI9341_WriteCommand>
|
|
HAL_Delay(1000);
|
|
8005a14: f44f 707a mov.w r0, #1000 ; 0x3e8
|
|
8005a18: f7fb fb4e bl 80010b8 <HAL_Delay>
|
|
|
|
// POWER CONTROL A
|
|
ILI9341_WriteCommand(0xCB);
|
|
8005a1c: 20cb movs r0, #203 ; 0xcb
|
|
8005a1e: f7ff ff61 bl 80058e4 <ILI9341_WriteCommand>
|
|
{
|
|
uint8_t data[] = { 0x39, 0x2C, 0x00, 0x34, 0x02 };
|
|
8005a22: 4a8b ldr r2, [pc, #556] ; (8005c50 <ILI9341_Init+0x250>)
|
|
8005a24: f107 0360 add.w r3, r7, #96 ; 0x60
|
|
8005a28: e892 0003 ldmia.w r2, {r0, r1}
|
|
8005a2c: 6018 str r0, [r3, #0]
|
|
8005a2e: 3304 adds r3, #4
|
|
8005a30: 7019 strb r1, [r3, #0]
|
|
ILI9341_WriteData(data, sizeof(data));
|
|
8005a32: f107 0360 add.w r3, r7, #96 ; 0x60
|
|
8005a36: 2105 movs r1, #5
|
|
8005a38: 4618 mov r0, r3
|
|
8005a3a: f7ff ff6d bl 8005918 <ILI9341_WriteData>
|
|
}
|
|
|
|
// POWER CONTROL B
|
|
ILI9341_WriteCommand(0xCF);
|
|
8005a3e: 20cf movs r0, #207 ; 0xcf
|
|
8005a40: f7ff ff50 bl 80058e4 <ILI9341_WriteCommand>
|
|
{
|
|
uint8_t data[] = { 0x00, 0xC1, 0x30 };
|
|
8005a44: 4a83 ldr r2, [pc, #524] ; (8005c54 <ILI9341_Init+0x254>)
|
|
8005a46: f107 035c add.w r3, r7, #92 ; 0x5c
|
|
8005a4a: 6812 ldr r2, [r2, #0]
|
|
8005a4c: 4611 mov r1, r2
|
|
8005a4e: 8019 strh r1, [r3, #0]
|
|
8005a50: 3302 adds r3, #2
|
|
8005a52: 0c12 lsrs r2, r2, #16
|
|
8005a54: 701a strb r2, [r3, #0]
|
|
ILI9341_WriteData(data, sizeof(data));
|
|
8005a56: f107 035c add.w r3, r7, #92 ; 0x5c
|
|
8005a5a: 2103 movs r1, #3
|
|
8005a5c: 4618 mov r0, r3
|
|
8005a5e: f7ff ff5b bl 8005918 <ILI9341_WriteData>
|
|
}
|
|
|
|
// DRIVER TIMING CONTROL A
|
|
ILI9341_WriteCommand(0xE8);
|
|
8005a62: 20e8 movs r0, #232 ; 0xe8
|
|
8005a64: f7ff ff3e bl 80058e4 <ILI9341_WriteCommand>
|
|
{
|
|
uint8_t data[] = { 0x85, 0x00, 0x78 };
|
|
8005a68: 4a7b ldr r2, [pc, #492] ; (8005c58 <ILI9341_Init+0x258>)
|
|
8005a6a: f107 0358 add.w r3, r7, #88 ; 0x58
|
|
8005a6e: 6812 ldr r2, [r2, #0]
|
|
8005a70: 4611 mov r1, r2
|
|
8005a72: 8019 strh r1, [r3, #0]
|
|
8005a74: 3302 adds r3, #2
|
|
8005a76: 0c12 lsrs r2, r2, #16
|
|
8005a78: 701a strb r2, [r3, #0]
|
|
ILI9341_WriteData(data, sizeof(data));
|
|
8005a7a: f107 0358 add.w r3, r7, #88 ; 0x58
|
|
8005a7e: 2103 movs r1, #3
|
|
8005a80: 4618 mov r0, r3
|
|
8005a82: f7ff ff49 bl 8005918 <ILI9341_WriteData>
|
|
}
|
|
|
|
// DRIVER TIMING CONTROL B
|
|
ILI9341_WriteCommand(0xEA);
|
|
8005a86: 20ea movs r0, #234 ; 0xea
|
|
8005a88: f7ff ff2c bl 80058e4 <ILI9341_WriteCommand>
|
|
{
|
|
uint8_t data[] = { 0x00, 0x00 };
|
|
8005a8c: 2300 movs r3, #0
|
|
8005a8e: f887 3054 strb.w r3, [r7, #84] ; 0x54
|
|
8005a92: 2300 movs r3, #0
|
|
8005a94: f887 3055 strb.w r3, [r7, #85] ; 0x55
|
|
ILI9341_WriteData(data, sizeof(data));
|
|
8005a98: f107 0354 add.w r3, r7, #84 ; 0x54
|
|
8005a9c: 2102 movs r1, #2
|
|
8005a9e: 4618 mov r0, r3
|
|
8005aa0: f7ff ff3a bl 8005918 <ILI9341_WriteData>
|
|
}
|
|
|
|
// POWER ON SEQUENCE CONTROL
|
|
ILI9341_WriteCommand(0xED);
|
|
8005aa4: 20ed movs r0, #237 ; 0xed
|
|
8005aa6: f7ff ff1d bl 80058e4 <ILI9341_WriteCommand>
|
|
{
|
|
uint8_t data[] = { 0x64, 0x03, 0x12, 0x81 };
|
|
8005aaa: 4b6c ldr r3, [pc, #432] ; (8005c5c <ILI9341_Init+0x25c>)
|
|
8005aac: 681b ldr r3, [r3, #0]
|
|
8005aae: 653b str r3, [r7, #80] ; 0x50
|
|
ILI9341_WriteData(data, sizeof(data));
|
|
8005ab0: f107 0350 add.w r3, r7, #80 ; 0x50
|
|
8005ab4: 2104 movs r1, #4
|
|
8005ab6: 4618 mov r0, r3
|
|
8005ab8: f7ff ff2e bl 8005918 <ILI9341_WriteData>
|
|
}
|
|
|
|
// PUMP RATIO CONTROL
|
|
ILI9341_WriteCommand(0xF7);
|
|
8005abc: 20f7 movs r0, #247 ; 0xf7
|
|
8005abe: f7ff ff11 bl 80058e4 <ILI9341_WriteCommand>
|
|
{
|
|
uint8_t data[] = { 0x20 };
|
|
8005ac2: 2320 movs r3, #32
|
|
8005ac4: f887 304c strb.w r3, [r7, #76] ; 0x4c
|
|
ILI9341_WriteData(data, sizeof(data));
|
|
8005ac8: f107 034c add.w r3, r7, #76 ; 0x4c
|
|
8005acc: 2101 movs r1, #1
|
|
8005ace: 4618 mov r0, r3
|
|
8005ad0: f7ff ff22 bl 8005918 <ILI9341_WriteData>
|
|
}
|
|
|
|
// POWER CONTROL,VRH[5:0]
|
|
ILI9341_WriteCommand(0xC0);
|
|
8005ad4: 20c0 movs r0, #192 ; 0xc0
|
|
8005ad6: f7ff ff05 bl 80058e4 <ILI9341_WriteCommand>
|
|
{
|
|
uint8_t data[] = { 0x23 };
|
|
8005ada: 2323 movs r3, #35 ; 0x23
|
|
8005adc: f887 3048 strb.w r3, [r7, #72] ; 0x48
|
|
ILI9341_WriteData(data, sizeof(data));
|
|
8005ae0: f107 0348 add.w r3, r7, #72 ; 0x48
|
|
8005ae4: 2101 movs r1, #1
|
|
8005ae6: 4618 mov r0, r3
|
|
8005ae8: f7ff ff16 bl 8005918 <ILI9341_WriteData>
|
|
}
|
|
|
|
// POWER CONTROL,SAP[2:0];BT[3:0]
|
|
ILI9341_WriteCommand(0xC1);
|
|
8005aec: 20c1 movs r0, #193 ; 0xc1
|
|
8005aee: f7ff fef9 bl 80058e4 <ILI9341_WriteCommand>
|
|
{
|
|
uint8_t data[] = { 0x10 };
|
|
8005af2: 2310 movs r3, #16
|
|
8005af4: f887 3044 strb.w r3, [r7, #68] ; 0x44
|
|
ILI9341_WriteData(data, sizeof(data));
|
|
8005af8: f107 0344 add.w r3, r7, #68 ; 0x44
|
|
8005afc: 2101 movs r1, #1
|
|
8005afe: 4618 mov r0, r3
|
|
8005b00: f7ff ff0a bl 8005918 <ILI9341_WriteData>
|
|
}
|
|
|
|
// VCM CONTROL
|
|
ILI9341_WriteCommand(0xC5);
|
|
8005b04: 20c5 movs r0, #197 ; 0xc5
|
|
8005b06: f7ff feed bl 80058e4 <ILI9341_WriteCommand>
|
|
{
|
|
uint8_t data[] = { 0x3E, 0x28 };
|
|
8005b0a: 4b55 ldr r3, [pc, #340] ; (8005c60 <ILI9341_Init+0x260>)
|
|
8005b0c: 881b ldrh r3, [r3, #0]
|
|
8005b0e: f8a7 3040 strh.w r3, [r7, #64] ; 0x40
|
|
ILI9341_WriteData(data, sizeof(data));
|
|
8005b12: f107 0340 add.w r3, r7, #64 ; 0x40
|
|
8005b16: 2102 movs r1, #2
|
|
8005b18: 4618 mov r0, r3
|
|
8005b1a: f7ff fefd bl 8005918 <ILI9341_WriteData>
|
|
}
|
|
|
|
// VCM CONTROL 2
|
|
ILI9341_WriteCommand(0xC7);
|
|
8005b1e: 20c7 movs r0, #199 ; 0xc7
|
|
8005b20: f7ff fee0 bl 80058e4 <ILI9341_WriteCommand>
|
|
{
|
|
uint8_t data[] = { 0x86 };
|
|
8005b24: 2386 movs r3, #134 ; 0x86
|
|
8005b26: f887 303c strb.w r3, [r7, #60] ; 0x3c
|
|
ILI9341_WriteData(data, sizeof(data));
|
|
8005b2a: f107 033c add.w r3, r7, #60 ; 0x3c
|
|
8005b2e: 2101 movs r1, #1
|
|
8005b30: 4618 mov r0, r3
|
|
8005b32: f7ff fef1 bl 8005918 <ILI9341_WriteData>
|
|
}
|
|
|
|
// MEMORY ACCESS CONTROL
|
|
ILI9341_WriteCommand(0x36);
|
|
8005b36: 2036 movs r0, #54 ; 0x36
|
|
8005b38: f7ff fed4 bl 80058e4 <ILI9341_WriteCommand>
|
|
{
|
|
uint8_t data[] = { 0x48 };
|
|
8005b3c: 2348 movs r3, #72 ; 0x48
|
|
8005b3e: f887 3038 strb.w r3, [r7, #56] ; 0x38
|
|
ILI9341_WriteData(data, sizeof(data));
|
|
8005b42: f107 0338 add.w r3, r7, #56 ; 0x38
|
|
8005b46: 2101 movs r1, #1
|
|
8005b48: 4618 mov r0, r3
|
|
8005b4a: f7ff fee5 bl 8005918 <ILI9341_WriteData>
|
|
}
|
|
|
|
// PIXEL FORMAT
|
|
ILI9341_WriteCommand(0x3A);
|
|
8005b4e: 203a movs r0, #58 ; 0x3a
|
|
8005b50: f7ff fec8 bl 80058e4 <ILI9341_WriteCommand>
|
|
{
|
|
uint8_t data[] = { 0x55 };
|
|
8005b54: 2355 movs r3, #85 ; 0x55
|
|
8005b56: f887 3034 strb.w r3, [r7, #52] ; 0x34
|
|
ILI9341_WriteData(data, sizeof(data));
|
|
8005b5a: f107 0334 add.w r3, r7, #52 ; 0x34
|
|
8005b5e: 2101 movs r1, #1
|
|
8005b60: 4618 mov r0, r3
|
|
8005b62: f7ff fed9 bl 8005918 <ILI9341_WriteData>
|
|
}
|
|
|
|
// FRAME RATIO CONTROL, STANDARD RGB COLOR
|
|
ILI9341_WriteCommand(0xB1);
|
|
8005b66: 20b1 movs r0, #177 ; 0xb1
|
|
8005b68: f7ff febc bl 80058e4 <ILI9341_WriteCommand>
|
|
{
|
|
uint8_t data[] = { 0x00, 0x18 };
|
|
8005b6c: 2300 movs r3, #0
|
|
8005b6e: f887 3030 strb.w r3, [r7, #48] ; 0x30
|
|
8005b72: 2318 movs r3, #24
|
|
8005b74: f887 3031 strb.w r3, [r7, #49] ; 0x31
|
|
ILI9341_WriteData(data, sizeof(data));
|
|
8005b78: f107 0330 add.w r3, r7, #48 ; 0x30
|
|
8005b7c: 2102 movs r1, #2
|
|
8005b7e: 4618 mov r0, r3
|
|
8005b80: f7ff feca bl 8005918 <ILI9341_WriteData>
|
|
}
|
|
|
|
// DISPLAY FUNCTION CONTROL
|
|
ILI9341_WriteCommand(0xB6);
|
|
8005b84: 20b6 movs r0, #182 ; 0xb6
|
|
8005b86: f7ff fead bl 80058e4 <ILI9341_WriteCommand>
|
|
{
|
|
uint8_t data[] = { 0x08, 0x82, 0x27 };
|
|
8005b8a: 4a36 ldr r2, [pc, #216] ; (8005c64 <ILI9341_Init+0x264>)
|
|
8005b8c: f107 032c add.w r3, r7, #44 ; 0x2c
|
|
8005b90: 6812 ldr r2, [r2, #0]
|
|
8005b92: 4611 mov r1, r2
|
|
8005b94: 8019 strh r1, [r3, #0]
|
|
8005b96: 3302 adds r3, #2
|
|
8005b98: 0c12 lsrs r2, r2, #16
|
|
8005b9a: 701a strb r2, [r3, #0]
|
|
ILI9341_WriteData(data, sizeof(data));
|
|
8005b9c: f107 032c add.w r3, r7, #44 ; 0x2c
|
|
8005ba0: 2103 movs r1, #3
|
|
8005ba2: 4618 mov r0, r3
|
|
8005ba4: f7ff feb8 bl 8005918 <ILI9341_WriteData>
|
|
}
|
|
|
|
// 3GAMMA FUNCTION DISABLE
|
|
ILI9341_WriteCommand(0xF2);
|
|
8005ba8: 20f2 movs r0, #242 ; 0xf2
|
|
8005baa: f7ff fe9b bl 80058e4 <ILI9341_WriteCommand>
|
|
{
|
|
uint8_t data[] = { 0x00 };
|
|
8005bae: 2300 movs r3, #0
|
|
8005bb0: f887 3028 strb.w r3, [r7, #40] ; 0x28
|
|
ILI9341_WriteData(data, sizeof(data));
|
|
8005bb4: f107 0328 add.w r3, r7, #40 ; 0x28
|
|
8005bb8: 2101 movs r1, #1
|
|
8005bba: 4618 mov r0, r3
|
|
8005bbc: f7ff feac bl 8005918 <ILI9341_WriteData>
|
|
}
|
|
|
|
// GAMMA CURVE SELECTED
|
|
ILI9341_WriteCommand(0x26);
|
|
8005bc0: 2026 movs r0, #38 ; 0x26
|
|
8005bc2: f7ff fe8f bl 80058e4 <ILI9341_WriteCommand>
|
|
{
|
|
uint8_t data[] = { 0x01 };
|
|
8005bc6: 2301 movs r3, #1
|
|
8005bc8: f887 3024 strb.w r3, [r7, #36] ; 0x24
|
|
ILI9341_WriteData(data, sizeof(data));
|
|
8005bcc: f107 0324 add.w r3, r7, #36 ; 0x24
|
|
8005bd0: 2101 movs r1, #1
|
|
8005bd2: 4618 mov r0, r3
|
|
8005bd4: f7ff fea0 bl 8005918 <ILI9341_WriteData>
|
|
}
|
|
|
|
// POSITIVE GAMMA CORRECTION
|
|
ILI9341_WriteCommand(0xE0);
|
|
8005bd8: 20e0 movs r0, #224 ; 0xe0
|
|
8005bda: f7ff fe83 bl 80058e4 <ILI9341_WriteCommand>
|
|
{
|
|
uint8_t data[] = { 0x0F, 0x31, 0x2B, 0x0C, 0x0E, 0x08, 0x4E, 0xF1,
|
|
8005bde: 4b22 ldr r3, [pc, #136] ; (8005c68 <ILI9341_Init+0x268>)
|
|
8005be0: f107 0414 add.w r4, r7, #20
|
|
8005be4: cb0f ldmia r3, {r0, r1, r2, r3}
|
|
8005be6: c407 stmia r4!, {r0, r1, r2}
|
|
8005be8: 8023 strh r3, [r4, #0]
|
|
8005bea: 3402 adds r4, #2
|
|
8005bec: 0c1b lsrs r3, r3, #16
|
|
8005bee: 7023 strb r3, [r4, #0]
|
|
0x37, 0x07, 0x10, 0x03, 0x0E, 0x09, 0x00 };
|
|
ILI9341_WriteData(data, sizeof(data));
|
|
8005bf0: f107 0314 add.w r3, r7, #20
|
|
8005bf4: 210f movs r1, #15
|
|
8005bf6: 4618 mov r0, r3
|
|
8005bf8: f7ff fe8e bl 8005918 <ILI9341_WriteData>
|
|
}
|
|
|
|
// NEGATIVE GAMMA CORRECTION
|
|
ILI9341_WriteCommand(0xE1);
|
|
8005bfc: 20e1 movs r0, #225 ; 0xe1
|
|
8005bfe: f7ff fe71 bl 80058e4 <ILI9341_WriteCommand>
|
|
{
|
|
uint8_t data[] = { 0x00, 0x0E, 0x14, 0x03, 0x11, 0x07, 0x31, 0xC1,
|
|
8005c02: 4b1a ldr r3, [pc, #104] ; (8005c6c <ILI9341_Init+0x26c>)
|
|
8005c04: 1d3c adds r4, r7, #4
|
|
8005c06: cb0f ldmia r3, {r0, r1, r2, r3}
|
|
8005c08: c407 stmia r4!, {r0, r1, r2}
|
|
8005c0a: 8023 strh r3, [r4, #0]
|
|
8005c0c: 3402 adds r4, #2
|
|
8005c0e: 0c1b lsrs r3, r3, #16
|
|
8005c10: 7023 strb r3, [r4, #0]
|
|
0x48, 0x08, 0x0F, 0x0C, 0x31, 0x36, 0x0F };
|
|
ILI9341_WriteData(data, sizeof(data));
|
|
8005c12: 1d3b adds r3, r7, #4
|
|
8005c14: 210f movs r1, #15
|
|
8005c16: 4618 mov r0, r3
|
|
8005c18: f7ff fe7e bl 8005918 <ILI9341_WriteData>
|
|
}
|
|
|
|
// EXIT SLEEP
|
|
ILI9341_WriteCommand(0x11);
|
|
8005c1c: 2011 movs r0, #17
|
|
8005c1e: f7ff fe61 bl 80058e4 <ILI9341_WriteCommand>
|
|
HAL_Delay(120);
|
|
8005c22: 2078 movs r0, #120 ; 0x78
|
|
8005c24: f7fb fa48 bl 80010b8 <HAL_Delay>
|
|
|
|
// TURN ON DISPLAY
|
|
ILI9341_WriteCommand(0x29);
|
|
8005c28: 2029 movs r0, #41 ; 0x29
|
|
8005c2a: f7ff fe5b bl 80058e4 <ILI9341_WriteCommand>
|
|
|
|
// MADCTL
|
|
ILI9341_WriteCommand(0x36);
|
|
8005c2e: 2036 movs r0, #54 ; 0x36
|
|
8005c30: f7ff fe58 bl 80058e4 <ILI9341_WriteCommand>
|
|
{
|
|
uint8_t data[] = { ILI9341_ROTATION };
|
|
8005c34: 23e8 movs r3, #232 ; 0xe8
|
|
8005c36: 703b strb r3, [r7, #0]
|
|
ILI9341_WriteData(data, sizeof(data));
|
|
8005c38: 463b mov r3, r7
|
|
8005c3a: 2101 movs r1, #1
|
|
8005c3c: 4618 mov r0, r3
|
|
8005c3e: f7ff fe6b bl 8005918 <ILI9341_WriteData>
|
|
}
|
|
|
|
ILI9341_Unselect();
|
|
8005c42: f7ff fe2f bl 80058a4 <ILI9341_Unselect>
|
|
}
|
|
8005c46: bf00 nop
|
|
8005c48: 376c adds r7, #108 ; 0x6c
|
|
8005c4a: 46bd mov sp, r7
|
|
8005c4c: bd90 pop {r4, r7, pc}
|
|
8005c4e: bf00 nop
|
|
8005c50: 0800c668 .word 0x0800c668
|
|
8005c54: 0800c670 .word 0x0800c670
|
|
8005c58: 0800c674 .word 0x0800c674
|
|
8005c5c: 0800c678 .word 0x0800c678
|
|
8005c60: 0800c67c .word 0x0800c67c
|
|
8005c64: 0800c680 .word 0x0800c680
|
|
8005c68: 0800c684 .word 0x0800c684
|
|
8005c6c: 0800c694 .word 0x0800c694
|
|
|
|
08005c70 <ILI9341_DrawPixel>:
|
|
|
|
void ILI9341_DrawPixel(uint16_t x, uint16_t y, uint16_t color) {
|
|
8005c70: b580 push {r7, lr}
|
|
8005c72: b084 sub sp, #16
|
|
8005c74: af00 add r7, sp, #0
|
|
8005c76: 4603 mov r3, r0
|
|
8005c78: 80fb strh r3, [r7, #6]
|
|
8005c7a: 460b mov r3, r1
|
|
8005c7c: 80bb strh r3, [r7, #4]
|
|
8005c7e: 4613 mov r3, r2
|
|
8005c80: 807b strh r3, [r7, #2]
|
|
if((x >= ILI9341_WIDTH) || (y >= ILI9341_HEIGHT))
|
|
8005c82: 88fb ldrh r3, [r7, #6]
|
|
8005c84: f5b3 7fa0 cmp.w r3, #320 ; 0x140
|
|
8005c88: d21f bcs.n 8005cca <ILI9341_DrawPixel+0x5a>
|
|
8005c8a: 88bb ldrh r3, [r7, #4]
|
|
8005c8c: 2bef cmp r3, #239 ; 0xef
|
|
8005c8e: d81c bhi.n 8005cca <ILI9341_DrawPixel+0x5a>
|
|
return;
|
|
|
|
ILI9341_Select();
|
|
8005c90: f7ff fdfc bl 800588c <ILI9341_Select>
|
|
|
|
ILI9341_SetAddressWindow(x, y, x+1, y+1);
|
|
8005c94: 88fb ldrh r3, [r7, #6]
|
|
8005c96: 3301 adds r3, #1
|
|
8005c98: b29a uxth r2, r3
|
|
8005c9a: 88bb ldrh r3, [r7, #4]
|
|
8005c9c: 3301 adds r3, #1
|
|
8005c9e: b29b uxth r3, r3
|
|
8005ca0: 88b9 ldrh r1, [r7, #4]
|
|
8005ca2: 88f8 ldrh r0, [r7, #6]
|
|
8005ca4: f7ff fe64 bl 8005970 <ILI9341_SetAddressWindow>
|
|
uint8_t data[] = { color >> 8, color & 0xFF };
|
|
8005ca8: 887b ldrh r3, [r7, #2]
|
|
8005caa: 0a1b lsrs r3, r3, #8
|
|
8005cac: b29b uxth r3, r3
|
|
8005cae: b2db uxtb r3, r3
|
|
8005cb0: 733b strb r3, [r7, #12]
|
|
8005cb2: 887b ldrh r3, [r7, #2]
|
|
8005cb4: b2db uxtb r3, r3
|
|
8005cb6: 737b strb r3, [r7, #13]
|
|
ILI9341_WriteData(data, sizeof(data));
|
|
8005cb8: f107 030c add.w r3, r7, #12
|
|
8005cbc: 2102 movs r1, #2
|
|
8005cbe: 4618 mov r0, r3
|
|
8005cc0: f7ff fe2a bl 8005918 <ILI9341_WriteData>
|
|
|
|
ILI9341_Unselect();
|
|
8005cc4: f7ff fdee bl 80058a4 <ILI9341_Unselect>
|
|
8005cc8: e000 b.n 8005ccc <ILI9341_DrawPixel+0x5c>
|
|
return;
|
|
8005cca: bf00 nop
|
|
}
|
|
8005ccc: 3710 adds r7, #16
|
|
8005cce: 46bd mov sp, r7
|
|
8005cd0: bd80 pop {r7, pc}
|
|
|
|
08005cd2 <ILI9341_WriteChar>:
|
|
|
|
static void ILI9341_WriteChar(uint16_t x, uint16_t y, char ch, FontDef font, uint16_t color, uint16_t bgcolor) {
|
|
8005cd2: b082 sub sp, #8
|
|
8005cd4: b590 push {r4, r7, lr}
|
|
8005cd6: b089 sub sp, #36 ; 0x24
|
|
8005cd8: af00 add r7, sp, #0
|
|
8005cda: 637b str r3, [r7, #52] ; 0x34
|
|
8005cdc: 4603 mov r3, r0
|
|
8005cde: 80fb strh r3, [r7, #6]
|
|
8005ce0: 460b mov r3, r1
|
|
8005ce2: 80bb strh r3, [r7, #4]
|
|
8005ce4: 4613 mov r3, r2
|
|
8005ce6: 70fb strb r3, [r7, #3]
|
|
uint32_t i, b, j;
|
|
|
|
ILI9341_SetAddressWindow(x, y, x+font.width-1, y+font.height-1);
|
|
8005ce8: f897 3034 ldrb.w r3, [r7, #52] ; 0x34
|
|
8005cec: b29a uxth r2, r3
|
|
8005cee: 88fb ldrh r3, [r7, #6]
|
|
8005cf0: 4413 add r3, r2
|
|
8005cf2: b29b uxth r3, r3
|
|
8005cf4: 3b01 subs r3, #1
|
|
8005cf6: b29c uxth r4, r3
|
|
8005cf8: f897 3035 ldrb.w r3, [r7, #53] ; 0x35
|
|
8005cfc: b29a uxth r2, r3
|
|
8005cfe: 88bb ldrh r3, [r7, #4]
|
|
8005d00: 4413 add r3, r2
|
|
8005d02: b29b uxth r3, r3
|
|
8005d04: 3b01 subs r3, #1
|
|
8005d06: b29b uxth r3, r3
|
|
8005d08: 88b9 ldrh r1, [r7, #4]
|
|
8005d0a: 88f8 ldrh r0, [r7, #6]
|
|
8005d0c: 4622 mov r2, r4
|
|
8005d0e: f7ff fe2f bl 8005970 <ILI9341_SetAddressWindow>
|
|
|
|
for(i = 0; i < font.height; i++) {
|
|
8005d12: 2300 movs r3, #0
|
|
8005d14: 61fb str r3, [r7, #28]
|
|
8005d16: e043 b.n 8005da0 <ILI9341_WriteChar+0xce>
|
|
b = font.data[(ch - 32) * font.height + i];
|
|
8005d18: 6bba ldr r2, [r7, #56] ; 0x38
|
|
8005d1a: 78fb ldrb r3, [r7, #3]
|
|
8005d1c: 3b20 subs r3, #32
|
|
8005d1e: f897 1035 ldrb.w r1, [r7, #53] ; 0x35
|
|
8005d22: fb01 f303 mul.w r3, r1, r3
|
|
8005d26: 4619 mov r1, r3
|
|
8005d28: 69fb ldr r3, [r7, #28]
|
|
8005d2a: 440b add r3, r1
|
|
8005d2c: 005b lsls r3, r3, #1
|
|
8005d2e: 4413 add r3, r2
|
|
8005d30: 881b ldrh r3, [r3, #0]
|
|
8005d32: 617b str r3, [r7, #20]
|
|
for(j = 0; j < font.width; j++) {
|
|
8005d34: 2300 movs r3, #0
|
|
8005d36: 61bb str r3, [r7, #24]
|
|
8005d38: e029 b.n 8005d8e <ILI9341_WriteChar+0xbc>
|
|
if((b << j) & 0x8000) {
|
|
8005d3a: 697a ldr r2, [r7, #20]
|
|
8005d3c: 69bb ldr r3, [r7, #24]
|
|
8005d3e: fa02 f303 lsl.w r3, r2, r3
|
|
8005d42: f403 4300 and.w r3, r3, #32768 ; 0x8000
|
|
8005d46: 2b00 cmp r3, #0
|
|
8005d48: d00e beq.n 8005d68 <ILI9341_WriteChar+0x96>
|
|
uint8_t data[] = { color >> 8, color & 0xFF };
|
|
8005d4a: 8fbb ldrh r3, [r7, #60] ; 0x3c
|
|
8005d4c: 0a1b lsrs r3, r3, #8
|
|
8005d4e: b29b uxth r3, r3
|
|
8005d50: b2db uxtb r3, r3
|
|
8005d52: 743b strb r3, [r7, #16]
|
|
8005d54: 8fbb ldrh r3, [r7, #60] ; 0x3c
|
|
8005d56: b2db uxtb r3, r3
|
|
8005d58: 747b strb r3, [r7, #17]
|
|
ILI9341_WriteData(data, sizeof(data));
|
|
8005d5a: f107 0310 add.w r3, r7, #16
|
|
8005d5e: 2102 movs r1, #2
|
|
8005d60: 4618 mov r0, r3
|
|
8005d62: f7ff fdd9 bl 8005918 <ILI9341_WriteData>
|
|
8005d66: e00f b.n 8005d88 <ILI9341_WriteChar+0xb6>
|
|
} else {
|
|
uint8_t data[] = { bgcolor >> 8, bgcolor & 0xFF };
|
|
8005d68: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40
|
|
8005d6c: 0a1b lsrs r3, r3, #8
|
|
8005d6e: b29b uxth r3, r3
|
|
8005d70: b2db uxtb r3, r3
|
|
8005d72: 733b strb r3, [r7, #12]
|
|
8005d74: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40
|
|
8005d78: b2db uxtb r3, r3
|
|
8005d7a: 737b strb r3, [r7, #13]
|
|
ILI9341_WriteData(data, sizeof(data));
|
|
8005d7c: f107 030c add.w r3, r7, #12
|
|
8005d80: 2102 movs r1, #2
|
|
8005d82: 4618 mov r0, r3
|
|
8005d84: f7ff fdc8 bl 8005918 <ILI9341_WriteData>
|
|
for(j = 0; j < font.width; j++) {
|
|
8005d88: 69bb ldr r3, [r7, #24]
|
|
8005d8a: 3301 adds r3, #1
|
|
8005d8c: 61bb str r3, [r7, #24]
|
|
8005d8e: f897 3034 ldrb.w r3, [r7, #52] ; 0x34
|
|
8005d92: 461a mov r2, r3
|
|
8005d94: 69bb ldr r3, [r7, #24]
|
|
8005d96: 4293 cmp r3, r2
|
|
8005d98: d3cf bcc.n 8005d3a <ILI9341_WriteChar+0x68>
|
|
for(i = 0; i < font.height; i++) {
|
|
8005d9a: 69fb ldr r3, [r7, #28]
|
|
8005d9c: 3301 adds r3, #1
|
|
8005d9e: 61fb str r3, [r7, #28]
|
|
8005da0: f897 3035 ldrb.w r3, [r7, #53] ; 0x35
|
|
8005da4: 461a mov r2, r3
|
|
8005da6: 69fb ldr r3, [r7, #28]
|
|
8005da8: 4293 cmp r3, r2
|
|
8005daa: d3b5 bcc.n 8005d18 <ILI9341_WriteChar+0x46>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
8005dac: bf00 nop
|
|
8005dae: 3724 adds r7, #36 ; 0x24
|
|
8005db0: 46bd mov sp, r7
|
|
8005db2: e8bd 4090 ldmia.w sp!, {r4, r7, lr}
|
|
8005db6: b002 add sp, #8
|
|
8005db8: 4770 bx lr
|
|
|
|
08005dba <ILI9341_WriteString>:
|
|
|
|
void ILI9341_WriteString(uint16_t x, uint16_t y, const char* str, FontDef font, uint16_t color, uint16_t bgcolor) {
|
|
8005dba: b082 sub sp, #8
|
|
8005dbc: b580 push {r7, lr}
|
|
8005dbe: b086 sub sp, #24
|
|
8005dc0: af04 add r7, sp, #16
|
|
8005dc2: 603a str r2, [r7, #0]
|
|
8005dc4: 617b str r3, [r7, #20]
|
|
8005dc6: 4603 mov r3, r0
|
|
8005dc8: 80fb strh r3, [r7, #6]
|
|
8005dca: 460b mov r3, r1
|
|
8005dcc: 80bb strh r3, [r7, #4]
|
|
ILI9341_Select();
|
|
8005dce: f7ff fd5d bl 800588c <ILI9341_Select>
|
|
|
|
while(*str) {
|
|
8005dd2: e02e b.n 8005e32 <ILI9341_WriteString+0x78>
|
|
if(x + font.width >= ILI9341_WIDTH) {
|
|
8005dd4: 88fb ldrh r3, [r7, #6]
|
|
8005dd6: 7d3a ldrb r2, [r7, #20]
|
|
8005dd8: 4413 add r3, r2
|
|
8005dda: f5b3 7fa0 cmp.w r3, #320 ; 0x140
|
|
8005dde: db13 blt.n 8005e08 <ILI9341_WriteString+0x4e>
|
|
x = 0;
|
|
8005de0: 2300 movs r3, #0
|
|
8005de2: 80fb strh r3, [r7, #6]
|
|
y += font.height;
|
|
8005de4: 7d7b ldrb r3, [r7, #21]
|
|
8005de6: b29a uxth r2, r3
|
|
8005de8: 88bb ldrh r3, [r7, #4]
|
|
8005dea: 4413 add r3, r2
|
|
8005dec: 80bb strh r3, [r7, #4]
|
|
if(y + font.height >= ILI9341_HEIGHT) {
|
|
8005dee: 88bb ldrh r3, [r7, #4]
|
|
8005df0: 7d7a ldrb r2, [r7, #21]
|
|
8005df2: 4413 add r3, r2
|
|
8005df4: 2bef cmp r3, #239 ; 0xef
|
|
8005df6: dc21 bgt.n 8005e3c <ILI9341_WriteString+0x82>
|
|
break;
|
|
}
|
|
|
|
if(*str == ' ') {
|
|
8005df8: 683b ldr r3, [r7, #0]
|
|
8005dfa: 781b ldrb r3, [r3, #0]
|
|
8005dfc: 2b20 cmp r3, #32
|
|
8005dfe: d103 bne.n 8005e08 <ILI9341_WriteString+0x4e>
|
|
// skip spaces in the beginning of the new line
|
|
str++;
|
|
8005e00: 683b ldr r3, [r7, #0]
|
|
8005e02: 3301 adds r3, #1
|
|
8005e04: 603b str r3, [r7, #0]
|
|
continue;
|
|
8005e06: e014 b.n 8005e32 <ILI9341_WriteString+0x78>
|
|
}
|
|
}
|
|
|
|
ILI9341_WriteChar(x, y, *str, font, color, bgcolor);
|
|
8005e08: 683b ldr r3, [r7, #0]
|
|
8005e0a: 781a ldrb r2, [r3, #0]
|
|
8005e0c: 88b9 ldrh r1, [r7, #4]
|
|
8005e0e: 88f8 ldrh r0, [r7, #6]
|
|
8005e10: 8c3b ldrh r3, [r7, #32]
|
|
8005e12: 9302 str r3, [sp, #8]
|
|
8005e14: 8bbb ldrh r3, [r7, #28]
|
|
8005e16: 9301 str r3, [sp, #4]
|
|
8005e18: 69bb ldr r3, [r7, #24]
|
|
8005e1a: 9300 str r3, [sp, #0]
|
|
8005e1c: 697b ldr r3, [r7, #20]
|
|
8005e1e: f7ff ff58 bl 8005cd2 <ILI9341_WriteChar>
|
|
x += font.width;
|
|
8005e22: 7d3b ldrb r3, [r7, #20]
|
|
8005e24: b29a uxth r2, r3
|
|
8005e26: 88fb ldrh r3, [r7, #6]
|
|
8005e28: 4413 add r3, r2
|
|
8005e2a: 80fb strh r3, [r7, #6]
|
|
str++;
|
|
8005e2c: 683b ldr r3, [r7, #0]
|
|
8005e2e: 3301 adds r3, #1
|
|
8005e30: 603b str r3, [r7, #0]
|
|
while(*str) {
|
|
8005e32: 683b ldr r3, [r7, #0]
|
|
8005e34: 781b ldrb r3, [r3, #0]
|
|
8005e36: 2b00 cmp r3, #0
|
|
8005e38: d1cc bne.n 8005dd4 <ILI9341_WriteString+0x1a>
|
|
8005e3a: e000 b.n 8005e3e <ILI9341_WriteString+0x84>
|
|
break;
|
|
8005e3c: bf00 nop
|
|
}
|
|
|
|
ILI9341_Unselect();
|
|
8005e3e: f7ff fd31 bl 80058a4 <ILI9341_Unselect>
|
|
}
|
|
8005e42: bf00 nop
|
|
8005e44: 3708 adds r7, #8
|
|
8005e46: 46bd mov sp, r7
|
|
8005e48: e8bd 4080 ldmia.w sp!, {r7, lr}
|
|
8005e4c: b002 add sp, #8
|
|
8005e4e: 4770 bx lr
|
|
|
|
08005e50 <ILI9341_FillRectangle>:
|
|
|
|
void ILI9341_FillRectangle(uint16_t x, uint16_t y, uint16_t w, uint16_t h, uint16_t color) {
|
|
8005e50: b590 push {r4, r7, lr}
|
|
8005e52: b085 sub sp, #20
|
|
8005e54: af00 add r7, sp, #0
|
|
8005e56: 4604 mov r4, r0
|
|
8005e58: 4608 mov r0, r1
|
|
8005e5a: 4611 mov r1, r2
|
|
8005e5c: 461a mov r2, r3
|
|
8005e5e: 4623 mov r3, r4
|
|
8005e60: 80fb strh r3, [r7, #6]
|
|
8005e62: 4603 mov r3, r0
|
|
8005e64: 80bb strh r3, [r7, #4]
|
|
8005e66: 460b mov r3, r1
|
|
8005e68: 807b strh r3, [r7, #2]
|
|
8005e6a: 4613 mov r3, r2
|
|
8005e6c: 803b strh r3, [r7, #0]
|
|
// clipping
|
|
if((x >= ILI9341_WIDTH) || (y >= ILI9341_HEIGHT)) return;
|
|
8005e6e: 88fb ldrh r3, [r7, #6]
|
|
8005e70: f5b3 7fa0 cmp.w r3, #320 ; 0x140
|
|
8005e74: d254 bcs.n 8005f20 <ILI9341_FillRectangle+0xd0>
|
|
8005e76: 88bb ldrh r3, [r7, #4]
|
|
8005e78: 2bef cmp r3, #239 ; 0xef
|
|
8005e7a: d851 bhi.n 8005f20 <ILI9341_FillRectangle+0xd0>
|
|
if((x + w - 1) >= ILI9341_WIDTH) w = ILI9341_WIDTH - x;
|
|
8005e7c: 88fa ldrh r2, [r7, #6]
|
|
8005e7e: 887b ldrh r3, [r7, #2]
|
|
8005e80: 4413 add r3, r2
|
|
8005e82: 3b01 subs r3, #1
|
|
8005e84: f5b3 7fa0 cmp.w r3, #320 ; 0x140
|
|
8005e88: db03 blt.n 8005e92 <ILI9341_FillRectangle+0x42>
|
|
8005e8a: 88fb ldrh r3, [r7, #6]
|
|
8005e8c: f5c3 73a0 rsb r3, r3, #320 ; 0x140
|
|
8005e90: 807b strh r3, [r7, #2]
|
|
if((y + h - 1) >= ILI9341_HEIGHT) h = ILI9341_HEIGHT - y;
|
|
8005e92: 88ba ldrh r2, [r7, #4]
|
|
8005e94: 883b ldrh r3, [r7, #0]
|
|
8005e96: 4413 add r3, r2
|
|
8005e98: 3b01 subs r3, #1
|
|
8005e9a: 2bef cmp r3, #239 ; 0xef
|
|
8005e9c: dd03 ble.n 8005ea6 <ILI9341_FillRectangle+0x56>
|
|
8005e9e: 88bb ldrh r3, [r7, #4]
|
|
8005ea0: f1c3 03f0 rsb r3, r3, #240 ; 0xf0
|
|
8005ea4: 803b strh r3, [r7, #0]
|
|
|
|
ILI9341_Select();
|
|
8005ea6: f7ff fcf1 bl 800588c <ILI9341_Select>
|
|
ILI9341_SetAddressWindow(x, y, x+w-1, y+h-1);
|
|
8005eaa: 88fa ldrh r2, [r7, #6]
|
|
8005eac: 887b ldrh r3, [r7, #2]
|
|
8005eae: 4413 add r3, r2
|
|
8005eb0: b29b uxth r3, r3
|
|
8005eb2: 3b01 subs r3, #1
|
|
8005eb4: b29c uxth r4, r3
|
|
8005eb6: 88ba ldrh r2, [r7, #4]
|
|
8005eb8: 883b ldrh r3, [r7, #0]
|
|
8005eba: 4413 add r3, r2
|
|
8005ebc: b29b uxth r3, r3
|
|
8005ebe: 3b01 subs r3, #1
|
|
8005ec0: b29b uxth r3, r3
|
|
8005ec2: 88b9 ldrh r1, [r7, #4]
|
|
8005ec4: 88f8 ldrh r0, [r7, #6]
|
|
8005ec6: 4622 mov r2, r4
|
|
8005ec8: f7ff fd52 bl 8005970 <ILI9341_SetAddressWindow>
|
|
|
|
uint8_t data[] = { color >> 8, color & 0xFF };
|
|
8005ecc: 8c3b ldrh r3, [r7, #32]
|
|
8005ece: 0a1b lsrs r3, r3, #8
|
|
8005ed0: b29b uxth r3, r3
|
|
8005ed2: b2db uxtb r3, r3
|
|
8005ed4: 733b strb r3, [r7, #12]
|
|
8005ed6: 8c3b ldrh r3, [r7, #32]
|
|
8005ed8: b2db uxtb r3, r3
|
|
8005eda: 737b strb r3, [r7, #13]
|
|
HAL_GPIO_WritePin(ILI9341_DC_GPIO_Port, ILI9341_DC_Pin, GPIO_PIN_SET);
|
|
8005edc: 2201 movs r2, #1
|
|
8005ede: 2120 movs r1, #32
|
|
8005ee0: 4811 ldr r0, [pc, #68] ; (8005f28 <ILI9341_FillRectangle+0xd8>)
|
|
8005ee2: f7fb fb8a bl 80015fa <HAL_GPIO_WritePin>
|
|
for(y = h; y > 0; y--) {
|
|
8005ee6: 883b ldrh r3, [r7, #0]
|
|
8005ee8: 80bb strh r3, [r7, #4]
|
|
8005eea: e013 b.n 8005f14 <ILI9341_FillRectangle+0xc4>
|
|
for(x = w; x > 0; x--) {
|
|
8005eec: 887b ldrh r3, [r7, #2]
|
|
8005eee: 80fb strh r3, [r7, #6]
|
|
8005ef0: e00a b.n 8005f08 <ILI9341_FillRectangle+0xb8>
|
|
HAL_SPI_Transmit(&ILI9341_SPI_PORT, data, sizeof(data), HAL_MAX_DELAY);
|
|
8005ef2: f107 010c add.w r1, r7, #12
|
|
8005ef6: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
|
|
8005efa: 2202 movs r2, #2
|
|
8005efc: 480b ldr r0, [pc, #44] ; (8005f2c <ILI9341_FillRectangle+0xdc>)
|
|
8005efe: f7fd fef8 bl 8003cf2 <HAL_SPI_Transmit>
|
|
for(x = w; x > 0; x--) {
|
|
8005f02: 88fb ldrh r3, [r7, #6]
|
|
8005f04: 3b01 subs r3, #1
|
|
8005f06: 80fb strh r3, [r7, #6]
|
|
8005f08: 88fb ldrh r3, [r7, #6]
|
|
8005f0a: 2b00 cmp r3, #0
|
|
8005f0c: d1f1 bne.n 8005ef2 <ILI9341_FillRectangle+0xa2>
|
|
for(y = h; y > 0; y--) {
|
|
8005f0e: 88bb ldrh r3, [r7, #4]
|
|
8005f10: 3b01 subs r3, #1
|
|
8005f12: 80bb strh r3, [r7, #4]
|
|
8005f14: 88bb ldrh r3, [r7, #4]
|
|
8005f16: 2b00 cmp r3, #0
|
|
8005f18: d1e8 bne.n 8005eec <ILI9341_FillRectangle+0x9c>
|
|
}
|
|
}
|
|
|
|
ILI9341_Unselect();
|
|
8005f1a: f7ff fcc3 bl 80058a4 <ILI9341_Unselect>
|
|
8005f1e: e000 b.n 8005f22 <ILI9341_FillRectangle+0xd2>
|
|
if((x >= ILI9341_WIDTH) || (y >= ILI9341_HEIGHT)) return;
|
|
8005f20: bf00 nop
|
|
}
|
|
8005f22: 3714 adds r7, #20
|
|
8005f24: 46bd mov sp, r7
|
|
8005f26: bd90 pop {r4, r7, pc}
|
|
8005f28: 40010800 .word 0x40010800
|
|
8005f2c: 200011fc .word 0x200011fc
|
|
|
|
08005f30 <ILI9341_writeLine>:
|
|
|
|
void ILI9341_writeLine(int16_t x0, int16_t y0, int16_t x1, int16_t y1, uint16_t color) {
|
|
8005f30: b590 push {r4, r7, lr}
|
|
8005f32: b089 sub sp, #36 ; 0x24
|
|
8005f34: af00 add r7, sp, #0
|
|
8005f36: 4604 mov r4, r0
|
|
8005f38: 4608 mov r0, r1
|
|
8005f3a: 4611 mov r1, r2
|
|
8005f3c: 461a mov r2, r3
|
|
8005f3e: 4623 mov r3, r4
|
|
8005f40: 80fb strh r3, [r7, #6]
|
|
8005f42: 4603 mov r3, r0
|
|
8005f44: 80bb strh r3, [r7, #4]
|
|
8005f46: 460b mov r3, r1
|
|
8005f48: 807b strh r3, [r7, #2]
|
|
8005f4a: 4613 mov r3, r2
|
|
8005f4c: 803b strh r3, [r7, #0]
|
|
|
|
int16_t steep = abs(y1 - y0) > abs(x1 - x0);
|
|
8005f4e: f9b7 2000 ldrsh.w r2, [r7]
|
|
8005f52: f9b7 3004 ldrsh.w r3, [r7, #4]
|
|
8005f56: 1ad3 subs r3, r2, r3
|
|
8005f58: ea83 72e3 eor.w r2, r3, r3, asr #31
|
|
8005f5c: eba2 72e3 sub.w r2, r2, r3, asr #31
|
|
8005f60: f9b7 1002 ldrsh.w r1, [r7, #2]
|
|
8005f64: f9b7 3006 ldrsh.w r3, [r7, #6]
|
|
8005f68: 1acb subs r3, r1, r3
|
|
8005f6a: 2b00 cmp r3, #0
|
|
8005f6c: bfb8 it lt
|
|
8005f6e: 425b neglt r3, r3
|
|
8005f70: 429a cmp r2, r3
|
|
8005f72: bfcc ite gt
|
|
8005f74: 2301 movgt r3, #1
|
|
8005f76: 2300 movle r3, #0
|
|
8005f78: b2db uxtb r3, r3
|
|
8005f7a: 837b strh r3, [r7, #26]
|
|
if (steep) {
|
|
8005f7c: f9b7 301a ldrsh.w r3, [r7, #26]
|
|
8005f80: 2b00 cmp r3, #0
|
|
8005f82: d00b beq.n 8005f9c <ILI9341_writeLine+0x6c>
|
|
_swap_int16_t(x0, y0);
|
|
8005f84: 88fb ldrh r3, [r7, #6]
|
|
8005f86: 833b strh r3, [r7, #24]
|
|
8005f88: 88bb ldrh r3, [r7, #4]
|
|
8005f8a: 80fb strh r3, [r7, #6]
|
|
8005f8c: 8b3b ldrh r3, [r7, #24]
|
|
8005f8e: 80bb strh r3, [r7, #4]
|
|
_swap_int16_t(x1, y1);
|
|
8005f90: 887b ldrh r3, [r7, #2]
|
|
8005f92: 82fb strh r3, [r7, #22]
|
|
8005f94: 883b ldrh r3, [r7, #0]
|
|
8005f96: 807b strh r3, [r7, #2]
|
|
8005f98: 8afb ldrh r3, [r7, #22]
|
|
8005f9a: 803b strh r3, [r7, #0]
|
|
}
|
|
|
|
if (x0 > x1) {
|
|
8005f9c: f9b7 2006 ldrsh.w r2, [r7, #6]
|
|
8005fa0: f9b7 3002 ldrsh.w r3, [r7, #2]
|
|
8005fa4: 429a cmp r2, r3
|
|
8005fa6: dd0b ble.n 8005fc0 <ILI9341_writeLine+0x90>
|
|
_swap_int16_t(x0, x1);
|
|
8005fa8: 88fb ldrh r3, [r7, #6]
|
|
8005faa: 82bb strh r3, [r7, #20]
|
|
8005fac: 887b ldrh r3, [r7, #2]
|
|
8005fae: 80fb strh r3, [r7, #6]
|
|
8005fb0: 8abb ldrh r3, [r7, #20]
|
|
8005fb2: 807b strh r3, [r7, #2]
|
|
_swap_int16_t(y0, y1);
|
|
8005fb4: 88bb ldrh r3, [r7, #4]
|
|
8005fb6: 827b strh r3, [r7, #18]
|
|
8005fb8: 883b ldrh r3, [r7, #0]
|
|
8005fba: 80bb strh r3, [r7, #4]
|
|
8005fbc: 8a7b ldrh r3, [r7, #18]
|
|
8005fbe: 803b strh r3, [r7, #0]
|
|
}
|
|
|
|
int16_t dx, dy;
|
|
dx = x1 - x0;
|
|
8005fc0: 887a ldrh r2, [r7, #2]
|
|
8005fc2: 88fb ldrh r3, [r7, #6]
|
|
8005fc4: 1ad3 subs r3, r2, r3
|
|
8005fc6: b29b uxth r3, r3
|
|
8005fc8: 823b strh r3, [r7, #16]
|
|
dy = abs(y1 - y0);
|
|
8005fca: f9b7 2000 ldrsh.w r2, [r7]
|
|
8005fce: f9b7 3004 ldrsh.w r3, [r7, #4]
|
|
8005fd2: 1ad3 subs r3, r2, r3
|
|
8005fd4: 2b00 cmp r3, #0
|
|
8005fd6: bfb8 it lt
|
|
8005fd8: 425b neglt r3, r3
|
|
8005fda: 81fb strh r3, [r7, #14]
|
|
|
|
int16_t err = dx / 2;
|
|
8005fdc: f9b7 3010 ldrsh.w r3, [r7, #16]
|
|
8005fe0: 0fda lsrs r2, r3, #31
|
|
8005fe2: 4413 add r3, r2
|
|
8005fe4: 105b asrs r3, r3, #1
|
|
8005fe6: 83fb strh r3, [r7, #30]
|
|
int16_t ystep;
|
|
|
|
if (y0 < y1) {
|
|
8005fe8: f9b7 2004 ldrsh.w r2, [r7, #4]
|
|
8005fec: f9b7 3000 ldrsh.w r3, [r7]
|
|
8005ff0: 429a cmp r2, r3
|
|
8005ff2: da02 bge.n 8005ffa <ILI9341_writeLine+0xca>
|
|
ystep = 1;
|
|
8005ff4: 2301 movs r3, #1
|
|
8005ff6: 83bb strh r3, [r7, #28]
|
|
8005ff8: e031 b.n 800605e <ILI9341_writeLine+0x12e>
|
|
} else {
|
|
ystep = -1;
|
|
8005ffa: f64f 73ff movw r3, #65535 ; 0xffff
|
|
8005ffe: 83bb strh r3, [r7, #28]
|
|
}
|
|
|
|
for (; x0<=x1; x0++) {
|
|
8006000: e02d b.n 800605e <ILI9341_writeLine+0x12e>
|
|
if (steep) {
|
|
8006002: f9b7 301a ldrsh.w r3, [r7, #26]
|
|
8006006: 2b00 cmp r3, #0
|
|
8006008: d008 beq.n 800601c <ILI9341_writeLine+0xec>
|
|
ILI9341_writePixel(y0, x0, color);
|
|
800600a: 8e3a ldrh r2, [r7, #48] ; 0x30
|
|
800600c: f9b7 1006 ldrsh.w r1, [r7, #6]
|
|
8006010: f9b7 3004 ldrsh.w r3, [r7, #4]
|
|
8006014: 4618 mov r0, r3
|
|
8006016: f000 f9c3 bl 80063a0 <ILI9341_writePixel>
|
|
800601a: e007 b.n 800602c <ILI9341_writeLine+0xfc>
|
|
} else {
|
|
ILI9341_writePixel(x0, y0, color);
|
|
800601c: 8e3a ldrh r2, [r7, #48] ; 0x30
|
|
800601e: f9b7 1004 ldrsh.w r1, [r7, #4]
|
|
8006022: f9b7 3006 ldrsh.w r3, [r7, #6]
|
|
8006026: 4618 mov r0, r3
|
|
8006028: f000 f9ba bl 80063a0 <ILI9341_writePixel>
|
|
}
|
|
err -= dy;
|
|
800602c: 8bfa ldrh r2, [r7, #30]
|
|
800602e: 89fb ldrh r3, [r7, #14]
|
|
8006030: 1ad3 subs r3, r2, r3
|
|
8006032: b29b uxth r3, r3
|
|
8006034: 83fb strh r3, [r7, #30]
|
|
if (err < 0) {
|
|
8006036: f9b7 301e ldrsh.w r3, [r7, #30]
|
|
800603a: 2b00 cmp r3, #0
|
|
800603c: da09 bge.n 8006052 <ILI9341_writeLine+0x122>
|
|
y0 += ystep;
|
|
800603e: 88ba ldrh r2, [r7, #4]
|
|
8006040: 8bbb ldrh r3, [r7, #28]
|
|
8006042: 4413 add r3, r2
|
|
8006044: b29b uxth r3, r3
|
|
8006046: 80bb strh r3, [r7, #4]
|
|
err += dx;
|
|
8006048: 8bfa ldrh r2, [r7, #30]
|
|
800604a: 8a3b ldrh r3, [r7, #16]
|
|
800604c: 4413 add r3, r2
|
|
800604e: b29b uxth r3, r3
|
|
8006050: 83fb strh r3, [r7, #30]
|
|
for (; x0<=x1; x0++) {
|
|
8006052: f9b7 3006 ldrsh.w r3, [r7, #6]
|
|
8006056: b29b uxth r3, r3
|
|
8006058: 3301 adds r3, #1
|
|
800605a: b29b uxth r3, r3
|
|
800605c: 80fb strh r3, [r7, #6]
|
|
800605e: f9b7 2006 ldrsh.w r2, [r7, #6]
|
|
8006062: f9b7 3002 ldrsh.w r3, [r7, #2]
|
|
8006066: 429a cmp r2, r3
|
|
8006068: ddcb ble.n 8006002 <ILI9341_writeLine+0xd2>
|
|
}
|
|
}
|
|
}
|
|
800606a: bf00 nop
|
|
800606c: 3724 adds r7, #36 ; 0x24
|
|
800606e: 46bd mov sp, r7
|
|
8006070: bd90 pop {r4, r7, pc}
|
|
|
|
08006072 <ILI9341_DrawArrow>:
|
|
|
|
void ILI9341_DrawArrow(int16_t x1, int16_t y1, int16_t x2, int16_t y2, float k, uint16_t color)
|
|
{
|
|
8006072: b5f0 push {r4, r5, r6, r7, lr}
|
|
8006074: b08d sub sp, #52 ; 0x34
|
|
8006076: af02 add r7, sp, #8
|
|
8006078: 4604 mov r4, r0
|
|
800607a: 4608 mov r0, r1
|
|
800607c: 4611 mov r1, r2
|
|
800607e: 461a mov r2, r3
|
|
8006080: 4623 mov r3, r4
|
|
8006082: 80fb strh r3, [r7, #6]
|
|
8006084: 4603 mov r3, r0
|
|
8006086: 80bb strh r3, [r7, #4]
|
|
8006088: 460b mov r3, r1
|
|
800608a: 807b strh r3, [r7, #2]
|
|
800608c: 4613 mov r3, r2
|
|
800608e: 803b strh r3, [r7, #0]
|
|
float dx, dy, x2Outer,y2Outer,x3,y3,x4,y4;
|
|
|
|
dx = x2 + (x1 - x2) * k;
|
|
8006090: f9b7 3002 ldrsh.w r3, [r7, #2]
|
|
8006094: 4618 mov r0, r3
|
|
8006096: f7fa fd93 bl 8000bc0 <__aeabi_i2f>
|
|
800609a: 4604 mov r4, r0
|
|
800609c: f9b7 2006 ldrsh.w r2, [r7, #6]
|
|
80060a0: f9b7 3002 ldrsh.w r3, [r7, #2]
|
|
80060a4: 1ad3 subs r3, r2, r3
|
|
80060a6: 4618 mov r0, r3
|
|
80060a8: f7fa fd8a bl 8000bc0 <__aeabi_i2f>
|
|
80060ac: 4603 mov r3, r0
|
|
80060ae: 6c39 ldr r1, [r7, #64] ; 0x40
|
|
80060b0: 4618 mov r0, r3
|
|
80060b2: f7fa fdd9 bl 8000c68 <__aeabi_fmul>
|
|
80060b6: 4603 mov r3, r0
|
|
80060b8: 4619 mov r1, r3
|
|
80060ba: 4620 mov r0, r4
|
|
80060bc: f7fa fccc bl 8000a58 <__addsf3>
|
|
80060c0: 4603 mov r3, r0
|
|
80060c2: 627b str r3, [r7, #36] ; 0x24
|
|
dy = y2 + (y1 - y2) * k;
|
|
80060c4: f9b7 3000 ldrsh.w r3, [r7]
|
|
80060c8: 4618 mov r0, r3
|
|
80060ca: f7fa fd79 bl 8000bc0 <__aeabi_i2f>
|
|
80060ce: 4604 mov r4, r0
|
|
80060d0: f9b7 2004 ldrsh.w r2, [r7, #4]
|
|
80060d4: f9b7 3000 ldrsh.w r3, [r7]
|
|
80060d8: 1ad3 subs r3, r2, r3
|
|
80060da: 4618 mov r0, r3
|
|
80060dc: f7fa fd70 bl 8000bc0 <__aeabi_i2f>
|
|
80060e0: 4603 mov r3, r0
|
|
80060e2: 6c39 ldr r1, [r7, #64] ; 0x40
|
|
80060e4: 4618 mov r0, r3
|
|
80060e6: f7fa fdbf bl 8000c68 <__aeabi_fmul>
|
|
80060ea: 4603 mov r3, r0
|
|
80060ec: 4619 mov r1, r3
|
|
80060ee: 4620 mov r0, r4
|
|
80060f0: f7fa fcb2 bl 8000a58 <__addsf3>
|
|
80060f4: 4603 mov r3, r0
|
|
80060f6: 623b str r3, [r7, #32]
|
|
|
|
x2Outer = x2 - dx;
|
|
80060f8: f9b7 3002 ldrsh.w r3, [r7, #2]
|
|
80060fc: 4618 mov r0, r3
|
|
80060fe: f7fa fd5f bl 8000bc0 <__aeabi_i2f>
|
|
8006102: 4603 mov r3, r0
|
|
8006104: 6a79 ldr r1, [r7, #36] ; 0x24
|
|
8006106: 4618 mov r0, r3
|
|
8006108: f7fa fca4 bl 8000a54 <__aeabi_fsub>
|
|
800610c: 4603 mov r3, r0
|
|
800610e: 61fb str r3, [r7, #28]
|
|
y2Outer = dy - y2;
|
|
8006110: f9b7 3000 ldrsh.w r3, [r7]
|
|
8006114: 4618 mov r0, r3
|
|
8006116: f7fa fd53 bl 8000bc0 <__aeabi_i2f>
|
|
800611a: 4603 mov r3, r0
|
|
800611c: 4619 mov r1, r3
|
|
800611e: 6a38 ldr r0, [r7, #32]
|
|
8006120: f7fa fc98 bl 8000a54 <__aeabi_fsub>
|
|
8006124: 4603 mov r3, r0
|
|
8006126: 61bb str r3, [r7, #24]
|
|
x3 = y2Outer * k + dx;
|
|
8006128: 6c39 ldr r1, [r7, #64] ; 0x40
|
|
800612a: 69b8 ldr r0, [r7, #24]
|
|
800612c: f7fa fd9c bl 8000c68 <__aeabi_fmul>
|
|
8006130: 4603 mov r3, r0
|
|
8006132: 4619 mov r1, r3
|
|
8006134: 6a78 ldr r0, [r7, #36] ; 0x24
|
|
8006136: f7fa fc8f bl 8000a58 <__addsf3>
|
|
800613a: 4603 mov r3, r0
|
|
800613c: 617b str r3, [r7, #20]
|
|
y3 = x2Outer * k + dy;
|
|
800613e: 6c39 ldr r1, [r7, #64] ; 0x40
|
|
8006140: 69f8 ldr r0, [r7, #28]
|
|
8006142: f7fa fd91 bl 8000c68 <__aeabi_fmul>
|
|
8006146: 4603 mov r3, r0
|
|
8006148: 4619 mov r1, r3
|
|
800614a: 6a38 ldr r0, [r7, #32]
|
|
800614c: f7fa fc84 bl 8000a58 <__addsf3>
|
|
8006150: 4603 mov r3, r0
|
|
8006152: 613b str r3, [r7, #16]
|
|
x4 = dx - y2Outer * k;
|
|
8006154: 6c39 ldr r1, [r7, #64] ; 0x40
|
|
8006156: 69b8 ldr r0, [r7, #24]
|
|
8006158: f7fa fd86 bl 8000c68 <__aeabi_fmul>
|
|
800615c: 4603 mov r3, r0
|
|
800615e: 4619 mov r1, r3
|
|
8006160: 6a78 ldr r0, [r7, #36] ; 0x24
|
|
8006162: f7fa fc77 bl 8000a54 <__aeabi_fsub>
|
|
8006166: 4603 mov r3, r0
|
|
8006168: 60fb str r3, [r7, #12]
|
|
y4 = dy - x2Outer * k;
|
|
800616a: 6c39 ldr r1, [r7, #64] ; 0x40
|
|
800616c: 69f8 ldr r0, [r7, #28]
|
|
800616e: f7fa fd7b bl 8000c68 <__aeabi_fmul>
|
|
8006172: 4603 mov r3, r0
|
|
8006174: 4619 mov r1, r3
|
|
8006176: 6a38 ldr r0, [r7, #32]
|
|
8006178: f7fa fc6c bl 8000a54 <__aeabi_fsub>
|
|
800617c: 4603 mov r3, r0
|
|
800617e: 60bb str r3, [r7, #8]
|
|
ILI9341_writeLine(round(x1), round(y1), round(x2), round(y2), color);
|
|
8006180: f9b7 3006 ldrsh.w r3, [r7, #6]
|
|
8006184: 4618 mov r0, r3
|
|
8006186: f7fa f935 bl 80003f4 <__aeabi_i2d>
|
|
800618a: 4603 mov r3, r0
|
|
800618c: 460c mov r4, r1
|
|
800618e: 4618 mov r0, r3
|
|
8006190: 4621 mov r1, r4
|
|
8006192: f7fa fc33 bl 80009fc <__aeabi_d2iz>
|
|
8006196: 4603 mov r3, r0
|
|
8006198: b21c sxth r4, r3
|
|
800619a: f9b7 3004 ldrsh.w r3, [r7, #4]
|
|
800619e: 4618 mov r0, r3
|
|
80061a0: f7fa f928 bl 80003f4 <__aeabi_i2d>
|
|
80061a4: 4602 mov r2, r0
|
|
80061a6: 460b mov r3, r1
|
|
80061a8: 4610 mov r0, r2
|
|
80061aa: 4619 mov r1, r3
|
|
80061ac: f7fa fc26 bl 80009fc <__aeabi_d2iz>
|
|
80061b0: 4603 mov r3, r0
|
|
80061b2: b21d sxth r5, r3
|
|
80061b4: f9b7 3002 ldrsh.w r3, [r7, #2]
|
|
80061b8: 4618 mov r0, r3
|
|
80061ba: f7fa f91b bl 80003f4 <__aeabi_i2d>
|
|
80061be: 4602 mov r2, r0
|
|
80061c0: 460b mov r3, r1
|
|
80061c2: 4610 mov r0, r2
|
|
80061c4: 4619 mov r1, r3
|
|
80061c6: f7fa fc19 bl 80009fc <__aeabi_d2iz>
|
|
80061ca: 4603 mov r3, r0
|
|
80061cc: b21e sxth r6, r3
|
|
80061ce: f9b7 3000 ldrsh.w r3, [r7]
|
|
80061d2: 4618 mov r0, r3
|
|
80061d4: f7fa f90e bl 80003f4 <__aeabi_i2d>
|
|
80061d8: 4602 mov r2, r0
|
|
80061da: 460b mov r3, r1
|
|
80061dc: 4610 mov r0, r2
|
|
80061de: 4619 mov r1, r3
|
|
80061e0: f7fa fc0c bl 80009fc <__aeabi_d2iz>
|
|
80061e4: 4603 mov r3, r0
|
|
80061e6: b21a sxth r2, r3
|
|
80061e8: f8b7 3044 ldrh.w r3, [r7, #68] ; 0x44
|
|
80061ec: 9300 str r3, [sp, #0]
|
|
80061ee: 4613 mov r3, r2
|
|
80061f0: 4632 mov r2, r6
|
|
80061f2: 4629 mov r1, r5
|
|
80061f4: 4620 mov r0, r4
|
|
80061f6: f7ff fe9b bl 8005f30 <ILI9341_writeLine>
|
|
ILI9341_writeLine(round(x1), round(y1), round(dx), round(dy), color);
|
|
80061fa: f9b7 3006 ldrsh.w r3, [r7, #6]
|
|
80061fe: 4618 mov r0, r3
|
|
8006200: f7fa f8f8 bl 80003f4 <__aeabi_i2d>
|
|
8006204: 4603 mov r3, r0
|
|
8006206: 460c mov r4, r1
|
|
8006208: 4618 mov r0, r3
|
|
800620a: 4621 mov r1, r4
|
|
800620c: f7fa fbf6 bl 80009fc <__aeabi_d2iz>
|
|
8006210: 4603 mov r3, r0
|
|
8006212: b21c sxth r4, r3
|
|
8006214: f9b7 3004 ldrsh.w r3, [r7, #4]
|
|
8006218: 4618 mov r0, r3
|
|
800621a: f7fa f8eb bl 80003f4 <__aeabi_i2d>
|
|
800621e: 4602 mov r2, r0
|
|
8006220: 460b mov r3, r1
|
|
8006222: 4610 mov r0, r2
|
|
8006224: 4619 mov r1, r3
|
|
8006226: f7fa fbe9 bl 80009fc <__aeabi_d2iz>
|
|
800622a: 4603 mov r3, r0
|
|
800622c: b21d sxth r5, r3
|
|
800622e: 6a78 ldr r0, [r7, #36] ; 0x24
|
|
8006230: f7fa f8f2 bl 8000418 <__aeabi_f2d>
|
|
8006234: 4602 mov r2, r0
|
|
8006236: 460b mov r3, r1
|
|
8006238: 4610 mov r0, r2
|
|
800623a: 4619 mov r1, r3
|
|
800623c: f005 f9c2 bl 800b5c4 <round>
|
|
8006240: 4602 mov r2, r0
|
|
8006242: 460b mov r3, r1
|
|
8006244: 4610 mov r0, r2
|
|
8006246: 4619 mov r1, r3
|
|
8006248: f7fa fbd8 bl 80009fc <__aeabi_d2iz>
|
|
800624c: 4603 mov r3, r0
|
|
800624e: b21e sxth r6, r3
|
|
8006250: 6a38 ldr r0, [r7, #32]
|
|
8006252: f7fa f8e1 bl 8000418 <__aeabi_f2d>
|
|
8006256: 4602 mov r2, r0
|
|
8006258: 460b mov r3, r1
|
|
800625a: 4610 mov r0, r2
|
|
800625c: 4619 mov r1, r3
|
|
800625e: f005 f9b1 bl 800b5c4 <round>
|
|
8006262: 4602 mov r2, r0
|
|
8006264: 460b mov r3, r1
|
|
8006266: 4610 mov r0, r2
|
|
8006268: 4619 mov r1, r3
|
|
800626a: f7fa fbc7 bl 80009fc <__aeabi_d2iz>
|
|
800626e: 4603 mov r3, r0
|
|
8006270: b21a sxth r2, r3
|
|
8006272: f8b7 3044 ldrh.w r3, [r7, #68] ; 0x44
|
|
8006276: 9300 str r3, [sp, #0]
|
|
8006278: 4613 mov r3, r2
|
|
800627a: 4632 mov r2, r6
|
|
800627c: 4629 mov r1, r5
|
|
800627e: 4620 mov r0, r4
|
|
8006280: f7ff fe56 bl 8005f30 <ILI9341_writeLine>
|
|
ILI9341_writeLine(round(x3), round(y3), round(x2), round(y2), color);
|
|
8006284: 6978 ldr r0, [r7, #20]
|
|
8006286: f7fa f8c7 bl 8000418 <__aeabi_f2d>
|
|
800628a: 4603 mov r3, r0
|
|
800628c: 460c mov r4, r1
|
|
800628e: 4618 mov r0, r3
|
|
8006290: 4621 mov r1, r4
|
|
8006292: f005 f997 bl 800b5c4 <round>
|
|
8006296: 4603 mov r3, r0
|
|
8006298: 460c mov r4, r1
|
|
800629a: 4618 mov r0, r3
|
|
800629c: 4621 mov r1, r4
|
|
800629e: f7fa fbad bl 80009fc <__aeabi_d2iz>
|
|
80062a2: 4603 mov r3, r0
|
|
80062a4: b21c sxth r4, r3
|
|
80062a6: 6938 ldr r0, [r7, #16]
|
|
80062a8: f7fa f8b6 bl 8000418 <__aeabi_f2d>
|
|
80062ac: 4602 mov r2, r0
|
|
80062ae: 460b mov r3, r1
|
|
80062b0: 4610 mov r0, r2
|
|
80062b2: 4619 mov r1, r3
|
|
80062b4: f005 f986 bl 800b5c4 <round>
|
|
80062b8: 4602 mov r2, r0
|
|
80062ba: 460b mov r3, r1
|
|
80062bc: 4610 mov r0, r2
|
|
80062be: 4619 mov r1, r3
|
|
80062c0: f7fa fb9c bl 80009fc <__aeabi_d2iz>
|
|
80062c4: 4603 mov r3, r0
|
|
80062c6: b21d sxth r5, r3
|
|
80062c8: f9b7 3002 ldrsh.w r3, [r7, #2]
|
|
80062cc: 4618 mov r0, r3
|
|
80062ce: f7fa f891 bl 80003f4 <__aeabi_i2d>
|
|
80062d2: 4602 mov r2, r0
|
|
80062d4: 460b mov r3, r1
|
|
80062d6: 4610 mov r0, r2
|
|
80062d8: 4619 mov r1, r3
|
|
80062da: f7fa fb8f bl 80009fc <__aeabi_d2iz>
|
|
80062de: 4603 mov r3, r0
|
|
80062e0: b21e sxth r6, r3
|
|
80062e2: f9b7 3000 ldrsh.w r3, [r7]
|
|
80062e6: 4618 mov r0, r3
|
|
80062e8: f7fa f884 bl 80003f4 <__aeabi_i2d>
|
|
80062ec: 4602 mov r2, r0
|
|
80062ee: 460b mov r3, r1
|
|
80062f0: 4610 mov r0, r2
|
|
80062f2: 4619 mov r1, r3
|
|
80062f4: f7fa fb82 bl 80009fc <__aeabi_d2iz>
|
|
80062f8: 4603 mov r3, r0
|
|
80062fa: b21a sxth r2, r3
|
|
80062fc: f8b7 3044 ldrh.w r3, [r7, #68] ; 0x44
|
|
8006300: 9300 str r3, [sp, #0]
|
|
8006302: 4613 mov r3, r2
|
|
8006304: 4632 mov r2, r6
|
|
8006306: 4629 mov r1, r5
|
|
8006308: 4620 mov r0, r4
|
|
800630a: f7ff fe11 bl 8005f30 <ILI9341_writeLine>
|
|
ILI9341_writeLine(round(x2), round(y2), round(x4), round(y4), color);
|
|
800630e: f9b7 3002 ldrsh.w r3, [r7, #2]
|
|
8006312: 4618 mov r0, r3
|
|
8006314: f7fa f86e bl 80003f4 <__aeabi_i2d>
|
|
8006318: 4603 mov r3, r0
|
|
800631a: 460c mov r4, r1
|
|
800631c: 4618 mov r0, r3
|
|
800631e: 4621 mov r1, r4
|
|
8006320: f7fa fb6c bl 80009fc <__aeabi_d2iz>
|
|
8006324: 4603 mov r3, r0
|
|
8006326: b21c sxth r4, r3
|
|
8006328: f9b7 3000 ldrsh.w r3, [r7]
|
|
800632c: 4618 mov r0, r3
|
|
800632e: f7fa f861 bl 80003f4 <__aeabi_i2d>
|
|
8006332: 4602 mov r2, r0
|
|
8006334: 460b mov r3, r1
|
|
8006336: 4610 mov r0, r2
|
|
8006338: 4619 mov r1, r3
|
|
800633a: f7fa fb5f bl 80009fc <__aeabi_d2iz>
|
|
800633e: 4603 mov r3, r0
|
|
8006340: b21d sxth r5, r3
|
|
8006342: 68f8 ldr r0, [r7, #12]
|
|
8006344: f7fa f868 bl 8000418 <__aeabi_f2d>
|
|
8006348: 4602 mov r2, r0
|
|
800634a: 460b mov r3, r1
|
|
800634c: 4610 mov r0, r2
|
|
800634e: 4619 mov r1, r3
|
|
8006350: f005 f938 bl 800b5c4 <round>
|
|
8006354: 4602 mov r2, r0
|
|
8006356: 460b mov r3, r1
|
|
8006358: 4610 mov r0, r2
|
|
800635a: 4619 mov r1, r3
|
|
800635c: f7fa fb4e bl 80009fc <__aeabi_d2iz>
|
|
8006360: 4603 mov r3, r0
|
|
8006362: b21e sxth r6, r3
|
|
8006364: 68b8 ldr r0, [r7, #8]
|
|
8006366: f7fa f857 bl 8000418 <__aeabi_f2d>
|
|
800636a: 4602 mov r2, r0
|
|
800636c: 460b mov r3, r1
|
|
800636e: 4610 mov r0, r2
|
|
8006370: 4619 mov r1, r3
|
|
8006372: f005 f927 bl 800b5c4 <round>
|
|
8006376: 4602 mov r2, r0
|
|
8006378: 460b mov r3, r1
|
|
800637a: 4610 mov r0, r2
|
|
800637c: 4619 mov r1, r3
|
|
800637e: f7fa fb3d bl 80009fc <__aeabi_d2iz>
|
|
8006382: 4603 mov r3, r0
|
|
8006384: b21a sxth r2, r3
|
|
8006386: f8b7 3044 ldrh.w r3, [r7, #68] ; 0x44
|
|
800638a: 9300 str r3, [sp, #0]
|
|
800638c: 4613 mov r3, r2
|
|
800638e: 4632 mov r2, r6
|
|
8006390: 4629 mov r1, r5
|
|
8006392: 4620 mov r0, r4
|
|
8006394: f7ff fdcc bl 8005f30 <ILI9341_writeLine>
|
|
}
|
|
8006398: bf00 nop
|
|
800639a: 372c adds r7, #44 ; 0x2c
|
|
800639c: 46bd mov sp, r7
|
|
800639e: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
080063a0 <ILI9341_writePixel>:
|
|
// Can be just writeLine(x, y, x, y+h-1, color);
|
|
// or writeFillRect(x, y, 1, h, color);
|
|
ILI9341_drawFastVLine(x, y, h, color);
|
|
}
|
|
|
|
void ILI9341_writePixel(int16_t x, int16_t y, uint16_t color){
|
|
80063a0: b580 push {r7, lr}
|
|
80063a2: b082 sub sp, #8
|
|
80063a4: af00 add r7, sp, #0
|
|
80063a6: 4603 mov r3, r0
|
|
80063a8: 80fb strh r3, [r7, #6]
|
|
80063aa: 460b mov r3, r1
|
|
80063ac: 80bb strh r3, [r7, #4]
|
|
80063ae: 4613 mov r3, r2
|
|
80063b0: 807b strh r3, [r7, #2]
|
|
ILI9341_DrawPixel(x, y, color);
|
|
80063b2: 88fb ldrh r3, [r7, #6]
|
|
80063b4: 88b9 ldrh r1, [r7, #4]
|
|
80063b6: 887a ldrh r2, [r7, #2]
|
|
80063b8: 4618 mov r0, r3
|
|
80063ba: f7ff fc59 bl 8005c70 <ILI9341_DrawPixel>
|
|
}
|
|
80063be: bf00 nop
|
|
80063c0: 3708 adds r7, #8
|
|
80063c2: 46bd mov sp, r7
|
|
80063c4: bd80 pop {r7, pc}
|
|
|
|
080063c6 <ILI9341_drawCircle>:
|
|
ILI9341_drawCircleHelper(x+w-r-1, y+h-r-1, r, 4, color);
|
|
ILI9341_drawCircleHelper(x+r , y+h-r-1, r, 8, color);
|
|
ILI9341_Unselect();
|
|
}
|
|
|
|
void ILI9341_drawCircle(int16_t x0, int16_t y0, int16_t r, uint16_t color) {
|
|
80063c6: b590 push {r4, r7, lr}
|
|
80063c8: b087 sub sp, #28
|
|
80063ca: af00 add r7, sp, #0
|
|
80063cc: 4604 mov r4, r0
|
|
80063ce: 4608 mov r0, r1
|
|
80063d0: 4611 mov r1, r2
|
|
80063d2: 461a mov r2, r3
|
|
80063d4: 4623 mov r3, r4
|
|
80063d6: 80fb strh r3, [r7, #6]
|
|
80063d8: 4603 mov r3, r0
|
|
80063da: 80bb strh r3, [r7, #4]
|
|
80063dc: 460b mov r3, r1
|
|
80063de: 807b strh r3, [r7, #2]
|
|
80063e0: 4613 mov r3, r2
|
|
80063e2: 803b strh r3, [r7, #0]
|
|
int16_t f = 1 - r;
|
|
80063e4: 887b ldrh r3, [r7, #2]
|
|
80063e6: f1c3 0301 rsb r3, r3, #1
|
|
80063ea: b29b uxth r3, r3
|
|
80063ec: 82fb strh r3, [r7, #22]
|
|
int16_t ddF_x = 1;
|
|
80063ee: 2301 movs r3, #1
|
|
80063f0: 82bb strh r3, [r7, #20]
|
|
int16_t ddF_y = -2 * r;
|
|
80063f2: 887b ldrh r3, [r7, #2]
|
|
80063f4: 461a mov r2, r3
|
|
80063f6: 03d2 lsls r2, r2, #15
|
|
80063f8: 1ad3 subs r3, r2, r3
|
|
80063fa: 005b lsls r3, r3, #1
|
|
80063fc: b29b uxth r3, r3
|
|
80063fe: 827b strh r3, [r7, #18]
|
|
int16_t x = 0;
|
|
8006400: 2300 movs r3, #0
|
|
8006402: 823b strh r3, [r7, #16]
|
|
int16_t y = r;
|
|
8006404: 887b ldrh r3, [r7, #2]
|
|
8006406: 81fb strh r3, [r7, #14]
|
|
|
|
ILI9341_Select();
|
|
8006408: f7ff fa40 bl 800588c <ILI9341_Select>
|
|
ILI9341_writePixel(x0 , y0+r, color);
|
|
800640c: 88ba ldrh r2, [r7, #4]
|
|
800640e: 887b ldrh r3, [r7, #2]
|
|
8006410: 4413 add r3, r2
|
|
8006412: b29b uxth r3, r3
|
|
8006414: b219 sxth r1, r3
|
|
8006416: 883a ldrh r2, [r7, #0]
|
|
8006418: f9b7 3006 ldrsh.w r3, [r7, #6]
|
|
800641c: 4618 mov r0, r3
|
|
800641e: f7ff ffbf bl 80063a0 <ILI9341_writePixel>
|
|
ILI9341_writePixel(x0 , y0-r, color);
|
|
8006422: 88ba ldrh r2, [r7, #4]
|
|
8006424: 887b ldrh r3, [r7, #2]
|
|
8006426: 1ad3 subs r3, r2, r3
|
|
8006428: b29b uxth r3, r3
|
|
800642a: b219 sxth r1, r3
|
|
800642c: 883a ldrh r2, [r7, #0]
|
|
800642e: f9b7 3006 ldrsh.w r3, [r7, #6]
|
|
8006432: 4618 mov r0, r3
|
|
8006434: f7ff ffb4 bl 80063a0 <ILI9341_writePixel>
|
|
ILI9341_writePixel(x0+r, y0 , color);
|
|
8006438: 88fa ldrh r2, [r7, #6]
|
|
800643a: 887b ldrh r3, [r7, #2]
|
|
800643c: 4413 add r3, r2
|
|
800643e: b29b uxth r3, r3
|
|
8006440: b21b sxth r3, r3
|
|
8006442: 883a ldrh r2, [r7, #0]
|
|
8006444: f9b7 1004 ldrsh.w r1, [r7, #4]
|
|
8006448: 4618 mov r0, r3
|
|
800644a: f7ff ffa9 bl 80063a0 <ILI9341_writePixel>
|
|
ILI9341_writePixel(x0-r, y0 , color);
|
|
800644e: 88fa ldrh r2, [r7, #6]
|
|
8006450: 887b ldrh r3, [r7, #2]
|
|
8006452: 1ad3 subs r3, r2, r3
|
|
8006454: b29b uxth r3, r3
|
|
8006456: b21b sxth r3, r3
|
|
8006458: 883a ldrh r2, [r7, #0]
|
|
800645a: f9b7 1004 ldrsh.w r1, [r7, #4]
|
|
800645e: 4618 mov r0, r3
|
|
8006460: f7ff ff9e bl 80063a0 <ILI9341_writePixel>
|
|
|
|
while (x<y) {
|
|
8006464: e091 b.n 800658a <ILI9341_drawCircle+0x1c4>
|
|
if (f >= 0) {
|
|
8006466: f9b7 3016 ldrsh.w r3, [r7, #22]
|
|
800646a: 2b00 cmp r3, #0
|
|
800646c: db0e blt.n 800648c <ILI9341_drawCircle+0xc6>
|
|
y--;
|
|
800646e: f9b7 300e ldrsh.w r3, [r7, #14]
|
|
8006472: b29b uxth r3, r3
|
|
8006474: 3b01 subs r3, #1
|
|
8006476: b29b uxth r3, r3
|
|
8006478: 81fb strh r3, [r7, #14]
|
|
ddF_y += 2;
|
|
800647a: 8a7b ldrh r3, [r7, #18]
|
|
800647c: 3302 adds r3, #2
|
|
800647e: b29b uxth r3, r3
|
|
8006480: 827b strh r3, [r7, #18]
|
|
f += ddF_y;
|
|
8006482: 8afa ldrh r2, [r7, #22]
|
|
8006484: 8a7b ldrh r3, [r7, #18]
|
|
8006486: 4413 add r3, r2
|
|
8006488: b29b uxth r3, r3
|
|
800648a: 82fb strh r3, [r7, #22]
|
|
}
|
|
x++;
|
|
800648c: f9b7 3010 ldrsh.w r3, [r7, #16]
|
|
8006490: b29b uxth r3, r3
|
|
8006492: 3301 adds r3, #1
|
|
8006494: b29b uxth r3, r3
|
|
8006496: 823b strh r3, [r7, #16]
|
|
ddF_x += 2;
|
|
8006498: 8abb ldrh r3, [r7, #20]
|
|
800649a: 3302 adds r3, #2
|
|
800649c: b29b uxth r3, r3
|
|
800649e: 82bb strh r3, [r7, #20]
|
|
f += ddF_x;
|
|
80064a0: 8afa ldrh r2, [r7, #22]
|
|
80064a2: 8abb ldrh r3, [r7, #20]
|
|
80064a4: 4413 add r3, r2
|
|
80064a6: b29b uxth r3, r3
|
|
80064a8: 82fb strh r3, [r7, #22]
|
|
|
|
ILI9341_writePixel(x0 + x, y0 + y, color);
|
|
80064aa: 88fa ldrh r2, [r7, #6]
|
|
80064ac: 8a3b ldrh r3, [r7, #16]
|
|
80064ae: 4413 add r3, r2
|
|
80064b0: b29b uxth r3, r3
|
|
80064b2: b218 sxth r0, r3
|
|
80064b4: 88ba ldrh r2, [r7, #4]
|
|
80064b6: 89fb ldrh r3, [r7, #14]
|
|
80064b8: 4413 add r3, r2
|
|
80064ba: b29b uxth r3, r3
|
|
80064bc: b21b sxth r3, r3
|
|
80064be: 883a ldrh r2, [r7, #0]
|
|
80064c0: 4619 mov r1, r3
|
|
80064c2: f7ff ff6d bl 80063a0 <ILI9341_writePixel>
|
|
ILI9341_writePixel(x0 - x, y0 + y, color);
|
|
80064c6: 88fa ldrh r2, [r7, #6]
|
|
80064c8: 8a3b ldrh r3, [r7, #16]
|
|
80064ca: 1ad3 subs r3, r2, r3
|
|
80064cc: b29b uxth r3, r3
|
|
80064ce: b218 sxth r0, r3
|
|
80064d0: 88ba ldrh r2, [r7, #4]
|
|
80064d2: 89fb ldrh r3, [r7, #14]
|
|
80064d4: 4413 add r3, r2
|
|
80064d6: b29b uxth r3, r3
|
|
80064d8: b21b sxth r3, r3
|
|
80064da: 883a ldrh r2, [r7, #0]
|
|
80064dc: 4619 mov r1, r3
|
|
80064de: f7ff ff5f bl 80063a0 <ILI9341_writePixel>
|
|
ILI9341_writePixel(x0 + x, y0 - y, color);
|
|
80064e2: 88fa ldrh r2, [r7, #6]
|
|
80064e4: 8a3b ldrh r3, [r7, #16]
|
|
80064e6: 4413 add r3, r2
|
|
80064e8: b29b uxth r3, r3
|
|
80064ea: b218 sxth r0, r3
|
|
80064ec: 88ba ldrh r2, [r7, #4]
|
|
80064ee: 89fb ldrh r3, [r7, #14]
|
|
80064f0: 1ad3 subs r3, r2, r3
|
|
80064f2: b29b uxth r3, r3
|
|
80064f4: b21b sxth r3, r3
|
|
80064f6: 883a ldrh r2, [r7, #0]
|
|
80064f8: 4619 mov r1, r3
|
|
80064fa: f7ff ff51 bl 80063a0 <ILI9341_writePixel>
|
|
ILI9341_writePixel(x0 - x, y0 - y, color);
|
|
80064fe: 88fa ldrh r2, [r7, #6]
|
|
8006500: 8a3b ldrh r3, [r7, #16]
|
|
8006502: 1ad3 subs r3, r2, r3
|
|
8006504: b29b uxth r3, r3
|
|
8006506: b218 sxth r0, r3
|
|
8006508: 88ba ldrh r2, [r7, #4]
|
|
800650a: 89fb ldrh r3, [r7, #14]
|
|
800650c: 1ad3 subs r3, r2, r3
|
|
800650e: b29b uxth r3, r3
|
|
8006510: b21b sxth r3, r3
|
|
8006512: 883a ldrh r2, [r7, #0]
|
|
8006514: 4619 mov r1, r3
|
|
8006516: f7ff ff43 bl 80063a0 <ILI9341_writePixel>
|
|
ILI9341_writePixel(x0 + y, y0 + x, color);
|
|
800651a: 88fa ldrh r2, [r7, #6]
|
|
800651c: 89fb ldrh r3, [r7, #14]
|
|
800651e: 4413 add r3, r2
|
|
8006520: b29b uxth r3, r3
|
|
8006522: b218 sxth r0, r3
|
|
8006524: 88ba ldrh r2, [r7, #4]
|
|
8006526: 8a3b ldrh r3, [r7, #16]
|
|
8006528: 4413 add r3, r2
|
|
800652a: b29b uxth r3, r3
|
|
800652c: b21b sxth r3, r3
|
|
800652e: 883a ldrh r2, [r7, #0]
|
|
8006530: 4619 mov r1, r3
|
|
8006532: f7ff ff35 bl 80063a0 <ILI9341_writePixel>
|
|
ILI9341_writePixel(x0 - y, y0 + x, color);
|
|
8006536: 88fa ldrh r2, [r7, #6]
|
|
8006538: 89fb ldrh r3, [r7, #14]
|
|
800653a: 1ad3 subs r3, r2, r3
|
|
800653c: b29b uxth r3, r3
|
|
800653e: b218 sxth r0, r3
|
|
8006540: 88ba ldrh r2, [r7, #4]
|
|
8006542: 8a3b ldrh r3, [r7, #16]
|
|
8006544: 4413 add r3, r2
|
|
8006546: b29b uxth r3, r3
|
|
8006548: b21b sxth r3, r3
|
|
800654a: 883a ldrh r2, [r7, #0]
|
|
800654c: 4619 mov r1, r3
|
|
800654e: f7ff ff27 bl 80063a0 <ILI9341_writePixel>
|
|
ILI9341_writePixel(x0 + y, y0 - x, color);
|
|
8006552: 88fa ldrh r2, [r7, #6]
|
|
8006554: 89fb ldrh r3, [r7, #14]
|
|
8006556: 4413 add r3, r2
|
|
8006558: b29b uxth r3, r3
|
|
800655a: b218 sxth r0, r3
|
|
800655c: 88ba ldrh r2, [r7, #4]
|
|
800655e: 8a3b ldrh r3, [r7, #16]
|
|
8006560: 1ad3 subs r3, r2, r3
|
|
8006562: b29b uxth r3, r3
|
|
8006564: b21b sxth r3, r3
|
|
8006566: 883a ldrh r2, [r7, #0]
|
|
8006568: 4619 mov r1, r3
|
|
800656a: f7ff ff19 bl 80063a0 <ILI9341_writePixel>
|
|
ILI9341_writePixel(x0 - y, y0 - x, color);
|
|
800656e: 88fa ldrh r2, [r7, #6]
|
|
8006570: 89fb ldrh r3, [r7, #14]
|
|
8006572: 1ad3 subs r3, r2, r3
|
|
8006574: b29b uxth r3, r3
|
|
8006576: b218 sxth r0, r3
|
|
8006578: 88ba ldrh r2, [r7, #4]
|
|
800657a: 8a3b ldrh r3, [r7, #16]
|
|
800657c: 1ad3 subs r3, r2, r3
|
|
800657e: b29b uxth r3, r3
|
|
8006580: b21b sxth r3, r3
|
|
8006582: 883a ldrh r2, [r7, #0]
|
|
8006584: 4619 mov r1, r3
|
|
8006586: f7ff ff0b bl 80063a0 <ILI9341_writePixel>
|
|
while (x<y) {
|
|
800658a: f9b7 2010 ldrsh.w r2, [r7, #16]
|
|
800658e: f9b7 300e ldrsh.w r3, [r7, #14]
|
|
8006592: 429a cmp r2, r3
|
|
8006594: f6ff af67 blt.w 8006466 <ILI9341_drawCircle+0xa0>
|
|
}
|
|
ILI9341_Unselect();
|
|
8006598: f7ff f984 bl 80058a4 <ILI9341_Unselect>
|
|
}
|
|
800659c: bf00 nop
|
|
800659e: 371c adds r7, #28
|
|
80065a0: 46bd mov sp, r7
|
|
80065a2: bd90 pop {r4, r7, pc}
|
|
|
|
080065a4 <ILI9341_FillScreen>:
|
|
|
|
|
|
void ILI9341_FillScreen(uint16_t color) {
|
|
80065a4: b580 push {r7, lr}
|
|
80065a6: b084 sub sp, #16
|
|
80065a8: af02 add r7, sp, #8
|
|
80065aa: 4603 mov r3, r0
|
|
80065ac: 80fb strh r3, [r7, #6]
|
|
ILI9341_FillRectangle(0, 0, ILI9341_WIDTH, ILI9341_HEIGHT, color);
|
|
80065ae: 88fb ldrh r3, [r7, #6]
|
|
80065b0: 9300 str r3, [sp, #0]
|
|
80065b2: 23f0 movs r3, #240 ; 0xf0
|
|
80065b4: f44f 72a0 mov.w r2, #320 ; 0x140
|
|
80065b8: 2100 movs r1, #0
|
|
80065ba: 2000 movs r0, #0
|
|
80065bc: f7ff fc48 bl 8005e50 <ILI9341_FillRectangle>
|
|
}
|
|
80065c0: bf00 nop
|
|
80065c2: 3708 adds r7, #8
|
|
80065c4: 46bd mov sp, r7
|
|
80065c6: bd80 pop {r7, pc}
|
|
|
|
080065c8 <ILI9341_TouchUnselect>:
|
|
|
|
static void ILI9341_TouchSelect() {
|
|
HAL_GPIO_WritePin(ILI9341_TOUCH_CS_GPIO_Port, ILI9341_TOUCH_CS_Pin, GPIO_PIN_RESET);
|
|
}
|
|
|
|
void ILI9341_TouchUnselect() {
|
|
80065c8: b580 push {r7, lr}
|
|
80065ca: af00 add r7, sp, #0
|
|
HAL_GPIO_WritePin(ILI9341_TOUCH_CS_GPIO_Port, ILI9341_TOUCH_CS_Pin, GPIO_PIN_SET);
|
|
80065cc: 2201 movs r2, #1
|
|
80065ce: f44f 6180 mov.w r1, #1024 ; 0x400
|
|
80065d2: 4802 ldr r0, [pc, #8] ; (80065dc <ILI9341_TouchUnselect+0x14>)
|
|
80065d4: f7fb f811 bl 80015fa <HAL_GPIO_WritePin>
|
|
}
|
|
80065d8: bf00 nop
|
|
80065da: bd80 pop {r7, pc}
|
|
80065dc: 40010800 .word 0x40010800
|
|
|
|
080065e0 <USBD_CDC_Init>:
|
|
* @param pdev: device instance
|
|
* @param cfgidx: Configuration index
|
|
* @retval status
|
|
*/
|
|
static uint8_t USBD_CDC_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
|
|
{
|
|
80065e0: b580 push {r7, lr}
|
|
80065e2: b084 sub sp, #16
|
|
80065e4: af00 add r7, sp, #0
|
|
80065e6: 6078 str r0, [r7, #4]
|
|
80065e8: 460b mov r3, r1
|
|
80065ea: 70fb strb r3, [r7, #3]
|
|
uint8_t ret = 0U;
|
|
80065ec: 2300 movs r3, #0
|
|
80065ee: 73fb strb r3, [r7, #15]
|
|
USBD_CDC_HandleTypeDef *hcdc;
|
|
|
|
if (pdev->dev_speed == USBD_SPEED_HIGH)
|
|
80065f0: 687b ldr r3, [r7, #4]
|
|
80065f2: 7c1b ldrb r3, [r3, #16]
|
|
80065f4: 2b00 cmp r3, #0
|
|
80065f6: d115 bne.n 8006624 <USBD_CDC_Init+0x44>
|
|
{
|
|
/* Open EP IN */
|
|
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
|
|
80065f8: f44f 7300 mov.w r3, #512 ; 0x200
|
|
80065fc: 2202 movs r2, #2
|
|
80065fe: 2181 movs r1, #129 ; 0x81
|
|
8006600: 6878 ldr r0, [r7, #4]
|
|
8006602: f004 f88e bl 800a722 <USBD_LL_OpenEP>
|
|
CDC_DATA_HS_IN_PACKET_SIZE);
|
|
|
|
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
|
|
8006606: 687b ldr r3, [r7, #4]
|
|
8006608: 2201 movs r2, #1
|
|
800660a: 62da str r2, [r3, #44] ; 0x2c
|
|
|
|
/* Open EP OUT */
|
|
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
|
|
800660c: f44f 7300 mov.w r3, #512 ; 0x200
|
|
8006610: 2202 movs r2, #2
|
|
8006612: 2101 movs r1, #1
|
|
8006614: 6878 ldr r0, [r7, #4]
|
|
8006616: f004 f884 bl 800a722 <USBD_LL_OpenEP>
|
|
CDC_DATA_HS_OUT_PACKET_SIZE);
|
|
|
|
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
|
|
800661a: 687b ldr r3, [r7, #4]
|
|
800661c: 2201 movs r2, #1
|
|
800661e: f8c3 216c str.w r2, [r3, #364] ; 0x16c
|
|
8006622: e012 b.n 800664a <USBD_CDC_Init+0x6a>
|
|
|
|
}
|
|
else
|
|
{
|
|
/* Open EP IN */
|
|
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
|
|
8006624: 2340 movs r3, #64 ; 0x40
|
|
8006626: 2202 movs r2, #2
|
|
8006628: 2181 movs r1, #129 ; 0x81
|
|
800662a: 6878 ldr r0, [r7, #4]
|
|
800662c: f004 f879 bl 800a722 <USBD_LL_OpenEP>
|
|
CDC_DATA_FS_IN_PACKET_SIZE);
|
|
|
|
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
|
|
8006630: 687b ldr r3, [r7, #4]
|
|
8006632: 2201 movs r2, #1
|
|
8006634: 62da str r2, [r3, #44] ; 0x2c
|
|
|
|
/* Open EP OUT */
|
|
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
|
|
8006636: 2340 movs r3, #64 ; 0x40
|
|
8006638: 2202 movs r2, #2
|
|
800663a: 2101 movs r1, #1
|
|
800663c: 6878 ldr r0, [r7, #4]
|
|
800663e: f004 f870 bl 800a722 <USBD_LL_OpenEP>
|
|
CDC_DATA_FS_OUT_PACKET_SIZE);
|
|
|
|
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
|
|
8006642: 687b ldr r3, [r7, #4]
|
|
8006644: 2201 movs r2, #1
|
|
8006646: f8c3 216c str.w r2, [r3, #364] ; 0x16c
|
|
}
|
|
/* Open Command IN EP */
|
|
USBD_LL_OpenEP(pdev, CDC_CMD_EP, USBD_EP_TYPE_INTR, CDC_CMD_PACKET_SIZE);
|
|
800664a: 2308 movs r3, #8
|
|
800664c: 2203 movs r2, #3
|
|
800664e: 2182 movs r1, #130 ; 0x82
|
|
8006650: 6878 ldr r0, [r7, #4]
|
|
8006652: f004 f866 bl 800a722 <USBD_LL_OpenEP>
|
|
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 1U;
|
|
8006656: 687b ldr r3, [r7, #4]
|
|
8006658: 2201 movs r2, #1
|
|
800665a: 641a str r2, [r3, #64] ; 0x40
|
|
|
|
pdev->pClassData = USBD_malloc(sizeof(USBD_CDC_HandleTypeDef));
|
|
800665c: f44f 7007 mov.w r0, #540 ; 0x21c
|
|
8006660: f004 f980 bl 800a964 <USBD_static_malloc>
|
|
8006664: 4602 mov r2, r0
|
|
8006666: 687b ldr r3, [r7, #4]
|
|
8006668: f8c3 22b8 str.w r2, [r3, #696] ; 0x2b8
|
|
|
|
if (pdev->pClassData == NULL)
|
|
800666c: 687b ldr r3, [r7, #4]
|
|
800666e: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8006672: 2b00 cmp r3, #0
|
|
8006674: d102 bne.n 800667c <USBD_CDC_Init+0x9c>
|
|
{
|
|
ret = 1U;
|
|
8006676: 2301 movs r3, #1
|
|
8006678: 73fb strb r3, [r7, #15]
|
|
800667a: e026 b.n 80066ca <USBD_CDC_Init+0xea>
|
|
}
|
|
else
|
|
{
|
|
hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
|
|
800667c: 687b ldr r3, [r7, #4]
|
|
800667e: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8006682: 60bb str r3, [r7, #8]
|
|
|
|
/* Init physical Interface components */
|
|
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Init();
|
|
8006684: 687b ldr r3, [r7, #4]
|
|
8006686: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
|
|
800668a: 681b ldr r3, [r3, #0]
|
|
800668c: 4798 blx r3
|
|
|
|
/* Init Xfer states */
|
|
hcdc->TxState = 0U;
|
|
800668e: 68bb ldr r3, [r7, #8]
|
|
8006690: 2200 movs r2, #0
|
|
8006692: f8c3 2214 str.w r2, [r3, #532] ; 0x214
|
|
hcdc->RxState = 0U;
|
|
8006696: 68bb ldr r3, [r7, #8]
|
|
8006698: 2200 movs r2, #0
|
|
800669a: f8c3 2218 str.w r2, [r3, #536] ; 0x218
|
|
|
|
if (pdev->dev_speed == USBD_SPEED_HIGH)
|
|
800669e: 687b ldr r3, [r7, #4]
|
|
80066a0: 7c1b ldrb r3, [r3, #16]
|
|
80066a2: 2b00 cmp r3, #0
|
|
80066a4: d109 bne.n 80066ba <USBD_CDC_Init+0xda>
|
|
{
|
|
/* Prepare Out endpoint to receive next packet */
|
|
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
|
|
80066a6: 68bb ldr r3, [r7, #8]
|
|
80066a8: f8d3 2204 ldr.w r2, [r3, #516] ; 0x204
|
|
80066ac: f44f 7300 mov.w r3, #512 ; 0x200
|
|
80066b0: 2101 movs r1, #1
|
|
80066b2: 6878 ldr r0, [r7, #4]
|
|
80066b4: f004 f91f bl 800a8f6 <USBD_LL_PrepareReceive>
|
|
80066b8: e007 b.n 80066ca <USBD_CDC_Init+0xea>
|
|
CDC_DATA_HS_OUT_PACKET_SIZE);
|
|
}
|
|
else
|
|
{
|
|
/* Prepare Out endpoint to receive next packet */
|
|
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
|
|
80066ba: 68bb ldr r3, [r7, #8]
|
|
80066bc: f8d3 2204 ldr.w r2, [r3, #516] ; 0x204
|
|
80066c0: 2340 movs r3, #64 ; 0x40
|
|
80066c2: 2101 movs r1, #1
|
|
80066c4: 6878 ldr r0, [r7, #4]
|
|
80066c6: f004 f916 bl 800a8f6 <USBD_LL_PrepareReceive>
|
|
CDC_DATA_FS_OUT_PACKET_SIZE);
|
|
}
|
|
}
|
|
return ret;
|
|
80066ca: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
80066cc: 4618 mov r0, r3
|
|
80066ce: 3710 adds r7, #16
|
|
80066d0: 46bd mov sp, r7
|
|
80066d2: bd80 pop {r7, pc}
|
|
|
|
080066d4 <USBD_CDC_DeInit>:
|
|
* @param pdev: device instance
|
|
* @param cfgidx: Configuration index
|
|
* @retval status
|
|
*/
|
|
static uint8_t USBD_CDC_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
|
|
{
|
|
80066d4: b580 push {r7, lr}
|
|
80066d6: b084 sub sp, #16
|
|
80066d8: af00 add r7, sp, #0
|
|
80066da: 6078 str r0, [r7, #4]
|
|
80066dc: 460b mov r3, r1
|
|
80066de: 70fb strb r3, [r7, #3]
|
|
uint8_t ret = 0U;
|
|
80066e0: 2300 movs r3, #0
|
|
80066e2: 73fb strb r3, [r7, #15]
|
|
|
|
/* Close EP IN */
|
|
USBD_LL_CloseEP(pdev, CDC_IN_EP);
|
|
80066e4: 2181 movs r1, #129 ; 0x81
|
|
80066e6: 6878 ldr r0, [r7, #4]
|
|
80066e8: f004 f841 bl 800a76e <USBD_LL_CloseEP>
|
|
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 0U;
|
|
80066ec: 687b ldr r3, [r7, #4]
|
|
80066ee: 2200 movs r2, #0
|
|
80066f0: 62da str r2, [r3, #44] ; 0x2c
|
|
|
|
/* Close EP OUT */
|
|
USBD_LL_CloseEP(pdev, CDC_OUT_EP);
|
|
80066f2: 2101 movs r1, #1
|
|
80066f4: 6878 ldr r0, [r7, #4]
|
|
80066f6: f004 f83a bl 800a76e <USBD_LL_CloseEP>
|
|
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 0U;
|
|
80066fa: 687b ldr r3, [r7, #4]
|
|
80066fc: 2200 movs r2, #0
|
|
80066fe: f8c3 216c str.w r2, [r3, #364] ; 0x16c
|
|
|
|
/* Close Command IN EP */
|
|
USBD_LL_CloseEP(pdev, CDC_CMD_EP);
|
|
8006702: 2182 movs r1, #130 ; 0x82
|
|
8006704: 6878 ldr r0, [r7, #4]
|
|
8006706: f004 f832 bl 800a76e <USBD_LL_CloseEP>
|
|
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 0U;
|
|
800670a: 687b ldr r3, [r7, #4]
|
|
800670c: 2200 movs r2, #0
|
|
800670e: 641a str r2, [r3, #64] ; 0x40
|
|
|
|
/* DeInit physical Interface components */
|
|
if (pdev->pClassData != NULL)
|
|
8006710: 687b ldr r3, [r7, #4]
|
|
8006712: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8006716: 2b00 cmp r3, #0
|
|
8006718: d00e beq.n 8006738 <USBD_CDC_DeInit+0x64>
|
|
{
|
|
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->DeInit();
|
|
800671a: 687b ldr r3, [r7, #4]
|
|
800671c: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
|
|
8006720: 685b ldr r3, [r3, #4]
|
|
8006722: 4798 blx r3
|
|
USBD_free(pdev->pClassData);
|
|
8006724: 687b ldr r3, [r7, #4]
|
|
8006726: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
800672a: 4618 mov r0, r3
|
|
800672c: f004 f926 bl 800a97c <USBD_static_free>
|
|
pdev->pClassData = NULL;
|
|
8006730: 687b ldr r3, [r7, #4]
|
|
8006732: 2200 movs r2, #0
|
|
8006734: f8c3 22b8 str.w r2, [r3, #696] ; 0x2b8
|
|
}
|
|
|
|
return ret;
|
|
8006738: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
800673a: 4618 mov r0, r3
|
|
800673c: 3710 adds r7, #16
|
|
800673e: 46bd mov sp, r7
|
|
8006740: bd80 pop {r7, pc}
|
|
|
|
08006742 <USBD_CDC_Setup>:
|
|
* @param req: usb requests
|
|
* @retval status
|
|
*/
|
|
static uint8_t USBD_CDC_Setup(USBD_HandleTypeDef *pdev,
|
|
USBD_SetupReqTypedef *req)
|
|
{
|
|
8006742: b580 push {r7, lr}
|
|
8006744: b086 sub sp, #24
|
|
8006746: af00 add r7, sp, #0
|
|
8006748: 6078 str r0, [r7, #4]
|
|
800674a: 6039 str r1, [r7, #0]
|
|
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
|
|
800674c: 687b ldr r3, [r7, #4]
|
|
800674e: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8006752: 613b str r3, [r7, #16]
|
|
uint8_t ifalt = 0U;
|
|
8006754: 2300 movs r3, #0
|
|
8006756: 73fb strb r3, [r7, #15]
|
|
uint16_t status_info = 0U;
|
|
8006758: 2300 movs r3, #0
|
|
800675a: 81bb strh r3, [r7, #12]
|
|
uint8_t ret = USBD_OK;
|
|
800675c: 2300 movs r3, #0
|
|
800675e: 75fb strb r3, [r7, #23]
|
|
|
|
switch (req->bmRequest & USB_REQ_TYPE_MASK)
|
|
8006760: 683b ldr r3, [r7, #0]
|
|
8006762: 781b ldrb r3, [r3, #0]
|
|
8006764: f003 0360 and.w r3, r3, #96 ; 0x60
|
|
8006768: 2b00 cmp r3, #0
|
|
800676a: d039 beq.n 80067e0 <USBD_CDC_Setup+0x9e>
|
|
800676c: 2b20 cmp r3, #32
|
|
800676e: d17c bne.n 800686a <USBD_CDC_Setup+0x128>
|
|
{
|
|
case USB_REQ_TYPE_CLASS :
|
|
if (req->wLength)
|
|
8006770: 683b ldr r3, [r7, #0]
|
|
8006772: 88db ldrh r3, [r3, #6]
|
|
8006774: 2b00 cmp r3, #0
|
|
8006776: d029 beq.n 80067cc <USBD_CDC_Setup+0x8a>
|
|
{
|
|
if (req->bmRequest & 0x80U)
|
|
8006778: 683b ldr r3, [r7, #0]
|
|
800677a: 781b ldrb r3, [r3, #0]
|
|
800677c: b25b sxtb r3, r3
|
|
800677e: 2b00 cmp r3, #0
|
|
8006780: da11 bge.n 80067a6 <USBD_CDC_Setup+0x64>
|
|
{
|
|
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
|
|
8006782: 687b ldr r3, [r7, #4]
|
|
8006784: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
|
|
8006788: 689b ldr r3, [r3, #8]
|
|
800678a: 683a ldr r2, [r7, #0]
|
|
800678c: 7850 ldrb r0, [r2, #1]
|
|
(uint8_t *)(void *)hcdc->data,
|
|
800678e: 6939 ldr r1, [r7, #16]
|
|
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
|
|
8006790: 683a ldr r2, [r7, #0]
|
|
8006792: 88d2 ldrh r2, [r2, #6]
|
|
8006794: 4798 blx r3
|
|
req->wLength);
|
|
|
|
USBD_CtlSendData(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
|
|
8006796: 6939 ldr r1, [r7, #16]
|
|
8006798: 683b ldr r3, [r7, #0]
|
|
800679a: 88db ldrh r3, [r3, #6]
|
|
800679c: 461a mov r2, r3
|
|
800679e: 6878 ldr r0, [r7, #4]
|
|
80067a0: f001 f9c6 bl 8007b30 <USBD_CtlSendData>
|
|
else
|
|
{
|
|
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
|
|
(uint8_t *)(void *)req, 0U);
|
|
}
|
|
break;
|
|
80067a4: e068 b.n 8006878 <USBD_CDC_Setup+0x136>
|
|
hcdc->CmdOpCode = req->bRequest;
|
|
80067a6: 683b ldr r3, [r7, #0]
|
|
80067a8: 785a ldrb r2, [r3, #1]
|
|
80067aa: 693b ldr r3, [r7, #16]
|
|
80067ac: f883 2200 strb.w r2, [r3, #512] ; 0x200
|
|
hcdc->CmdLength = (uint8_t)req->wLength;
|
|
80067b0: 683b ldr r3, [r7, #0]
|
|
80067b2: 88db ldrh r3, [r3, #6]
|
|
80067b4: b2da uxtb r2, r3
|
|
80067b6: 693b ldr r3, [r7, #16]
|
|
80067b8: f883 2201 strb.w r2, [r3, #513] ; 0x201
|
|
USBD_CtlPrepareRx(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
|
|
80067bc: 6939 ldr r1, [r7, #16]
|
|
80067be: 683b ldr r3, [r7, #0]
|
|
80067c0: 88db ldrh r3, [r3, #6]
|
|
80067c2: 461a mov r2, r3
|
|
80067c4: 6878 ldr r0, [r7, #4]
|
|
80067c6: f001 f9e1 bl 8007b8c <USBD_CtlPrepareRx>
|
|
break;
|
|
80067ca: e055 b.n 8006878 <USBD_CDC_Setup+0x136>
|
|
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
|
|
80067cc: 687b ldr r3, [r7, #4]
|
|
80067ce: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
|
|
80067d2: 689b ldr r3, [r3, #8]
|
|
80067d4: 683a ldr r2, [r7, #0]
|
|
80067d6: 7850 ldrb r0, [r2, #1]
|
|
80067d8: 2200 movs r2, #0
|
|
80067da: 6839 ldr r1, [r7, #0]
|
|
80067dc: 4798 blx r3
|
|
break;
|
|
80067de: e04b b.n 8006878 <USBD_CDC_Setup+0x136>
|
|
|
|
case USB_REQ_TYPE_STANDARD:
|
|
switch (req->bRequest)
|
|
80067e0: 683b ldr r3, [r7, #0]
|
|
80067e2: 785b ldrb r3, [r3, #1]
|
|
80067e4: 2b0a cmp r3, #10
|
|
80067e6: d017 beq.n 8006818 <USBD_CDC_Setup+0xd6>
|
|
80067e8: 2b0b cmp r3, #11
|
|
80067ea: d029 beq.n 8006840 <USBD_CDC_Setup+0xfe>
|
|
80067ec: 2b00 cmp r3, #0
|
|
80067ee: d133 bne.n 8006858 <USBD_CDC_Setup+0x116>
|
|
{
|
|
case USB_REQ_GET_STATUS:
|
|
if (pdev->dev_state == USBD_STATE_CONFIGURED)
|
|
80067f0: 687b ldr r3, [r7, #4]
|
|
80067f2: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
80067f6: 2b03 cmp r3, #3
|
|
80067f8: d107 bne.n 800680a <USBD_CDC_Setup+0xc8>
|
|
{
|
|
USBD_CtlSendData(pdev, (uint8_t *)(void *)&status_info, 2U);
|
|
80067fa: f107 030c add.w r3, r7, #12
|
|
80067fe: 2202 movs r2, #2
|
|
8006800: 4619 mov r1, r3
|
|
8006802: 6878 ldr r0, [r7, #4]
|
|
8006804: f001 f994 bl 8007b30 <USBD_CtlSendData>
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
ret = USBD_FAIL;
|
|
}
|
|
break;
|
|
8006808: e02e b.n 8006868 <USBD_CDC_Setup+0x126>
|
|
USBD_CtlError(pdev, req);
|
|
800680a: 6839 ldr r1, [r7, #0]
|
|
800680c: 6878 ldr r0, [r7, #4]
|
|
800680e: f001 f925 bl 8007a5c <USBD_CtlError>
|
|
ret = USBD_FAIL;
|
|
8006812: 2302 movs r3, #2
|
|
8006814: 75fb strb r3, [r7, #23]
|
|
break;
|
|
8006816: e027 b.n 8006868 <USBD_CDC_Setup+0x126>
|
|
|
|
case USB_REQ_GET_INTERFACE:
|
|
if (pdev->dev_state == USBD_STATE_CONFIGURED)
|
|
8006818: 687b ldr r3, [r7, #4]
|
|
800681a: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
800681e: 2b03 cmp r3, #3
|
|
8006820: d107 bne.n 8006832 <USBD_CDC_Setup+0xf0>
|
|
{
|
|
USBD_CtlSendData(pdev, &ifalt, 1U);
|
|
8006822: f107 030f add.w r3, r7, #15
|
|
8006826: 2201 movs r2, #1
|
|
8006828: 4619 mov r1, r3
|
|
800682a: 6878 ldr r0, [r7, #4]
|
|
800682c: f001 f980 bl 8007b30 <USBD_CtlSendData>
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
ret = USBD_FAIL;
|
|
}
|
|
break;
|
|
8006830: e01a b.n 8006868 <USBD_CDC_Setup+0x126>
|
|
USBD_CtlError(pdev, req);
|
|
8006832: 6839 ldr r1, [r7, #0]
|
|
8006834: 6878 ldr r0, [r7, #4]
|
|
8006836: f001 f911 bl 8007a5c <USBD_CtlError>
|
|
ret = USBD_FAIL;
|
|
800683a: 2302 movs r3, #2
|
|
800683c: 75fb strb r3, [r7, #23]
|
|
break;
|
|
800683e: e013 b.n 8006868 <USBD_CDC_Setup+0x126>
|
|
|
|
case USB_REQ_SET_INTERFACE:
|
|
if (pdev->dev_state != USBD_STATE_CONFIGURED)
|
|
8006840: 687b ldr r3, [r7, #4]
|
|
8006842: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
8006846: 2b03 cmp r3, #3
|
|
8006848: d00d beq.n 8006866 <USBD_CDC_Setup+0x124>
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
800684a: 6839 ldr r1, [r7, #0]
|
|
800684c: 6878 ldr r0, [r7, #4]
|
|
800684e: f001 f905 bl 8007a5c <USBD_CtlError>
|
|
ret = USBD_FAIL;
|
|
8006852: 2302 movs r3, #2
|
|
8006854: 75fb strb r3, [r7, #23]
|
|
}
|
|
break;
|
|
8006856: e006 b.n 8006866 <USBD_CDC_Setup+0x124>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
8006858: 6839 ldr r1, [r7, #0]
|
|
800685a: 6878 ldr r0, [r7, #4]
|
|
800685c: f001 f8fe bl 8007a5c <USBD_CtlError>
|
|
ret = USBD_FAIL;
|
|
8006860: 2302 movs r3, #2
|
|
8006862: 75fb strb r3, [r7, #23]
|
|
break;
|
|
8006864: e000 b.n 8006868 <USBD_CDC_Setup+0x126>
|
|
break;
|
|
8006866: bf00 nop
|
|
}
|
|
break;
|
|
8006868: e006 b.n 8006878 <USBD_CDC_Setup+0x136>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
800686a: 6839 ldr r1, [r7, #0]
|
|
800686c: 6878 ldr r0, [r7, #4]
|
|
800686e: f001 f8f5 bl 8007a5c <USBD_CtlError>
|
|
ret = USBD_FAIL;
|
|
8006872: 2302 movs r3, #2
|
|
8006874: 75fb strb r3, [r7, #23]
|
|
break;
|
|
8006876: bf00 nop
|
|
}
|
|
|
|
return ret;
|
|
8006878: 7dfb ldrb r3, [r7, #23]
|
|
}
|
|
800687a: 4618 mov r0, r3
|
|
800687c: 3718 adds r7, #24
|
|
800687e: 46bd mov sp, r7
|
|
8006880: bd80 pop {r7, pc}
|
|
|
|
08006882 <USBD_CDC_DataIn>:
|
|
* @param pdev: device instance
|
|
* @param epnum: endpoint number
|
|
* @retval status
|
|
*/
|
|
static uint8_t USBD_CDC_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum)
|
|
{
|
|
8006882: b580 push {r7, lr}
|
|
8006884: b084 sub sp, #16
|
|
8006886: af00 add r7, sp, #0
|
|
8006888: 6078 str r0, [r7, #4]
|
|
800688a: 460b mov r3, r1
|
|
800688c: 70fb strb r3, [r7, #3]
|
|
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *)pdev->pClassData;
|
|
800688e: 687b ldr r3, [r7, #4]
|
|
8006890: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8006894: 60fb str r3, [r7, #12]
|
|
PCD_HandleTypeDef *hpcd = pdev->pData;
|
|
8006896: 687b ldr r3, [r7, #4]
|
|
8006898: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
|
|
800689c: 60bb str r3, [r7, #8]
|
|
|
|
if (pdev->pClassData != NULL)
|
|
800689e: 687b ldr r3, [r7, #4]
|
|
80068a0: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
80068a4: 2b00 cmp r3, #0
|
|
80068a6: d037 beq.n 8006918 <USBD_CDC_DataIn+0x96>
|
|
{
|
|
if ((pdev->ep_in[epnum].total_length > 0U) && ((pdev->ep_in[epnum].total_length % hpcd->IN_ep[epnum].maxpacket) == 0U))
|
|
80068a8: 78fa ldrb r2, [r7, #3]
|
|
80068aa: 6879 ldr r1, [r7, #4]
|
|
80068ac: 4613 mov r3, r2
|
|
80068ae: 009b lsls r3, r3, #2
|
|
80068b0: 4413 add r3, r2
|
|
80068b2: 009b lsls r3, r3, #2
|
|
80068b4: 440b add r3, r1
|
|
80068b6: 331c adds r3, #28
|
|
80068b8: 681b ldr r3, [r3, #0]
|
|
80068ba: 2b00 cmp r3, #0
|
|
80068bc: d026 beq.n 800690c <USBD_CDC_DataIn+0x8a>
|
|
80068be: 78fa ldrb r2, [r7, #3]
|
|
80068c0: 6879 ldr r1, [r7, #4]
|
|
80068c2: 4613 mov r3, r2
|
|
80068c4: 009b lsls r3, r3, #2
|
|
80068c6: 4413 add r3, r2
|
|
80068c8: 009b lsls r3, r3, #2
|
|
80068ca: 440b add r3, r1
|
|
80068cc: 331c adds r3, #28
|
|
80068ce: 681b ldr r3, [r3, #0]
|
|
80068d0: 78fa ldrb r2, [r7, #3]
|
|
80068d2: 68b9 ldr r1, [r7, #8]
|
|
80068d4: 0152 lsls r2, r2, #5
|
|
80068d6: 440a add r2, r1
|
|
80068d8: 3238 adds r2, #56 ; 0x38
|
|
80068da: 6812 ldr r2, [r2, #0]
|
|
80068dc: fbb3 f1f2 udiv r1, r3, r2
|
|
80068e0: fb02 f201 mul.w r2, r2, r1
|
|
80068e4: 1a9b subs r3, r3, r2
|
|
80068e6: 2b00 cmp r3, #0
|
|
80068e8: d110 bne.n 800690c <USBD_CDC_DataIn+0x8a>
|
|
{
|
|
/* Update the packet total length */
|
|
pdev->ep_in[epnum].total_length = 0U;
|
|
80068ea: 78fa ldrb r2, [r7, #3]
|
|
80068ec: 6879 ldr r1, [r7, #4]
|
|
80068ee: 4613 mov r3, r2
|
|
80068f0: 009b lsls r3, r3, #2
|
|
80068f2: 4413 add r3, r2
|
|
80068f4: 009b lsls r3, r3, #2
|
|
80068f6: 440b add r3, r1
|
|
80068f8: 331c adds r3, #28
|
|
80068fa: 2200 movs r2, #0
|
|
80068fc: 601a str r2, [r3, #0]
|
|
|
|
/* Send ZLP */
|
|
USBD_LL_Transmit(pdev, epnum, NULL, 0U);
|
|
80068fe: 78f9 ldrb r1, [r7, #3]
|
|
8006900: 2300 movs r3, #0
|
|
8006902: 2200 movs r2, #0
|
|
8006904: 6878 ldr r0, [r7, #4]
|
|
8006906: f003 ffd3 bl 800a8b0 <USBD_LL_Transmit>
|
|
800690a: e003 b.n 8006914 <USBD_CDC_DataIn+0x92>
|
|
}
|
|
else
|
|
{
|
|
hcdc->TxState = 0U;
|
|
800690c: 68fb ldr r3, [r7, #12]
|
|
800690e: 2200 movs r2, #0
|
|
8006910: f8c3 2214 str.w r2, [r3, #532] ; 0x214
|
|
}
|
|
return USBD_OK;
|
|
8006914: 2300 movs r3, #0
|
|
8006916: e000 b.n 800691a <USBD_CDC_DataIn+0x98>
|
|
}
|
|
else
|
|
{
|
|
return USBD_FAIL;
|
|
8006918: 2302 movs r3, #2
|
|
}
|
|
}
|
|
800691a: 4618 mov r0, r3
|
|
800691c: 3710 adds r7, #16
|
|
800691e: 46bd mov sp, r7
|
|
8006920: bd80 pop {r7, pc}
|
|
|
|
08006922 <USBD_CDC_DataOut>:
|
|
* @param pdev: device instance
|
|
* @param epnum: endpoint number
|
|
* @retval status
|
|
*/
|
|
static uint8_t USBD_CDC_DataOut(USBD_HandleTypeDef *pdev, uint8_t epnum)
|
|
{
|
|
8006922: b580 push {r7, lr}
|
|
8006924: b084 sub sp, #16
|
|
8006926: af00 add r7, sp, #0
|
|
8006928: 6078 str r0, [r7, #4]
|
|
800692a: 460b mov r3, r1
|
|
800692c: 70fb strb r3, [r7, #3]
|
|
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
|
|
800692e: 687b ldr r3, [r7, #4]
|
|
8006930: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8006934: 60fb str r3, [r7, #12]
|
|
|
|
/* Get the received data length */
|
|
hcdc->RxLength = USBD_LL_GetRxDataSize(pdev, epnum);
|
|
8006936: 78fb ldrb r3, [r7, #3]
|
|
8006938: 4619 mov r1, r3
|
|
800693a: 6878 ldr r0, [r7, #4]
|
|
800693c: f003 fffe bl 800a93c <USBD_LL_GetRxDataSize>
|
|
8006940: 4602 mov r2, r0
|
|
8006942: 68fb ldr r3, [r7, #12]
|
|
8006944: f8c3 220c str.w r2, [r3, #524] ; 0x20c
|
|
|
|
/* USB data will be immediately processed, this allow next USB traffic being
|
|
NAKed till the end of the application Xfer */
|
|
if (pdev->pClassData != NULL)
|
|
8006948: 687b ldr r3, [r7, #4]
|
|
800694a: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
800694e: 2b00 cmp r3, #0
|
|
8006950: d00d beq.n 800696e <USBD_CDC_DataOut+0x4c>
|
|
{
|
|
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Receive(hcdc->RxBuffer, &hcdc->RxLength);
|
|
8006952: 687b ldr r3, [r7, #4]
|
|
8006954: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
|
|
8006958: 68db ldr r3, [r3, #12]
|
|
800695a: 68fa ldr r2, [r7, #12]
|
|
800695c: f8d2 0204 ldr.w r0, [r2, #516] ; 0x204
|
|
8006960: 68fa ldr r2, [r7, #12]
|
|
8006962: f502 7203 add.w r2, r2, #524 ; 0x20c
|
|
8006966: 4611 mov r1, r2
|
|
8006968: 4798 blx r3
|
|
|
|
return USBD_OK;
|
|
800696a: 2300 movs r3, #0
|
|
800696c: e000 b.n 8006970 <USBD_CDC_DataOut+0x4e>
|
|
}
|
|
else
|
|
{
|
|
return USBD_FAIL;
|
|
800696e: 2302 movs r3, #2
|
|
}
|
|
}
|
|
8006970: 4618 mov r0, r3
|
|
8006972: 3710 adds r7, #16
|
|
8006974: 46bd mov sp, r7
|
|
8006976: bd80 pop {r7, pc}
|
|
|
|
08006978 <USBD_CDC_EP0_RxReady>:
|
|
* Handle EP0 Rx Ready event
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
static uint8_t USBD_CDC_EP0_RxReady(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8006978: b580 push {r7, lr}
|
|
800697a: b084 sub sp, #16
|
|
800697c: af00 add r7, sp, #0
|
|
800697e: 6078 str r0, [r7, #4]
|
|
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
|
|
8006980: 687b ldr r3, [r7, #4]
|
|
8006982: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8006986: 60fb str r3, [r7, #12]
|
|
|
|
if ((pdev->pUserData != NULL) && (hcdc->CmdOpCode != 0xFFU))
|
|
8006988: 687b ldr r3, [r7, #4]
|
|
800698a: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
|
|
800698e: 2b00 cmp r3, #0
|
|
8006990: d015 beq.n 80069be <USBD_CDC_EP0_RxReady+0x46>
|
|
8006992: 68fb ldr r3, [r7, #12]
|
|
8006994: f893 3200 ldrb.w r3, [r3, #512] ; 0x200
|
|
8006998: 2bff cmp r3, #255 ; 0xff
|
|
800699a: d010 beq.n 80069be <USBD_CDC_EP0_RxReady+0x46>
|
|
{
|
|
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
|
|
800699c: 687b ldr r3, [r7, #4]
|
|
800699e: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
|
|
80069a2: 689b ldr r3, [r3, #8]
|
|
80069a4: 68fa ldr r2, [r7, #12]
|
|
80069a6: f892 0200 ldrb.w r0, [r2, #512] ; 0x200
|
|
(uint8_t *)(void *)hcdc->data,
|
|
80069aa: 68f9 ldr r1, [r7, #12]
|
|
(uint16_t)hcdc->CmdLength);
|
|
80069ac: 68fa ldr r2, [r7, #12]
|
|
80069ae: f892 2201 ldrb.w r2, [r2, #513] ; 0x201
|
|
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
|
|
80069b2: b292 uxth r2, r2
|
|
80069b4: 4798 blx r3
|
|
hcdc->CmdOpCode = 0xFFU;
|
|
80069b6: 68fb ldr r3, [r7, #12]
|
|
80069b8: 22ff movs r2, #255 ; 0xff
|
|
80069ba: f883 2200 strb.w r2, [r3, #512] ; 0x200
|
|
|
|
}
|
|
return USBD_OK;
|
|
80069be: 2300 movs r3, #0
|
|
}
|
|
80069c0: 4618 mov r0, r3
|
|
80069c2: 3710 adds r7, #16
|
|
80069c4: 46bd mov sp, r7
|
|
80069c6: bd80 pop {r7, pc}
|
|
|
|
080069c8 <USBD_CDC_GetFSCfgDesc>:
|
|
* @param speed : current device speed
|
|
* @param length : pointer data length
|
|
* @retval pointer to descriptor buffer
|
|
*/
|
|
static uint8_t *USBD_CDC_GetFSCfgDesc(uint16_t *length)
|
|
{
|
|
80069c8: b480 push {r7}
|
|
80069ca: b083 sub sp, #12
|
|
80069cc: af00 add r7, sp, #0
|
|
80069ce: 6078 str r0, [r7, #4]
|
|
*length = sizeof(USBD_CDC_CfgFSDesc);
|
|
80069d0: 687b ldr r3, [r7, #4]
|
|
80069d2: 2243 movs r2, #67 ; 0x43
|
|
80069d4: 801a strh r2, [r3, #0]
|
|
return USBD_CDC_CfgFSDesc;
|
|
80069d6: 4b03 ldr r3, [pc, #12] ; (80069e4 <USBD_CDC_GetFSCfgDesc+0x1c>)
|
|
}
|
|
80069d8: 4618 mov r0, r3
|
|
80069da: 370c adds r7, #12
|
|
80069dc: 46bd mov sp, r7
|
|
80069de: bc80 pop {r7}
|
|
80069e0: 4770 bx lr
|
|
80069e2: bf00 nop
|
|
80069e4: 200000a8 .word 0x200000a8
|
|
|
|
080069e8 <USBD_CDC_GetHSCfgDesc>:
|
|
* @param speed : current device speed
|
|
* @param length : pointer data length
|
|
* @retval pointer to descriptor buffer
|
|
*/
|
|
static uint8_t *USBD_CDC_GetHSCfgDesc(uint16_t *length)
|
|
{
|
|
80069e8: b480 push {r7}
|
|
80069ea: b083 sub sp, #12
|
|
80069ec: af00 add r7, sp, #0
|
|
80069ee: 6078 str r0, [r7, #4]
|
|
*length = sizeof(USBD_CDC_CfgHSDesc);
|
|
80069f0: 687b ldr r3, [r7, #4]
|
|
80069f2: 2243 movs r2, #67 ; 0x43
|
|
80069f4: 801a strh r2, [r3, #0]
|
|
return USBD_CDC_CfgHSDesc;
|
|
80069f6: 4b03 ldr r3, [pc, #12] ; (8006a04 <USBD_CDC_GetHSCfgDesc+0x1c>)
|
|
}
|
|
80069f8: 4618 mov r0, r3
|
|
80069fa: 370c adds r7, #12
|
|
80069fc: 46bd mov sp, r7
|
|
80069fe: bc80 pop {r7}
|
|
8006a00: 4770 bx lr
|
|
8006a02: bf00 nop
|
|
8006a04: 20000064 .word 0x20000064
|
|
|
|
08006a08 <USBD_CDC_GetOtherSpeedCfgDesc>:
|
|
* @param speed : current device speed
|
|
* @param length : pointer data length
|
|
* @retval pointer to descriptor buffer
|
|
*/
|
|
static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc(uint16_t *length)
|
|
{
|
|
8006a08: b480 push {r7}
|
|
8006a0a: b083 sub sp, #12
|
|
8006a0c: af00 add r7, sp, #0
|
|
8006a0e: 6078 str r0, [r7, #4]
|
|
*length = sizeof(USBD_CDC_OtherSpeedCfgDesc);
|
|
8006a10: 687b ldr r3, [r7, #4]
|
|
8006a12: 2243 movs r2, #67 ; 0x43
|
|
8006a14: 801a strh r2, [r3, #0]
|
|
return USBD_CDC_OtherSpeedCfgDesc;
|
|
8006a16: 4b03 ldr r3, [pc, #12] ; (8006a24 <USBD_CDC_GetOtherSpeedCfgDesc+0x1c>)
|
|
}
|
|
8006a18: 4618 mov r0, r3
|
|
8006a1a: 370c adds r7, #12
|
|
8006a1c: 46bd mov sp, r7
|
|
8006a1e: bc80 pop {r7}
|
|
8006a20: 4770 bx lr
|
|
8006a22: bf00 nop
|
|
8006a24: 200000ec .word 0x200000ec
|
|
|
|
08006a28 <USBD_CDC_GetDeviceQualifierDescriptor>:
|
|
* return Device Qualifier descriptor
|
|
* @param length : pointer data length
|
|
* @retval pointer to descriptor buffer
|
|
*/
|
|
uint8_t *USBD_CDC_GetDeviceQualifierDescriptor(uint16_t *length)
|
|
{
|
|
8006a28: b480 push {r7}
|
|
8006a2a: b083 sub sp, #12
|
|
8006a2c: af00 add r7, sp, #0
|
|
8006a2e: 6078 str r0, [r7, #4]
|
|
*length = sizeof(USBD_CDC_DeviceQualifierDesc);
|
|
8006a30: 687b ldr r3, [r7, #4]
|
|
8006a32: 220a movs r2, #10
|
|
8006a34: 801a strh r2, [r3, #0]
|
|
return USBD_CDC_DeviceQualifierDesc;
|
|
8006a36: 4b03 ldr r3, [pc, #12] ; (8006a44 <USBD_CDC_GetDeviceQualifierDescriptor+0x1c>)
|
|
}
|
|
8006a38: 4618 mov r0, r3
|
|
8006a3a: 370c adds r7, #12
|
|
8006a3c: 46bd mov sp, r7
|
|
8006a3e: bc80 pop {r7}
|
|
8006a40: 4770 bx lr
|
|
8006a42: bf00 nop
|
|
8006a44: 20000020 .word 0x20000020
|
|
|
|
08006a48 <USBD_CDC_RegisterInterface>:
|
|
* @param fops: CD Interface callback
|
|
* @retval status
|
|
*/
|
|
uint8_t USBD_CDC_RegisterInterface(USBD_HandleTypeDef *pdev,
|
|
USBD_CDC_ItfTypeDef *fops)
|
|
{
|
|
8006a48: b480 push {r7}
|
|
8006a4a: b085 sub sp, #20
|
|
8006a4c: af00 add r7, sp, #0
|
|
8006a4e: 6078 str r0, [r7, #4]
|
|
8006a50: 6039 str r1, [r7, #0]
|
|
uint8_t ret = USBD_FAIL;
|
|
8006a52: 2302 movs r3, #2
|
|
8006a54: 73fb strb r3, [r7, #15]
|
|
|
|
if (fops != NULL)
|
|
8006a56: 683b ldr r3, [r7, #0]
|
|
8006a58: 2b00 cmp r3, #0
|
|
8006a5a: d005 beq.n 8006a68 <USBD_CDC_RegisterInterface+0x20>
|
|
{
|
|
pdev->pUserData = fops;
|
|
8006a5c: 687b ldr r3, [r7, #4]
|
|
8006a5e: 683a ldr r2, [r7, #0]
|
|
8006a60: f8c3 22bc str.w r2, [r3, #700] ; 0x2bc
|
|
ret = USBD_OK;
|
|
8006a64: 2300 movs r3, #0
|
|
8006a66: 73fb strb r3, [r7, #15]
|
|
}
|
|
|
|
return ret;
|
|
8006a68: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
8006a6a: 4618 mov r0, r3
|
|
8006a6c: 3714 adds r7, #20
|
|
8006a6e: 46bd mov sp, r7
|
|
8006a70: bc80 pop {r7}
|
|
8006a72: 4770 bx lr
|
|
|
|
08006a74 <USBD_CDC_SetTxBuffer>:
|
|
* @retval status
|
|
*/
|
|
uint8_t USBD_CDC_SetTxBuffer(USBD_HandleTypeDef *pdev,
|
|
uint8_t *pbuff,
|
|
uint16_t length)
|
|
{
|
|
8006a74: b480 push {r7}
|
|
8006a76: b087 sub sp, #28
|
|
8006a78: af00 add r7, sp, #0
|
|
8006a7a: 60f8 str r0, [r7, #12]
|
|
8006a7c: 60b9 str r1, [r7, #8]
|
|
8006a7e: 4613 mov r3, r2
|
|
8006a80: 80fb strh r3, [r7, #6]
|
|
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
|
|
8006a82: 68fb ldr r3, [r7, #12]
|
|
8006a84: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8006a88: 617b str r3, [r7, #20]
|
|
|
|
hcdc->TxBuffer = pbuff;
|
|
8006a8a: 697b ldr r3, [r7, #20]
|
|
8006a8c: 68ba ldr r2, [r7, #8]
|
|
8006a8e: f8c3 2208 str.w r2, [r3, #520] ; 0x208
|
|
hcdc->TxLength = length;
|
|
8006a92: 88fa ldrh r2, [r7, #6]
|
|
8006a94: 697b ldr r3, [r7, #20]
|
|
8006a96: f8c3 2210 str.w r2, [r3, #528] ; 0x210
|
|
|
|
return USBD_OK;
|
|
8006a9a: 2300 movs r3, #0
|
|
}
|
|
8006a9c: 4618 mov r0, r3
|
|
8006a9e: 371c adds r7, #28
|
|
8006aa0: 46bd mov sp, r7
|
|
8006aa2: bc80 pop {r7}
|
|
8006aa4: 4770 bx lr
|
|
|
|
08006aa6 <USBD_CDC_SetRxBuffer>:
|
|
* @param pbuff: Rx Buffer
|
|
* @retval status
|
|
*/
|
|
uint8_t USBD_CDC_SetRxBuffer(USBD_HandleTypeDef *pdev,
|
|
uint8_t *pbuff)
|
|
{
|
|
8006aa6: b480 push {r7}
|
|
8006aa8: b085 sub sp, #20
|
|
8006aaa: af00 add r7, sp, #0
|
|
8006aac: 6078 str r0, [r7, #4]
|
|
8006aae: 6039 str r1, [r7, #0]
|
|
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
|
|
8006ab0: 687b ldr r3, [r7, #4]
|
|
8006ab2: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8006ab6: 60fb str r3, [r7, #12]
|
|
|
|
hcdc->RxBuffer = pbuff;
|
|
8006ab8: 68fb ldr r3, [r7, #12]
|
|
8006aba: 683a ldr r2, [r7, #0]
|
|
8006abc: f8c3 2204 str.w r2, [r3, #516] ; 0x204
|
|
|
|
return USBD_OK;
|
|
8006ac0: 2300 movs r3, #0
|
|
}
|
|
8006ac2: 4618 mov r0, r3
|
|
8006ac4: 3714 adds r7, #20
|
|
8006ac6: 46bd mov sp, r7
|
|
8006ac8: bc80 pop {r7}
|
|
8006aca: 4770 bx lr
|
|
|
|
08006acc <USBD_CDC_ReceivePacket>:
|
|
* prepare OUT Endpoint for reception
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
uint8_t USBD_CDC_ReceivePacket(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8006acc: b580 push {r7, lr}
|
|
8006ace: b084 sub sp, #16
|
|
8006ad0: af00 add r7, sp, #0
|
|
8006ad2: 6078 str r0, [r7, #4]
|
|
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
|
|
8006ad4: 687b ldr r3, [r7, #4]
|
|
8006ad6: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8006ada: 60fb str r3, [r7, #12]
|
|
|
|
/* Suspend or Resume USB Out process */
|
|
if (pdev->pClassData != NULL)
|
|
8006adc: 687b ldr r3, [r7, #4]
|
|
8006ade: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8006ae2: 2b00 cmp r3, #0
|
|
8006ae4: d017 beq.n 8006b16 <USBD_CDC_ReceivePacket+0x4a>
|
|
{
|
|
if (pdev->dev_speed == USBD_SPEED_HIGH)
|
|
8006ae6: 687b ldr r3, [r7, #4]
|
|
8006ae8: 7c1b ldrb r3, [r3, #16]
|
|
8006aea: 2b00 cmp r3, #0
|
|
8006aec: d109 bne.n 8006b02 <USBD_CDC_ReceivePacket+0x36>
|
|
{
|
|
/* Prepare Out endpoint to receive next packet */
|
|
USBD_LL_PrepareReceive(pdev,
|
|
8006aee: 68fb ldr r3, [r7, #12]
|
|
8006af0: f8d3 2204 ldr.w r2, [r3, #516] ; 0x204
|
|
8006af4: f44f 7300 mov.w r3, #512 ; 0x200
|
|
8006af8: 2101 movs r1, #1
|
|
8006afa: 6878 ldr r0, [r7, #4]
|
|
8006afc: f003 fefb bl 800a8f6 <USBD_LL_PrepareReceive>
|
|
8006b00: e007 b.n 8006b12 <USBD_CDC_ReceivePacket+0x46>
|
|
CDC_DATA_HS_OUT_PACKET_SIZE);
|
|
}
|
|
else
|
|
{
|
|
/* Prepare Out endpoint to receive next packet */
|
|
USBD_LL_PrepareReceive(pdev,
|
|
8006b02: 68fb ldr r3, [r7, #12]
|
|
8006b04: f8d3 2204 ldr.w r2, [r3, #516] ; 0x204
|
|
8006b08: 2340 movs r3, #64 ; 0x40
|
|
8006b0a: 2101 movs r1, #1
|
|
8006b0c: 6878 ldr r0, [r7, #4]
|
|
8006b0e: f003 fef2 bl 800a8f6 <USBD_LL_PrepareReceive>
|
|
CDC_OUT_EP,
|
|
hcdc->RxBuffer,
|
|
CDC_DATA_FS_OUT_PACKET_SIZE);
|
|
}
|
|
return USBD_OK;
|
|
8006b12: 2300 movs r3, #0
|
|
8006b14: e000 b.n 8006b18 <USBD_CDC_ReceivePacket+0x4c>
|
|
}
|
|
else
|
|
{
|
|
return USBD_FAIL;
|
|
8006b16: 2302 movs r3, #2
|
|
}
|
|
}
|
|
8006b18: 4618 mov r0, r3
|
|
8006b1a: 3710 adds r7, #16
|
|
8006b1c: 46bd mov sp, r7
|
|
8006b1e: bd80 pop {r7, pc}
|
|
|
|
08006b20 <USBD_Init>:
|
|
* @param id: Low level core index
|
|
* @retval None
|
|
*/
|
|
USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev,
|
|
USBD_DescriptorsTypeDef *pdesc, uint8_t id)
|
|
{
|
|
8006b20: b580 push {r7, lr}
|
|
8006b22: b084 sub sp, #16
|
|
8006b24: af00 add r7, sp, #0
|
|
8006b26: 60f8 str r0, [r7, #12]
|
|
8006b28: 60b9 str r1, [r7, #8]
|
|
8006b2a: 4613 mov r3, r2
|
|
8006b2c: 71fb strb r3, [r7, #7]
|
|
/* Check whether the USB Host handle is valid */
|
|
if (pdev == NULL)
|
|
8006b2e: 68fb ldr r3, [r7, #12]
|
|
8006b30: 2b00 cmp r3, #0
|
|
8006b32: d101 bne.n 8006b38 <USBD_Init+0x18>
|
|
{
|
|
#if (USBD_DEBUG_LEVEL > 1U)
|
|
USBD_ErrLog("Invalid Device handle");
|
|
#endif
|
|
return USBD_FAIL;
|
|
8006b34: 2302 movs r3, #2
|
|
8006b36: e01a b.n 8006b6e <USBD_Init+0x4e>
|
|
}
|
|
|
|
/* Unlink previous class*/
|
|
if (pdev->pClass != NULL)
|
|
8006b38: 68fb ldr r3, [r7, #12]
|
|
8006b3a: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8006b3e: 2b00 cmp r3, #0
|
|
8006b40: d003 beq.n 8006b4a <USBD_Init+0x2a>
|
|
{
|
|
pdev->pClass = NULL;
|
|
8006b42: 68fb ldr r3, [r7, #12]
|
|
8006b44: 2200 movs r2, #0
|
|
8006b46: f8c3 22b4 str.w r2, [r3, #692] ; 0x2b4
|
|
}
|
|
|
|
/* Assign USBD Descriptors */
|
|
if (pdesc != NULL)
|
|
8006b4a: 68bb ldr r3, [r7, #8]
|
|
8006b4c: 2b00 cmp r3, #0
|
|
8006b4e: d003 beq.n 8006b58 <USBD_Init+0x38>
|
|
{
|
|
pdev->pDesc = pdesc;
|
|
8006b50: 68fb ldr r3, [r7, #12]
|
|
8006b52: 68ba ldr r2, [r7, #8]
|
|
8006b54: f8c3 22b0 str.w r2, [r3, #688] ; 0x2b0
|
|
}
|
|
|
|
/* Set Device initial State */
|
|
pdev->dev_state = USBD_STATE_DEFAULT;
|
|
8006b58: 68fb ldr r3, [r7, #12]
|
|
8006b5a: 2201 movs r2, #1
|
|
8006b5c: f883 229c strb.w r2, [r3, #668] ; 0x29c
|
|
pdev->id = id;
|
|
8006b60: 68fb ldr r3, [r7, #12]
|
|
8006b62: 79fa ldrb r2, [r7, #7]
|
|
8006b64: 701a strb r2, [r3, #0]
|
|
/* Initialize low level driver */
|
|
USBD_LL_Init(pdev);
|
|
8006b66: 68f8 ldr r0, [r7, #12]
|
|
8006b68: f003 fd66 bl 800a638 <USBD_LL_Init>
|
|
|
|
return USBD_OK;
|
|
8006b6c: 2300 movs r3, #0
|
|
}
|
|
8006b6e: 4618 mov r0, r3
|
|
8006b70: 3710 adds r7, #16
|
|
8006b72: 46bd mov sp, r7
|
|
8006b74: bd80 pop {r7, pc}
|
|
|
|
08006b76 <USBD_RegisterClass>:
|
|
* @param pDevice : Device Handle
|
|
* @param pclass: Class handle
|
|
* @retval USBD Status
|
|
*/
|
|
USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass)
|
|
{
|
|
8006b76: b480 push {r7}
|
|
8006b78: b085 sub sp, #20
|
|
8006b7a: af00 add r7, sp, #0
|
|
8006b7c: 6078 str r0, [r7, #4]
|
|
8006b7e: 6039 str r1, [r7, #0]
|
|
USBD_StatusTypeDef status = USBD_OK;
|
|
8006b80: 2300 movs r3, #0
|
|
8006b82: 73fb strb r3, [r7, #15]
|
|
if (pclass != NULL)
|
|
8006b84: 683b ldr r3, [r7, #0]
|
|
8006b86: 2b00 cmp r3, #0
|
|
8006b88: d006 beq.n 8006b98 <USBD_RegisterClass+0x22>
|
|
{
|
|
/* link the class to the USB Device handle */
|
|
pdev->pClass = pclass;
|
|
8006b8a: 687b ldr r3, [r7, #4]
|
|
8006b8c: 683a ldr r2, [r7, #0]
|
|
8006b8e: f8c3 22b4 str.w r2, [r3, #692] ; 0x2b4
|
|
status = USBD_OK;
|
|
8006b92: 2300 movs r3, #0
|
|
8006b94: 73fb strb r3, [r7, #15]
|
|
8006b96: e001 b.n 8006b9c <USBD_RegisterClass+0x26>
|
|
else
|
|
{
|
|
#if (USBD_DEBUG_LEVEL > 1U)
|
|
USBD_ErrLog("Invalid Class handle");
|
|
#endif
|
|
status = USBD_FAIL;
|
|
8006b98: 2302 movs r3, #2
|
|
8006b9a: 73fb strb r3, [r7, #15]
|
|
}
|
|
|
|
return status;
|
|
8006b9c: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
8006b9e: 4618 mov r0, r3
|
|
8006ba0: 3714 adds r7, #20
|
|
8006ba2: 46bd mov sp, r7
|
|
8006ba4: bc80 pop {r7}
|
|
8006ba6: 4770 bx lr
|
|
|
|
08006ba8 <USBD_Start>:
|
|
* Start the USB Device Core.
|
|
* @param pdev: Device Handle
|
|
* @retval USBD Status
|
|
*/
|
|
USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8006ba8: b580 push {r7, lr}
|
|
8006baa: b082 sub sp, #8
|
|
8006bac: af00 add r7, sp, #0
|
|
8006bae: 6078 str r0, [r7, #4]
|
|
/* Start the low level driver */
|
|
USBD_LL_Start(pdev);
|
|
8006bb0: 6878 ldr r0, [r7, #4]
|
|
8006bb2: f003 fd9b bl 800a6ec <USBD_LL_Start>
|
|
|
|
return USBD_OK;
|
|
8006bb6: 2300 movs r3, #0
|
|
}
|
|
8006bb8: 4618 mov r0, r3
|
|
8006bba: 3708 adds r7, #8
|
|
8006bbc: 46bd mov sp, r7
|
|
8006bbe: bd80 pop {r7, pc}
|
|
|
|
08006bc0 <USBD_RunTestMode>:
|
|
* Launch test mode process
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8006bc0: b480 push {r7}
|
|
8006bc2: b083 sub sp, #12
|
|
8006bc4: af00 add r7, sp, #0
|
|
8006bc6: 6078 str r0, [r7, #4]
|
|
/* Prevent unused argument compilation warning */
|
|
UNUSED(pdev);
|
|
|
|
return USBD_OK;
|
|
8006bc8: 2300 movs r3, #0
|
|
}
|
|
8006bca: 4618 mov r0, r3
|
|
8006bcc: 370c adds r7, #12
|
|
8006bce: 46bd mov sp, r7
|
|
8006bd0: bc80 pop {r7}
|
|
8006bd2: 4770 bx lr
|
|
|
|
08006bd4 <USBD_SetClassConfig>:
|
|
* @param cfgidx: configuration index
|
|
* @retval status
|
|
*/
|
|
|
|
USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
|
|
{
|
|
8006bd4: b580 push {r7, lr}
|
|
8006bd6: b084 sub sp, #16
|
|
8006bd8: af00 add r7, sp, #0
|
|
8006bda: 6078 str r0, [r7, #4]
|
|
8006bdc: 460b mov r3, r1
|
|
8006bde: 70fb strb r3, [r7, #3]
|
|
USBD_StatusTypeDef ret = USBD_FAIL;
|
|
8006be0: 2302 movs r3, #2
|
|
8006be2: 73fb strb r3, [r7, #15]
|
|
|
|
if (pdev->pClass != NULL)
|
|
8006be4: 687b ldr r3, [r7, #4]
|
|
8006be6: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8006bea: 2b00 cmp r3, #0
|
|
8006bec: d00c beq.n 8006c08 <USBD_SetClassConfig+0x34>
|
|
{
|
|
/* Set configuration and Start the Class*/
|
|
if (pdev->pClass->Init(pdev, cfgidx) == 0U)
|
|
8006bee: 687b ldr r3, [r7, #4]
|
|
8006bf0: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8006bf4: 681b ldr r3, [r3, #0]
|
|
8006bf6: 78fa ldrb r2, [r7, #3]
|
|
8006bf8: 4611 mov r1, r2
|
|
8006bfa: 6878 ldr r0, [r7, #4]
|
|
8006bfc: 4798 blx r3
|
|
8006bfe: 4603 mov r3, r0
|
|
8006c00: 2b00 cmp r3, #0
|
|
8006c02: d101 bne.n 8006c08 <USBD_SetClassConfig+0x34>
|
|
{
|
|
ret = USBD_OK;
|
|
8006c04: 2300 movs r3, #0
|
|
8006c06: 73fb strb r3, [r7, #15]
|
|
}
|
|
}
|
|
|
|
return ret;
|
|
8006c08: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
8006c0a: 4618 mov r0, r3
|
|
8006c0c: 3710 adds r7, #16
|
|
8006c0e: 46bd mov sp, r7
|
|
8006c10: bd80 pop {r7, pc}
|
|
|
|
08006c12 <USBD_ClrClassConfig>:
|
|
* @param pdev: device instance
|
|
* @param cfgidx: configuration index
|
|
* @retval status: USBD_StatusTypeDef
|
|
*/
|
|
USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
|
|
{
|
|
8006c12: b580 push {r7, lr}
|
|
8006c14: b082 sub sp, #8
|
|
8006c16: af00 add r7, sp, #0
|
|
8006c18: 6078 str r0, [r7, #4]
|
|
8006c1a: 460b mov r3, r1
|
|
8006c1c: 70fb strb r3, [r7, #3]
|
|
/* Clear configuration and De-initialize the Class process*/
|
|
pdev->pClass->DeInit(pdev, cfgidx);
|
|
8006c1e: 687b ldr r3, [r7, #4]
|
|
8006c20: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8006c24: 685b ldr r3, [r3, #4]
|
|
8006c26: 78fa ldrb r2, [r7, #3]
|
|
8006c28: 4611 mov r1, r2
|
|
8006c2a: 6878 ldr r0, [r7, #4]
|
|
8006c2c: 4798 blx r3
|
|
|
|
return USBD_OK;
|
|
8006c2e: 2300 movs r3, #0
|
|
}
|
|
8006c30: 4618 mov r0, r3
|
|
8006c32: 3708 adds r7, #8
|
|
8006c34: 46bd mov sp, r7
|
|
8006c36: bd80 pop {r7, pc}
|
|
|
|
08006c38 <USBD_LL_SetupStage>:
|
|
* Handle the setup stage
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup)
|
|
{
|
|
8006c38: b580 push {r7, lr}
|
|
8006c3a: b082 sub sp, #8
|
|
8006c3c: af00 add r7, sp, #0
|
|
8006c3e: 6078 str r0, [r7, #4]
|
|
8006c40: 6039 str r1, [r7, #0]
|
|
USBD_ParseSetupRequest(&pdev->request, psetup);
|
|
8006c42: 687b ldr r3, [r7, #4]
|
|
8006c44: f503 732a add.w r3, r3, #680 ; 0x2a8
|
|
8006c48: 6839 ldr r1, [r7, #0]
|
|
8006c4a: 4618 mov r0, r3
|
|
8006c4c: f000 feca bl 80079e4 <USBD_ParseSetupRequest>
|
|
|
|
pdev->ep0_state = USBD_EP0_SETUP;
|
|
8006c50: 687b ldr r3, [r7, #4]
|
|
8006c52: 2201 movs r2, #1
|
|
8006c54: f8c3 2294 str.w r2, [r3, #660] ; 0x294
|
|
|
|
pdev->ep0_data_len = pdev->request.wLength;
|
|
8006c58: 687b ldr r3, [r7, #4]
|
|
8006c5a: f8b3 32ae ldrh.w r3, [r3, #686] ; 0x2ae
|
|
8006c5e: 461a mov r2, r3
|
|
8006c60: 687b ldr r3, [r7, #4]
|
|
8006c62: f8c3 2298 str.w r2, [r3, #664] ; 0x298
|
|
|
|
switch (pdev->request.bmRequest & 0x1FU)
|
|
8006c66: 687b ldr r3, [r7, #4]
|
|
8006c68: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
|
|
8006c6c: f003 031f and.w r3, r3, #31
|
|
8006c70: 2b01 cmp r3, #1
|
|
8006c72: d00c beq.n 8006c8e <USBD_LL_SetupStage+0x56>
|
|
8006c74: 2b01 cmp r3, #1
|
|
8006c76: d302 bcc.n 8006c7e <USBD_LL_SetupStage+0x46>
|
|
8006c78: 2b02 cmp r3, #2
|
|
8006c7a: d010 beq.n 8006c9e <USBD_LL_SetupStage+0x66>
|
|
8006c7c: e017 b.n 8006cae <USBD_LL_SetupStage+0x76>
|
|
{
|
|
case USB_REQ_RECIPIENT_DEVICE:
|
|
USBD_StdDevReq(pdev, &pdev->request);
|
|
8006c7e: 687b ldr r3, [r7, #4]
|
|
8006c80: f503 732a add.w r3, r3, #680 ; 0x2a8
|
|
8006c84: 4619 mov r1, r3
|
|
8006c86: 6878 ldr r0, [r7, #4]
|
|
8006c88: f000 f9ca bl 8007020 <USBD_StdDevReq>
|
|
break;
|
|
8006c8c: e01a b.n 8006cc4 <USBD_LL_SetupStage+0x8c>
|
|
|
|
case USB_REQ_RECIPIENT_INTERFACE:
|
|
USBD_StdItfReq(pdev, &pdev->request);
|
|
8006c8e: 687b ldr r3, [r7, #4]
|
|
8006c90: f503 732a add.w r3, r3, #680 ; 0x2a8
|
|
8006c94: 4619 mov r1, r3
|
|
8006c96: 6878 ldr r0, [r7, #4]
|
|
8006c98: f000 fa2c bl 80070f4 <USBD_StdItfReq>
|
|
break;
|
|
8006c9c: e012 b.n 8006cc4 <USBD_LL_SetupStage+0x8c>
|
|
|
|
case USB_REQ_RECIPIENT_ENDPOINT:
|
|
USBD_StdEPReq(pdev, &pdev->request);
|
|
8006c9e: 687b ldr r3, [r7, #4]
|
|
8006ca0: f503 732a add.w r3, r3, #680 ; 0x2a8
|
|
8006ca4: 4619 mov r1, r3
|
|
8006ca6: 6878 ldr r0, [r7, #4]
|
|
8006ca8: f000 fa6a bl 8007180 <USBD_StdEPReq>
|
|
break;
|
|
8006cac: e00a b.n 8006cc4 <USBD_LL_SetupStage+0x8c>
|
|
|
|
default:
|
|
USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U));
|
|
8006cae: 687b ldr r3, [r7, #4]
|
|
8006cb0: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
|
|
8006cb4: f023 037f bic.w r3, r3, #127 ; 0x7f
|
|
8006cb8: b2db uxtb r3, r3
|
|
8006cba: 4619 mov r1, r3
|
|
8006cbc: 6878 ldr r0, [r7, #4]
|
|
8006cbe: f003 fd75 bl 800a7ac <USBD_LL_StallEP>
|
|
break;
|
|
8006cc2: bf00 nop
|
|
}
|
|
|
|
return USBD_OK;
|
|
8006cc4: 2300 movs r3, #0
|
|
}
|
|
8006cc6: 4618 mov r0, r3
|
|
8006cc8: 3708 adds r7, #8
|
|
8006cca: 46bd mov sp, r7
|
|
8006ccc: bd80 pop {r7, pc}
|
|
|
|
08006cce <USBD_LL_DataOutStage>:
|
|
* @param epnum: endpoint index
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev,
|
|
uint8_t epnum, uint8_t *pdata)
|
|
{
|
|
8006cce: b580 push {r7, lr}
|
|
8006cd0: b086 sub sp, #24
|
|
8006cd2: af00 add r7, sp, #0
|
|
8006cd4: 60f8 str r0, [r7, #12]
|
|
8006cd6: 460b mov r3, r1
|
|
8006cd8: 607a str r2, [r7, #4]
|
|
8006cda: 72fb strb r3, [r7, #11]
|
|
USBD_EndpointTypeDef *pep;
|
|
|
|
if (epnum == 0U)
|
|
8006cdc: 7afb ldrb r3, [r7, #11]
|
|
8006cde: 2b00 cmp r3, #0
|
|
8006ce0: d14b bne.n 8006d7a <USBD_LL_DataOutStage+0xac>
|
|
{
|
|
pep = &pdev->ep_out[0];
|
|
8006ce2: 68fb ldr r3, [r7, #12]
|
|
8006ce4: f503 73aa add.w r3, r3, #340 ; 0x154
|
|
8006ce8: 617b str r3, [r7, #20]
|
|
|
|
if (pdev->ep0_state == USBD_EP0_DATA_OUT)
|
|
8006cea: 68fb ldr r3, [r7, #12]
|
|
8006cec: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294
|
|
8006cf0: 2b03 cmp r3, #3
|
|
8006cf2: d134 bne.n 8006d5e <USBD_LL_DataOutStage+0x90>
|
|
{
|
|
if (pep->rem_length > pep->maxpacket)
|
|
8006cf4: 697b ldr r3, [r7, #20]
|
|
8006cf6: 68da ldr r2, [r3, #12]
|
|
8006cf8: 697b ldr r3, [r7, #20]
|
|
8006cfa: 691b ldr r3, [r3, #16]
|
|
8006cfc: 429a cmp r2, r3
|
|
8006cfe: d919 bls.n 8006d34 <USBD_LL_DataOutStage+0x66>
|
|
{
|
|
pep->rem_length -= pep->maxpacket;
|
|
8006d00: 697b ldr r3, [r7, #20]
|
|
8006d02: 68da ldr r2, [r3, #12]
|
|
8006d04: 697b ldr r3, [r7, #20]
|
|
8006d06: 691b ldr r3, [r3, #16]
|
|
8006d08: 1ad2 subs r2, r2, r3
|
|
8006d0a: 697b ldr r3, [r7, #20]
|
|
8006d0c: 60da str r2, [r3, #12]
|
|
|
|
USBD_CtlContinueRx(pdev, pdata,
|
|
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
|
|
8006d0e: 697b ldr r3, [r7, #20]
|
|
8006d10: 68da ldr r2, [r3, #12]
|
|
8006d12: 697b ldr r3, [r7, #20]
|
|
8006d14: 691b ldr r3, [r3, #16]
|
|
USBD_CtlContinueRx(pdev, pdata,
|
|
8006d16: 429a cmp r2, r3
|
|
8006d18: d203 bcs.n 8006d22 <USBD_LL_DataOutStage+0x54>
|
|
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
|
|
8006d1a: 697b ldr r3, [r7, #20]
|
|
8006d1c: 68db ldr r3, [r3, #12]
|
|
USBD_CtlContinueRx(pdev, pdata,
|
|
8006d1e: b29b uxth r3, r3
|
|
8006d20: e002 b.n 8006d28 <USBD_LL_DataOutStage+0x5a>
|
|
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
|
|
8006d22: 697b ldr r3, [r7, #20]
|
|
8006d24: 691b ldr r3, [r3, #16]
|
|
USBD_CtlContinueRx(pdev, pdata,
|
|
8006d26: b29b uxth r3, r3
|
|
8006d28: 461a mov r2, r3
|
|
8006d2a: 6879 ldr r1, [r7, #4]
|
|
8006d2c: 68f8 ldr r0, [r7, #12]
|
|
8006d2e: f000 ff4b bl 8007bc8 <USBD_CtlContinueRx>
|
|
8006d32: e038 b.n 8006da6 <USBD_LL_DataOutStage+0xd8>
|
|
}
|
|
else
|
|
{
|
|
if ((pdev->pClass->EP0_RxReady != NULL) &&
|
|
8006d34: 68fb ldr r3, [r7, #12]
|
|
8006d36: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8006d3a: 691b ldr r3, [r3, #16]
|
|
8006d3c: 2b00 cmp r3, #0
|
|
8006d3e: d00a beq.n 8006d56 <USBD_LL_DataOutStage+0x88>
|
|
(pdev->dev_state == USBD_STATE_CONFIGURED))
|
|
8006d40: 68fb ldr r3, [r7, #12]
|
|
8006d42: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
if ((pdev->pClass->EP0_RxReady != NULL) &&
|
|
8006d46: 2b03 cmp r3, #3
|
|
8006d48: d105 bne.n 8006d56 <USBD_LL_DataOutStage+0x88>
|
|
{
|
|
pdev->pClass->EP0_RxReady(pdev);
|
|
8006d4a: 68fb ldr r3, [r7, #12]
|
|
8006d4c: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8006d50: 691b ldr r3, [r3, #16]
|
|
8006d52: 68f8 ldr r0, [r7, #12]
|
|
8006d54: 4798 blx r3
|
|
}
|
|
USBD_CtlSendStatus(pdev);
|
|
8006d56: 68f8 ldr r0, [r7, #12]
|
|
8006d58: f000 ff48 bl 8007bec <USBD_CtlSendStatus>
|
|
8006d5c: e023 b.n 8006da6 <USBD_LL_DataOutStage+0xd8>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if (pdev->ep0_state == USBD_EP0_STATUS_OUT)
|
|
8006d5e: 68fb ldr r3, [r7, #12]
|
|
8006d60: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294
|
|
8006d64: 2b05 cmp r3, #5
|
|
8006d66: d11e bne.n 8006da6 <USBD_LL_DataOutStage+0xd8>
|
|
{
|
|
/*
|
|
* STATUS PHASE completed, update ep0_state to idle
|
|
*/
|
|
pdev->ep0_state = USBD_EP0_IDLE;
|
|
8006d68: 68fb ldr r3, [r7, #12]
|
|
8006d6a: 2200 movs r2, #0
|
|
8006d6c: f8c3 2294 str.w r2, [r3, #660] ; 0x294
|
|
USBD_LL_StallEP(pdev, 0U);
|
|
8006d70: 2100 movs r1, #0
|
|
8006d72: 68f8 ldr r0, [r7, #12]
|
|
8006d74: f003 fd1a bl 800a7ac <USBD_LL_StallEP>
|
|
8006d78: e015 b.n 8006da6 <USBD_LL_DataOutStage+0xd8>
|
|
}
|
|
}
|
|
}
|
|
else if ((pdev->pClass->DataOut != NULL) &&
|
|
8006d7a: 68fb ldr r3, [r7, #12]
|
|
8006d7c: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8006d80: 699b ldr r3, [r3, #24]
|
|
8006d82: 2b00 cmp r3, #0
|
|
8006d84: d00d beq.n 8006da2 <USBD_LL_DataOutStage+0xd4>
|
|
(pdev->dev_state == USBD_STATE_CONFIGURED))
|
|
8006d86: 68fb ldr r3, [r7, #12]
|
|
8006d88: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
else if ((pdev->pClass->DataOut != NULL) &&
|
|
8006d8c: 2b03 cmp r3, #3
|
|
8006d8e: d108 bne.n 8006da2 <USBD_LL_DataOutStage+0xd4>
|
|
{
|
|
pdev->pClass->DataOut(pdev, epnum);
|
|
8006d90: 68fb ldr r3, [r7, #12]
|
|
8006d92: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8006d96: 699b ldr r3, [r3, #24]
|
|
8006d98: 7afa ldrb r2, [r7, #11]
|
|
8006d9a: 4611 mov r1, r2
|
|
8006d9c: 68f8 ldr r0, [r7, #12]
|
|
8006d9e: 4798 blx r3
|
|
8006da0: e001 b.n 8006da6 <USBD_LL_DataOutStage+0xd8>
|
|
}
|
|
else
|
|
{
|
|
/* should never be in this condition */
|
|
return USBD_FAIL;
|
|
8006da2: 2302 movs r3, #2
|
|
8006da4: e000 b.n 8006da8 <USBD_LL_DataOutStage+0xda>
|
|
}
|
|
|
|
return USBD_OK;
|
|
8006da6: 2300 movs r3, #0
|
|
}
|
|
8006da8: 4618 mov r0, r3
|
|
8006daa: 3718 adds r7, #24
|
|
8006dac: 46bd mov sp, r7
|
|
8006dae: bd80 pop {r7, pc}
|
|
|
|
08006db0 <USBD_LL_DataInStage>:
|
|
* @param epnum: endpoint index
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev,
|
|
uint8_t epnum, uint8_t *pdata)
|
|
{
|
|
8006db0: b580 push {r7, lr}
|
|
8006db2: b086 sub sp, #24
|
|
8006db4: af00 add r7, sp, #0
|
|
8006db6: 60f8 str r0, [r7, #12]
|
|
8006db8: 460b mov r3, r1
|
|
8006dba: 607a str r2, [r7, #4]
|
|
8006dbc: 72fb strb r3, [r7, #11]
|
|
USBD_EndpointTypeDef *pep;
|
|
|
|
if (epnum == 0U)
|
|
8006dbe: 7afb ldrb r3, [r7, #11]
|
|
8006dc0: 2b00 cmp r3, #0
|
|
8006dc2: d17f bne.n 8006ec4 <USBD_LL_DataInStage+0x114>
|
|
{
|
|
pep = &pdev->ep_in[0];
|
|
8006dc4: 68fb ldr r3, [r7, #12]
|
|
8006dc6: 3314 adds r3, #20
|
|
8006dc8: 617b str r3, [r7, #20]
|
|
|
|
if (pdev->ep0_state == USBD_EP0_DATA_IN)
|
|
8006dca: 68fb ldr r3, [r7, #12]
|
|
8006dcc: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294
|
|
8006dd0: 2b02 cmp r3, #2
|
|
8006dd2: d15c bne.n 8006e8e <USBD_LL_DataInStage+0xde>
|
|
{
|
|
if (pep->rem_length > pep->maxpacket)
|
|
8006dd4: 697b ldr r3, [r7, #20]
|
|
8006dd6: 68da ldr r2, [r3, #12]
|
|
8006dd8: 697b ldr r3, [r7, #20]
|
|
8006dda: 691b ldr r3, [r3, #16]
|
|
8006ddc: 429a cmp r2, r3
|
|
8006dde: d915 bls.n 8006e0c <USBD_LL_DataInStage+0x5c>
|
|
{
|
|
pep->rem_length -= pep->maxpacket;
|
|
8006de0: 697b ldr r3, [r7, #20]
|
|
8006de2: 68da ldr r2, [r3, #12]
|
|
8006de4: 697b ldr r3, [r7, #20]
|
|
8006de6: 691b ldr r3, [r3, #16]
|
|
8006de8: 1ad2 subs r2, r2, r3
|
|
8006dea: 697b ldr r3, [r7, #20]
|
|
8006dec: 60da str r2, [r3, #12]
|
|
|
|
USBD_CtlContinueSendData(pdev, pdata, (uint16_t)pep->rem_length);
|
|
8006dee: 697b ldr r3, [r7, #20]
|
|
8006df0: 68db ldr r3, [r3, #12]
|
|
8006df2: b29b uxth r3, r3
|
|
8006df4: 461a mov r2, r3
|
|
8006df6: 6879 ldr r1, [r7, #4]
|
|
8006df8: 68f8 ldr r0, [r7, #12]
|
|
8006dfa: f000 feb5 bl 8007b68 <USBD_CtlContinueSendData>
|
|
|
|
/* Prepare endpoint for premature end of transfer */
|
|
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
|
|
8006dfe: 2300 movs r3, #0
|
|
8006e00: 2200 movs r2, #0
|
|
8006e02: 2100 movs r1, #0
|
|
8006e04: 68f8 ldr r0, [r7, #12]
|
|
8006e06: f003 fd76 bl 800a8f6 <USBD_LL_PrepareReceive>
|
|
8006e0a: e04e b.n 8006eaa <USBD_LL_DataInStage+0xfa>
|
|
}
|
|
else
|
|
{
|
|
/* last packet is MPS multiple, so send ZLP packet */
|
|
if ((pep->total_length % pep->maxpacket == 0U) &&
|
|
8006e0c: 697b ldr r3, [r7, #20]
|
|
8006e0e: 689b ldr r3, [r3, #8]
|
|
8006e10: 697a ldr r2, [r7, #20]
|
|
8006e12: 6912 ldr r2, [r2, #16]
|
|
8006e14: fbb3 f1f2 udiv r1, r3, r2
|
|
8006e18: fb02 f201 mul.w r2, r2, r1
|
|
8006e1c: 1a9b subs r3, r3, r2
|
|
8006e1e: 2b00 cmp r3, #0
|
|
8006e20: d11c bne.n 8006e5c <USBD_LL_DataInStage+0xac>
|
|
(pep->total_length >= pep->maxpacket) &&
|
|
8006e22: 697b ldr r3, [r7, #20]
|
|
8006e24: 689a ldr r2, [r3, #8]
|
|
8006e26: 697b ldr r3, [r7, #20]
|
|
8006e28: 691b ldr r3, [r3, #16]
|
|
if ((pep->total_length % pep->maxpacket == 0U) &&
|
|
8006e2a: 429a cmp r2, r3
|
|
8006e2c: d316 bcc.n 8006e5c <USBD_LL_DataInStage+0xac>
|
|
(pep->total_length < pdev->ep0_data_len))
|
|
8006e2e: 697b ldr r3, [r7, #20]
|
|
8006e30: 689a ldr r2, [r3, #8]
|
|
8006e32: 68fb ldr r3, [r7, #12]
|
|
8006e34: f8d3 3298 ldr.w r3, [r3, #664] ; 0x298
|
|
(pep->total_length >= pep->maxpacket) &&
|
|
8006e38: 429a cmp r2, r3
|
|
8006e3a: d20f bcs.n 8006e5c <USBD_LL_DataInStage+0xac>
|
|
{
|
|
USBD_CtlContinueSendData(pdev, NULL, 0U);
|
|
8006e3c: 2200 movs r2, #0
|
|
8006e3e: 2100 movs r1, #0
|
|
8006e40: 68f8 ldr r0, [r7, #12]
|
|
8006e42: f000 fe91 bl 8007b68 <USBD_CtlContinueSendData>
|
|
pdev->ep0_data_len = 0U;
|
|
8006e46: 68fb ldr r3, [r7, #12]
|
|
8006e48: 2200 movs r2, #0
|
|
8006e4a: f8c3 2298 str.w r2, [r3, #664] ; 0x298
|
|
|
|
/* Prepare endpoint for premature end of transfer */
|
|
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
|
|
8006e4e: 2300 movs r3, #0
|
|
8006e50: 2200 movs r2, #0
|
|
8006e52: 2100 movs r1, #0
|
|
8006e54: 68f8 ldr r0, [r7, #12]
|
|
8006e56: f003 fd4e bl 800a8f6 <USBD_LL_PrepareReceive>
|
|
8006e5a: e026 b.n 8006eaa <USBD_LL_DataInStage+0xfa>
|
|
}
|
|
else
|
|
{
|
|
if ((pdev->pClass->EP0_TxSent != NULL) &&
|
|
8006e5c: 68fb ldr r3, [r7, #12]
|
|
8006e5e: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8006e62: 68db ldr r3, [r3, #12]
|
|
8006e64: 2b00 cmp r3, #0
|
|
8006e66: d00a beq.n 8006e7e <USBD_LL_DataInStage+0xce>
|
|
(pdev->dev_state == USBD_STATE_CONFIGURED))
|
|
8006e68: 68fb ldr r3, [r7, #12]
|
|
8006e6a: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
if ((pdev->pClass->EP0_TxSent != NULL) &&
|
|
8006e6e: 2b03 cmp r3, #3
|
|
8006e70: d105 bne.n 8006e7e <USBD_LL_DataInStage+0xce>
|
|
{
|
|
pdev->pClass->EP0_TxSent(pdev);
|
|
8006e72: 68fb ldr r3, [r7, #12]
|
|
8006e74: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8006e78: 68db ldr r3, [r3, #12]
|
|
8006e7a: 68f8 ldr r0, [r7, #12]
|
|
8006e7c: 4798 blx r3
|
|
}
|
|
USBD_LL_StallEP(pdev, 0x80U);
|
|
8006e7e: 2180 movs r1, #128 ; 0x80
|
|
8006e80: 68f8 ldr r0, [r7, #12]
|
|
8006e82: f003 fc93 bl 800a7ac <USBD_LL_StallEP>
|
|
USBD_CtlReceiveStatus(pdev);
|
|
8006e86: 68f8 ldr r0, [r7, #12]
|
|
8006e88: f000 fec3 bl 8007c12 <USBD_CtlReceiveStatus>
|
|
8006e8c: e00d b.n 8006eaa <USBD_LL_DataInStage+0xfa>
|
|
}
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
|
|
8006e8e: 68fb ldr r3, [r7, #12]
|
|
8006e90: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294
|
|
8006e94: 2b04 cmp r3, #4
|
|
8006e96: d004 beq.n 8006ea2 <USBD_LL_DataInStage+0xf2>
|
|
(pdev->ep0_state == USBD_EP0_IDLE))
|
|
8006e98: 68fb ldr r3, [r7, #12]
|
|
8006e9a: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294
|
|
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
|
|
8006e9e: 2b00 cmp r3, #0
|
|
8006ea0: d103 bne.n 8006eaa <USBD_LL_DataInStage+0xfa>
|
|
{
|
|
USBD_LL_StallEP(pdev, 0x80U);
|
|
8006ea2: 2180 movs r1, #128 ; 0x80
|
|
8006ea4: 68f8 ldr r0, [r7, #12]
|
|
8006ea6: f003 fc81 bl 800a7ac <USBD_LL_StallEP>
|
|
}
|
|
}
|
|
|
|
if (pdev->dev_test_mode == 1U)
|
|
8006eaa: 68fb ldr r3, [r7, #12]
|
|
8006eac: f893 32a0 ldrb.w r3, [r3, #672] ; 0x2a0
|
|
8006eb0: 2b01 cmp r3, #1
|
|
8006eb2: d11d bne.n 8006ef0 <USBD_LL_DataInStage+0x140>
|
|
{
|
|
USBD_RunTestMode(pdev);
|
|
8006eb4: 68f8 ldr r0, [r7, #12]
|
|
8006eb6: f7ff fe83 bl 8006bc0 <USBD_RunTestMode>
|
|
pdev->dev_test_mode = 0U;
|
|
8006eba: 68fb ldr r3, [r7, #12]
|
|
8006ebc: 2200 movs r2, #0
|
|
8006ebe: f883 22a0 strb.w r2, [r3, #672] ; 0x2a0
|
|
8006ec2: e015 b.n 8006ef0 <USBD_LL_DataInStage+0x140>
|
|
}
|
|
}
|
|
else if ((pdev->pClass->DataIn != NULL) &&
|
|
8006ec4: 68fb ldr r3, [r7, #12]
|
|
8006ec6: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8006eca: 695b ldr r3, [r3, #20]
|
|
8006ecc: 2b00 cmp r3, #0
|
|
8006ece: d00d beq.n 8006eec <USBD_LL_DataInStage+0x13c>
|
|
(pdev->dev_state == USBD_STATE_CONFIGURED))
|
|
8006ed0: 68fb ldr r3, [r7, #12]
|
|
8006ed2: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
else if ((pdev->pClass->DataIn != NULL) &&
|
|
8006ed6: 2b03 cmp r3, #3
|
|
8006ed8: d108 bne.n 8006eec <USBD_LL_DataInStage+0x13c>
|
|
{
|
|
pdev->pClass->DataIn(pdev, epnum);
|
|
8006eda: 68fb ldr r3, [r7, #12]
|
|
8006edc: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8006ee0: 695b ldr r3, [r3, #20]
|
|
8006ee2: 7afa ldrb r2, [r7, #11]
|
|
8006ee4: 4611 mov r1, r2
|
|
8006ee6: 68f8 ldr r0, [r7, #12]
|
|
8006ee8: 4798 blx r3
|
|
8006eea: e001 b.n 8006ef0 <USBD_LL_DataInStage+0x140>
|
|
}
|
|
else
|
|
{
|
|
/* should never be in this condition */
|
|
return USBD_FAIL;
|
|
8006eec: 2302 movs r3, #2
|
|
8006eee: e000 b.n 8006ef2 <USBD_LL_DataInStage+0x142>
|
|
}
|
|
|
|
return USBD_OK;
|
|
8006ef0: 2300 movs r3, #0
|
|
}
|
|
8006ef2: 4618 mov r0, r3
|
|
8006ef4: 3718 adds r7, #24
|
|
8006ef6: 46bd mov sp, r7
|
|
8006ef8: bd80 pop {r7, pc}
|
|
|
|
08006efa <USBD_LL_Reset>:
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
|
|
USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8006efa: b580 push {r7, lr}
|
|
8006efc: b082 sub sp, #8
|
|
8006efe: af00 add r7, sp, #0
|
|
8006f00: 6078 str r0, [r7, #4]
|
|
/* Open EP0 OUT */
|
|
USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
|
|
8006f02: 2340 movs r3, #64 ; 0x40
|
|
8006f04: 2200 movs r2, #0
|
|
8006f06: 2100 movs r1, #0
|
|
8006f08: 6878 ldr r0, [r7, #4]
|
|
8006f0a: f003 fc0a bl 800a722 <USBD_LL_OpenEP>
|
|
pdev->ep_out[0x00U & 0xFU].is_used = 1U;
|
|
8006f0e: 687b ldr r3, [r7, #4]
|
|
8006f10: 2201 movs r2, #1
|
|
8006f12: f8c3 2158 str.w r2, [r3, #344] ; 0x158
|
|
|
|
pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE;
|
|
8006f16: 687b ldr r3, [r7, #4]
|
|
8006f18: 2240 movs r2, #64 ; 0x40
|
|
8006f1a: f8c3 2164 str.w r2, [r3, #356] ; 0x164
|
|
|
|
/* Open EP0 IN */
|
|
USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
|
|
8006f1e: 2340 movs r3, #64 ; 0x40
|
|
8006f20: 2200 movs r2, #0
|
|
8006f22: 2180 movs r1, #128 ; 0x80
|
|
8006f24: 6878 ldr r0, [r7, #4]
|
|
8006f26: f003 fbfc bl 800a722 <USBD_LL_OpenEP>
|
|
pdev->ep_in[0x80U & 0xFU].is_used = 1U;
|
|
8006f2a: 687b ldr r3, [r7, #4]
|
|
8006f2c: 2201 movs r2, #1
|
|
8006f2e: 619a str r2, [r3, #24]
|
|
|
|
pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE;
|
|
8006f30: 687b ldr r3, [r7, #4]
|
|
8006f32: 2240 movs r2, #64 ; 0x40
|
|
8006f34: 625a str r2, [r3, #36] ; 0x24
|
|
|
|
/* Upon Reset call user call back */
|
|
pdev->dev_state = USBD_STATE_DEFAULT;
|
|
8006f36: 687b ldr r3, [r7, #4]
|
|
8006f38: 2201 movs r2, #1
|
|
8006f3a: f883 229c strb.w r2, [r3, #668] ; 0x29c
|
|
pdev->ep0_state = USBD_EP0_IDLE;
|
|
8006f3e: 687b ldr r3, [r7, #4]
|
|
8006f40: 2200 movs r2, #0
|
|
8006f42: f8c3 2294 str.w r2, [r3, #660] ; 0x294
|
|
pdev->dev_config = 0U;
|
|
8006f46: 687b ldr r3, [r7, #4]
|
|
8006f48: 2200 movs r2, #0
|
|
8006f4a: 605a str r2, [r3, #4]
|
|
pdev->dev_remote_wakeup = 0U;
|
|
8006f4c: 687b ldr r3, [r7, #4]
|
|
8006f4e: 2200 movs r2, #0
|
|
8006f50: f8c3 22a4 str.w r2, [r3, #676] ; 0x2a4
|
|
|
|
if (pdev->pClassData)
|
|
8006f54: 687b ldr r3, [r7, #4]
|
|
8006f56: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
|
|
8006f5a: 2b00 cmp r3, #0
|
|
8006f5c: d009 beq.n 8006f72 <USBD_LL_Reset+0x78>
|
|
{
|
|
pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config);
|
|
8006f5e: 687b ldr r3, [r7, #4]
|
|
8006f60: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8006f64: 685b ldr r3, [r3, #4]
|
|
8006f66: 687a ldr r2, [r7, #4]
|
|
8006f68: 6852 ldr r2, [r2, #4]
|
|
8006f6a: b2d2 uxtb r2, r2
|
|
8006f6c: 4611 mov r1, r2
|
|
8006f6e: 6878 ldr r0, [r7, #4]
|
|
8006f70: 4798 blx r3
|
|
}
|
|
|
|
return USBD_OK;
|
|
8006f72: 2300 movs r3, #0
|
|
}
|
|
8006f74: 4618 mov r0, r3
|
|
8006f76: 3708 adds r7, #8
|
|
8006f78: 46bd mov sp, r7
|
|
8006f7a: bd80 pop {r7, pc}
|
|
|
|
08006f7c <USBD_LL_SetSpeed>:
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev,
|
|
USBD_SpeedTypeDef speed)
|
|
{
|
|
8006f7c: b480 push {r7}
|
|
8006f7e: b083 sub sp, #12
|
|
8006f80: af00 add r7, sp, #0
|
|
8006f82: 6078 str r0, [r7, #4]
|
|
8006f84: 460b mov r3, r1
|
|
8006f86: 70fb strb r3, [r7, #3]
|
|
pdev->dev_speed = speed;
|
|
8006f88: 687b ldr r3, [r7, #4]
|
|
8006f8a: 78fa ldrb r2, [r7, #3]
|
|
8006f8c: 741a strb r2, [r3, #16]
|
|
|
|
return USBD_OK;
|
|
8006f8e: 2300 movs r3, #0
|
|
}
|
|
8006f90: 4618 mov r0, r3
|
|
8006f92: 370c adds r7, #12
|
|
8006f94: 46bd mov sp, r7
|
|
8006f96: bc80 pop {r7}
|
|
8006f98: 4770 bx lr
|
|
|
|
08006f9a <USBD_LL_Suspend>:
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
|
|
USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8006f9a: b480 push {r7}
|
|
8006f9c: b083 sub sp, #12
|
|
8006f9e: af00 add r7, sp, #0
|
|
8006fa0: 6078 str r0, [r7, #4]
|
|
pdev->dev_old_state = pdev->dev_state;
|
|
8006fa2: 687b ldr r3, [r7, #4]
|
|
8006fa4: f893 229c ldrb.w r2, [r3, #668] ; 0x29c
|
|
8006fa8: 687b ldr r3, [r7, #4]
|
|
8006faa: f883 229d strb.w r2, [r3, #669] ; 0x29d
|
|
pdev->dev_state = USBD_STATE_SUSPENDED;
|
|
8006fae: 687b ldr r3, [r7, #4]
|
|
8006fb0: 2204 movs r2, #4
|
|
8006fb2: f883 229c strb.w r2, [r3, #668] ; 0x29c
|
|
|
|
return USBD_OK;
|
|
8006fb6: 2300 movs r3, #0
|
|
}
|
|
8006fb8: 4618 mov r0, r3
|
|
8006fba: 370c adds r7, #12
|
|
8006fbc: 46bd mov sp, r7
|
|
8006fbe: bc80 pop {r7}
|
|
8006fc0: 4770 bx lr
|
|
|
|
08006fc2 <USBD_LL_Resume>:
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
|
|
USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8006fc2: b480 push {r7}
|
|
8006fc4: b083 sub sp, #12
|
|
8006fc6: af00 add r7, sp, #0
|
|
8006fc8: 6078 str r0, [r7, #4]
|
|
if (pdev->dev_state == USBD_STATE_SUSPENDED)
|
|
8006fca: 687b ldr r3, [r7, #4]
|
|
8006fcc: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
8006fd0: 2b04 cmp r3, #4
|
|
8006fd2: d105 bne.n 8006fe0 <USBD_LL_Resume+0x1e>
|
|
{
|
|
pdev->dev_state = pdev->dev_old_state;
|
|
8006fd4: 687b ldr r3, [r7, #4]
|
|
8006fd6: f893 229d ldrb.w r2, [r3, #669] ; 0x29d
|
|
8006fda: 687b ldr r3, [r7, #4]
|
|
8006fdc: f883 229c strb.w r2, [r3, #668] ; 0x29c
|
|
}
|
|
|
|
return USBD_OK;
|
|
8006fe0: 2300 movs r3, #0
|
|
}
|
|
8006fe2: 4618 mov r0, r3
|
|
8006fe4: 370c adds r7, #12
|
|
8006fe6: 46bd mov sp, r7
|
|
8006fe8: bc80 pop {r7}
|
|
8006fea: 4770 bx lr
|
|
|
|
08006fec <USBD_LL_SOF>:
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
|
|
USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8006fec: b580 push {r7, lr}
|
|
8006fee: b082 sub sp, #8
|
|
8006ff0: af00 add r7, sp, #0
|
|
8006ff2: 6078 str r0, [r7, #4]
|
|
if (pdev->dev_state == USBD_STATE_CONFIGURED)
|
|
8006ff4: 687b ldr r3, [r7, #4]
|
|
8006ff6: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
8006ffa: 2b03 cmp r3, #3
|
|
8006ffc: d10b bne.n 8007016 <USBD_LL_SOF+0x2a>
|
|
{
|
|
if (pdev->pClass->SOF != NULL)
|
|
8006ffe: 687b ldr r3, [r7, #4]
|
|
8007000: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8007004: 69db ldr r3, [r3, #28]
|
|
8007006: 2b00 cmp r3, #0
|
|
8007008: d005 beq.n 8007016 <USBD_LL_SOF+0x2a>
|
|
{
|
|
pdev->pClass->SOF(pdev);
|
|
800700a: 687b ldr r3, [r7, #4]
|
|
800700c: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8007010: 69db ldr r3, [r3, #28]
|
|
8007012: 6878 ldr r0, [r7, #4]
|
|
8007014: 4798 blx r3
|
|
}
|
|
}
|
|
|
|
return USBD_OK;
|
|
8007016: 2300 movs r3, #0
|
|
}
|
|
8007018: 4618 mov r0, r3
|
|
800701a: 3708 adds r7, #8
|
|
800701c: 46bd mov sp, r7
|
|
800701e: bd80 pop {r7, pc}
|
|
|
|
08007020 <USBD_StdDevReq>:
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev,
|
|
USBD_SetupReqTypedef *req)
|
|
{
|
|
8007020: b580 push {r7, lr}
|
|
8007022: b084 sub sp, #16
|
|
8007024: af00 add r7, sp, #0
|
|
8007026: 6078 str r0, [r7, #4]
|
|
8007028: 6039 str r1, [r7, #0]
|
|
USBD_StatusTypeDef ret = USBD_OK;
|
|
800702a: 2300 movs r3, #0
|
|
800702c: 73fb strb r3, [r7, #15]
|
|
|
|
switch (req->bmRequest & USB_REQ_TYPE_MASK)
|
|
800702e: 683b ldr r3, [r7, #0]
|
|
8007030: 781b ldrb r3, [r3, #0]
|
|
8007032: f003 0360 and.w r3, r3, #96 ; 0x60
|
|
8007036: 2b20 cmp r3, #32
|
|
8007038: d004 beq.n 8007044 <USBD_StdDevReq+0x24>
|
|
800703a: 2b40 cmp r3, #64 ; 0x40
|
|
800703c: d002 beq.n 8007044 <USBD_StdDevReq+0x24>
|
|
800703e: 2b00 cmp r3, #0
|
|
8007040: d008 beq.n 8007054 <USBD_StdDevReq+0x34>
|
|
8007042: e04c b.n 80070de <USBD_StdDevReq+0xbe>
|
|
{
|
|
case USB_REQ_TYPE_CLASS:
|
|
case USB_REQ_TYPE_VENDOR:
|
|
pdev->pClass->Setup(pdev, req);
|
|
8007044: 687b ldr r3, [r7, #4]
|
|
8007046: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
800704a: 689b ldr r3, [r3, #8]
|
|
800704c: 6839 ldr r1, [r7, #0]
|
|
800704e: 6878 ldr r0, [r7, #4]
|
|
8007050: 4798 blx r3
|
|
break;
|
|
8007052: e049 b.n 80070e8 <USBD_StdDevReq+0xc8>
|
|
|
|
case USB_REQ_TYPE_STANDARD:
|
|
switch (req->bRequest)
|
|
8007054: 683b ldr r3, [r7, #0]
|
|
8007056: 785b ldrb r3, [r3, #1]
|
|
8007058: 2b09 cmp r3, #9
|
|
800705a: d83a bhi.n 80070d2 <USBD_StdDevReq+0xb2>
|
|
800705c: a201 add r2, pc, #4 ; (adr r2, 8007064 <USBD_StdDevReq+0x44>)
|
|
800705e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
8007062: bf00 nop
|
|
8007064: 080070b5 .word 0x080070b5
|
|
8007068: 080070c9 .word 0x080070c9
|
|
800706c: 080070d3 .word 0x080070d3
|
|
8007070: 080070bf .word 0x080070bf
|
|
8007074: 080070d3 .word 0x080070d3
|
|
8007078: 08007097 .word 0x08007097
|
|
800707c: 0800708d .word 0x0800708d
|
|
8007080: 080070d3 .word 0x080070d3
|
|
8007084: 080070ab .word 0x080070ab
|
|
8007088: 080070a1 .word 0x080070a1
|
|
{
|
|
case USB_REQ_GET_DESCRIPTOR:
|
|
USBD_GetDescriptor(pdev, req);
|
|
800708c: 6839 ldr r1, [r7, #0]
|
|
800708e: 6878 ldr r0, [r7, #4]
|
|
8007090: f000 f9d4 bl 800743c <USBD_GetDescriptor>
|
|
break;
|
|
8007094: e022 b.n 80070dc <USBD_StdDevReq+0xbc>
|
|
|
|
case USB_REQ_SET_ADDRESS:
|
|
USBD_SetAddress(pdev, req);
|
|
8007096: 6839 ldr r1, [r7, #0]
|
|
8007098: 6878 ldr r0, [r7, #4]
|
|
800709a: f000 fb37 bl 800770c <USBD_SetAddress>
|
|
break;
|
|
800709e: e01d b.n 80070dc <USBD_StdDevReq+0xbc>
|
|
|
|
case USB_REQ_SET_CONFIGURATION:
|
|
USBD_SetConfig(pdev, req);
|
|
80070a0: 6839 ldr r1, [r7, #0]
|
|
80070a2: 6878 ldr r0, [r7, #4]
|
|
80070a4: f000 fb74 bl 8007790 <USBD_SetConfig>
|
|
break;
|
|
80070a8: e018 b.n 80070dc <USBD_StdDevReq+0xbc>
|
|
|
|
case USB_REQ_GET_CONFIGURATION:
|
|
USBD_GetConfig(pdev, req);
|
|
80070aa: 6839 ldr r1, [r7, #0]
|
|
80070ac: 6878 ldr r0, [r7, #4]
|
|
80070ae: f000 fbfd bl 80078ac <USBD_GetConfig>
|
|
break;
|
|
80070b2: e013 b.n 80070dc <USBD_StdDevReq+0xbc>
|
|
|
|
case USB_REQ_GET_STATUS:
|
|
USBD_GetStatus(pdev, req);
|
|
80070b4: 6839 ldr r1, [r7, #0]
|
|
80070b6: 6878 ldr r0, [r7, #4]
|
|
80070b8: f000 fc2c bl 8007914 <USBD_GetStatus>
|
|
break;
|
|
80070bc: e00e b.n 80070dc <USBD_StdDevReq+0xbc>
|
|
|
|
case USB_REQ_SET_FEATURE:
|
|
USBD_SetFeature(pdev, req);
|
|
80070be: 6839 ldr r1, [r7, #0]
|
|
80070c0: 6878 ldr r0, [r7, #4]
|
|
80070c2: f000 fc5a bl 800797a <USBD_SetFeature>
|
|
break;
|
|
80070c6: e009 b.n 80070dc <USBD_StdDevReq+0xbc>
|
|
|
|
case USB_REQ_CLEAR_FEATURE:
|
|
USBD_ClrFeature(pdev, req);
|
|
80070c8: 6839 ldr r1, [r7, #0]
|
|
80070ca: 6878 ldr r0, [r7, #4]
|
|
80070cc: f000 fc69 bl 80079a2 <USBD_ClrFeature>
|
|
break;
|
|
80070d0: e004 b.n 80070dc <USBD_StdDevReq+0xbc>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
80070d2: 6839 ldr r1, [r7, #0]
|
|
80070d4: 6878 ldr r0, [r7, #4]
|
|
80070d6: f000 fcc1 bl 8007a5c <USBD_CtlError>
|
|
break;
|
|
80070da: bf00 nop
|
|
}
|
|
break;
|
|
80070dc: e004 b.n 80070e8 <USBD_StdDevReq+0xc8>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
80070de: 6839 ldr r1, [r7, #0]
|
|
80070e0: 6878 ldr r0, [r7, #4]
|
|
80070e2: f000 fcbb bl 8007a5c <USBD_CtlError>
|
|
break;
|
|
80070e6: bf00 nop
|
|
}
|
|
|
|
return ret;
|
|
80070e8: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
80070ea: 4618 mov r0, r3
|
|
80070ec: 3710 adds r7, #16
|
|
80070ee: 46bd mov sp, r7
|
|
80070f0: bd80 pop {r7, pc}
|
|
80070f2: bf00 nop
|
|
|
|
080070f4 <USBD_StdItfReq>:
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev,
|
|
USBD_SetupReqTypedef *req)
|
|
{
|
|
80070f4: b580 push {r7, lr}
|
|
80070f6: b084 sub sp, #16
|
|
80070f8: af00 add r7, sp, #0
|
|
80070fa: 6078 str r0, [r7, #4]
|
|
80070fc: 6039 str r1, [r7, #0]
|
|
USBD_StatusTypeDef ret = USBD_OK;
|
|
80070fe: 2300 movs r3, #0
|
|
8007100: 73fb strb r3, [r7, #15]
|
|
|
|
switch (req->bmRequest & USB_REQ_TYPE_MASK)
|
|
8007102: 683b ldr r3, [r7, #0]
|
|
8007104: 781b ldrb r3, [r3, #0]
|
|
8007106: f003 0360 and.w r3, r3, #96 ; 0x60
|
|
800710a: 2b20 cmp r3, #32
|
|
800710c: d003 beq.n 8007116 <USBD_StdItfReq+0x22>
|
|
800710e: 2b40 cmp r3, #64 ; 0x40
|
|
8007110: d001 beq.n 8007116 <USBD_StdItfReq+0x22>
|
|
8007112: 2b00 cmp r3, #0
|
|
8007114: d12a bne.n 800716c <USBD_StdItfReq+0x78>
|
|
{
|
|
case USB_REQ_TYPE_CLASS:
|
|
case USB_REQ_TYPE_VENDOR:
|
|
case USB_REQ_TYPE_STANDARD:
|
|
switch (pdev->dev_state)
|
|
8007116: 687b ldr r3, [r7, #4]
|
|
8007118: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
800711c: 3b01 subs r3, #1
|
|
800711e: 2b02 cmp r3, #2
|
|
8007120: d81d bhi.n 800715e <USBD_StdItfReq+0x6a>
|
|
{
|
|
case USBD_STATE_DEFAULT:
|
|
case USBD_STATE_ADDRESSED:
|
|
case USBD_STATE_CONFIGURED:
|
|
|
|
if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES)
|
|
8007122: 683b ldr r3, [r7, #0]
|
|
8007124: 889b ldrh r3, [r3, #4]
|
|
8007126: b2db uxtb r3, r3
|
|
8007128: 2b01 cmp r3, #1
|
|
800712a: d813 bhi.n 8007154 <USBD_StdItfReq+0x60>
|
|
{
|
|
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
|
|
800712c: 687b ldr r3, [r7, #4]
|
|
800712e: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8007132: 689b ldr r3, [r3, #8]
|
|
8007134: 6839 ldr r1, [r7, #0]
|
|
8007136: 6878 ldr r0, [r7, #4]
|
|
8007138: 4798 blx r3
|
|
800713a: 4603 mov r3, r0
|
|
800713c: 73fb strb r3, [r7, #15]
|
|
|
|
if ((req->wLength == 0U) && (ret == USBD_OK))
|
|
800713e: 683b ldr r3, [r7, #0]
|
|
8007140: 88db ldrh r3, [r3, #6]
|
|
8007142: 2b00 cmp r3, #0
|
|
8007144: d110 bne.n 8007168 <USBD_StdItfReq+0x74>
|
|
8007146: 7bfb ldrb r3, [r7, #15]
|
|
8007148: 2b00 cmp r3, #0
|
|
800714a: d10d bne.n 8007168 <USBD_StdItfReq+0x74>
|
|
{
|
|
USBD_CtlSendStatus(pdev);
|
|
800714c: 6878 ldr r0, [r7, #4]
|
|
800714e: f000 fd4d bl 8007bec <USBD_CtlSendStatus>
|
|
}
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
}
|
|
break;
|
|
8007152: e009 b.n 8007168 <USBD_StdItfReq+0x74>
|
|
USBD_CtlError(pdev, req);
|
|
8007154: 6839 ldr r1, [r7, #0]
|
|
8007156: 6878 ldr r0, [r7, #4]
|
|
8007158: f000 fc80 bl 8007a5c <USBD_CtlError>
|
|
break;
|
|
800715c: e004 b.n 8007168 <USBD_StdItfReq+0x74>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
800715e: 6839 ldr r1, [r7, #0]
|
|
8007160: 6878 ldr r0, [r7, #4]
|
|
8007162: f000 fc7b bl 8007a5c <USBD_CtlError>
|
|
break;
|
|
8007166: e000 b.n 800716a <USBD_StdItfReq+0x76>
|
|
break;
|
|
8007168: bf00 nop
|
|
}
|
|
break;
|
|
800716a: e004 b.n 8007176 <USBD_StdItfReq+0x82>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
800716c: 6839 ldr r1, [r7, #0]
|
|
800716e: 6878 ldr r0, [r7, #4]
|
|
8007170: f000 fc74 bl 8007a5c <USBD_CtlError>
|
|
break;
|
|
8007174: bf00 nop
|
|
}
|
|
|
|
return USBD_OK;
|
|
8007176: 2300 movs r3, #0
|
|
}
|
|
8007178: 4618 mov r0, r3
|
|
800717a: 3710 adds r7, #16
|
|
800717c: 46bd mov sp, r7
|
|
800717e: bd80 pop {r7, pc}
|
|
|
|
08007180 <USBD_StdEPReq>:
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev,
|
|
USBD_SetupReqTypedef *req)
|
|
{
|
|
8007180: b580 push {r7, lr}
|
|
8007182: b084 sub sp, #16
|
|
8007184: af00 add r7, sp, #0
|
|
8007186: 6078 str r0, [r7, #4]
|
|
8007188: 6039 str r1, [r7, #0]
|
|
USBD_EndpointTypeDef *pep;
|
|
uint8_t ep_addr;
|
|
USBD_StatusTypeDef ret = USBD_OK;
|
|
800718a: 2300 movs r3, #0
|
|
800718c: 73fb strb r3, [r7, #15]
|
|
ep_addr = LOBYTE(req->wIndex);
|
|
800718e: 683b ldr r3, [r7, #0]
|
|
8007190: 889b ldrh r3, [r3, #4]
|
|
8007192: 73bb strb r3, [r7, #14]
|
|
|
|
switch (req->bmRequest & USB_REQ_TYPE_MASK)
|
|
8007194: 683b ldr r3, [r7, #0]
|
|
8007196: 781b ldrb r3, [r3, #0]
|
|
8007198: f003 0360 and.w r3, r3, #96 ; 0x60
|
|
800719c: 2b20 cmp r3, #32
|
|
800719e: d004 beq.n 80071aa <USBD_StdEPReq+0x2a>
|
|
80071a0: 2b40 cmp r3, #64 ; 0x40
|
|
80071a2: d002 beq.n 80071aa <USBD_StdEPReq+0x2a>
|
|
80071a4: 2b00 cmp r3, #0
|
|
80071a6: d008 beq.n 80071ba <USBD_StdEPReq+0x3a>
|
|
80071a8: e13d b.n 8007426 <USBD_StdEPReq+0x2a6>
|
|
{
|
|
case USB_REQ_TYPE_CLASS:
|
|
case USB_REQ_TYPE_VENDOR:
|
|
pdev->pClass->Setup(pdev, req);
|
|
80071aa: 687b ldr r3, [r7, #4]
|
|
80071ac: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
80071b0: 689b ldr r3, [r3, #8]
|
|
80071b2: 6839 ldr r1, [r7, #0]
|
|
80071b4: 6878 ldr r0, [r7, #4]
|
|
80071b6: 4798 blx r3
|
|
break;
|
|
80071b8: e13a b.n 8007430 <USBD_StdEPReq+0x2b0>
|
|
|
|
case USB_REQ_TYPE_STANDARD:
|
|
/* Check if it is a class request */
|
|
if ((req->bmRequest & 0x60U) == 0x20U)
|
|
80071ba: 683b ldr r3, [r7, #0]
|
|
80071bc: 781b ldrb r3, [r3, #0]
|
|
80071be: f003 0360 and.w r3, r3, #96 ; 0x60
|
|
80071c2: 2b20 cmp r3, #32
|
|
80071c4: d10a bne.n 80071dc <USBD_StdEPReq+0x5c>
|
|
{
|
|
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
|
|
80071c6: 687b ldr r3, [r7, #4]
|
|
80071c8: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
80071cc: 689b ldr r3, [r3, #8]
|
|
80071ce: 6839 ldr r1, [r7, #0]
|
|
80071d0: 6878 ldr r0, [r7, #4]
|
|
80071d2: 4798 blx r3
|
|
80071d4: 4603 mov r3, r0
|
|
80071d6: 73fb strb r3, [r7, #15]
|
|
|
|
return ret;
|
|
80071d8: 7bfb ldrb r3, [r7, #15]
|
|
80071da: e12a b.n 8007432 <USBD_StdEPReq+0x2b2>
|
|
}
|
|
|
|
switch (req->bRequest)
|
|
80071dc: 683b ldr r3, [r7, #0]
|
|
80071de: 785b ldrb r3, [r3, #1]
|
|
80071e0: 2b01 cmp r3, #1
|
|
80071e2: d03e beq.n 8007262 <USBD_StdEPReq+0xe2>
|
|
80071e4: 2b03 cmp r3, #3
|
|
80071e6: d002 beq.n 80071ee <USBD_StdEPReq+0x6e>
|
|
80071e8: 2b00 cmp r3, #0
|
|
80071ea: d070 beq.n 80072ce <USBD_StdEPReq+0x14e>
|
|
80071ec: e115 b.n 800741a <USBD_StdEPReq+0x29a>
|
|
{
|
|
case USB_REQ_SET_FEATURE:
|
|
switch (pdev->dev_state)
|
|
80071ee: 687b ldr r3, [r7, #4]
|
|
80071f0: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
80071f4: 2b02 cmp r3, #2
|
|
80071f6: d002 beq.n 80071fe <USBD_StdEPReq+0x7e>
|
|
80071f8: 2b03 cmp r3, #3
|
|
80071fa: d015 beq.n 8007228 <USBD_StdEPReq+0xa8>
|
|
80071fc: e02b b.n 8007256 <USBD_StdEPReq+0xd6>
|
|
{
|
|
case USBD_STATE_ADDRESSED:
|
|
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
|
|
80071fe: 7bbb ldrb r3, [r7, #14]
|
|
8007200: 2b00 cmp r3, #0
|
|
8007202: d00c beq.n 800721e <USBD_StdEPReq+0x9e>
|
|
8007204: 7bbb ldrb r3, [r7, #14]
|
|
8007206: 2b80 cmp r3, #128 ; 0x80
|
|
8007208: d009 beq.n 800721e <USBD_StdEPReq+0x9e>
|
|
{
|
|
USBD_LL_StallEP(pdev, ep_addr);
|
|
800720a: 7bbb ldrb r3, [r7, #14]
|
|
800720c: 4619 mov r1, r3
|
|
800720e: 6878 ldr r0, [r7, #4]
|
|
8007210: f003 facc bl 800a7ac <USBD_LL_StallEP>
|
|
USBD_LL_StallEP(pdev, 0x80U);
|
|
8007214: 2180 movs r1, #128 ; 0x80
|
|
8007216: 6878 ldr r0, [r7, #4]
|
|
8007218: f003 fac8 bl 800a7ac <USBD_LL_StallEP>
|
|
}
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
}
|
|
break;
|
|
800721c: e020 b.n 8007260 <USBD_StdEPReq+0xe0>
|
|
USBD_CtlError(pdev, req);
|
|
800721e: 6839 ldr r1, [r7, #0]
|
|
8007220: 6878 ldr r0, [r7, #4]
|
|
8007222: f000 fc1b bl 8007a5c <USBD_CtlError>
|
|
break;
|
|
8007226: e01b b.n 8007260 <USBD_StdEPReq+0xe0>
|
|
|
|
case USBD_STATE_CONFIGURED:
|
|
if (req->wValue == USB_FEATURE_EP_HALT)
|
|
8007228: 683b ldr r3, [r7, #0]
|
|
800722a: 885b ldrh r3, [r3, #2]
|
|
800722c: 2b00 cmp r3, #0
|
|
800722e: d10e bne.n 800724e <USBD_StdEPReq+0xce>
|
|
{
|
|
if ((ep_addr != 0x00U) &&
|
|
8007230: 7bbb ldrb r3, [r7, #14]
|
|
8007232: 2b00 cmp r3, #0
|
|
8007234: d00b beq.n 800724e <USBD_StdEPReq+0xce>
|
|
8007236: 7bbb ldrb r3, [r7, #14]
|
|
8007238: 2b80 cmp r3, #128 ; 0x80
|
|
800723a: d008 beq.n 800724e <USBD_StdEPReq+0xce>
|
|
(ep_addr != 0x80U) && (req->wLength == 0x00U))
|
|
800723c: 683b ldr r3, [r7, #0]
|
|
800723e: 88db ldrh r3, [r3, #6]
|
|
8007240: 2b00 cmp r3, #0
|
|
8007242: d104 bne.n 800724e <USBD_StdEPReq+0xce>
|
|
{
|
|
USBD_LL_StallEP(pdev, ep_addr);
|
|
8007244: 7bbb ldrb r3, [r7, #14]
|
|
8007246: 4619 mov r1, r3
|
|
8007248: 6878 ldr r0, [r7, #4]
|
|
800724a: f003 faaf bl 800a7ac <USBD_LL_StallEP>
|
|
}
|
|
}
|
|
USBD_CtlSendStatus(pdev);
|
|
800724e: 6878 ldr r0, [r7, #4]
|
|
8007250: f000 fccc bl 8007bec <USBD_CtlSendStatus>
|
|
|
|
break;
|
|
8007254: e004 b.n 8007260 <USBD_StdEPReq+0xe0>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
8007256: 6839 ldr r1, [r7, #0]
|
|
8007258: 6878 ldr r0, [r7, #4]
|
|
800725a: f000 fbff bl 8007a5c <USBD_CtlError>
|
|
break;
|
|
800725e: bf00 nop
|
|
}
|
|
break;
|
|
8007260: e0e0 b.n 8007424 <USBD_StdEPReq+0x2a4>
|
|
|
|
case USB_REQ_CLEAR_FEATURE:
|
|
|
|
switch (pdev->dev_state)
|
|
8007262: 687b ldr r3, [r7, #4]
|
|
8007264: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
8007268: 2b02 cmp r3, #2
|
|
800726a: d002 beq.n 8007272 <USBD_StdEPReq+0xf2>
|
|
800726c: 2b03 cmp r3, #3
|
|
800726e: d015 beq.n 800729c <USBD_StdEPReq+0x11c>
|
|
8007270: e026 b.n 80072c0 <USBD_StdEPReq+0x140>
|
|
{
|
|
case USBD_STATE_ADDRESSED:
|
|
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
|
|
8007272: 7bbb ldrb r3, [r7, #14]
|
|
8007274: 2b00 cmp r3, #0
|
|
8007276: d00c beq.n 8007292 <USBD_StdEPReq+0x112>
|
|
8007278: 7bbb ldrb r3, [r7, #14]
|
|
800727a: 2b80 cmp r3, #128 ; 0x80
|
|
800727c: d009 beq.n 8007292 <USBD_StdEPReq+0x112>
|
|
{
|
|
USBD_LL_StallEP(pdev, ep_addr);
|
|
800727e: 7bbb ldrb r3, [r7, #14]
|
|
8007280: 4619 mov r1, r3
|
|
8007282: 6878 ldr r0, [r7, #4]
|
|
8007284: f003 fa92 bl 800a7ac <USBD_LL_StallEP>
|
|
USBD_LL_StallEP(pdev, 0x80U);
|
|
8007288: 2180 movs r1, #128 ; 0x80
|
|
800728a: 6878 ldr r0, [r7, #4]
|
|
800728c: f003 fa8e bl 800a7ac <USBD_LL_StallEP>
|
|
}
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
}
|
|
break;
|
|
8007290: e01c b.n 80072cc <USBD_StdEPReq+0x14c>
|
|
USBD_CtlError(pdev, req);
|
|
8007292: 6839 ldr r1, [r7, #0]
|
|
8007294: 6878 ldr r0, [r7, #4]
|
|
8007296: f000 fbe1 bl 8007a5c <USBD_CtlError>
|
|
break;
|
|
800729a: e017 b.n 80072cc <USBD_StdEPReq+0x14c>
|
|
|
|
case USBD_STATE_CONFIGURED:
|
|
if (req->wValue == USB_FEATURE_EP_HALT)
|
|
800729c: 683b ldr r3, [r7, #0]
|
|
800729e: 885b ldrh r3, [r3, #2]
|
|
80072a0: 2b00 cmp r3, #0
|
|
80072a2: d112 bne.n 80072ca <USBD_StdEPReq+0x14a>
|
|
{
|
|
if ((ep_addr & 0x7FU) != 0x00U)
|
|
80072a4: 7bbb ldrb r3, [r7, #14]
|
|
80072a6: f003 037f and.w r3, r3, #127 ; 0x7f
|
|
80072aa: 2b00 cmp r3, #0
|
|
80072ac: d004 beq.n 80072b8 <USBD_StdEPReq+0x138>
|
|
{
|
|
USBD_LL_ClearStallEP(pdev, ep_addr);
|
|
80072ae: 7bbb ldrb r3, [r7, #14]
|
|
80072b0: 4619 mov r1, r3
|
|
80072b2: 6878 ldr r0, [r7, #4]
|
|
80072b4: f003 fa99 bl 800a7ea <USBD_LL_ClearStallEP>
|
|
}
|
|
USBD_CtlSendStatus(pdev);
|
|
80072b8: 6878 ldr r0, [r7, #4]
|
|
80072ba: f000 fc97 bl 8007bec <USBD_CtlSendStatus>
|
|
}
|
|
break;
|
|
80072be: e004 b.n 80072ca <USBD_StdEPReq+0x14a>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
80072c0: 6839 ldr r1, [r7, #0]
|
|
80072c2: 6878 ldr r0, [r7, #4]
|
|
80072c4: f000 fbca bl 8007a5c <USBD_CtlError>
|
|
break;
|
|
80072c8: e000 b.n 80072cc <USBD_StdEPReq+0x14c>
|
|
break;
|
|
80072ca: bf00 nop
|
|
}
|
|
break;
|
|
80072cc: e0aa b.n 8007424 <USBD_StdEPReq+0x2a4>
|
|
|
|
case USB_REQ_GET_STATUS:
|
|
switch (pdev->dev_state)
|
|
80072ce: 687b ldr r3, [r7, #4]
|
|
80072d0: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
80072d4: 2b02 cmp r3, #2
|
|
80072d6: d002 beq.n 80072de <USBD_StdEPReq+0x15e>
|
|
80072d8: 2b03 cmp r3, #3
|
|
80072da: d032 beq.n 8007342 <USBD_StdEPReq+0x1c2>
|
|
80072dc: e097 b.n 800740e <USBD_StdEPReq+0x28e>
|
|
{
|
|
case USBD_STATE_ADDRESSED:
|
|
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
|
|
80072de: 7bbb ldrb r3, [r7, #14]
|
|
80072e0: 2b00 cmp r3, #0
|
|
80072e2: d007 beq.n 80072f4 <USBD_StdEPReq+0x174>
|
|
80072e4: 7bbb ldrb r3, [r7, #14]
|
|
80072e6: 2b80 cmp r3, #128 ; 0x80
|
|
80072e8: d004 beq.n 80072f4 <USBD_StdEPReq+0x174>
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
80072ea: 6839 ldr r1, [r7, #0]
|
|
80072ec: 6878 ldr r0, [r7, #4]
|
|
80072ee: f000 fbb5 bl 8007a5c <USBD_CtlError>
|
|
break;
|
|
80072f2: e091 b.n 8007418 <USBD_StdEPReq+0x298>
|
|
}
|
|
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
|
|
80072f4: f997 300e ldrsb.w r3, [r7, #14]
|
|
80072f8: 2b00 cmp r3, #0
|
|
80072fa: da0b bge.n 8007314 <USBD_StdEPReq+0x194>
|
|
80072fc: 7bbb ldrb r3, [r7, #14]
|
|
80072fe: f003 027f and.w r2, r3, #127 ; 0x7f
|
|
8007302: 4613 mov r3, r2
|
|
8007304: 009b lsls r3, r3, #2
|
|
8007306: 4413 add r3, r2
|
|
8007308: 009b lsls r3, r3, #2
|
|
800730a: 3310 adds r3, #16
|
|
800730c: 687a ldr r2, [r7, #4]
|
|
800730e: 4413 add r3, r2
|
|
8007310: 3304 adds r3, #4
|
|
8007312: e00b b.n 800732c <USBD_StdEPReq+0x1ac>
|
|
&pdev->ep_out[ep_addr & 0x7FU];
|
|
8007314: 7bbb ldrb r3, [r7, #14]
|
|
8007316: f003 027f and.w r2, r3, #127 ; 0x7f
|
|
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
|
|
800731a: 4613 mov r3, r2
|
|
800731c: 009b lsls r3, r3, #2
|
|
800731e: 4413 add r3, r2
|
|
8007320: 009b lsls r3, r3, #2
|
|
8007322: f503 73a8 add.w r3, r3, #336 ; 0x150
|
|
8007326: 687a ldr r2, [r7, #4]
|
|
8007328: 4413 add r3, r2
|
|
800732a: 3304 adds r3, #4
|
|
800732c: 60bb str r3, [r7, #8]
|
|
|
|
pep->status = 0x0000U;
|
|
800732e: 68bb ldr r3, [r7, #8]
|
|
8007330: 2200 movs r2, #0
|
|
8007332: 601a str r2, [r3, #0]
|
|
|
|
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
|
|
8007334: 68bb ldr r3, [r7, #8]
|
|
8007336: 2202 movs r2, #2
|
|
8007338: 4619 mov r1, r3
|
|
800733a: 6878 ldr r0, [r7, #4]
|
|
800733c: f000 fbf8 bl 8007b30 <USBD_CtlSendData>
|
|
break;
|
|
8007340: e06a b.n 8007418 <USBD_StdEPReq+0x298>
|
|
|
|
case USBD_STATE_CONFIGURED:
|
|
if ((ep_addr & 0x80U) == 0x80U)
|
|
8007342: f997 300e ldrsb.w r3, [r7, #14]
|
|
8007346: 2b00 cmp r3, #0
|
|
8007348: da11 bge.n 800736e <USBD_StdEPReq+0x1ee>
|
|
{
|
|
if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U)
|
|
800734a: 7bbb ldrb r3, [r7, #14]
|
|
800734c: f003 020f and.w r2, r3, #15
|
|
8007350: 6879 ldr r1, [r7, #4]
|
|
8007352: 4613 mov r3, r2
|
|
8007354: 009b lsls r3, r3, #2
|
|
8007356: 4413 add r3, r2
|
|
8007358: 009b lsls r3, r3, #2
|
|
800735a: 440b add r3, r1
|
|
800735c: 3318 adds r3, #24
|
|
800735e: 681b ldr r3, [r3, #0]
|
|
8007360: 2b00 cmp r3, #0
|
|
8007362: d117 bne.n 8007394 <USBD_StdEPReq+0x214>
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
8007364: 6839 ldr r1, [r7, #0]
|
|
8007366: 6878 ldr r0, [r7, #4]
|
|
8007368: f000 fb78 bl 8007a5c <USBD_CtlError>
|
|
break;
|
|
800736c: e054 b.n 8007418 <USBD_StdEPReq+0x298>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U)
|
|
800736e: 7bbb ldrb r3, [r7, #14]
|
|
8007370: f003 020f and.w r2, r3, #15
|
|
8007374: 6879 ldr r1, [r7, #4]
|
|
8007376: 4613 mov r3, r2
|
|
8007378: 009b lsls r3, r3, #2
|
|
800737a: 4413 add r3, r2
|
|
800737c: 009b lsls r3, r3, #2
|
|
800737e: 440b add r3, r1
|
|
8007380: f503 73ac add.w r3, r3, #344 ; 0x158
|
|
8007384: 681b ldr r3, [r3, #0]
|
|
8007386: 2b00 cmp r3, #0
|
|
8007388: d104 bne.n 8007394 <USBD_StdEPReq+0x214>
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
800738a: 6839 ldr r1, [r7, #0]
|
|
800738c: 6878 ldr r0, [r7, #4]
|
|
800738e: f000 fb65 bl 8007a5c <USBD_CtlError>
|
|
break;
|
|
8007392: e041 b.n 8007418 <USBD_StdEPReq+0x298>
|
|
}
|
|
}
|
|
|
|
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
|
|
8007394: f997 300e ldrsb.w r3, [r7, #14]
|
|
8007398: 2b00 cmp r3, #0
|
|
800739a: da0b bge.n 80073b4 <USBD_StdEPReq+0x234>
|
|
800739c: 7bbb ldrb r3, [r7, #14]
|
|
800739e: f003 027f and.w r2, r3, #127 ; 0x7f
|
|
80073a2: 4613 mov r3, r2
|
|
80073a4: 009b lsls r3, r3, #2
|
|
80073a6: 4413 add r3, r2
|
|
80073a8: 009b lsls r3, r3, #2
|
|
80073aa: 3310 adds r3, #16
|
|
80073ac: 687a ldr r2, [r7, #4]
|
|
80073ae: 4413 add r3, r2
|
|
80073b0: 3304 adds r3, #4
|
|
80073b2: e00b b.n 80073cc <USBD_StdEPReq+0x24c>
|
|
&pdev->ep_out[ep_addr & 0x7FU];
|
|
80073b4: 7bbb ldrb r3, [r7, #14]
|
|
80073b6: f003 027f and.w r2, r3, #127 ; 0x7f
|
|
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
|
|
80073ba: 4613 mov r3, r2
|
|
80073bc: 009b lsls r3, r3, #2
|
|
80073be: 4413 add r3, r2
|
|
80073c0: 009b lsls r3, r3, #2
|
|
80073c2: f503 73a8 add.w r3, r3, #336 ; 0x150
|
|
80073c6: 687a ldr r2, [r7, #4]
|
|
80073c8: 4413 add r3, r2
|
|
80073ca: 3304 adds r3, #4
|
|
80073cc: 60bb str r3, [r7, #8]
|
|
|
|
if ((ep_addr == 0x00U) || (ep_addr == 0x80U))
|
|
80073ce: 7bbb ldrb r3, [r7, #14]
|
|
80073d0: 2b00 cmp r3, #0
|
|
80073d2: d002 beq.n 80073da <USBD_StdEPReq+0x25a>
|
|
80073d4: 7bbb ldrb r3, [r7, #14]
|
|
80073d6: 2b80 cmp r3, #128 ; 0x80
|
|
80073d8: d103 bne.n 80073e2 <USBD_StdEPReq+0x262>
|
|
{
|
|
pep->status = 0x0000U;
|
|
80073da: 68bb ldr r3, [r7, #8]
|
|
80073dc: 2200 movs r2, #0
|
|
80073de: 601a str r2, [r3, #0]
|
|
80073e0: e00e b.n 8007400 <USBD_StdEPReq+0x280>
|
|
}
|
|
else if (USBD_LL_IsStallEP(pdev, ep_addr))
|
|
80073e2: 7bbb ldrb r3, [r7, #14]
|
|
80073e4: 4619 mov r1, r3
|
|
80073e6: 6878 ldr r0, [r7, #4]
|
|
80073e8: f003 fa1e bl 800a828 <USBD_LL_IsStallEP>
|
|
80073ec: 4603 mov r3, r0
|
|
80073ee: 2b00 cmp r3, #0
|
|
80073f0: d003 beq.n 80073fa <USBD_StdEPReq+0x27a>
|
|
{
|
|
pep->status = 0x0001U;
|
|
80073f2: 68bb ldr r3, [r7, #8]
|
|
80073f4: 2201 movs r2, #1
|
|
80073f6: 601a str r2, [r3, #0]
|
|
80073f8: e002 b.n 8007400 <USBD_StdEPReq+0x280>
|
|
}
|
|
else
|
|
{
|
|
pep->status = 0x0000U;
|
|
80073fa: 68bb ldr r3, [r7, #8]
|
|
80073fc: 2200 movs r2, #0
|
|
80073fe: 601a str r2, [r3, #0]
|
|
}
|
|
|
|
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
|
|
8007400: 68bb ldr r3, [r7, #8]
|
|
8007402: 2202 movs r2, #2
|
|
8007404: 4619 mov r1, r3
|
|
8007406: 6878 ldr r0, [r7, #4]
|
|
8007408: f000 fb92 bl 8007b30 <USBD_CtlSendData>
|
|
break;
|
|
800740c: e004 b.n 8007418 <USBD_StdEPReq+0x298>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
800740e: 6839 ldr r1, [r7, #0]
|
|
8007410: 6878 ldr r0, [r7, #4]
|
|
8007412: f000 fb23 bl 8007a5c <USBD_CtlError>
|
|
break;
|
|
8007416: bf00 nop
|
|
}
|
|
break;
|
|
8007418: e004 b.n 8007424 <USBD_StdEPReq+0x2a4>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
800741a: 6839 ldr r1, [r7, #0]
|
|
800741c: 6878 ldr r0, [r7, #4]
|
|
800741e: f000 fb1d bl 8007a5c <USBD_CtlError>
|
|
break;
|
|
8007422: bf00 nop
|
|
}
|
|
break;
|
|
8007424: e004 b.n 8007430 <USBD_StdEPReq+0x2b0>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
8007426: 6839 ldr r1, [r7, #0]
|
|
8007428: 6878 ldr r0, [r7, #4]
|
|
800742a: f000 fb17 bl 8007a5c <USBD_CtlError>
|
|
break;
|
|
800742e: bf00 nop
|
|
}
|
|
|
|
return ret;
|
|
8007430: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
8007432: 4618 mov r0, r3
|
|
8007434: 3710 adds r7, #16
|
|
8007436: 46bd mov sp, r7
|
|
8007438: bd80 pop {r7, pc}
|
|
...
|
|
|
|
0800743c <USBD_GetDescriptor>:
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev,
|
|
USBD_SetupReqTypedef *req)
|
|
{
|
|
800743c: b580 push {r7, lr}
|
|
800743e: b084 sub sp, #16
|
|
8007440: af00 add r7, sp, #0
|
|
8007442: 6078 str r0, [r7, #4]
|
|
8007444: 6039 str r1, [r7, #0]
|
|
uint16_t len = 0U;
|
|
8007446: 2300 movs r3, #0
|
|
8007448: 813b strh r3, [r7, #8]
|
|
uint8_t *pbuf = NULL;
|
|
800744a: 2300 movs r3, #0
|
|
800744c: 60fb str r3, [r7, #12]
|
|
uint8_t err = 0U;
|
|
800744e: 2300 movs r3, #0
|
|
8007450: 72fb strb r3, [r7, #11]
|
|
|
|
switch (req->wValue >> 8)
|
|
8007452: 683b ldr r3, [r7, #0]
|
|
8007454: 885b ldrh r3, [r3, #2]
|
|
8007456: 0a1b lsrs r3, r3, #8
|
|
8007458: b29b uxth r3, r3
|
|
800745a: 3b01 subs r3, #1
|
|
800745c: 2b06 cmp r3, #6
|
|
800745e: f200 8128 bhi.w 80076b2 <USBD_GetDescriptor+0x276>
|
|
8007462: a201 add r2, pc, #4 ; (adr r2, 8007468 <USBD_GetDescriptor+0x2c>)
|
|
8007464: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
8007468: 08007485 .word 0x08007485
|
|
800746c: 0800749d .word 0x0800749d
|
|
8007470: 080074dd .word 0x080074dd
|
|
8007474: 080076b3 .word 0x080076b3
|
|
8007478: 080076b3 .word 0x080076b3
|
|
800747c: 08007653 .word 0x08007653
|
|
8007480: 0800767f .word 0x0800767f
|
|
err++;
|
|
}
|
|
break;
|
|
#endif
|
|
case USB_DESC_TYPE_DEVICE:
|
|
pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len);
|
|
8007484: 687b ldr r3, [r7, #4]
|
|
8007486: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
|
|
800748a: 681b ldr r3, [r3, #0]
|
|
800748c: 687a ldr r2, [r7, #4]
|
|
800748e: 7c12 ldrb r2, [r2, #16]
|
|
8007490: f107 0108 add.w r1, r7, #8
|
|
8007494: 4610 mov r0, r2
|
|
8007496: 4798 blx r3
|
|
8007498: 60f8 str r0, [r7, #12]
|
|
break;
|
|
800749a: e112 b.n 80076c2 <USBD_GetDescriptor+0x286>
|
|
|
|
case USB_DESC_TYPE_CONFIGURATION:
|
|
if (pdev->dev_speed == USBD_SPEED_HIGH)
|
|
800749c: 687b ldr r3, [r7, #4]
|
|
800749e: 7c1b ldrb r3, [r3, #16]
|
|
80074a0: 2b00 cmp r3, #0
|
|
80074a2: d10d bne.n 80074c0 <USBD_GetDescriptor+0x84>
|
|
{
|
|
pbuf = pdev->pClass->GetHSConfigDescriptor(&len);
|
|
80074a4: 687b ldr r3, [r7, #4]
|
|
80074a6: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
80074aa: 6a9b ldr r3, [r3, #40] ; 0x28
|
|
80074ac: f107 0208 add.w r2, r7, #8
|
|
80074b0: 4610 mov r0, r2
|
|
80074b2: 4798 blx r3
|
|
80074b4: 60f8 str r0, [r7, #12]
|
|
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
|
|
80074b6: 68fb ldr r3, [r7, #12]
|
|
80074b8: 3301 adds r3, #1
|
|
80074ba: 2202 movs r2, #2
|
|
80074bc: 701a strb r2, [r3, #0]
|
|
else
|
|
{
|
|
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
|
|
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
|
|
}
|
|
break;
|
|
80074be: e100 b.n 80076c2 <USBD_GetDescriptor+0x286>
|
|
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
|
|
80074c0: 687b ldr r3, [r7, #4]
|
|
80074c2: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
80074c6: 6adb ldr r3, [r3, #44] ; 0x2c
|
|
80074c8: f107 0208 add.w r2, r7, #8
|
|
80074cc: 4610 mov r0, r2
|
|
80074ce: 4798 blx r3
|
|
80074d0: 60f8 str r0, [r7, #12]
|
|
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
|
|
80074d2: 68fb ldr r3, [r7, #12]
|
|
80074d4: 3301 adds r3, #1
|
|
80074d6: 2202 movs r2, #2
|
|
80074d8: 701a strb r2, [r3, #0]
|
|
break;
|
|
80074da: e0f2 b.n 80076c2 <USBD_GetDescriptor+0x286>
|
|
|
|
case USB_DESC_TYPE_STRING:
|
|
switch ((uint8_t)(req->wValue))
|
|
80074dc: 683b ldr r3, [r7, #0]
|
|
80074de: 885b ldrh r3, [r3, #2]
|
|
80074e0: b2db uxtb r3, r3
|
|
80074e2: 2b05 cmp r3, #5
|
|
80074e4: f200 80ac bhi.w 8007640 <USBD_GetDescriptor+0x204>
|
|
80074e8: a201 add r2, pc, #4 ; (adr r2, 80074f0 <USBD_GetDescriptor+0xb4>)
|
|
80074ea: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
80074ee: bf00 nop
|
|
80074f0: 08007509 .word 0x08007509
|
|
80074f4: 0800753d .word 0x0800753d
|
|
80074f8: 08007571 .word 0x08007571
|
|
80074fc: 080075a5 .word 0x080075a5
|
|
8007500: 080075d9 .word 0x080075d9
|
|
8007504: 0800760d .word 0x0800760d
|
|
{
|
|
case USBD_IDX_LANGID_STR:
|
|
if (pdev->pDesc->GetLangIDStrDescriptor != NULL)
|
|
8007508: 687b ldr r3, [r7, #4]
|
|
800750a: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
|
|
800750e: 685b ldr r3, [r3, #4]
|
|
8007510: 2b00 cmp r3, #0
|
|
8007512: d00b beq.n 800752c <USBD_GetDescriptor+0xf0>
|
|
{
|
|
pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len);
|
|
8007514: 687b ldr r3, [r7, #4]
|
|
8007516: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
|
|
800751a: 685b ldr r3, [r3, #4]
|
|
800751c: 687a ldr r2, [r7, #4]
|
|
800751e: 7c12 ldrb r2, [r2, #16]
|
|
8007520: f107 0108 add.w r1, r7, #8
|
|
8007524: 4610 mov r0, r2
|
|
8007526: 4798 blx r3
|
|
8007528: 60f8 str r0, [r7, #12]
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
err++;
|
|
}
|
|
break;
|
|
800752a: e091 b.n 8007650 <USBD_GetDescriptor+0x214>
|
|
USBD_CtlError(pdev, req);
|
|
800752c: 6839 ldr r1, [r7, #0]
|
|
800752e: 6878 ldr r0, [r7, #4]
|
|
8007530: f000 fa94 bl 8007a5c <USBD_CtlError>
|
|
err++;
|
|
8007534: 7afb ldrb r3, [r7, #11]
|
|
8007536: 3301 adds r3, #1
|
|
8007538: 72fb strb r3, [r7, #11]
|
|
break;
|
|
800753a: e089 b.n 8007650 <USBD_GetDescriptor+0x214>
|
|
|
|
case USBD_IDX_MFC_STR:
|
|
if (pdev->pDesc->GetManufacturerStrDescriptor != NULL)
|
|
800753c: 687b ldr r3, [r7, #4]
|
|
800753e: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
|
|
8007542: 689b ldr r3, [r3, #8]
|
|
8007544: 2b00 cmp r3, #0
|
|
8007546: d00b beq.n 8007560 <USBD_GetDescriptor+0x124>
|
|
{
|
|
pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len);
|
|
8007548: 687b ldr r3, [r7, #4]
|
|
800754a: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
|
|
800754e: 689b ldr r3, [r3, #8]
|
|
8007550: 687a ldr r2, [r7, #4]
|
|
8007552: 7c12 ldrb r2, [r2, #16]
|
|
8007554: f107 0108 add.w r1, r7, #8
|
|
8007558: 4610 mov r0, r2
|
|
800755a: 4798 blx r3
|
|
800755c: 60f8 str r0, [r7, #12]
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
err++;
|
|
}
|
|
break;
|
|
800755e: e077 b.n 8007650 <USBD_GetDescriptor+0x214>
|
|
USBD_CtlError(pdev, req);
|
|
8007560: 6839 ldr r1, [r7, #0]
|
|
8007562: 6878 ldr r0, [r7, #4]
|
|
8007564: f000 fa7a bl 8007a5c <USBD_CtlError>
|
|
err++;
|
|
8007568: 7afb ldrb r3, [r7, #11]
|
|
800756a: 3301 adds r3, #1
|
|
800756c: 72fb strb r3, [r7, #11]
|
|
break;
|
|
800756e: e06f b.n 8007650 <USBD_GetDescriptor+0x214>
|
|
|
|
case USBD_IDX_PRODUCT_STR:
|
|
if (pdev->pDesc->GetProductStrDescriptor != NULL)
|
|
8007570: 687b ldr r3, [r7, #4]
|
|
8007572: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
|
|
8007576: 68db ldr r3, [r3, #12]
|
|
8007578: 2b00 cmp r3, #0
|
|
800757a: d00b beq.n 8007594 <USBD_GetDescriptor+0x158>
|
|
{
|
|
pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len);
|
|
800757c: 687b ldr r3, [r7, #4]
|
|
800757e: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
|
|
8007582: 68db ldr r3, [r3, #12]
|
|
8007584: 687a ldr r2, [r7, #4]
|
|
8007586: 7c12 ldrb r2, [r2, #16]
|
|
8007588: f107 0108 add.w r1, r7, #8
|
|
800758c: 4610 mov r0, r2
|
|
800758e: 4798 blx r3
|
|
8007590: 60f8 str r0, [r7, #12]
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
err++;
|
|
}
|
|
break;
|
|
8007592: e05d b.n 8007650 <USBD_GetDescriptor+0x214>
|
|
USBD_CtlError(pdev, req);
|
|
8007594: 6839 ldr r1, [r7, #0]
|
|
8007596: 6878 ldr r0, [r7, #4]
|
|
8007598: f000 fa60 bl 8007a5c <USBD_CtlError>
|
|
err++;
|
|
800759c: 7afb ldrb r3, [r7, #11]
|
|
800759e: 3301 adds r3, #1
|
|
80075a0: 72fb strb r3, [r7, #11]
|
|
break;
|
|
80075a2: e055 b.n 8007650 <USBD_GetDescriptor+0x214>
|
|
|
|
case USBD_IDX_SERIAL_STR:
|
|
if (pdev->pDesc->GetSerialStrDescriptor != NULL)
|
|
80075a4: 687b ldr r3, [r7, #4]
|
|
80075a6: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
|
|
80075aa: 691b ldr r3, [r3, #16]
|
|
80075ac: 2b00 cmp r3, #0
|
|
80075ae: d00b beq.n 80075c8 <USBD_GetDescriptor+0x18c>
|
|
{
|
|
pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len);
|
|
80075b0: 687b ldr r3, [r7, #4]
|
|
80075b2: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
|
|
80075b6: 691b ldr r3, [r3, #16]
|
|
80075b8: 687a ldr r2, [r7, #4]
|
|
80075ba: 7c12 ldrb r2, [r2, #16]
|
|
80075bc: f107 0108 add.w r1, r7, #8
|
|
80075c0: 4610 mov r0, r2
|
|
80075c2: 4798 blx r3
|
|
80075c4: 60f8 str r0, [r7, #12]
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
err++;
|
|
}
|
|
break;
|
|
80075c6: e043 b.n 8007650 <USBD_GetDescriptor+0x214>
|
|
USBD_CtlError(pdev, req);
|
|
80075c8: 6839 ldr r1, [r7, #0]
|
|
80075ca: 6878 ldr r0, [r7, #4]
|
|
80075cc: f000 fa46 bl 8007a5c <USBD_CtlError>
|
|
err++;
|
|
80075d0: 7afb ldrb r3, [r7, #11]
|
|
80075d2: 3301 adds r3, #1
|
|
80075d4: 72fb strb r3, [r7, #11]
|
|
break;
|
|
80075d6: e03b b.n 8007650 <USBD_GetDescriptor+0x214>
|
|
|
|
case USBD_IDX_CONFIG_STR:
|
|
if (pdev->pDesc->GetConfigurationStrDescriptor != NULL)
|
|
80075d8: 687b ldr r3, [r7, #4]
|
|
80075da: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
|
|
80075de: 695b ldr r3, [r3, #20]
|
|
80075e0: 2b00 cmp r3, #0
|
|
80075e2: d00b beq.n 80075fc <USBD_GetDescriptor+0x1c0>
|
|
{
|
|
pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len);
|
|
80075e4: 687b ldr r3, [r7, #4]
|
|
80075e6: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
|
|
80075ea: 695b ldr r3, [r3, #20]
|
|
80075ec: 687a ldr r2, [r7, #4]
|
|
80075ee: 7c12 ldrb r2, [r2, #16]
|
|
80075f0: f107 0108 add.w r1, r7, #8
|
|
80075f4: 4610 mov r0, r2
|
|
80075f6: 4798 blx r3
|
|
80075f8: 60f8 str r0, [r7, #12]
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
err++;
|
|
}
|
|
break;
|
|
80075fa: e029 b.n 8007650 <USBD_GetDescriptor+0x214>
|
|
USBD_CtlError(pdev, req);
|
|
80075fc: 6839 ldr r1, [r7, #0]
|
|
80075fe: 6878 ldr r0, [r7, #4]
|
|
8007600: f000 fa2c bl 8007a5c <USBD_CtlError>
|
|
err++;
|
|
8007604: 7afb ldrb r3, [r7, #11]
|
|
8007606: 3301 adds r3, #1
|
|
8007608: 72fb strb r3, [r7, #11]
|
|
break;
|
|
800760a: e021 b.n 8007650 <USBD_GetDescriptor+0x214>
|
|
|
|
case USBD_IDX_INTERFACE_STR:
|
|
if (pdev->pDesc->GetInterfaceStrDescriptor != NULL)
|
|
800760c: 687b ldr r3, [r7, #4]
|
|
800760e: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
|
|
8007612: 699b ldr r3, [r3, #24]
|
|
8007614: 2b00 cmp r3, #0
|
|
8007616: d00b beq.n 8007630 <USBD_GetDescriptor+0x1f4>
|
|
{
|
|
pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len);
|
|
8007618: 687b ldr r3, [r7, #4]
|
|
800761a: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
|
|
800761e: 699b ldr r3, [r3, #24]
|
|
8007620: 687a ldr r2, [r7, #4]
|
|
8007622: 7c12 ldrb r2, [r2, #16]
|
|
8007624: f107 0108 add.w r1, r7, #8
|
|
8007628: 4610 mov r0, r2
|
|
800762a: 4798 blx r3
|
|
800762c: 60f8 str r0, [r7, #12]
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
err++;
|
|
}
|
|
break;
|
|
800762e: e00f b.n 8007650 <USBD_GetDescriptor+0x214>
|
|
USBD_CtlError(pdev, req);
|
|
8007630: 6839 ldr r1, [r7, #0]
|
|
8007632: 6878 ldr r0, [r7, #4]
|
|
8007634: f000 fa12 bl 8007a5c <USBD_CtlError>
|
|
err++;
|
|
8007638: 7afb ldrb r3, [r7, #11]
|
|
800763a: 3301 adds r3, #1
|
|
800763c: 72fb strb r3, [r7, #11]
|
|
break;
|
|
800763e: e007 b.n 8007650 <USBD_GetDescriptor+0x214>
|
|
USBD_CtlError(pdev, req);
|
|
err++;
|
|
}
|
|
break;
|
|
#else
|
|
USBD_CtlError(pdev, req);
|
|
8007640: 6839 ldr r1, [r7, #0]
|
|
8007642: 6878 ldr r0, [r7, #4]
|
|
8007644: f000 fa0a bl 8007a5c <USBD_CtlError>
|
|
err++;
|
|
8007648: 7afb ldrb r3, [r7, #11]
|
|
800764a: 3301 adds r3, #1
|
|
800764c: 72fb strb r3, [r7, #11]
|
|
#endif
|
|
}
|
|
break;
|
|
800764e: e038 b.n 80076c2 <USBD_GetDescriptor+0x286>
|
|
8007650: e037 b.n 80076c2 <USBD_GetDescriptor+0x286>
|
|
|
|
case USB_DESC_TYPE_DEVICE_QUALIFIER:
|
|
if (pdev->dev_speed == USBD_SPEED_HIGH)
|
|
8007652: 687b ldr r3, [r7, #4]
|
|
8007654: 7c1b ldrb r3, [r3, #16]
|
|
8007656: 2b00 cmp r3, #0
|
|
8007658: d109 bne.n 800766e <USBD_GetDescriptor+0x232>
|
|
{
|
|
pbuf = pdev->pClass->GetDeviceQualifierDescriptor(&len);
|
|
800765a: 687b ldr r3, [r7, #4]
|
|
800765c: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
8007660: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
8007662: f107 0208 add.w r2, r7, #8
|
|
8007666: 4610 mov r0, r2
|
|
8007668: 4798 blx r3
|
|
800766a: 60f8 str r0, [r7, #12]
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
err++;
|
|
}
|
|
break;
|
|
800766c: e029 b.n 80076c2 <USBD_GetDescriptor+0x286>
|
|
USBD_CtlError(pdev, req);
|
|
800766e: 6839 ldr r1, [r7, #0]
|
|
8007670: 6878 ldr r0, [r7, #4]
|
|
8007672: f000 f9f3 bl 8007a5c <USBD_CtlError>
|
|
err++;
|
|
8007676: 7afb ldrb r3, [r7, #11]
|
|
8007678: 3301 adds r3, #1
|
|
800767a: 72fb strb r3, [r7, #11]
|
|
break;
|
|
800767c: e021 b.n 80076c2 <USBD_GetDescriptor+0x286>
|
|
|
|
case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION:
|
|
if (pdev->dev_speed == USBD_SPEED_HIGH)
|
|
800767e: 687b ldr r3, [r7, #4]
|
|
8007680: 7c1b ldrb r3, [r3, #16]
|
|
8007682: 2b00 cmp r3, #0
|
|
8007684: d10d bne.n 80076a2 <USBD_GetDescriptor+0x266>
|
|
{
|
|
pbuf = pdev->pClass->GetOtherSpeedConfigDescriptor(&len);
|
|
8007686: 687b ldr r3, [r7, #4]
|
|
8007688: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
|
|
800768c: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
800768e: f107 0208 add.w r2, r7, #8
|
|
8007692: 4610 mov r0, r2
|
|
8007694: 4798 blx r3
|
|
8007696: 60f8 str r0, [r7, #12]
|
|
pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION;
|
|
8007698: 68fb ldr r3, [r7, #12]
|
|
800769a: 3301 adds r3, #1
|
|
800769c: 2207 movs r2, #7
|
|
800769e: 701a strb r2, [r3, #0]
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
err++;
|
|
}
|
|
break;
|
|
80076a0: e00f b.n 80076c2 <USBD_GetDescriptor+0x286>
|
|
USBD_CtlError(pdev, req);
|
|
80076a2: 6839 ldr r1, [r7, #0]
|
|
80076a4: 6878 ldr r0, [r7, #4]
|
|
80076a6: f000 f9d9 bl 8007a5c <USBD_CtlError>
|
|
err++;
|
|
80076aa: 7afb ldrb r3, [r7, #11]
|
|
80076ac: 3301 adds r3, #1
|
|
80076ae: 72fb strb r3, [r7, #11]
|
|
break;
|
|
80076b0: e007 b.n 80076c2 <USBD_GetDescriptor+0x286>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
80076b2: 6839 ldr r1, [r7, #0]
|
|
80076b4: 6878 ldr r0, [r7, #4]
|
|
80076b6: f000 f9d1 bl 8007a5c <USBD_CtlError>
|
|
err++;
|
|
80076ba: 7afb ldrb r3, [r7, #11]
|
|
80076bc: 3301 adds r3, #1
|
|
80076be: 72fb strb r3, [r7, #11]
|
|
break;
|
|
80076c0: bf00 nop
|
|
}
|
|
|
|
if (err != 0U)
|
|
80076c2: 7afb ldrb r3, [r7, #11]
|
|
80076c4: 2b00 cmp r3, #0
|
|
80076c6: d11c bne.n 8007702 <USBD_GetDescriptor+0x2c6>
|
|
{
|
|
return;
|
|
}
|
|
else
|
|
{
|
|
if ((len != 0U) && (req->wLength != 0U))
|
|
80076c8: 893b ldrh r3, [r7, #8]
|
|
80076ca: 2b00 cmp r3, #0
|
|
80076cc: d011 beq.n 80076f2 <USBD_GetDescriptor+0x2b6>
|
|
80076ce: 683b ldr r3, [r7, #0]
|
|
80076d0: 88db ldrh r3, [r3, #6]
|
|
80076d2: 2b00 cmp r3, #0
|
|
80076d4: d00d beq.n 80076f2 <USBD_GetDescriptor+0x2b6>
|
|
{
|
|
len = MIN(len, req->wLength);
|
|
80076d6: 683b ldr r3, [r7, #0]
|
|
80076d8: 88da ldrh r2, [r3, #6]
|
|
80076da: 893b ldrh r3, [r7, #8]
|
|
80076dc: 4293 cmp r3, r2
|
|
80076de: bf28 it cs
|
|
80076e0: 4613 movcs r3, r2
|
|
80076e2: b29b uxth r3, r3
|
|
80076e4: 813b strh r3, [r7, #8]
|
|
(void)USBD_CtlSendData(pdev, pbuf, len);
|
|
80076e6: 893b ldrh r3, [r7, #8]
|
|
80076e8: 461a mov r2, r3
|
|
80076ea: 68f9 ldr r1, [r7, #12]
|
|
80076ec: 6878 ldr r0, [r7, #4]
|
|
80076ee: f000 fa1f bl 8007b30 <USBD_CtlSendData>
|
|
}
|
|
|
|
if (req->wLength == 0U)
|
|
80076f2: 683b ldr r3, [r7, #0]
|
|
80076f4: 88db ldrh r3, [r3, #6]
|
|
80076f6: 2b00 cmp r3, #0
|
|
80076f8: d104 bne.n 8007704 <USBD_GetDescriptor+0x2c8>
|
|
{
|
|
(void)USBD_CtlSendStatus(pdev);
|
|
80076fa: 6878 ldr r0, [r7, #4]
|
|
80076fc: f000 fa76 bl 8007bec <USBD_CtlSendStatus>
|
|
8007700: e000 b.n 8007704 <USBD_GetDescriptor+0x2c8>
|
|
return;
|
|
8007702: bf00 nop
|
|
}
|
|
}
|
|
}
|
|
8007704: 3710 adds r7, #16
|
|
8007706: 46bd mov sp, r7
|
|
8007708: bd80 pop {r7, pc}
|
|
800770a: bf00 nop
|
|
|
|
0800770c <USBD_SetAddress>:
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
static void USBD_SetAddress(USBD_HandleTypeDef *pdev,
|
|
USBD_SetupReqTypedef *req)
|
|
{
|
|
800770c: b580 push {r7, lr}
|
|
800770e: b084 sub sp, #16
|
|
8007710: af00 add r7, sp, #0
|
|
8007712: 6078 str r0, [r7, #4]
|
|
8007714: 6039 str r1, [r7, #0]
|
|
uint8_t dev_addr;
|
|
|
|
if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U))
|
|
8007716: 683b ldr r3, [r7, #0]
|
|
8007718: 889b ldrh r3, [r3, #4]
|
|
800771a: 2b00 cmp r3, #0
|
|
800771c: d130 bne.n 8007780 <USBD_SetAddress+0x74>
|
|
800771e: 683b ldr r3, [r7, #0]
|
|
8007720: 88db ldrh r3, [r3, #6]
|
|
8007722: 2b00 cmp r3, #0
|
|
8007724: d12c bne.n 8007780 <USBD_SetAddress+0x74>
|
|
8007726: 683b ldr r3, [r7, #0]
|
|
8007728: 885b ldrh r3, [r3, #2]
|
|
800772a: 2b7f cmp r3, #127 ; 0x7f
|
|
800772c: d828 bhi.n 8007780 <USBD_SetAddress+0x74>
|
|
{
|
|
dev_addr = (uint8_t)(req->wValue) & 0x7FU;
|
|
800772e: 683b ldr r3, [r7, #0]
|
|
8007730: 885b ldrh r3, [r3, #2]
|
|
8007732: b2db uxtb r3, r3
|
|
8007734: f003 037f and.w r3, r3, #127 ; 0x7f
|
|
8007738: 73fb strb r3, [r7, #15]
|
|
|
|
if (pdev->dev_state == USBD_STATE_CONFIGURED)
|
|
800773a: 687b ldr r3, [r7, #4]
|
|
800773c: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
8007740: 2b03 cmp r3, #3
|
|
8007742: d104 bne.n 800774e <USBD_SetAddress+0x42>
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
8007744: 6839 ldr r1, [r7, #0]
|
|
8007746: 6878 ldr r0, [r7, #4]
|
|
8007748: f000 f988 bl 8007a5c <USBD_CtlError>
|
|
if (pdev->dev_state == USBD_STATE_CONFIGURED)
|
|
800774c: e01c b.n 8007788 <USBD_SetAddress+0x7c>
|
|
}
|
|
else
|
|
{
|
|
pdev->dev_address = dev_addr;
|
|
800774e: 687b ldr r3, [r7, #4]
|
|
8007750: 7bfa ldrb r2, [r7, #15]
|
|
8007752: f883 229e strb.w r2, [r3, #670] ; 0x29e
|
|
USBD_LL_SetUSBAddress(pdev, dev_addr);
|
|
8007756: 7bfb ldrb r3, [r7, #15]
|
|
8007758: 4619 mov r1, r3
|
|
800775a: 6878 ldr r0, [r7, #4]
|
|
800775c: f003 f889 bl 800a872 <USBD_LL_SetUSBAddress>
|
|
USBD_CtlSendStatus(pdev);
|
|
8007760: 6878 ldr r0, [r7, #4]
|
|
8007762: f000 fa43 bl 8007bec <USBD_CtlSendStatus>
|
|
|
|
if (dev_addr != 0U)
|
|
8007766: 7bfb ldrb r3, [r7, #15]
|
|
8007768: 2b00 cmp r3, #0
|
|
800776a: d004 beq.n 8007776 <USBD_SetAddress+0x6a>
|
|
{
|
|
pdev->dev_state = USBD_STATE_ADDRESSED;
|
|
800776c: 687b ldr r3, [r7, #4]
|
|
800776e: 2202 movs r2, #2
|
|
8007770: f883 229c strb.w r2, [r3, #668] ; 0x29c
|
|
if (pdev->dev_state == USBD_STATE_CONFIGURED)
|
|
8007774: e008 b.n 8007788 <USBD_SetAddress+0x7c>
|
|
}
|
|
else
|
|
{
|
|
pdev->dev_state = USBD_STATE_DEFAULT;
|
|
8007776: 687b ldr r3, [r7, #4]
|
|
8007778: 2201 movs r2, #1
|
|
800777a: f883 229c strb.w r2, [r3, #668] ; 0x29c
|
|
if (pdev->dev_state == USBD_STATE_CONFIGURED)
|
|
800777e: e003 b.n 8007788 <USBD_SetAddress+0x7c>
|
|
}
|
|
}
|
|
}
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
8007780: 6839 ldr r1, [r7, #0]
|
|
8007782: 6878 ldr r0, [r7, #4]
|
|
8007784: f000 f96a bl 8007a5c <USBD_CtlError>
|
|
}
|
|
}
|
|
8007788: bf00 nop
|
|
800778a: 3710 adds r7, #16
|
|
800778c: 46bd mov sp, r7
|
|
800778e: bd80 pop {r7, pc}
|
|
|
|
08007790 <USBD_SetConfig>:
|
|
* @param pdev: device instance
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
static void USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
|
|
{
|
|
8007790: b580 push {r7, lr}
|
|
8007792: b082 sub sp, #8
|
|
8007794: af00 add r7, sp, #0
|
|
8007796: 6078 str r0, [r7, #4]
|
|
8007798: 6039 str r1, [r7, #0]
|
|
static uint8_t cfgidx;
|
|
|
|
cfgidx = (uint8_t)(req->wValue);
|
|
800779a: 683b ldr r3, [r7, #0]
|
|
800779c: 885b ldrh r3, [r3, #2]
|
|
800779e: b2da uxtb r2, r3
|
|
80077a0: 4b41 ldr r3, [pc, #260] ; (80078a8 <USBD_SetConfig+0x118>)
|
|
80077a2: 701a strb r2, [r3, #0]
|
|
|
|
if (cfgidx > USBD_MAX_NUM_CONFIGURATION)
|
|
80077a4: 4b40 ldr r3, [pc, #256] ; (80078a8 <USBD_SetConfig+0x118>)
|
|
80077a6: 781b ldrb r3, [r3, #0]
|
|
80077a8: 2b01 cmp r3, #1
|
|
80077aa: d904 bls.n 80077b6 <USBD_SetConfig+0x26>
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
80077ac: 6839 ldr r1, [r7, #0]
|
|
80077ae: 6878 ldr r0, [r7, #4]
|
|
80077b0: f000 f954 bl 8007a5c <USBD_CtlError>
|
|
80077b4: e075 b.n 80078a2 <USBD_SetConfig+0x112>
|
|
}
|
|
else
|
|
{
|
|
switch (pdev->dev_state)
|
|
80077b6: 687b ldr r3, [r7, #4]
|
|
80077b8: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
80077bc: 2b02 cmp r3, #2
|
|
80077be: d002 beq.n 80077c6 <USBD_SetConfig+0x36>
|
|
80077c0: 2b03 cmp r3, #3
|
|
80077c2: d023 beq.n 800780c <USBD_SetConfig+0x7c>
|
|
80077c4: e062 b.n 800788c <USBD_SetConfig+0xfc>
|
|
{
|
|
case USBD_STATE_ADDRESSED:
|
|
if (cfgidx)
|
|
80077c6: 4b38 ldr r3, [pc, #224] ; (80078a8 <USBD_SetConfig+0x118>)
|
|
80077c8: 781b ldrb r3, [r3, #0]
|
|
80077ca: 2b00 cmp r3, #0
|
|
80077cc: d01a beq.n 8007804 <USBD_SetConfig+0x74>
|
|
{
|
|
pdev->dev_config = cfgidx;
|
|
80077ce: 4b36 ldr r3, [pc, #216] ; (80078a8 <USBD_SetConfig+0x118>)
|
|
80077d0: 781b ldrb r3, [r3, #0]
|
|
80077d2: 461a mov r2, r3
|
|
80077d4: 687b ldr r3, [r7, #4]
|
|
80077d6: 605a str r2, [r3, #4]
|
|
pdev->dev_state = USBD_STATE_CONFIGURED;
|
|
80077d8: 687b ldr r3, [r7, #4]
|
|
80077da: 2203 movs r2, #3
|
|
80077dc: f883 229c strb.w r2, [r3, #668] ; 0x29c
|
|
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
|
|
80077e0: 4b31 ldr r3, [pc, #196] ; (80078a8 <USBD_SetConfig+0x118>)
|
|
80077e2: 781b ldrb r3, [r3, #0]
|
|
80077e4: 4619 mov r1, r3
|
|
80077e6: 6878 ldr r0, [r7, #4]
|
|
80077e8: f7ff f9f4 bl 8006bd4 <USBD_SetClassConfig>
|
|
80077ec: 4603 mov r3, r0
|
|
80077ee: 2b02 cmp r3, #2
|
|
80077f0: d104 bne.n 80077fc <USBD_SetConfig+0x6c>
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
80077f2: 6839 ldr r1, [r7, #0]
|
|
80077f4: 6878 ldr r0, [r7, #4]
|
|
80077f6: f000 f931 bl 8007a5c <USBD_CtlError>
|
|
return;
|
|
80077fa: e052 b.n 80078a2 <USBD_SetConfig+0x112>
|
|
}
|
|
USBD_CtlSendStatus(pdev);
|
|
80077fc: 6878 ldr r0, [r7, #4]
|
|
80077fe: f000 f9f5 bl 8007bec <USBD_CtlSendStatus>
|
|
}
|
|
else
|
|
{
|
|
USBD_CtlSendStatus(pdev);
|
|
}
|
|
break;
|
|
8007802: e04e b.n 80078a2 <USBD_SetConfig+0x112>
|
|
USBD_CtlSendStatus(pdev);
|
|
8007804: 6878 ldr r0, [r7, #4]
|
|
8007806: f000 f9f1 bl 8007bec <USBD_CtlSendStatus>
|
|
break;
|
|
800780a: e04a b.n 80078a2 <USBD_SetConfig+0x112>
|
|
|
|
case USBD_STATE_CONFIGURED:
|
|
if (cfgidx == 0U)
|
|
800780c: 4b26 ldr r3, [pc, #152] ; (80078a8 <USBD_SetConfig+0x118>)
|
|
800780e: 781b ldrb r3, [r3, #0]
|
|
8007810: 2b00 cmp r3, #0
|
|
8007812: d112 bne.n 800783a <USBD_SetConfig+0xaa>
|
|
{
|
|
pdev->dev_state = USBD_STATE_ADDRESSED;
|
|
8007814: 687b ldr r3, [r7, #4]
|
|
8007816: 2202 movs r2, #2
|
|
8007818: f883 229c strb.w r2, [r3, #668] ; 0x29c
|
|
pdev->dev_config = cfgidx;
|
|
800781c: 4b22 ldr r3, [pc, #136] ; (80078a8 <USBD_SetConfig+0x118>)
|
|
800781e: 781b ldrb r3, [r3, #0]
|
|
8007820: 461a mov r2, r3
|
|
8007822: 687b ldr r3, [r7, #4]
|
|
8007824: 605a str r2, [r3, #4]
|
|
USBD_ClrClassConfig(pdev, cfgidx);
|
|
8007826: 4b20 ldr r3, [pc, #128] ; (80078a8 <USBD_SetConfig+0x118>)
|
|
8007828: 781b ldrb r3, [r3, #0]
|
|
800782a: 4619 mov r1, r3
|
|
800782c: 6878 ldr r0, [r7, #4]
|
|
800782e: f7ff f9f0 bl 8006c12 <USBD_ClrClassConfig>
|
|
USBD_CtlSendStatus(pdev);
|
|
8007832: 6878 ldr r0, [r7, #4]
|
|
8007834: f000 f9da bl 8007bec <USBD_CtlSendStatus>
|
|
}
|
|
else
|
|
{
|
|
USBD_CtlSendStatus(pdev);
|
|
}
|
|
break;
|
|
8007838: e033 b.n 80078a2 <USBD_SetConfig+0x112>
|
|
else if (cfgidx != pdev->dev_config)
|
|
800783a: 4b1b ldr r3, [pc, #108] ; (80078a8 <USBD_SetConfig+0x118>)
|
|
800783c: 781b ldrb r3, [r3, #0]
|
|
800783e: 461a mov r2, r3
|
|
8007840: 687b ldr r3, [r7, #4]
|
|
8007842: 685b ldr r3, [r3, #4]
|
|
8007844: 429a cmp r2, r3
|
|
8007846: d01d beq.n 8007884 <USBD_SetConfig+0xf4>
|
|
USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config);
|
|
8007848: 687b ldr r3, [r7, #4]
|
|
800784a: 685b ldr r3, [r3, #4]
|
|
800784c: b2db uxtb r3, r3
|
|
800784e: 4619 mov r1, r3
|
|
8007850: 6878 ldr r0, [r7, #4]
|
|
8007852: f7ff f9de bl 8006c12 <USBD_ClrClassConfig>
|
|
pdev->dev_config = cfgidx;
|
|
8007856: 4b14 ldr r3, [pc, #80] ; (80078a8 <USBD_SetConfig+0x118>)
|
|
8007858: 781b ldrb r3, [r3, #0]
|
|
800785a: 461a mov r2, r3
|
|
800785c: 687b ldr r3, [r7, #4]
|
|
800785e: 605a str r2, [r3, #4]
|
|
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
|
|
8007860: 4b11 ldr r3, [pc, #68] ; (80078a8 <USBD_SetConfig+0x118>)
|
|
8007862: 781b ldrb r3, [r3, #0]
|
|
8007864: 4619 mov r1, r3
|
|
8007866: 6878 ldr r0, [r7, #4]
|
|
8007868: f7ff f9b4 bl 8006bd4 <USBD_SetClassConfig>
|
|
800786c: 4603 mov r3, r0
|
|
800786e: 2b02 cmp r3, #2
|
|
8007870: d104 bne.n 800787c <USBD_SetConfig+0xec>
|
|
USBD_CtlError(pdev, req);
|
|
8007872: 6839 ldr r1, [r7, #0]
|
|
8007874: 6878 ldr r0, [r7, #4]
|
|
8007876: f000 f8f1 bl 8007a5c <USBD_CtlError>
|
|
return;
|
|
800787a: e012 b.n 80078a2 <USBD_SetConfig+0x112>
|
|
USBD_CtlSendStatus(pdev);
|
|
800787c: 6878 ldr r0, [r7, #4]
|
|
800787e: f000 f9b5 bl 8007bec <USBD_CtlSendStatus>
|
|
break;
|
|
8007882: e00e b.n 80078a2 <USBD_SetConfig+0x112>
|
|
USBD_CtlSendStatus(pdev);
|
|
8007884: 6878 ldr r0, [r7, #4]
|
|
8007886: f000 f9b1 bl 8007bec <USBD_CtlSendStatus>
|
|
break;
|
|
800788a: e00a b.n 80078a2 <USBD_SetConfig+0x112>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
800788c: 6839 ldr r1, [r7, #0]
|
|
800788e: 6878 ldr r0, [r7, #4]
|
|
8007890: f000 f8e4 bl 8007a5c <USBD_CtlError>
|
|
USBD_ClrClassConfig(pdev, cfgidx);
|
|
8007894: 4b04 ldr r3, [pc, #16] ; (80078a8 <USBD_SetConfig+0x118>)
|
|
8007896: 781b ldrb r3, [r3, #0]
|
|
8007898: 4619 mov r1, r3
|
|
800789a: 6878 ldr r0, [r7, #4]
|
|
800789c: f7ff f9b9 bl 8006c12 <USBD_ClrClassConfig>
|
|
break;
|
|
80078a0: bf00 nop
|
|
}
|
|
}
|
|
}
|
|
80078a2: 3708 adds r7, #8
|
|
80078a4: 46bd mov sp, r7
|
|
80078a6: bd80 pop {r7, pc}
|
|
80078a8: 20000224 .word 0x20000224
|
|
|
|
080078ac <USBD_GetConfig>:
|
|
* @param pdev: device instance
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
|
|
{
|
|
80078ac: b580 push {r7, lr}
|
|
80078ae: b082 sub sp, #8
|
|
80078b0: af00 add r7, sp, #0
|
|
80078b2: 6078 str r0, [r7, #4]
|
|
80078b4: 6039 str r1, [r7, #0]
|
|
if (req->wLength != 1U)
|
|
80078b6: 683b ldr r3, [r7, #0]
|
|
80078b8: 88db ldrh r3, [r3, #6]
|
|
80078ba: 2b01 cmp r3, #1
|
|
80078bc: d004 beq.n 80078c8 <USBD_GetConfig+0x1c>
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
80078be: 6839 ldr r1, [r7, #0]
|
|
80078c0: 6878 ldr r0, [r7, #4]
|
|
80078c2: f000 f8cb bl 8007a5c <USBD_CtlError>
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
80078c6: e021 b.n 800790c <USBD_GetConfig+0x60>
|
|
switch (pdev->dev_state)
|
|
80078c8: 687b ldr r3, [r7, #4]
|
|
80078ca: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
80078ce: 2b01 cmp r3, #1
|
|
80078d0: db17 blt.n 8007902 <USBD_GetConfig+0x56>
|
|
80078d2: 2b02 cmp r3, #2
|
|
80078d4: dd02 ble.n 80078dc <USBD_GetConfig+0x30>
|
|
80078d6: 2b03 cmp r3, #3
|
|
80078d8: d00b beq.n 80078f2 <USBD_GetConfig+0x46>
|
|
80078da: e012 b.n 8007902 <USBD_GetConfig+0x56>
|
|
pdev->dev_default_config = 0U;
|
|
80078dc: 687b ldr r3, [r7, #4]
|
|
80078de: 2200 movs r2, #0
|
|
80078e0: 609a str r2, [r3, #8]
|
|
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_default_config, 1U);
|
|
80078e2: 687b ldr r3, [r7, #4]
|
|
80078e4: 3308 adds r3, #8
|
|
80078e6: 2201 movs r2, #1
|
|
80078e8: 4619 mov r1, r3
|
|
80078ea: 6878 ldr r0, [r7, #4]
|
|
80078ec: f000 f920 bl 8007b30 <USBD_CtlSendData>
|
|
break;
|
|
80078f0: e00c b.n 800790c <USBD_GetConfig+0x60>
|
|
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config, 1U);
|
|
80078f2: 687b ldr r3, [r7, #4]
|
|
80078f4: 3304 adds r3, #4
|
|
80078f6: 2201 movs r2, #1
|
|
80078f8: 4619 mov r1, r3
|
|
80078fa: 6878 ldr r0, [r7, #4]
|
|
80078fc: f000 f918 bl 8007b30 <USBD_CtlSendData>
|
|
break;
|
|
8007900: e004 b.n 800790c <USBD_GetConfig+0x60>
|
|
USBD_CtlError(pdev, req);
|
|
8007902: 6839 ldr r1, [r7, #0]
|
|
8007904: 6878 ldr r0, [r7, #4]
|
|
8007906: f000 f8a9 bl 8007a5c <USBD_CtlError>
|
|
break;
|
|
800790a: bf00 nop
|
|
}
|
|
800790c: bf00 nop
|
|
800790e: 3708 adds r7, #8
|
|
8007910: 46bd mov sp, r7
|
|
8007912: bd80 pop {r7, pc}
|
|
|
|
08007914 <USBD_GetStatus>:
|
|
* @param pdev: device instance
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
|
|
{
|
|
8007914: b580 push {r7, lr}
|
|
8007916: b082 sub sp, #8
|
|
8007918: af00 add r7, sp, #0
|
|
800791a: 6078 str r0, [r7, #4]
|
|
800791c: 6039 str r1, [r7, #0]
|
|
switch (pdev->dev_state)
|
|
800791e: 687b ldr r3, [r7, #4]
|
|
8007920: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
8007924: 3b01 subs r3, #1
|
|
8007926: 2b02 cmp r3, #2
|
|
8007928: d81e bhi.n 8007968 <USBD_GetStatus+0x54>
|
|
{
|
|
case USBD_STATE_DEFAULT:
|
|
case USBD_STATE_ADDRESSED:
|
|
case USBD_STATE_CONFIGURED:
|
|
if (req->wLength != 0x2U)
|
|
800792a: 683b ldr r3, [r7, #0]
|
|
800792c: 88db ldrh r3, [r3, #6]
|
|
800792e: 2b02 cmp r3, #2
|
|
8007930: d004 beq.n 800793c <USBD_GetStatus+0x28>
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
8007932: 6839 ldr r1, [r7, #0]
|
|
8007934: 6878 ldr r0, [r7, #4]
|
|
8007936: f000 f891 bl 8007a5c <USBD_CtlError>
|
|
break;
|
|
800793a: e01a b.n 8007972 <USBD_GetStatus+0x5e>
|
|
}
|
|
|
|
#if (USBD_SELF_POWERED == 1U)
|
|
pdev->dev_config_status = USB_CONFIG_SELF_POWERED;
|
|
800793c: 687b ldr r3, [r7, #4]
|
|
800793e: 2201 movs r2, #1
|
|
8007940: 60da str r2, [r3, #12]
|
|
#else
|
|
pdev->dev_config_status = 0U;
|
|
#endif
|
|
|
|
if (pdev->dev_remote_wakeup)
|
|
8007942: 687b ldr r3, [r7, #4]
|
|
8007944: f8d3 32a4 ldr.w r3, [r3, #676] ; 0x2a4
|
|
8007948: 2b00 cmp r3, #0
|
|
800794a: d005 beq.n 8007958 <USBD_GetStatus+0x44>
|
|
{
|
|
pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP;
|
|
800794c: 687b ldr r3, [r7, #4]
|
|
800794e: 68db ldr r3, [r3, #12]
|
|
8007950: f043 0202 orr.w r2, r3, #2
|
|
8007954: 687b ldr r3, [r7, #4]
|
|
8007956: 60da str r2, [r3, #12]
|
|
}
|
|
|
|
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config_status, 2U);
|
|
8007958: 687b ldr r3, [r7, #4]
|
|
800795a: 330c adds r3, #12
|
|
800795c: 2202 movs r2, #2
|
|
800795e: 4619 mov r1, r3
|
|
8007960: 6878 ldr r0, [r7, #4]
|
|
8007962: f000 f8e5 bl 8007b30 <USBD_CtlSendData>
|
|
break;
|
|
8007966: e004 b.n 8007972 <USBD_GetStatus+0x5e>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
8007968: 6839 ldr r1, [r7, #0]
|
|
800796a: 6878 ldr r0, [r7, #4]
|
|
800796c: f000 f876 bl 8007a5c <USBD_CtlError>
|
|
break;
|
|
8007970: bf00 nop
|
|
}
|
|
}
|
|
8007972: bf00 nop
|
|
8007974: 3708 adds r7, #8
|
|
8007976: 46bd mov sp, r7
|
|
8007978: bd80 pop {r7, pc}
|
|
|
|
0800797a <USBD_SetFeature>:
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
static void USBD_SetFeature(USBD_HandleTypeDef *pdev,
|
|
USBD_SetupReqTypedef *req)
|
|
{
|
|
800797a: b580 push {r7, lr}
|
|
800797c: b082 sub sp, #8
|
|
800797e: af00 add r7, sp, #0
|
|
8007980: 6078 str r0, [r7, #4]
|
|
8007982: 6039 str r1, [r7, #0]
|
|
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
|
|
8007984: 683b ldr r3, [r7, #0]
|
|
8007986: 885b ldrh r3, [r3, #2]
|
|
8007988: 2b01 cmp r3, #1
|
|
800798a: d106 bne.n 800799a <USBD_SetFeature+0x20>
|
|
{
|
|
pdev->dev_remote_wakeup = 1U;
|
|
800798c: 687b ldr r3, [r7, #4]
|
|
800798e: 2201 movs r2, #1
|
|
8007990: f8c3 22a4 str.w r2, [r3, #676] ; 0x2a4
|
|
USBD_CtlSendStatus(pdev);
|
|
8007994: 6878 ldr r0, [r7, #4]
|
|
8007996: f000 f929 bl 8007bec <USBD_CtlSendStatus>
|
|
}
|
|
}
|
|
800799a: bf00 nop
|
|
800799c: 3708 adds r7, #8
|
|
800799e: 46bd mov sp, r7
|
|
80079a0: bd80 pop {r7, pc}
|
|
|
|
080079a2 <USBD_ClrFeature>:
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
static void USBD_ClrFeature(USBD_HandleTypeDef *pdev,
|
|
USBD_SetupReqTypedef *req)
|
|
{
|
|
80079a2: b580 push {r7, lr}
|
|
80079a4: b082 sub sp, #8
|
|
80079a6: af00 add r7, sp, #0
|
|
80079a8: 6078 str r0, [r7, #4]
|
|
80079aa: 6039 str r1, [r7, #0]
|
|
switch (pdev->dev_state)
|
|
80079ac: 687b ldr r3, [r7, #4]
|
|
80079ae: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
|
|
80079b2: 3b01 subs r3, #1
|
|
80079b4: 2b02 cmp r3, #2
|
|
80079b6: d80b bhi.n 80079d0 <USBD_ClrFeature+0x2e>
|
|
{
|
|
case USBD_STATE_DEFAULT:
|
|
case USBD_STATE_ADDRESSED:
|
|
case USBD_STATE_CONFIGURED:
|
|
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
|
|
80079b8: 683b ldr r3, [r7, #0]
|
|
80079ba: 885b ldrh r3, [r3, #2]
|
|
80079bc: 2b01 cmp r3, #1
|
|
80079be: d10c bne.n 80079da <USBD_ClrFeature+0x38>
|
|
{
|
|
pdev->dev_remote_wakeup = 0U;
|
|
80079c0: 687b ldr r3, [r7, #4]
|
|
80079c2: 2200 movs r2, #0
|
|
80079c4: f8c3 22a4 str.w r2, [r3, #676] ; 0x2a4
|
|
USBD_CtlSendStatus(pdev);
|
|
80079c8: 6878 ldr r0, [r7, #4]
|
|
80079ca: f000 f90f bl 8007bec <USBD_CtlSendStatus>
|
|
}
|
|
break;
|
|
80079ce: e004 b.n 80079da <USBD_ClrFeature+0x38>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
80079d0: 6839 ldr r1, [r7, #0]
|
|
80079d2: 6878 ldr r0, [r7, #4]
|
|
80079d4: f000 f842 bl 8007a5c <USBD_CtlError>
|
|
break;
|
|
80079d8: e000 b.n 80079dc <USBD_ClrFeature+0x3a>
|
|
break;
|
|
80079da: bf00 nop
|
|
}
|
|
}
|
|
80079dc: bf00 nop
|
|
80079de: 3708 adds r7, #8
|
|
80079e0: 46bd mov sp, r7
|
|
80079e2: bd80 pop {r7, pc}
|
|
|
|
080079e4 <USBD_ParseSetupRequest>:
|
|
* @param req: usb request
|
|
* @retval None
|
|
*/
|
|
|
|
void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata)
|
|
{
|
|
80079e4: b480 push {r7}
|
|
80079e6: b083 sub sp, #12
|
|
80079e8: af00 add r7, sp, #0
|
|
80079ea: 6078 str r0, [r7, #4]
|
|
80079ec: 6039 str r1, [r7, #0]
|
|
req->bmRequest = *(uint8_t *)(pdata);
|
|
80079ee: 683b ldr r3, [r7, #0]
|
|
80079f0: 781a ldrb r2, [r3, #0]
|
|
80079f2: 687b ldr r3, [r7, #4]
|
|
80079f4: 701a strb r2, [r3, #0]
|
|
req->bRequest = *(uint8_t *)(pdata + 1U);
|
|
80079f6: 683b ldr r3, [r7, #0]
|
|
80079f8: 785a ldrb r2, [r3, #1]
|
|
80079fa: 687b ldr r3, [r7, #4]
|
|
80079fc: 705a strb r2, [r3, #1]
|
|
req->wValue = SWAPBYTE(pdata + 2U);
|
|
80079fe: 683b ldr r3, [r7, #0]
|
|
8007a00: 3302 adds r3, #2
|
|
8007a02: 781b ldrb r3, [r3, #0]
|
|
8007a04: b29a uxth r2, r3
|
|
8007a06: 683b ldr r3, [r7, #0]
|
|
8007a08: 3303 adds r3, #3
|
|
8007a0a: 781b ldrb r3, [r3, #0]
|
|
8007a0c: b29b uxth r3, r3
|
|
8007a0e: 021b lsls r3, r3, #8
|
|
8007a10: b29b uxth r3, r3
|
|
8007a12: 4413 add r3, r2
|
|
8007a14: b29a uxth r2, r3
|
|
8007a16: 687b ldr r3, [r7, #4]
|
|
8007a18: 805a strh r2, [r3, #2]
|
|
req->wIndex = SWAPBYTE(pdata + 4U);
|
|
8007a1a: 683b ldr r3, [r7, #0]
|
|
8007a1c: 3304 adds r3, #4
|
|
8007a1e: 781b ldrb r3, [r3, #0]
|
|
8007a20: b29a uxth r2, r3
|
|
8007a22: 683b ldr r3, [r7, #0]
|
|
8007a24: 3305 adds r3, #5
|
|
8007a26: 781b ldrb r3, [r3, #0]
|
|
8007a28: b29b uxth r3, r3
|
|
8007a2a: 021b lsls r3, r3, #8
|
|
8007a2c: b29b uxth r3, r3
|
|
8007a2e: 4413 add r3, r2
|
|
8007a30: b29a uxth r2, r3
|
|
8007a32: 687b ldr r3, [r7, #4]
|
|
8007a34: 809a strh r2, [r3, #4]
|
|
req->wLength = SWAPBYTE(pdata + 6U);
|
|
8007a36: 683b ldr r3, [r7, #0]
|
|
8007a38: 3306 adds r3, #6
|
|
8007a3a: 781b ldrb r3, [r3, #0]
|
|
8007a3c: b29a uxth r2, r3
|
|
8007a3e: 683b ldr r3, [r7, #0]
|
|
8007a40: 3307 adds r3, #7
|
|
8007a42: 781b ldrb r3, [r3, #0]
|
|
8007a44: b29b uxth r3, r3
|
|
8007a46: 021b lsls r3, r3, #8
|
|
8007a48: b29b uxth r3, r3
|
|
8007a4a: 4413 add r3, r2
|
|
8007a4c: b29a uxth r2, r3
|
|
8007a4e: 687b ldr r3, [r7, #4]
|
|
8007a50: 80da strh r2, [r3, #6]
|
|
|
|
}
|
|
8007a52: bf00 nop
|
|
8007a54: 370c adds r7, #12
|
|
8007a56: 46bd mov sp, r7
|
|
8007a58: bc80 pop {r7}
|
|
8007a5a: 4770 bx lr
|
|
|
|
08007a5c <USBD_CtlError>:
|
|
* @retval None
|
|
*/
|
|
|
|
void USBD_CtlError(USBD_HandleTypeDef *pdev,
|
|
USBD_SetupReqTypedef *req)
|
|
{
|
|
8007a5c: b580 push {r7, lr}
|
|
8007a5e: b082 sub sp, #8
|
|
8007a60: af00 add r7, sp, #0
|
|
8007a62: 6078 str r0, [r7, #4]
|
|
8007a64: 6039 str r1, [r7, #0]
|
|
USBD_LL_StallEP(pdev, 0x80U);
|
|
8007a66: 2180 movs r1, #128 ; 0x80
|
|
8007a68: 6878 ldr r0, [r7, #4]
|
|
8007a6a: f002 fe9f bl 800a7ac <USBD_LL_StallEP>
|
|
USBD_LL_StallEP(pdev, 0U);
|
|
8007a6e: 2100 movs r1, #0
|
|
8007a70: 6878 ldr r0, [r7, #4]
|
|
8007a72: f002 fe9b bl 800a7ac <USBD_LL_StallEP>
|
|
}
|
|
8007a76: bf00 nop
|
|
8007a78: 3708 adds r7, #8
|
|
8007a7a: 46bd mov sp, r7
|
|
8007a7c: bd80 pop {r7, pc}
|
|
|
|
08007a7e <USBD_GetString>:
|
|
* @param unicode : Formatted string buffer (unicode)
|
|
* @param len : descriptor length
|
|
* @retval None
|
|
*/
|
|
void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len)
|
|
{
|
|
8007a7e: b580 push {r7, lr}
|
|
8007a80: b086 sub sp, #24
|
|
8007a82: af00 add r7, sp, #0
|
|
8007a84: 60f8 str r0, [r7, #12]
|
|
8007a86: 60b9 str r1, [r7, #8]
|
|
8007a88: 607a str r2, [r7, #4]
|
|
uint8_t idx = 0U;
|
|
8007a8a: 2300 movs r3, #0
|
|
8007a8c: 75fb strb r3, [r7, #23]
|
|
|
|
if (desc != NULL)
|
|
8007a8e: 68fb ldr r3, [r7, #12]
|
|
8007a90: 2b00 cmp r3, #0
|
|
8007a92: d032 beq.n 8007afa <USBD_GetString+0x7c>
|
|
{
|
|
*len = (uint16_t)USBD_GetLen(desc) * 2U + 2U;
|
|
8007a94: 68f8 ldr r0, [r7, #12]
|
|
8007a96: f000 f834 bl 8007b02 <USBD_GetLen>
|
|
8007a9a: 4603 mov r3, r0
|
|
8007a9c: 3301 adds r3, #1
|
|
8007a9e: b29b uxth r3, r3
|
|
8007aa0: 005b lsls r3, r3, #1
|
|
8007aa2: b29a uxth r2, r3
|
|
8007aa4: 687b ldr r3, [r7, #4]
|
|
8007aa6: 801a strh r2, [r3, #0]
|
|
unicode[idx++] = *(uint8_t *)(void *)len;
|
|
8007aa8: 7dfb ldrb r3, [r7, #23]
|
|
8007aaa: 1c5a adds r2, r3, #1
|
|
8007aac: 75fa strb r2, [r7, #23]
|
|
8007aae: 461a mov r2, r3
|
|
8007ab0: 68bb ldr r3, [r7, #8]
|
|
8007ab2: 4413 add r3, r2
|
|
8007ab4: 687a ldr r2, [r7, #4]
|
|
8007ab6: 7812 ldrb r2, [r2, #0]
|
|
8007ab8: 701a strb r2, [r3, #0]
|
|
unicode[idx++] = USB_DESC_TYPE_STRING;
|
|
8007aba: 7dfb ldrb r3, [r7, #23]
|
|
8007abc: 1c5a adds r2, r3, #1
|
|
8007abe: 75fa strb r2, [r7, #23]
|
|
8007ac0: 461a mov r2, r3
|
|
8007ac2: 68bb ldr r3, [r7, #8]
|
|
8007ac4: 4413 add r3, r2
|
|
8007ac6: 2203 movs r2, #3
|
|
8007ac8: 701a strb r2, [r3, #0]
|
|
|
|
while (*desc != '\0')
|
|
8007aca: e012 b.n 8007af2 <USBD_GetString+0x74>
|
|
{
|
|
unicode[idx++] = *desc++;
|
|
8007acc: 68fb ldr r3, [r7, #12]
|
|
8007ace: 1c5a adds r2, r3, #1
|
|
8007ad0: 60fa str r2, [r7, #12]
|
|
8007ad2: 7dfa ldrb r2, [r7, #23]
|
|
8007ad4: 1c51 adds r1, r2, #1
|
|
8007ad6: 75f9 strb r1, [r7, #23]
|
|
8007ad8: 4611 mov r1, r2
|
|
8007ada: 68ba ldr r2, [r7, #8]
|
|
8007adc: 440a add r2, r1
|
|
8007ade: 781b ldrb r3, [r3, #0]
|
|
8007ae0: 7013 strb r3, [r2, #0]
|
|
unicode[idx++] = 0U;
|
|
8007ae2: 7dfb ldrb r3, [r7, #23]
|
|
8007ae4: 1c5a adds r2, r3, #1
|
|
8007ae6: 75fa strb r2, [r7, #23]
|
|
8007ae8: 461a mov r2, r3
|
|
8007aea: 68bb ldr r3, [r7, #8]
|
|
8007aec: 4413 add r3, r2
|
|
8007aee: 2200 movs r2, #0
|
|
8007af0: 701a strb r2, [r3, #0]
|
|
while (*desc != '\0')
|
|
8007af2: 68fb ldr r3, [r7, #12]
|
|
8007af4: 781b ldrb r3, [r3, #0]
|
|
8007af6: 2b00 cmp r3, #0
|
|
8007af8: d1e8 bne.n 8007acc <USBD_GetString+0x4e>
|
|
}
|
|
}
|
|
}
|
|
8007afa: bf00 nop
|
|
8007afc: 3718 adds r7, #24
|
|
8007afe: 46bd mov sp, r7
|
|
8007b00: bd80 pop {r7, pc}
|
|
|
|
08007b02 <USBD_GetLen>:
|
|
* return the string length
|
|
* @param buf : pointer to the ascii string buffer
|
|
* @retval string length
|
|
*/
|
|
static uint8_t USBD_GetLen(uint8_t *buf)
|
|
{
|
|
8007b02: b480 push {r7}
|
|
8007b04: b085 sub sp, #20
|
|
8007b06: af00 add r7, sp, #0
|
|
8007b08: 6078 str r0, [r7, #4]
|
|
uint8_t len = 0U;
|
|
8007b0a: 2300 movs r3, #0
|
|
8007b0c: 73fb strb r3, [r7, #15]
|
|
|
|
while (*buf != '\0')
|
|
8007b0e: e005 b.n 8007b1c <USBD_GetLen+0x1a>
|
|
{
|
|
len++;
|
|
8007b10: 7bfb ldrb r3, [r7, #15]
|
|
8007b12: 3301 adds r3, #1
|
|
8007b14: 73fb strb r3, [r7, #15]
|
|
buf++;
|
|
8007b16: 687b ldr r3, [r7, #4]
|
|
8007b18: 3301 adds r3, #1
|
|
8007b1a: 607b str r3, [r7, #4]
|
|
while (*buf != '\0')
|
|
8007b1c: 687b ldr r3, [r7, #4]
|
|
8007b1e: 781b ldrb r3, [r3, #0]
|
|
8007b20: 2b00 cmp r3, #0
|
|
8007b22: d1f5 bne.n 8007b10 <USBD_GetLen+0xe>
|
|
}
|
|
|
|
return len;
|
|
8007b24: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
8007b26: 4618 mov r0, r3
|
|
8007b28: 3714 adds r7, #20
|
|
8007b2a: 46bd mov sp, r7
|
|
8007b2c: bc80 pop {r7}
|
|
8007b2e: 4770 bx lr
|
|
|
|
08007b30 <USBD_CtlSendData>:
|
|
* @param len: length of data to be sent
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev,
|
|
uint8_t *pbuf, uint16_t len)
|
|
{
|
|
8007b30: b580 push {r7, lr}
|
|
8007b32: b084 sub sp, #16
|
|
8007b34: af00 add r7, sp, #0
|
|
8007b36: 60f8 str r0, [r7, #12]
|
|
8007b38: 60b9 str r1, [r7, #8]
|
|
8007b3a: 4613 mov r3, r2
|
|
8007b3c: 80fb strh r3, [r7, #6]
|
|
/* Set EP0 State */
|
|
pdev->ep0_state = USBD_EP0_DATA_IN;
|
|
8007b3e: 68fb ldr r3, [r7, #12]
|
|
8007b40: 2202 movs r2, #2
|
|
8007b42: f8c3 2294 str.w r2, [r3, #660] ; 0x294
|
|
pdev->ep_in[0].total_length = len;
|
|
8007b46: 88fa ldrh r2, [r7, #6]
|
|
8007b48: 68fb ldr r3, [r7, #12]
|
|
8007b4a: 61da str r2, [r3, #28]
|
|
pdev->ep_in[0].rem_length = len;
|
|
8007b4c: 88fa ldrh r2, [r7, #6]
|
|
8007b4e: 68fb ldr r3, [r7, #12]
|
|
8007b50: 621a str r2, [r3, #32]
|
|
|
|
/* Start the transfer */
|
|
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
|
|
8007b52: 88fb ldrh r3, [r7, #6]
|
|
8007b54: 68ba ldr r2, [r7, #8]
|
|
8007b56: 2100 movs r1, #0
|
|
8007b58: 68f8 ldr r0, [r7, #12]
|
|
8007b5a: f002 fea9 bl 800a8b0 <USBD_LL_Transmit>
|
|
|
|
return USBD_OK;
|
|
8007b5e: 2300 movs r3, #0
|
|
}
|
|
8007b60: 4618 mov r0, r3
|
|
8007b62: 3710 adds r7, #16
|
|
8007b64: 46bd mov sp, r7
|
|
8007b66: bd80 pop {r7, pc}
|
|
|
|
08007b68 <USBD_CtlContinueSendData>:
|
|
* @param len: length of data to be sent
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev,
|
|
uint8_t *pbuf, uint16_t len)
|
|
{
|
|
8007b68: b580 push {r7, lr}
|
|
8007b6a: b084 sub sp, #16
|
|
8007b6c: af00 add r7, sp, #0
|
|
8007b6e: 60f8 str r0, [r7, #12]
|
|
8007b70: 60b9 str r1, [r7, #8]
|
|
8007b72: 4613 mov r3, r2
|
|
8007b74: 80fb strh r3, [r7, #6]
|
|
/* Start the next transfer */
|
|
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
|
|
8007b76: 88fb ldrh r3, [r7, #6]
|
|
8007b78: 68ba ldr r2, [r7, #8]
|
|
8007b7a: 2100 movs r1, #0
|
|
8007b7c: 68f8 ldr r0, [r7, #12]
|
|
8007b7e: f002 fe97 bl 800a8b0 <USBD_LL_Transmit>
|
|
|
|
return USBD_OK;
|
|
8007b82: 2300 movs r3, #0
|
|
}
|
|
8007b84: 4618 mov r0, r3
|
|
8007b86: 3710 adds r7, #16
|
|
8007b88: 46bd mov sp, r7
|
|
8007b8a: bd80 pop {r7, pc}
|
|
|
|
08007b8c <USBD_CtlPrepareRx>:
|
|
* @param len: length of data to be received
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_CtlPrepareRx(USBD_HandleTypeDef *pdev,
|
|
uint8_t *pbuf, uint16_t len)
|
|
{
|
|
8007b8c: b580 push {r7, lr}
|
|
8007b8e: b084 sub sp, #16
|
|
8007b90: af00 add r7, sp, #0
|
|
8007b92: 60f8 str r0, [r7, #12]
|
|
8007b94: 60b9 str r1, [r7, #8]
|
|
8007b96: 4613 mov r3, r2
|
|
8007b98: 80fb strh r3, [r7, #6]
|
|
/* Set EP0 State */
|
|
pdev->ep0_state = USBD_EP0_DATA_OUT;
|
|
8007b9a: 68fb ldr r3, [r7, #12]
|
|
8007b9c: 2203 movs r2, #3
|
|
8007b9e: f8c3 2294 str.w r2, [r3, #660] ; 0x294
|
|
pdev->ep_out[0].total_length = len;
|
|
8007ba2: 88fa ldrh r2, [r7, #6]
|
|
8007ba4: 68fb ldr r3, [r7, #12]
|
|
8007ba6: f8c3 215c str.w r2, [r3, #348] ; 0x15c
|
|
pdev->ep_out[0].rem_length = len;
|
|
8007baa: 88fa ldrh r2, [r7, #6]
|
|
8007bac: 68fb ldr r3, [r7, #12]
|
|
8007bae: f8c3 2160 str.w r2, [r3, #352] ; 0x160
|
|
|
|
/* Start the transfer */
|
|
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
|
|
8007bb2: 88fb ldrh r3, [r7, #6]
|
|
8007bb4: 68ba ldr r2, [r7, #8]
|
|
8007bb6: 2100 movs r1, #0
|
|
8007bb8: 68f8 ldr r0, [r7, #12]
|
|
8007bba: f002 fe9c bl 800a8f6 <USBD_LL_PrepareReceive>
|
|
|
|
return USBD_OK;
|
|
8007bbe: 2300 movs r3, #0
|
|
}
|
|
8007bc0: 4618 mov r0, r3
|
|
8007bc2: 3710 adds r7, #16
|
|
8007bc4: 46bd mov sp, r7
|
|
8007bc6: bd80 pop {r7, pc}
|
|
|
|
08007bc8 <USBD_CtlContinueRx>:
|
|
* @param len: length of data to be received
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev,
|
|
uint8_t *pbuf, uint16_t len)
|
|
{
|
|
8007bc8: b580 push {r7, lr}
|
|
8007bca: b084 sub sp, #16
|
|
8007bcc: af00 add r7, sp, #0
|
|
8007bce: 60f8 str r0, [r7, #12]
|
|
8007bd0: 60b9 str r1, [r7, #8]
|
|
8007bd2: 4613 mov r3, r2
|
|
8007bd4: 80fb strh r3, [r7, #6]
|
|
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
|
|
8007bd6: 88fb ldrh r3, [r7, #6]
|
|
8007bd8: 68ba ldr r2, [r7, #8]
|
|
8007bda: 2100 movs r1, #0
|
|
8007bdc: 68f8 ldr r0, [r7, #12]
|
|
8007bde: f002 fe8a bl 800a8f6 <USBD_LL_PrepareReceive>
|
|
|
|
return USBD_OK;
|
|
8007be2: 2300 movs r3, #0
|
|
}
|
|
8007be4: 4618 mov r0, r3
|
|
8007be6: 3710 adds r7, #16
|
|
8007be8: 46bd mov sp, r7
|
|
8007bea: bd80 pop {r7, pc}
|
|
|
|
08007bec <USBD_CtlSendStatus>:
|
|
* send zero lzngth packet on the ctl pipe
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8007bec: b580 push {r7, lr}
|
|
8007bee: b082 sub sp, #8
|
|
8007bf0: af00 add r7, sp, #0
|
|
8007bf2: 6078 str r0, [r7, #4]
|
|
/* Set EP0 State */
|
|
pdev->ep0_state = USBD_EP0_STATUS_IN;
|
|
8007bf4: 687b ldr r3, [r7, #4]
|
|
8007bf6: 2204 movs r2, #4
|
|
8007bf8: f8c3 2294 str.w r2, [r3, #660] ; 0x294
|
|
|
|
/* Start the transfer */
|
|
USBD_LL_Transmit(pdev, 0x00U, NULL, 0U);
|
|
8007bfc: 2300 movs r3, #0
|
|
8007bfe: 2200 movs r2, #0
|
|
8007c00: 2100 movs r1, #0
|
|
8007c02: 6878 ldr r0, [r7, #4]
|
|
8007c04: f002 fe54 bl 800a8b0 <USBD_LL_Transmit>
|
|
|
|
return USBD_OK;
|
|
8007c08: 2300 movs r3, #0
|
|
}
|
|
8007c0a: 4618 mov r0, r3
|
|
8007c0c: 3708 adds r7, #8
|
|
8007c0e: 46bd mov sp, r7
|
|
8007c10: bd80 pop {r7, pc}
|
|
|
|
08007c12 <USBD_CtlReceiveStatus>:
|
|
* receive zero lzngth packet on the ctl pipe
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8007c12: b580 push {r7, lr}
|
|
8007c14: b082 sub sp, #8
|
|
8007c16: af00 add r7, sp, #0
|
|
8007c18: 6078 str r0, [r7, #4]
|
|
/* Set EP0 State */
|
|
pdev->ep0_state = USBD_EP0_STATUS_OUT;
|
|
8007c1a: 687b ldr r3, [r7, #4]
|
|
8007c1c: 2205 movs r2, #5
|
|
8007c1e: f8c3 2294 str.w r2, [r3, #660] ; 0x294
|
|
|
|
/* Start the transfer */
|
|
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
|
|
8007c22: 2300 movs r3, #0
|
|
8007c24: 2200 movs r2, #0
|
|
8007c26: 2100 movs r1, #0
|
|
8007c28: 6878 ldr r0, [r7, #4]
|
|
8007c2a: f002 fe64 bl 800a8f6 <USBD_LL_PrepareReceive>
|
|
|
|
return USBD_OK;
|
|
8007c2e: 2300 movs r3, #0
|
|
}
|
|
8007c30: 4618 mov r0, r3
|
|
8007c32: 3708 adds r7, #8
|
|
8007c34: 46bd mov sp, r7
|
|
8007c36: bd80 pop {r7, pc}
|
|
|
|
08007c38 <makeFreeRtosPriority>:
|
|
|
|
extern void xPortSysTickHandler(void);
|
|
|
|
/* Convert from CMSIS type osPriority to FreeRTOS priority number */
|
|
static unsigned portBASE_TYPE makeFreeRtosPriority (osPriority priority)
|
|
{
|
|
8007c38: b480 push {r7}
|
|
8007c3a: b085 sub sp, #20
|
|
8007c3c: af00 add r7, sp, #0
|
|
8007c3e: 4603 mov r3, r0
|
|
8007c40: 80fb strh r3, [r7, #6]
|
|
unsigned portBASE_TYPE fpriority = tskIDLE_PRIORITY;
|
|
8007c42: 2300 movs r3, #0
|
|
8007c44: 60fb str r3, [r7, #12]
|
|
|
|
if (priority != osPriorityError) {
|
|
8007c46: f9b7 3006 ldrsh.w r3, [r7, #6]
|
|
8007c4a: 2b84 cmp r3, #132 ; 0x84
|
|
8007c4c: d005 beq.n 8007c5a <makeFreeRtosPriority+0x22>
|
|
fpriority += (priority - osPriorityIdle);
|
|
8007c4e: f9b7 2006 ldrsh.w r2, [r7, #6]
|
|
8007c52: 68fb ldr r3, [r7, #12]
|
|
8007c54: 4413 add r3, r2
|
|
8007c56: 3303 adds r3, #3
|
|
8007c58: 60fb str r3, [r7, #12]
|
|
}
|
|
|
|
return fpriority;
|
|
8007c5a: 68fb ldr r3, [r7, #12]
|
|
}
|
|
8007c5c: 4618 mov r0, r3
|
|
8007c5e: 3714 adds r7, #20
|
|
8007c60: 46bd mov sp, r7
|
|
8007c62: bc80 pop {r7}
|
|
8007c64: 4770 bx lr
|
|
|
|
08007c66 <osKernelStart>:
|
|
* @param argument pointer that is passed to the thread function as start argument.
|
|
* @retval status code that indicates the execution status of the function
|
|
* @note MUST REMAIN UNCHANGED: \b osKernelStart shall be consistent in every CMSIS-RTOS.
|
|
*/
|
|
osStatus osKernelStart (void)
|
|
{
|
|
8007c66: b580 push {r7, lr}
|
|
8007c68: af00 add r7, sp, #0
|
|
vTaskStartScheduler();
|
|
8007c6a: f000 fa4b bl 8008104 <vTaskStartScheduler>
|
|
|
|
return osOK;
|
|
8007c6e: 2300 movs r3, #0
|
|
}
|
|
8007c70: 4618 mov r0, r3
|
|
8007c72: bd80 pop {r7, pc}
|
|
|
|
08007c74 <osThreadCreate>:
|
|
* @param argument pointer that is passed to the thread function as start argument.
|
|
* @retval thread ID for reference by other functions or NULL in case of error.
|
|
* @note MUST REMAIN UNCHANGED: \b osThreadCreate shall be consistent in every CMSIS-RTOS.
|
|
*/
|
|
osThreadId osThreadCreate (const osThreadDef_t *thread_def, void *argument)
|
|
{
|
|
8007c74: b5f0 push {r4, r5, r6, r7, lr}
|
|
8007c76: b087 sub sp, #28
|
|
8007c78: af02 add r7, sp, #8
|
|
8007c7a: 6078 str r0, [r7, #4]
|
|
8007c7c: 6039 str r1, [r7, #0]
|
|
|
|
handle = xTaskCreateStatic((TaskFunction_t)thread_def->pthread,(const portCHAR *)thread_def->name,
|
|
thread_def->stacksize, argument, makeFreeRtosPriority(thread_def->tpriority),
|
|
thread_def->buffer, thread_def->controlblock);
|
|
#else
|
|
if (xTaskCreate((TaskFunction_t)thread_def->pthread,(const portCHAR *)thread_def->name,
|
|
8007c7e: 687b ldr r3, [r7, #4]
|
|
8007c80: 685c ldr r4, [r3, #4]
|
|
8007c82: 687b ldr r3, [r7, #4]
|
|
8007c84: 681d ldr r5, [r3, #0]
|
|
thread_def->stacksize, argument, makeFreeRtosPriority(thread_def->tpriority),
|
|
8007c86: 687b ldr r3, [r7, #4]
|
|
8007c88: 691b ldr r3, [r3, #16]
|
|
if (xTaskCreate((TaskFunction_t)thread_def->pthread,(const portCHAR *)thread_def->name,
|
|
8007c8a: b29e uxth r6, r3
|
|
8007c8c: 687b ldr r3, [r7, #4]
|
|
8007c8e: f9b3 3008 ldrsh.w r3, [r3, #8]
|
|
8007c92: 4618 mov r0, r3
|
|
8007c94: f7ff ffd0 bl 8007c38 <makeFreeRtosPriority>
|
|
8007c98: 4602 mov r2, r0
|
|
8007c9a: f107 030c add.w r3, r7, #12
|
|
8007c9e: 9301 str r3, [sp, #4]
|
|
8007ca0: 9200 str r2, [sp, #0]
|
|
8007ca2: 683b ldr r3, [r7, #0]
|
|
8007ca4: 4632 mov r2, r6
|
|
8007ca6: 4629 mov r1, r5
|
|
8007ca8: 4620 mov r0, r4
|
|
8007caa: f000 f8cd bl 8007e48 <xTaskCreate>
|
|
8007cae: 4603 mov r3, r0
|
|
8007cb0: 2b01 cmp r3, #1
|
|
8007cb2: d001 beq.n 8007cb8 <osThreadCreate+0x44>
|
|
&handle) != pdPASS) {
|
|
return NULL;
|
|
8007cb4: 2300 movs r3, #0
|
|
8007cb6: e000 b.n 8007cba <osThreadCreate+0x46>
|
|
}
|
|
#endif
|
|
|
|
return handle;
|
|
8007cb8: 68fb ldr r3, [r7, #12]
|
|
}
|
|
8007cba: 4618 mov r0, r3
|
|
8007cbc: 3714 adds r7, #20
|
|
8007cbe: 46bd mov sp, r7
|
|
8007cc0: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
08007cc2 <osDelay>:
|
|
* @brief Wait for Timeout (Time Delay)
|
|
* @param millisec time delay value
|
|
* @retval status code that indicates the execution status of the function.
|
|
*/
|
|
osStatus osDelay (uint32_t millisec)
|
|
{
|
|
8007cc2: b580 push {r7, lr}
|
|
8007cc4: b084 sub sp, #16
|
|
8007cc6: af00 add r7, sp, #0
|
|
8007cc8: 6078 str r0, [r7, #4]
|
|
#if INCLUDE_vTaskDelay
|
|
TickType_t ticks = millisec / portTICK_PERIOD_MS;
|
|
8007cca: 687b ldr r3, [r7, #4]
|
|
8007ccc: 60fb str r3, [r7, #12]
|
|
|
|
vTaskDelay(ticks ? ticks : 1); /* Minimum delay = 1 tick */
|
|
8007cce: 68fb ldr r3, [r7, #12]
|
|
8007cd0: 2b00 cmp r3, #0
|
|
8007cd2: d001 beq.n 8007cd8 <osDelay+0x16>
|
|
8007cd4: 68fb ldr r3, [r7, #12]
|
|
8007cd6: e000 b.n 8007cda <osDelay+0x18>
|
|
8007cd8: 2301 movs r3, #1
|
|
8007cda: 4618 mov r0, r3
|
|
8007cdc: f000 f9de bl 800809c <vTaskDelay>
|
|
|
|
return osOK;
|
|
8007ce0: 2300 movs r3, #0
|
|
#else
|
|
(void) millisec;
|
|
|
|
return osErrorResource;
|
|
#endif
|
|
}
|
|
8007ce2: 4618 mov r0, r3
|
|
8007ce4: 3710 adds r7, #16
|
|
8007ce6: 46bd mov sp, r7
|
|
8007ce8: bd80 pop {r7, pc}
|
|
|
|
08007cea <vListInitialise>:
|
|
/*-----------------------------------------------------------
|
|
* PUBLIC LIST API documented in list.h
|
|
*----------------------------------------------------------*/
|
|
|
|
void vListInitialise( List_t * const pxList )
|
|
{
|
|
8007cea: b480 push {r7}
|
|
8007cec: b083 sub sp, #12
|
|
8007cee: af00 add r7, sp, #0
|
|
8007cf0: 6078 str r0, [r7, #4]
|
|
/* The list structure contains a list item which is used to mark the
|
|
end of the list. To initialise the list the list end is inserted
|
|
as the only list entry. */
|
|
pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 The mini list structure is used as the list end to save RAM. This is checked and valid. */
|
|
8007cf2: 687b ldr r3, [r7, #4]
|
|
8007cf4: f103 0208 add.w r2, r3, #8
|
|
8007cf8: 687b ldr r3, [r7, #4]
|
|
8007cfa: 605a str r2, [r3, #4]
|
|
|
|
/* The list end value is the highest possible value in the list to
|
|
ensure it remains at the end of the list. */
|
|
pxList->xListEnd.xItemValue = portMAX_DELAY;
|
|
8007cfc: 687b ldr r3, [r7, #4]
|
|
8007cfe: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
|
8007d02: 609a str r2, [r3, #8]
|
|
|
|
/* The list end next and previous pointers point to itself so we know
|
|
when the list is empty. */
|
|
pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 The mini list structure is used as the list end to save RAM. This is checked and valid. */
|
|
8007d04: 687b ldr r3, [r7, #4]
|
|
8007d06: f103 0208 add.w r2, r3, #8
|
|
8007d0a: 687b ldr r3, [r7, #4]
|
|
8007d0c: 60da str r2, [r3, #12]
|
|
pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );/*lint !e826 !e740 The mini list structure is used as the list end to save RAM. This is checked and valid. */
|
|
8007d0e: 687b ldr r3, [r7, #4]
|
|
8007d10: f103 0208 add.w r2, r3, #8
|
|
8007d14: 687b ldr r3, [r7, #4]
|
|
8007d16: 611a str r2, [r3, #16]
|
|
|
|
pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
|
|
8007d18: 687b ldr r3, [r7, #4]
|
|
8007d1a: 2200 movs r2, #0
|
|
8007d1c: 601a str r2, [r3, #0]
|
|
|
|
/* Write known values into the list if
|
|
configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
|
|
listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
|
|
listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
|
|
}
|
|
8007d1e: bf00 nop
|
|
8007d20: 370c adds r7, #12
|
|
8007d22: 46bd mov sp, r7
|
|
8007d24: bc80 pop {r7}
|
|
8007d26: 4770 bx lr
|
|
|
|
08007d28 <vListInitialiseItem>:
|
|
/*-----------------------------------------------------------*/
|
|
|
|
void vListInitialiseItem( ListItem_t * const pxItem )
|
|
{
|
|
8007d28: b480 push {r7}
|
|
8007d2a: b083 sub sp, #12
|
|
8007d2c: af00 add r7, sp, #0
|
|
8007d2e: 6078 str r0, [r7, #4]
|
|
/* Make sure the list item is not recorded as being on a list. */
|
|
pxItem->pvContainer = NULL;
|
|
8007d30: 687b ldr r3, [r7, #4]
|
|
8007d32: 2200 movs r2, #0
|
|
8007d34: 611a str r2, [r3, #16]
|
|
|
|
/* Write known values into the list item if
|
|
configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
|
|
listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
|
|
listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
|
|
}
|
|
8007d36: bf00 nop
|
|
8007d38: 370c adds r7, #12
|
|
8007d3a: 46bd mov sp, r7
|
|
8007d3c: bc80 pop {r7}
|
|
8007d3e: 4770 bx lr
|
|
|
|
08007d40 <vListInsertEnd>:
|
|
/*-----------------------------------------------------------*/
|
|
|
|
void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem )
|
|
{
|
|
8007d40: b480 push {r7}
|
|
8007d42: b085 sub sp, #20
|
|
8007d44: af00 add r7, sp, #0
|
|
8007d46: 6078 str r0, [r7, #4]
|
|
8007d48: 6039 str r1, [r7, #0]
|
|
ListItem_t * const pxIndex = pxList->pxIndex;
|
|
8007d4a: 687b ldr r3, [r7, #4]
|
|
8007d4c: 685b ldr r3, [r3, #4]
|
|
8007d4e: 60fb str r3, [r7, #12]
|
|
listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
|
|
|
|
/* Insert a new list item into pxList, but rather than sort the list,
|
|
makes the new list item the last item to be removed by a call to
|
|
listGET_OWNER_OF_NEXT_ENTRY(). */
|
|
pxNewListItem->pxNext = pxIndex;
|
|
8007d50: 683b ldr r3, [r7, #0]
|
|
8007d52: 68fa ldr r2, [r7, #12]
|
|
8007d54: 605a str r2, [r3, #4]
|
|
pxNewListItem->pxPrevious = pxIndex->pxPrevious;
|
|
8007d56: 68fb ldr r3, [r7, #12]
|
|
8007d58: 689a ldr r2, [r3, #8]
|
|
8007d5a: 683b ldr r3, [r7, #0]
|
|
8007d5c: 609a str r2, [r3, #8]
|
|
|
|
/* Only used during decision coverage testing. */
|
|
mtCOVERAGE_TEST_DELAY();
|
|
|
|
pxIndex->pxPrevious->pxNext = pxNewListItem;
|
|
8007d5e: 68fb ldr r3, [r7, #12]
|
|
8007d60: 689b ldr r3, [r3, #8]
|
|
8007d62: 683a ldr r2, [r7, #0]
|
|
8007d64: 605a str r2, [r3, #4]
|
|
pxIndex->pxPrevious = pxNewListItem;
|
|
8007d66: 68fb ldr r3, [r7, #12]
|
|
8007d68: 683a ldr r2, [r7, #0]
|
|
8007d6a: 609a str r2, [r3, #8]
|
|
|
|
/* Remember which list the item is in. */
|
|
pxNewListItem->pvContainer = ( void * ) pxList;
|
|
8007d6c: 683b ldr r3, [r7, #0]
|
|
8007d6e: 687a ldr r2, [r7, #4]
|
|
8007d70: 611a str r2, [r3, #16]
|
|
|
|
( pxList->uxNumberOfItems )++;
|
|
8007d72: 687b ldr r3, [r7, #4]
|
|
8007d74: 681b ldr r3, [r3, #0]
|
|
8007d76: 1c5a adds r2, r3, #1
|
|
8007d78: 687b ldr r3, [r7, #4]
|
|
8007d7a: 601a str r2, [r3, #0]
|
|
}
|
|
8007d7c: bf00 nop
|
|
8007d7e: 3714 adds r7, #20
|
|
8007d80: 46bd mov sp, r7
|
|
8007d82: bc80 pop {r7}
|
|
8007d84: 4770 bx lr
|
|
|
|
08007d86 <vListInsert>:
|
|
/*-----------------------------------------------------------*/
|
|
|
|
void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem )
|
|
{
|
|
8007d86: b480 push {r7}
|
|
8007d88: b085 sub sp, #20
|
|
8007d8a: af00 add r7, sp, #0
|
|
8007d8c: 6078 str r0, [r7, #4]
|
|
8007d8e: 6039 str r1, [r7, #0]
|
|
ListItem_t *pxIterator;
|
|
const TickType_t xValueOfInsertion = pxNewListItem->xItemValue;
|
|
8007d90: 683b ldr r3, [r7, #0]
|
|
8007d92: 681b ldr r3, [r3, #0]
|
|
8007d94: 60bb str r3, [r7, #8]
|
|
new list item should be placed after it. This ensures that TCB's which are
|
|
stored in ready lists (all of which have the same xItemValue value) get a
|
|
share of the CPU. However, if the xItemValue is the same as the back marker
|
|
the iteration loop below will not end. Therefore the value is checked
|
|
first, and the algorithm slightly modified if necessary. */
|
|
if( xValueOfInsertion == portMAX_DELAY )
|
|
8007d96: 68bb ldr r3, [r7, #8]
|
|
8007d98: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
|
8007d9c: d103 bne.n 8007da6 <vListInsert+0x20>
|
|
{
|
|
pxIterator = pxList->xListEnd.pxPrevious;
|
|
8007d9e: 687b ldr r3, [r7, #4]
|
|
8007da0: 691b ldr r3, [r3, #16]
|
|
8007da2: 60fb str r3, [r7, #12]
|
|
8007da4: e00c b.n 8007dc0 <vListInsert+0x3a>
|
|
4) Using a queue or semaphore before it has been initialised or
|
|
before the scheduler has been started (are interrupts firing
|
|
before vTaskStartScheduler() has been called?).
|
|
**********************************************************************/
|
|
|
|
for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 The mini list structure is used as the list end to save RAM. This is checked and valid. */
|
|
8007da6: 687b ldr r3, [r7, #4]
|
|
8007da8: 3308 adds r3, #8
|
|
8007daa: 60fb str r3, [r7, #12]
|
|
8007dac: e002 b.n 8007db4 <vListInsert+0x2e>
|
|
8007dae: 68fb ldr r3, [r7, #12]
|
|
8007db0: 685b ldr r3, [r3, #4]
|
|
8007db2: 60fb str r3, [r7, #12]
|
|
8007db4: 68fb ldr r3, [r7, #12]
|
|
8007db6: 685b ldr r3, [r3, #4]
|
|
8007db8: 681b ldr r3, [r3, #0]
|
|
8007dba: 68ba ldr r2, [r7, #8]
|
|
8007dbc: 429a cmp r2, r3
|
|
8007dbe: d2f6 bcs.n 8007dae <vListInsert+0x28>
|
|
/* There is nothing to do here, just iterating to the wanted
|
|
insertion position. */
|
|
}
|
|
}
|
|
|
|
pxNewListItem->pxNext = pxIterator->pxNext;
|
|
8007dc0: 68fb ldr r3, [r7, #12]
|
|
8007dc2: 685a ldr r2, [r3, #4]
|
|
8007dc4: 683b ldr r3, [r7, #0]
|
|
8007dc6: 605a str r2, [r3, #4]
|
|
pxNewListItem->pxNext->pxPrevious = pxNewListItem;
|
|
8007dc8: 683b ldr r3, [r7, #0]
|
|
8007dca: 685b ldr r3, [r3, #4]
|
|
8007dcc: 683a ldr r2, [r7, #0]
|
|
8007dce: 609a str r2, [r3, #8]
|
|
pxNewListItem->pxPrevious = pxIterator;
|
|
8007dd0: 683b ldr r3, [r7, #0]
|
|
8007dd2: 68fa ldr r2, [r7, #12]
|
|
8007dd4: 609a str r2, [r3, #8]
|
|
pxIterator->pxNext = pxNewListItem;
|
|
8007dd6: 68fb ldr r3, [r7, #12]
|
|
8007dd8: 683a ldr r2, [r7, #0]
|
|
8007dda: 605a str r2, [r3, #4]
|
|
|
|
/* Remember which list the item is in. This allows fast removal of the
|
|
item later. */
|
|
pxNewListItem->pvContainer = ( void * ) pxList;
|
|
8007ddc: 683b ldr r3, [r7, #0]
|
|
8007dde: 687a ldr r2, [r7, #4]
|
|
8007de0: 611a str r2, [r3, #16]
|
|
|
|
( pxList->uxNumberOfItems )++;
|
|
8007de2: 687b ldr r3, [r7, #4]
|
|
8007de4: 681b ldr r3, [r3, #0]
|
|
8007de6: 1c5a adds r2, r3, #1
|
|
8007de8: 687b ldr r3, [r7, #4]
|
|
8007dea: 601a str r2, [r3, #0]
|
|
}
|
|
8007dec: bf00 nop
|
|
8007dee: 3714 adds r7, #20
|
|
8007df0: 46bd mov sp, r7
|
|
8007df2: bc80 pop {r7}
|
|
8007df4: 4770 bx lr
|
|
|
|
08007df6 <uxListRemove>:
|
|
/*-----------------------------------------------------------*/
|
|
|
|
UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
|
|
{
|
|
8007df6: b480 push {r7}
|
|
8007df8: b085 sub sp, #20
|
|
8007dfa: af00 add r7, sp, #0
|
|
8007dfc: 6078 str r0, [r7, #4]
|
|
/* The list item knows which list it is in. Obtain the list from the list
|
|
item. */
|
|
List_t * const pxList = ( List_t * ) pxItemToRemove->pvContainer;
|
|
8007dfe: 687b ldr r3, [r7, #4]
|
|
8007e00: 691b ldr r3, [r3, #16]
|
|
8007e02: 60fb str r3, [r7, #12]
|
|
|
|
pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
|
|
8007e04: 687b ldr r3, [r7, #4]
|
|
8007e06: 685b ldr r3, [r3, #4]
|
|
8007e08: 687a ldr r2, [r7, #4]
|
|
8007e0a: 6892 ldr r2, [r2, #8]
|
|
8007e0c: 609a str r2, [r3, #8]
|
|
pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
|
|
8007e0e: 687b ldr r3, [r7, #4]
|
|
8007e10: 689b ldr r3, [r3, #8]
|
|
8007e12: 687a ldr r2, [r7, #4]
|
|
8007e14: 6852 ldr r2, [r2, #4]
|
|
8007e16: 605a str r2, [r3, #4]
|
|
|
|
/* Only used during decision coverage testing. */
|
|
mtCOVERAGE_TEST_DELAY();
|
|
|
|
/* Make sure the index is left pointing to a valid item. */
|
|
if( pxList->pxIndex == pxItemToRemove )
|
|
8007e18: 68fb ldr r3, [r7, #12]
|
|
8007e1a: 685b ldr r3, [r3, #4]
|
|
8007e1c: 687a ldr r2, [r7, #4]
|
|
8007e1e: 429a cmp r2, r3
|
|
8007e20: d103 bne.n 8007e2a <uxListRemove+0x34>
|
|
{
|
|
pxList->pxIndex = pxItemToRemove->pxPrevious;
|
|
8007e22: 687b ldr r3, [r7, #4]
|
|
8007e24: 689a ldr r2, [r3, #8]
|
|
8007e26: 68fb ldr r3, [r7, #12]
|
|
8007e28: 605a str r2, [r3, #4]
|
|
else
|
|
{
|
|
mtCOVERAGE_TEST_MARKER();
|
|
}
|
|
|
|
pxItemToRemove->pvContainer = NULL;
|
|
8007e2a: 687b ldr r3, [r7, #4]
|
|
8007e2c: 2200 movs r2, #0
|
|
8007e2e: 611a str r2, [r3, #16]
|
|
( pxList->uxNumberOfItems )--;
|
|
8007e30: 68fb ldr r3, [r7, #12]
|
|
8007e32: 681b ldr r3, [r3, #0]
|
|
8007e34: 1e5a subs r2, r3, #1
|
|
8007e36: 68fb ldr r3, [r7, #12]
|
|
8007e38: 601a str r2, [r3, #0]
|
|
|
|
return pxList->uxNumberOfItems;
|
|
8007e3a: 68fb ldr r3, [r7, #12]
|
|
8007e3c: 681b ldr r3, [r3, #0]
|
|
}
|
|
8007e3e: 4618 mov r0, r3
|
|
8007e40: 3714 adds r7, #20
|
|
8007e42: 46bd mov sp, r7
|
|
8007e44: bc80 pop {r7}
|
|
8007e46: 4770 bx lr
|
|
|
|
08007e48 <xTaskCreate>:
|
|
const char * const pcName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
|
|
const configSTACK_DEPTH_TYPE usStackDepth,
|
|
void * const pvParameters,
|
|
UBaseType_t uxPriority,
|
|
TaskHandle_t * const pxCreatedTask )
|
|
{
|
|
8007e48: b580 push {r7, lr}
|
|
8007e4a: b08c sub sp, #48 ; 0x30
|
|
8007e4c: af04 add r7, sp, #16
|
|
8007e4e: 60f8 str r0, [r7, #12]
|
|
8007e50: 60b9 str r1, [r7, #8]
|
|
8007e52: 603b str r3, [r7, #0]
|
|
8007e54: 4613 mov r3, r2
|
|
8007e56: 80fb strh r3, [r7, #6]
|
|
#else /* portSTACK_GROWTH */
|
|
{
|
|
StackType_t *pxStack;
|
|
|
|
/* Allocate space for the stack used by the task being created. */
|
|
pxStack = ( StackType_t * ) pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
|
|
8007e58: 88fb ldrh r3, [r7, #6]
|
|
8007e5a: 009b lsls r3, r3, #2
|
|
8007e5c: 4618 mov r0, r3
|
|
8007e5e: f000 fe35 bl 8008acc <pvPortMalloc>
|
|
8007e62: 6178 str r0, [r7, #20]
|
|
|
|
if( pxStack != NULL )
|
|
8007e64: 697b ldr r3, [r7, #20]
|
|
8007e66: 2b00 cmp r3, #0
|
|
8007e68: d00e beq.n 8007e88 <xTaskCreate+0x40>
|
|
{
|
|
/* Allocate space for the TCB. */
|
|
pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); /*lint !e961 MISRA exception as the casts are only redundant for some paths. */
|
|
8007e6a: 2054 movs r0, #84 ; 0x54
|
|
8007e6c: f000 fe2e bl 8008acc <pvPortMalloc>
|
|
8007e70: 61f8 str r0, [r7, #28]
|
|
|
|
if( pxNewTCB != NULL )
|
|
8007e72: 69fb ldr r3, [r7, #28]
|
|
8007e74: 2b00 cmp r3, #0
|
|
8007e76: d003 beq.n 8007e80 <xTaskCreate+0x38>
|
|
{
|
|
/* Store the stack location in the TCB. */
|
|
pxNewTCB->pxStack = pxStack;
|
|
8007e78: 69fb ldr r3, [r7, #28]
|
|
8007e7a: 697a ldr r2, [r7, #20]
|
|
8007e7c: 631a str r2, [r3, #48] ; 0x30
|
|
8007e7e: e005 b.n 8007e8c <xTaskCreate+0x44>
|
|
}
|
|
else
|
|
{
|
|
/* The stack cannot be used as the TCB was not created. Free
|
|
it again. */
|
|
vPortFree( pxStack );
|
|
8007e80: 6978 ldr r0, [r7, #20]
|
|
8007e82: f000 fee5 bl 8008c50 <vPortFree>
|
|
8007e86: e001 b.n 8007e8c <xTaskCreate+0x44>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
pxNewTCB = NULL;
|
|
8007e88: 2300 movs r3, #0
|
|
8007e8a: 61fb str r3, [r7, #28]
|
|
}
|
|
}
|
|
#endif /* portSTACK_GROWTH */
|
|
|
|
if( pxNewTCB != NULL )
|
|
8007e8c: 69fb ldr r3, [r7, #28]
|
|
8007e8e: 2b00 cmp r3, #0
|
|
8007e90: d013 beq.n 8007eba <xTaskCreate+0x72>
|
|
task was created dynamically in case it is later deleted. */
|
|
pxNewTCB->ucStaticallyAllocated = tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB;
|
|
}
|
|
#endif /* configSUPPORT_STATIC_ALLOCATION */
|
|
|
|
prvInitialiseNewTask( pxTaskCode, pcName, ( uint32_t ) usStackDepth, pvParameters, uxPriority, pxCreatedTask, pxNewTCB, NULL );
|
|
8007e92: 88fa ldrh r2, [r7, #6]
|
|
8007e94: 2300 movs r3, #0
|
|
8007e96: 9303 str r3, [sp, #12]
|
|
8007e98: 69fb ldr r3, [r7, #28]
|
|
8007e9a: 9302 str r3, [sp, #8]
|
|
8007e9c: 6afb ldr r3, [r7, #44] ; 0x2c
|
|
8007e9e: 9301 str r3, [sp, #4]
|
|
8007ea0: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8007ea2: 9300 str r3, [sp, #0]
|
|
8007ea4: 683b ldr r3, [r7, #0]
|
|
8007ea6: 68b9 ldr r1, [r7, #8]
|
|
8007ea8: 68f8 ldr r0, [r7, #12]
|
|
8007eaa: f000 f80e bl 8007eca <prvInitialiseNewTask>
|
|
prvAddNewTaskToReadyList( pxNewTCB );
|
|
8007eae: 69f8 ldr r0, [r7, #28]
|
|
8007eb0: f000 f88a bl 8007fc8 <prvAddNewTaskToReadyList>
|
|
xReturn = pdPASS;
|
|
8007eb4: 2301 movs r3, #1
|
|
8007eb6: 61bb str r3, [r7, #24]
|
|
8007eb8: e002 b.n 8007ec0 <xTaskCreate+0x78>
|
|
}
|
|
else
|
|
{
|
|
xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
|
|
8007eba: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
|
|
8007ebe: 61bb str r3, [r7, #24]
|
|
}
|
|
|
|
return xReturn;
|
|
8007ec0: 69bb ldr r3, [r7, #24]
|
|
}
|
|
8007ec2: 4618 mov r0, r3
|
|
8007ec4: 3720 adds r7, #32
|
|
8007ec6: 46bd mov sp, r7
|
|
8007ec8: bd80 pop {r7, pc}
|
|
|
|
08007eca <prvInitialiseNewTask>:
|
|
void * const pvParameters,
|
|
UBaseType_t uxPriority,
|
|
TaskHandle_t * const pxCreatedTask,
|
|
TCB_t *pxNewTCB,
|
|
const MemoryRegion_t * const xRegions )
|
|
{
|
|
8007eca: b580 push {r7, lr}
|
|
8007ecc: b088 sub sp, #32
|
|
8007ece: af00 add r7, sp, #0
|
|
8007ed0: 60f8 str r0, [r7, #12]
|
|
8007ed2: 60b9 str r1, [r7, #8]
|
|
8007ed4: 607a str r2, [r7, #4]
|
|
8007ed6: 603b str r3, [r7, #0]
|
|
grows from high memory to low (as per the 80x86) or vice versa.
|
|
portSTACK_GROWTH is used to make the result positive or negative as required
|
|
by the port. */
|
|
#if( portSTACK_GROWTH < 0 )
|
|
{
|
|
pxTopOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 );
|
|
8007ed8: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
8007eda: 6b1a ldr r2, [r3, #48] ; 0x30
|
|
8007edc: 687b ldr r3, [r7, #4]
|
|
8007ede: f103 4380 add.w r3, r3, #1073741824 ; 0x40000000
|
|
8007ee2: 3b01 subs r3, #1
|
|
8007ee4: 009b lsls r3, r3, #2
|
|
8007ee6: 4413 add r3, r2
|
|
8007ee8: 61bb str r3, [r7, #24]
|
|
pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 MISRA exception. Avoiding casts between pointers and integers is not practical. Size differences accounted for using portPOINTER_SIZE_TYPE type. */
|
|
8007eea: 69bb ldr r3, [r7, #24]
|
|
8007eec: f023 0307 bic.w r3, r3, #7
|
|
8007ef0: 61bb str r3, [r7, #24]
|
|
|
|
/* Check the alignment of the calculated top of stack is correct. */
|
|
configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
|
|
8007ef2: 69bb ldr r3, [r7, #24]
|
|
8007ef4: f003 0307 and.w r3, r3, #7
|
|
8007ef8: 2b00 cmp r3, #0
|
|
8007efa: d009 beq.n 8007f10 <prvInitialiseNewTask+0x46>
|
|
|
|
portFORCE_INLINE static void vPortRaiseBASEPRI( void )
|
|
{
|
|
uint32_t ulNewBASEPRI;
|
|
|
|
__asm volatile
|
|
8007efc: f04f 0350 mov.w r3, #80 ; 0x50
|
|
8007f00: f383 8811 msr BASEPRI, r3
|
|
8007f04: f3bf 8f6f isb sy
|
|
8007f08: f3bf 8f4f dsb sy
|
|
8007f0c: 617b str r3, [r7, #20]
|
|
8007f0e: e7fe b.n 8007f0e <prvInitialiseNewTask+0x44>
|
|
pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 );
|
|
}
|
|
#endif /* portSTACK_GROWTH */
|
|
|
|
/* Store the task name in the TCB. */
|
|
for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
|
|
8007f10: 2300 movs r3, #0
|
|
8007f12: 61fb str r3, [r7, #28]
|
|
8007f14: e012 b.n 8007f3c <prvInitialiseNewTask+0x72>
|
|
{
|
|
pxNewTCB->pcTaskName[ x ] = pcName[ x ];
|
|
8007f16: 68ba ldr r2, [r7, #8]
|
|
8007f18: 69fb ldr r3, [r7, #28]
|
|
8007f1a: 4413 add r3, r2
|
|
8007f1c: 7819 ldrb r1, [r3, #0]
|
|
8007f1e: 6b3a ldr r2, [r7, #48] ; 0x30
|
|
8007f20: 69fb ldr r3, [r7, #28]
|
|
8007f22: 4413 add r3, r2
|
|
8007f24: 3334 adds r3, #52 ; 0x34
|
|
8007f26: 460a mov r2, r1
|
|
8007f28: 701a strb r2, [r3, #0]
|
|
|
|
/* Don't copy all configMAX_TASK_NAME_LEN if the string is shorter than
|
|
configMAX_TASK_NAME_LEN characters just in case the memory after the
|
|
string is not accessible (extremely unlikely). */
|
|
if( pcName[ x ] == 0x00 )
|
|
8007f2a: 68ba ldr r2, [r7, #8]
|
|
8007f2c: 69fb ldr r3, [r7, #28]
|
|
8007f2e: 4413 add r3, r2
|
|
8007f30: 781b ldrb r3, [r3, #0]
|
|
8007f32: 2b00 cmp r3, #0
|
|
8007f34: d006 beq.n 8007f44 <prvInitialiseNewTask+0x7a>
|
|
for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
|
|
8007f36: 69fb ldr r3, [r7, #28]
|
|
8007f38: 3301 adds r3, #1
|
|
8007f3a: 61fb str r3, [r7, #28]
|
|
8007f3c: 69fb ldr r3, [r7, #28]
|
|
8007f3e: 2b0f cmp r3, #15
|
|
8007f40: d9e9 bls.n 8007f16 <prvInitialiseNewTask+0x4c>
|
|
8007f42: e000 b.n 8007f46 <prvInitialiseNewTask+0x7c>
|
|
{
|
|
break;
|
|
8007f44: bf00 nop
|
|
}
|
|
}
|
|
|
|
/* Ensure the name string is terminated in the case that the string length
|
|
was greater or equal to configMAX_TASK_NAME_LEN. */
|
|
pxNewTCB->pcTaskName[ configMAX_TASK_NAME_LEN - 1 ] = '\0';
|
|
8007f46: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
8007f48: 2200 movs r2, #0
|
|
8007f4a: f883 2043 strb.w r2, [r3, #67] ; 0x43
|
|
|
|
/* This is used as an array index so must ensure it's not too large. First
|
|
remove the privilege bit if one is present. */
|
|
if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
|
|
8007f4e: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8007f50: 2b06 cmp r3, #6
|
|
8007f52: d901 bls.n 8007f58 <prvInitialiseNewTask+0x8e>
|
|
{
|
|
uxPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;
|
|
8007f54: 2306 movs r3, #6
|
|
8007f56: 62bb str r3, [r7, #40] ; 0x28
|
|
else
|
|
{
|
|
mtCOVERAGE_TEST_MARKER();
|
|
}
|
|
|
|
pxNewTCB->uxPriority = uxPriority;
|
|
8007f58: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
8007f5a: 6aba ldr r2, [r7, #40] ; 0x28
|
|
8007f5c: 62da str r2, [r3, #44] ; 0x2c
|
|
#if ( configUSE_MUTEXES == 1 )
|
|
{
|
|
pxNewTCB->uxBasePriority = uxPriority;
|
|
8007f5e: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
8007f60: 6aba ldr r2, [r7, #40] ; 0x28
|
|
8007f62: 645a str r2, [r3, #68] ; 0x44
|
|
pxNewTCB->uxMutexesHeld = 0;
|
|
8007f64: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
8007f66: 2200 movs r2, #0
|
|
8007f68: 649a str r2, [r3, #72] ; 0x48
|
|
}
|
|
#endif /* configUSE_MUTEXES */
|
|
|
|
vListInitialiseItem( &( pxNewTCB->xStateListItem ) );
|
|
8007f6a: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
8007f6c: 3304 adds r3, #4
|
|
8007f6e: 4618 mov r0, r3
|
|
8007f70: f7ff feda bl 8007d28 <vListInitialiseItem>
|
|
vListInitialiseItem( &( pxNewTCB->xEventListItem ) );
|
|
8007f74: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
8007f76: 3318 adds r3, #24
|
|
8007f78: 4618 mov r0, r3
|
|
8007f7a: f7ff fed5 bl 8007d28 <vListInitialiseItem>
|
|
|
|
/* Set the pxNewTCB as a link back from the ListItem_t. This is so we can get
|
|
back to the containing TCB from a generic item in a list. */
|
|
listSET_LIST_ITEM_OWNER( &( pxNewTCB->xStateListItem ), pxNewTCB );
|
|
8007f7e: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
8007f80: 6b3a ldr r2, [r7, #48] ; 0x30
|
|
8007f82: 611a str r2, [r3, #16]
|
|
|
|
/* Event lists are always in priority order. */
|
|
listSET_LIST_ITEM_VALUE( &( pxNewTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
|
|
8007f84: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8007f86: f1c3 0207 rsb r2, r3, #7
|
|
8007f8a: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
8007f8c: 619a str r2, [r3, #24]
|
|
listSET_LIST_ITEM_OWNER( &( pxNewTCB->xEventListItem ), pxNewTCB );
|
|
8007f8e: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
8007f90: 6b3a ldr r2, [r7, #48] ; 0x30
|
|
8007f92: 625a str r2, [r3, #36] ; 0x24
|
|
}
|
|
#endif
|
|
|
|
#if ( configUSE_TASK_NOTIFICATIONS == 1 )
|
|
{
|
|
pxNewTCB->ulNotifiedValue = 0;
|
|
8007f94: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
8007f96: 2200 movs r2, #0
|
|
8007f98: 64da str r2, [r3, #76] ; 0x4c
|
|
pxNewTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
|
|
8007f9a: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
8007f9c: 2200 movs r2, #0
|
|
8007f9e: f883 2050 strb.w r2, [r3, #80] ; 0x50
|
|
{
|
|
pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters, xRunPrivileged );
|
|
}
|
|
#else /* portUSING_MPU_WRAPPERS */
|
|
{
|
|
pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters );
|
|
8007fa2: 683a ldr r2, [r7, #0]
|
|
8007fa4: 68f9 ldr r1, [r7, #12]
|
|
8007fa6: 69b8 ldr r0, [r7, #24]
|
|
8007fa8: f000 fbee bl 8008788 <pxPortInitialiseStack>
|
|
8007fac: 4602 mov r2, r0
|
|
8007fae: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
8007fb0: 601a str r2, [r3, #0]
|
|
}
|
|
#endif /* portUSING_MPU_WRAPPERS */
|
|
|
|
if( ( void * ) pxCreatedTask != NULL )
|
|
8007fb2: 6afb ldr r3, [r7, #44] ; 0x2c
|
|
8007fb4: 2b00 cmp r3, #0
|
|
8007fb6: d002 beq.n 8007fbe <prvInitialiseNewTask+0xf4>
|
|
{
|
|
/* Pass the handle out in an anonymous way. The handle can be used to
|
|
change the created task's priority, delete the created task, etc.*/
|
|
*pxCreatedTask = ( TaskHandle_t ) pxNewTCB;
|
|
8007fb8: 6afb ldr r3, [r7, #44] ; 0x2c
|
|
8007fba: 6b3a ldr r2, [r7, #48] ; 0x30
|
|
8007fbc: 601a str r2, [r3, #0]
|
|
}
|
|
else
|
|
{
|
|
mtCOVERAGE_TEST_MARKER();
|
|
}
|
|
}
|
|
8007fbe: bf00 nop
|
|
8007fc0: 3720 adds r7, #32
|
|
8007fc2: 46bd mov sp, r7
|
|
8007fc4: bd80 pop {r7, pc}
|
|
...
|
|
|
|
08007fc8 <prvAddNewTaskToReadyList>:
|
|
/*-----------------------------------------------------------*/
|
|
|
|
static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB )
|
|
{
|
|
8007fc8: b580 push {r7, lr}
|
|
8007fca: b082 sub sp, #8
|
|
8007fcc: af00 add r7, sp, #0
|
|
8007fce: 6078 str r0, [r7, #4]
|
|
/* Ensure interrupts don't access the task lists while the lists are being
|
|
updated. */
|
|
taskENTER_CRITICAL();
|
|
8007fd0: f000 fcc2 bl 8008958 <vPortEnterCritical>
|
|
{
|
|
uxCurrentNumberOfTasks++;
|
|
8007fd4: 4b2a ldr r3, [pc, #168] ; (8008080 <prvAddNewTaskToReadyList+0xb8>)
|
|
8007fd6: 681b ldr r3, [r3, #0]
|
|
8007fd8: 3301 adds r3, #1
|
|
8007fda: 4a29 ldr r2, [pc, #164] ; (8008080 <prvAddNewTaskToReadyList+0xb8>)
|
|
8007fdc: 6013 str r3, [r2, #0]
|
|
if( pxCurrentTCB == NULL )
|
|
8007fde: 4b29 ldr r3, [pc, #164] ; (8008084 <prvAddNewTaskToReadyList+0xbc>)
|
|
8007fe0: 681b ldr r3, [r3, #0]
|
|
8007fe2: 2b00 cmp r3, #0
|
|
8007fe4: d109 bne.n 8007ffa <prvAddNewTaskToReadyList+0x32>
|
|
{
|
|
/* There are no other tasks, or all the other tasks are in
|
|
the suspended state - make this the current task. */
|
|
pxCurrentTCB = pxNewTCB;
|
|
8007fe6: 4a27 ldr r2, [pc, #156] ; (8008084 <prvAddNewTaskToReadyList+0xbc>)
|
|
8007fe8: 687b ldr r3, [r7, #4]
|
|
8007fea: 6013 str r3, [r2, #0]
|
|
|
|
if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 )
|
|
8007fec: 4b24 ldr r3, [pc, #144] ; (8008080 <prvAddNewTaskToReadyList+0xb8>)
|
|
8007fee: 681b ldr r3, [r3, #0]
|
|
8007ff0: 2b01 cmp r3, #1
|
|
8007ff2: d110 bne.n 8008016 <prvAddNewTaskToReadyList+0x4e>
|
|
{
|
|
/* This is the first task to be created so do the preliminary
|
|
initialisation required. We will not recover if this call
|
|
fails, but we will report the failure. */
|
|
prvInitialiseTaskLists();
|
|
8007ff4: f000 faa4 bl 8008540 <prvInitialiseTaskLists>
|
|
8007ff8: e00d b.n 8008016 <prvAddNewTaskToReadyList+0x4e>
|
|
else
|
|
{
|
|
/* If the scheduler is not already running, make this task the
|
|
current task if it is the highest priority task to be created
|
|
so far. */
|
|
if( xSchedulerRunning == pdFALSE )
|
|
8007ffa: 4b23 ldr r3, [pc, #140] ; (8008088 <prvAddNewTaskToReadyList+0xc0>)
|
|
8007ffc: 681b ldr r3, [r3, #0]
|
|
8007ffe: 2b00 cmp r3, #0
|
|
8008000: d109 bne.n 8008016 <prvAddNewTaskToReadyList+0x4e>
|
|
{
|
|
if( pxCurrentTCB->uxPriority <= pxNewTCB->uxPriority )
|
|
8008002: 4b20 ldr r3, [pc, #128] ; (8008084 <prvAddNewTaskToReadyList+0xbc>)
|
|
8008004: 681b ldr r3, [r3, #0]
|
|
8008006: 6ada ldr r2, [r3, #44] ; 0x2c
|
|
8008008: 687b ldr r3, [r7, #4]
|
|
800800a: 6adb ldr r3, [r3, #44] ; 0x2c
|
|
800800c: 429a cmp r2, r3
|
|
800800e: d802 bhi.n 8008016 <prvAddNewTaskToReadyList+0x4e>
|
|
{
|
|
pxCurrentTCB = pxNewTCB;
|
|
8008010: 4a1c ldr r2, [pc, #112] ; (8008084 <prvAddNewTaskToReadyList+0xbc>)
|
|
8008012: 687b ldr r3, [r7, #4]
|
|
8008014: 6013 str r3, [r2, #0]
|
|
{
|
|
mtCOVERAGE_TEST_MARKER();
|
|
}
|
|
}
|
|
|
|
uxTaskNumber++;
|
|
8008016: 4b1d ldr r3, [pc, #116] ; (800808c <prvAddNewTaskToReadyList+0xc4>)
|
|
8008018: 681b ldr r3, [r3, #0]
|
|
800801a: 3301 adds r3, #1
|
|
800801c: 4a1b ldr r2, [pc, #108] ; (800808c <prvAddNewTaskToReadyList+0xc4>)
|
|
800801e: 6013 str r3, [r2, #0]
|
|
pxNewTCB->uxTCBNumber = uxTaskNumber;
|
|
}
|
|
#endif /* configUSE_TRACE_FACILITY */
|
|
traceTASK_CREATE( pxNewTCB );
|
|
|
|
prvAddTaskToReadyList( pxNewTCB );
|
|
8008020: 687b ldr r3, [r7, #4]
|
|
8008022: 6adb ldr r3, [r3, #44] ; 0x2c
|
|
8008024: 2201 movs r2, #1
|
|
8008026: 409a lsls r2, r3
|
|
8008028: 4b19 ldr r3, [pc, #100] ; (8008090 <prvAddNewTaskToReadyList+0xc8>)
|
|
800802a: 681b ldr r3, [r3, #0]
|
|
800802c: 4313 orrs r3, r2
|
|
800802e: 4a18 ldr r2, [pc, #96] ; (8008090 <prvAddNewTaskToReadyList+0xc8>)
|
|
8008030: 6013 str r3, [r2, #0]
|
|
8008032: 687b ldr r3, [r7, #4]
|
|
8008034: 6ada ldr r2, [r3, #44] ; 0x2c
|
|
8008036: 4613 mov r3, r2
|
|
8008038: 009b lsls r3, r3, #2
|
|
800803a: 4413 add r3, r2
|
|
800803c: 009b lsls r3, r3, #2
|
|
800803e: 4a15 ldr r2, [pc, #84] ; (8008094 <prvAddNewTaskToReadyList+0xcc>)
|
|
8008040: 441a add r2, r3
|
|
8008042: 687b ldr r3, [r7, #4]
|
|
8008044: 3304 adds r3, #4
|
|
8008046: 4619 mov r1, r3
|
|
8008048: 4610 mov r0, r2
|
|
800804a: f7ff fe79 bl 8007d40 <vListInsertEnd>
|
|
|
|
portSETUP_TCB( pxNewTCB );
|
|
}
|
|
taskEXIT_CRITICAL();
|
|
800804e: f000 fcb1 bl 80089b4 <vPortExitCritical>
|
|
|
|
if( xSchedulerRunning != pdFALSE )
|
|
8008052: 4b0d ldr r3, [pc, #52] ; (8008088 <prvAddNewTaskToReadyList+0xc0>)
|
|
8008054: 681b ldr r3, [r3, #0]
|
|
8008056: 2b00 cmp r3, #0
|
|
8008058: d00e beq.n 8008078 <prvAddNewTaskToReadyList+0xb0>
|
|
{
|
|
/* If the created task is of a higher priority than the current task
|
|
then it should run now. */
|
|
if( pxCurrentTCB->uxPriority < pxNewTCB->uxPriority )
|
|
800805a: 4b0a ldr r3, [pc, #40] ; (8008084 <prvAddNewTaskToReadyList+0xbc>)
|
|
800805c: 681b ldr r3, [r3, #0]
|
|
800805e: 6ada ldr r2, [r3, #44] ; 0x2c
|
|
8008060: 687b ldr r3, [r7, #4]
|
|
8008062: 6adb ldr r3, [r3, #44] ; 0x2c
|
|
8008064: 429a cmp r2, r3
|
|
8008066: d207 bcs.n 8008078 <prvAddNewTaskToReadyList+0xb0>
|
|
{
|
|
taskYIELD_IF_USING_PREEMPTION();
|
|
8008068: 4b0b ldr r3, [pc, #44] ; (8008098 <prvAddNewTaskToReadyList+0xd0>)
|
|
800806a: f04f 5280 mov.w r2, #268435456 ; 0x10000000
|
|
800806e: 601a str r2, [r3, #0]
|
|
8008070: f3bf 8f4f dsb sy
|
|
8008074: f3bf 8f6f isb sy
|
|
}
|
|
else
|
|
{
|
|
mtCOVERAGE_TEST_MARKER();
|
|
}
|
|
}
|
|
8008078: bf00 nop
|
|
800807a: 3708 adds r7, #8
|
|
800807c: 46bd mov sp, r7
|
|
800807e: bd80 pop {r7, pc}
|
|
8008080: 20000328 .word 0x20000328
|
|
8008084: 20000228 .word 0x20000228
|
|
8008088: 20000334 .word 0x20000334
|
|
800808c: 20000344 .word 0x20000344
|
|
8008090: 20000330 .word 0x20000330
|
|
8008094: 2000022c .word 0x2000022c
|
|
8008098: e000ed04 .word 0xe000ed04
|
|
|
|
0800809c <vTaskDelay>:
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if ( INCLUDE_vTaskDelay == 1 )
|
|
|
|
void vTaskDelay( const TickType_t xTicksToDelay )
|
|
{
|
|
800809c: b580 push {r7, lr}
|
|
800809e: b084 sub sp, #16
|
|
80080a0: af00 add r7, sp, #0
|
|
80080a2: 6078 str r0, [r7, #4]
|
|
BaseType_t xAlreadyYielded = pdFALSE;
|
|
80080a4: 2300 movs r3, #0
|
|
80080a6: 60fb str r3, [r7, #12]
|
|
|
|
/* A delay time of zero just forces a reschedule. */
|
|
if( xTicksToDelay > ( TickType_t ) 0U )
|
|
80080a8: 687b ldr r3, [r7, #4]
|
|
80080aa: 2b00 cmp r3, #0
|
|
80080ac: d016 beq.n 80080dc <vTaskDelay+0x40>
|
|
{
|
|
configASSERT( uxSchedulerSuspended == 0 );
|
|
80080ae: 4b13 ldr r3, [pc, #76] ; (80080fc <vTaskDelay+0x60>)
|
|
80080b0: 681b ldr r3, [r3, #0]
|
|
80080b2: 2b00 cmp r3, #0
|
|
80080b4: d009 beq.n 80080ca <vTaskDelay+0x2e>
|
|
80080b6: f04f 0350 mov.w r3, #80 ; 0x50
|
|
80080ba: f383 8811 msr BASEPRI, r3
|
|
80080be: f3bf 8f6f isb sy
|
|
80080c2: f3bf 8f4f dsb sy
|
|
80080c6: 60bb str r3, [r7, #8]
|
|
80080c8: e7fe b.n 80080c8 <vTaskDelay+0x2c>
|
|
vTaskSuspendAll();
|
|
80080ca: f000 f861 bl 8008190 <vTaskSuspendAll>
|
|
list or removed from the blocked list until the scheduler
|
|
is resumed.
|
|
|
|
This task cannot be in an event list as it is the currently
|
|
executing task. */
|
|
prvAddCurrentTaskToDelayedList( xTicksToDelay, pdFALSE );
|
|
80080ce: 2100 movs r1, #0
|
|
80080d0: 6878 ldr r0, [r7, #4]
|
|
80080d2: f000 faf3 bl 80086bc <prvAddCurrentTaskToDelayedList>
|
|
}
|
|
xAlreadyYielded = xTaskResumeAll();
|
|
80080d6: f000 f869 bl 80081ac <xTaskResumeAll>
|
|
80080da: 60f8 str r0, [r7, #12]
|
|
mtCOVERAGE_TEST_MARKER();
|
|
}
|
|
|
|
/* Force a reschedule if xTaskResumeAll has not already done so, we may
|
|
have put ourselves to sleep. */
|
|
if( xAlreadyYielded == pdFALSE )
|
|
80080dc: 68fb ldr r3, [r7, #12]
|
|
80080de: 2b00 cmp r3, #0
|
|
80080e0: d107 bne.n 80080f2 <vTaskDelay+0x56>
|
|
{
|
|
portYIELD_WITHIN_API();
|
|
80080e2: 4b07 ldr r3, [pc, #28] ; (8008100 <vTaskDelay+0x64>)
|
|
80080e4: f04f 5280 mov.w r2, #268435456 ; 0x10000000
|
|
80080e8: 601a str r2, [r3, #0]
|
|
80080ea: f3bf 8f4f dsb sy
|
|
80080ee: f3bf 8f6f isb sy
|
|
}
|
|
else
|
|
{
|
|
mtCOVERAGE_TEST_MARKER();
|
|
}
|
|
}
|
|
80080f2: bf00 nop
|
|
80080f4: 3710 adds r7, #16
|
|
80080f6: 46bd mov sp, r7
|
|
80080f8: bd80 pop {r7, pc}
|
|
80080fa: bf00 nop
|
|
80080fc: 20000350 .word 0x20000350
|
|
8008100: e000ed04 .word 0xe000ed04
|
|
|
|
08008104 <vTaskStartScheduler>:
|
|
|
|
#endif /* ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) */
|
|
/*-----------------------------------------------------------*/
|
|
|
|
void vTaskStartScheduler( void )
|
|
{
|
|
8008104: b580 push {r7, lr}
|
|
8008106: b086 sub sp, #24
|
|
8008108: af02 add r7, sp, #8
|
|
}
|
|
}
|
|
#else
|
|
{
|
|
/* The Idle task is being created using dynamically allocated RAM. */
|
|
xReturn = xTaskCreate( prvIdleTask,
|
|
800810a: 4b1b ldr r3, [pc, #108] ; (8008178 <vTaskStartScheduler+0x74>)
|
|
800810c: 9301 str r3, [sp, #4]
|
|
800810e: 2300 movs r3, #0
|
|
8008110: 9300 str r3, [sp, #0]
|
|
8008112: 2300 movs r3, #0
|
|
8008114: 2280 movs r2, #128 ; 0x80
|
|
8008116: 4919 ldr r1, [pc, #100] ; (800817c <vTaskStartScheduler+0x78>)
|
|
8008118: 4819 ldr r0, [pc, #100] ; (8008180 <vTaskStartScheduler+0x7c>)
|
|
800811a: f7ff fe95 bl 8007e48 <xTaskCreate>
|
|
800811e: 60f8 str r0, [r7, #12]
|
|
mtCOVERAGE_TEST_MARKER();
|
|
}
|
|
}
|
|
#endif /* configUSE_TIMERS */
|
|
|
|
if( xReturn == pdPASS )
|
|
8008120: 68fb ldr r3, [r7, #12]
|
|
8008122: 2b01 cmp r3, #1
|
|
8008124: d115 bne.n 8008152 <vTaskStartScheduler+0x4e>
|
|
8008126: f04f 0350 mov.w r3, #80 ; 0x50
|
|
800812a: f383 8811 msr BASEPRI, r3
|
|
800812e: f3bf 8f6f isb sy
|
|
8008132: f3bf 8f4f dsb sy
|
|
8008136: 60bb str r3, [r7, #8]
|
|
structure specific to the task that will run first. */
|
|
_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
|
|
}
|
|
#endif /* configUSE_NEWLIB_REENTRANT */
|
|
|
|
xNextTaskUnblockTime = portMAX_DELAY;
|
|
8008138: 4b12 ldr r3, [pc, #72] ; (8008184 <vTaskStartScheduler+0x80>)
|
|
800813a: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
|
800813e: 601a str r2, [r3, #0]
|
|
xSchedulerRunning = pdTRUE;
|
|
8008140: 4b11 ldr r3, [pc, #68] ; (8008188 <vTaskStartScheduler+0x84>)
|
|
8008142: 2201 movs r2, #1
|
|
8008144: 601a str r2, [r3, #0]
|
|
xTickCount = ( TickType_t ) 0U;
|
|
8008146: 4b11 ldr r3, [pc, #68] ; (800818c <vTaskStartScheduler+0x88>)
|
|
8008148: 2200 movs r2, #0
|
|
800814a: 601a str r2, [r3, #0]
|
|
FreeRTOSConfig.h file. */
|
|
portCONFIGURE_TIMER_FOR_RUN_TIME_STATS();
|
|
|
|
/* Setting up the timer tick is hardware specific and thus in the
|
|
portable interface. */
|
|
if( xPortStartScheduler() != pdFALSE )
|
|
800814c: f000 fb94 bl 8008878 <xPortStartScheduler>
|
|
}
|
|
|
|
/* Prevent compiler warnings if INCLUDE_xTaskGetIdleTaskHandle is set to 0,
|
|
meaning xIdleTaskHandle is not used anywhere else. */
|
|
( void ) xIdleTaskHandle;
|
|
}
|
|
8008150: e00d b.n 800816e <vTaskStartScheduler+0x6a>
|
|
configASSERT( xReturn != errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY );
|
|
8008152: 68fb ldr r3, [r7, #12]
|
|
8008154: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
|
8008158: d109 bne.n 800816e <vTaskStartScheduler+0x6a>
|
|
800815a: f04f 0350 mov.w r3, #80 ; 0x50
|
|
800815e: f383 8811 msr BASEPRI, r3
|
|
8008162: f3bf 8f6f isb sy
|
|
8008166: f3bf 8f4f dsb sy
|
|
800816a: 607b str r3, [r7, #4]
|
|
800816c: e7fe b.n 800816c <vTaskStartScheduler+0x68>
|
|
}
|
|
800816e: bf00 nop
|
|
8008170: 3710 adds r7, #16
|
|
8008172: 46bd mov sp, r7
|
|
8008174: bd80 pop {r7, pc}
|
|
8008176: bf00 nop
|
|
8008178: 2000034c .word 0x2000034c
|
|
800817c: 0800c6a4 .word 0x0800c6a4
|
|
8008180: 08008511 .word 0x08008511
|
|
8008184: 20000348 .word 0x20000348
|
|
8008188: 20000334 .word 0x20000334
|
|
800818c: 2000032c .word 0x2000032c
|
|
|
|
08008190 <vTaskSuspendAll>:
|
|
vPortEndScheduler();
|
|
}
|
|
/*----------------------------------------------------------*/
|
|
|
|
void vTaskSuspendAll( void )
|
|
{
|
|
8008190: b480 push {r7}
|
|
8008192: af00 add r7, sp, #0
|
|
/* A critical section is not required as the variable is of type
|
|
BaseType_t. Please read Richard Barry's reply in the following link to a
|
|
post in the FreeRTOS support forum before reporting this as a bug! -
|
|
http://goo.gl/wu4acr */
|
|
++uxSchedulerSuspended;
|
|
8008194: 4b04 ldr r3, [pc, #16] ; (80081a8 <vTaskSuspendAll+0x18>)
|
|
8008196: 681b ldr r3, [r3, #0]
|
|
8008198: 3301 adds r3, #1
|
|
800819a: 4a03 ldr r2, [pc, #12] ; (80081a8 <vTaskSuspendAll+0x18>)
|
|
800819c: 6013 str r3, [r2, #0]
|
|
}
|
|
800819e: bf00 nop
|
|
80081a0: 46bd mov sp, r7
|
|
80081a2: bc80 pop {r7}
|
|
80081a4: 4770 bx lr
|
|
80081a6: bf00 nop
|
|
80081a8: 20000350 .word 0x20000350
|
|
|
|
080081ac <xTaskResumeAll>:
|
|
|
|
#endif /* configUSE_TICKLESS_IDLE */
|
|
/*----------------------------------------------------------*/
|
|
|
|
BaseType_t xTaskResumeAll( void )
|
|
{
|
|
80081ac: b580 push {r7, lr}
|
|
80081ae: b084 sub sp, #16
|
|
80081b0: af00 add r7, sp, #0
|
|
TCB_t *pxTCB = NULL;
|
|
80081b2: 2300 movs r3, #0
|
|
80081b4: 60fb str r3, [r7, #12]
|
|
BaseType_t xAlreadyYielded = pdFALSE;
|
|
80081b6: 2300 movs r3, #0
|
|
80081b8: 60bb str r3, [r7, #8]
|
|
|
|
/* If uxSchedulerSuspended is zero then this function does not match a
|
|
previous call to vTaskSuspendAll(). */
|
|
configASSERT( uxSchedulerSuspended );
|
|
80081ba: 4b41 ldr r3, [pc, #260] ; (80082c0 <xTaskResumeAll+0x114>)
|
|
80081bc: 681b ldr r3, [r3, #0]
|
|
80081be: 2b00 cmp r3, #0
|
|
80081c0: d109 bne.n 80081d6 <xTaskResumeAll+0x2a>
|
|
80081c2: f04f 0350 mov.w r3, #80 ; 0x50
|
|
80081c6: f383 8811 msr BASEPRI, r3
|
|
80081ca: f3bf 8f6f isb sy
|
|
80081ce: f3bf 8f4f dsb sy
|
|
80081d2: 603b str r3, [r7, #0]
|
|
80081d4: e7fe b.n 80081d4 <xTaskResumeAll+0x28>
|
|
/* It is possible that an ISR caused a task to be removed from an event
|
|
list while the scheduler was suspended. If this was the case then the
|
|
removed task will have been added to the xPendingReadyList. Once the
|
|
scheduler has been resumed it is safe to move all the pending ready
|
|
tasks from this list into their appropriate ready list. */
|
|
taskENTER_CRITICAL();
|
|
80081d6: f000 fbbf bl 8008958 <vPortEnterCritical>
|
|
{
|
|
--uxSchedulerSuspended;
|
|
80081da: 4b39 ldr r3, [pc, #228] ; (80082c0 <xTaskResumeAll+0x114>)
|
|
80081dc: 681b ldr r3, [r3, #0]
|
|
80081de: 3b01 subs r3, #1
|
|
80081e0: 4a37 ldr r2, [pc, #220] ; (80082c0 <xTaskResumeAll+0x114>)
|
|
80081e2: 6013 str r3, [r2, #0]
|
|
|
|
if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
|
|
80081e4: 4b36 ldr r3, [pc, #216] ; (80082c0 <xTaskResumeAll+0x114>)
|
|
80081e6: 681b ldr r3, [r3, #0]
|
|
80081e8: 2b00 cmp r3, #0
|
|
80081ea: d161 bne.n 80082b0 <xTaskResumeAll+0x104>
|
|
{
|
|
if( uxCurrentNumberOfTasks > ( UBaseType_t ) 0U )
|
|
80081ec: 4b35 ldr r3, [pc, #212] ; (80082c4 <xTaskResumeAll+0x118>)
|
|
80081ee: 681b ldr r3, [r3, #0]
|
|
80081f0: 2b00 cmp r3, #0
|
|
80081f2: d05d beq.n 80082b0 <xTaskResumeAll+0x104>
|
|
{
|
|
/* Move any readied tasks from the pending list into the
|
|
appropriate ready list. */
|
|
while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
|
|
80081f4: e02e b.n 8008254 <xTaskResumeAll+0xa8>
|
|
{
|
|
pxTCB = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) );
|
|
80081f6: 4b34 ldr r3, [pc, #208] ; (80082c8 <xTaskResumeAll+0x11c>)
|
|
80081f8: 68db ldr r3, [r3, #12]
|
|
80081fa: 68db ldr r3, [r3, #12]
|
|
80081fc: 60fb str r3, [r7, #12]
|
|
( void ) uxListRemove( &( pxTCB->xEventListItem ) );
|
|
80081fe: 68fb ldr r3, [r7, #12]
|
|
8008200: 3318 adds r3, #24
|
|
8008202: 4618 mov r0, r3
|
|
8008204: f7ff fdf7 bl 8007df6 <uxListRemove>
|
|
( void ) uxListRemove( &( pxTCB->xStateListItem ) );
|
|
8008208: 68fb ldr r3, [r7, #12]
|
|
800820a: 3304 adds r3, #4
|
|
800820c: 4618 mov r0, r3
|
|
800820e: f7ff fdf2 bl 8007df6 <uxListRemove>
|
|
prvAddTaskToReadyList( pxTCB );
|
|
8008212: 68fb ldr r3, [r7, #12]
|
|
8008214: 6adb ldr r3, [r3, #44] ; 0x2c
|
|
8008216: 2201 movs r2, #1
|
|
8008218: 409a lsls r2, r3
|
|
800821a: 4b2c ldr r3, [pc, #176] ; (80082cc <xTaskResumeAll+0x120>)
|
|
800821c: 681b ldr r3, [r3, #0]
|
|
800821e: 4313 orrs r3, r2
|
|
8008220: 4a2a ldr r2, [pc, #168] ; (80082cc <xTaskResumeAll+0x120>)
|
|
8008222: 6013 str r3, [r2, #0]
|
|
8008224: 68fb ldr r3, [r7, #12]
|
|
8008226: 6ada ldr r2, [r3, #44] ; 0x2c
|
|
8008228: 4613 mov r3, r2
|
|
800822a: 009b lsls r3, r3, #2
|
|
800822c: 4413 add r3, r2
|
|
800822e: 009b lsls r3, r3, #2
|
|
8008230: 4a27 ldr r2, [pc, #156] ; (80082d0 <xTaskResumeAll+0x124>)
|
|
8008232: 441a add r2, r3
|
|
8008234: 68fb ldr r3, [r7, #12]
|
|
8008236: 3304 adds r3, #4
|
|
8008238: 4619 mov r1, r3
|
|
800823a: 4610 mov r0, r2
|
|
800823c: f7ff fd80 bl 8007d40 <vListInsertEnd>
|
|
|
|
/* If the moved task has a priority higher than the current
|
|
task then a yield must be performed. */
|
|
if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
|
|
8008240: 68fb ldr r3, [r7, #12]
|
|
8008242: 6ada ldr r2, [r3, #44] ; 0x2c
|
|
8008244: 4b23 ldr r3, [pc, #140] ; (80082d4 <xTaskResumeAll+0x128>)
|
|
8008246: 681b ldr r3, [r3, #0]
|
|
8008248: 6adb ldr r3, [r3, #44] ; 0x2c
|
|
800824a: 429a cmp r2, r3
|
|
800824c: d302 bcc.n 8008254 <xTaskResumeAll+0xa8>
|
|
{
|
|
xYieldPending = pdTRUE;
|
|
800824e: 4b22 ldr r3, [pc, #136] ; (80082d8 <xTaskResumeAll+0x12c>)
|
|
8008250: 2201 movs r2, #1
|
|
8008252: 601a str r2, [r3, #0]
|
|
while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
|
|
8008254: 4b1c ldr r3, [pc, #112] ; (80082c8 <xTaskResumeAll+0x11c>)
|
|
8008256: 681b ldr r3, [r3, #0]
|
|
8008258: 2b00 cmp r3, #0
|
|
800825a: d1cc bne.n 80081f6 <xTaskResumeAll+0x4a>
|
|
{
|
|
mtCOVERAGE_TEST_MARKER();
|
|
}
|
|
}
|
|
|
|
if( pxTCB != NULL )
|
|
800825c: 68fb ldr r3, [r7, #12]
|
|
800825e: 2b00 cmp r3, #0
|
|
8008260: d001 beq.n 8008266 <xTaskResumeAll+0xba>
|
|
which may have prevented the next unblock time from being
|
|
re-calculated, in which case re-calculate it now. Mainly
|
|
important for low power tickless implementations, where
|
|
this can prevent an unnecessary exit from low power
|
|
state. */
|
|
prvResetNextTaskUnblockTime();
|
|
8008262: f000 f9e9 bl 8008638 <prvResetNextTaskUnblockTime>
|
|
/* If any ticks occurred while the scheduler was suspended then
|
|
they should be processed now. This ensures the tick count does
|
|
not slip, and that any delayed tasks are resumed at the correct
|
|
time. */
|
|
{
|
|
UBaseType_t uxPendedCounts = uxPendedTicks; /* Non-volatile copy. */
|
|
8008266: 4b1d ldr r3, [pc, #116] ; (80082dc <xTaskResumeAll+0x130>)
|
|
8008268: 681b ldr r3, [r3, #0]
|
|
800826a: 607b str r3, [r7, #4]
|
|
|
|
if( uxPendedCounts > ( UBaseType_t ) 0U )
|
|
800826c: 687b ldr r3, [r7, #4]
|
|
800826e: 2b00 cmp r3, #0
|
|
8008270: d010 beq.n 8008294 <xTaskResumeAll+0xe8>
|
|
{
|
|
do
|
|
{
|
|
if( xTaskIncrementTick() != pdFALSE )
|
|
8008272: f000 f837 bl 80082e4 <xTaskIncrementTick>
|
|
8008276: 4603 mov r3, r0
|
|
8008278: 2b00 cmp r3, #0
|
|
800827a: d002 beq.n 8008282 <xTaskResumeAll+0xd6>
|
|
{
|
|
xYieldPending = pdTRUE;
|
|
800827c: 4b16 ldr r3, [pc, #88] ; (80082d8 <xTaskResumeAll+0x12c>)
|
|
800827e: 2201 movs r2, #1
|
|
8008280: 601a str r2, [r3, #0]
|
|
}
|
|
else
|
|
{
|
|
mtCOVERAGE_TEST_MARKER();
|
|
}
|
|
--uxPendedCounts;
|
|
8008282: 687b ldr r3, [r7, #4]
|
|
8008284: 3b01 subs r3, #1
|
|
8008286: 607b str r3, [r7, #4]
|
|
} while( uxPendedCounts > ( UBaseType_t ) 0U );
|
|
8008288: 687b ldr r3, [r7, #4]
|
|
800828a: 2b00 cmp r3, #0
|
|
800828c: d1f1 bne.n 8008272 <xTaskResumeAll+0xc6>
|
|
|
|
uxPendedTicks = 0;
|
|
800828e: 4b13 ldr r3, [pc, #76] ; (80082dc <xTaskResumeAll+0x130>)
|
|
8008290: 2200 movs r2, #0
|
|
8008292: 601a str r2, [r3, #0]
|
|
{
|
|
mtCOVERAGE_TEST_MARKER();
|
|
}
|
|
}
|
|
|
|
if( xYieldPending != pdFALSE )
|
|
8008294: 4b10 ldr r3, [pc, #64] ; (80082d8 <xTaskResumeAll+0x12c>)
|
|
8008296: 681b ldr r3, [r3, #0]
|
|
8008298: 2b00 cmp r3, #0
|
|
800829a: d009 beq.n 80082b0 <xTaskResumeAll+0x104>
|
|
{
|
|
#if( configUSE_PREEMPTION != 0 )
|
|
{
|
|
xAlreadyYielded = pdTRUE;
|
|
800829c: 2301 movs r3, #1
|
|
800829e: 60bb str r3, [r7, #8]
|
|
}
|
|
#endif
|
|
taskYIELD_IF_USING_PREEMPTION();
|
|
80082a0: 4b0f ldr r3, [pc, #60] ; (80082e0 <xTaskResumeAll+0x134>)
|
|
80082a2: f04f 5280 mov.w r2, #268435456 ; 0x10000000
|
|
80082a6: 601a str r2, [r3, #0]
|
|
80082a8: f3bf 8f4f dsb sy
|
|
80082ac: f3bf 8f6f isb sy
|
|
else
|
|
{
|
|
mtCOVERAGE_TEST_MARKER();
|
|
}
|
|
}
|
|
taskEXIT_CRITICAL();
|
|
80082b0: f000 fb80 bl 80089b4 <vPortExitCritical>
|
|
|
|
return xAlreadyYielded;
|
|
80082b4: 68bb ldr r3, [r7, #8]
|
|
}
|
|
80082b6: 4618 mov r0, r3
|
|
80082b8: 3710 adds r7, #16
|
|
80082ba: 46bd mov sp, r7
|
|
80082bc: bd80 pop {r7, pc}
|
|
80082be: bf00 nop
|
|
80082c0: 20000350 .word 0x20000350
|
|
80082c4: 20000328 .word 0x20000328
|
|
80082c8: 200002e8 .word 0x200002e8
|
|
80082cc: 20000330 .word 0x20000330
|
|
80082d0: 2000022c .word 0x2000022c
|
|
80082d4: 20000228 .word 0x20000228
|
|
80082d8: 2000033c .word 0x2000033c
|
|
80082dc: 20000338 .word 0x20000338
|
|
80082e0: e000ed04 .word 0xe000ed04
|
|
|
|
080082e4 <xTaskIncrementTick>:
|
|
|
|
#endif /* INCLUDE_xTaskAbortDelay */
|
|
/*----------------------------------------------------------*/
|
|
|
|
BaseType_t xTaskIncrementTick( void )
|
|
{
|
|
80082e4: b580 push {r7, lr}
|
|
80082e6: b086 sub sp, #24
|
|
80082e8: af00 add r7, sp, #0
|
|
TCB_t * pxTCB;
|
|
TickType_t xItemValue;
|
|
BaseType_t xSwitchRequired = pdFALSE;
|
|
80082ea: 2300 movs r3, #0
|
|
80082ec: 617b str r3, [r7, #20]
|
|
|
|
/* Called by the portable layer each time a tick interrupt occurs.
|
|
Increments the tick then checks to see if the new tick value will cause any
|
|
tasks to be unblocked. */
|
|
traceTASK_INCREMENT_TICK( xTickCount );
|
|
if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
|
|
80082ee: 4b50 ldr r3, [pc, #320] ; (8008430 <xTaskIncrementTick+0x14c>)
|
|
80082f0: 681b ldr r3, [r3, #0]
|
|
80082f2: 2b00 cmp r3, #0
|
|
80082f4: f040 808c bne.w 8008410 <xTaskIncrementTick+0x12c>
|
|
{
|
|
/* Minor optimisation. The tick count cannot change in this
|
|
block. */
|
|
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
|
|
80082f8: 4b4e ldr r3, [pc, #312] ; (8008434 <xTaskIncrementTick+0x150>)
|
|
80082fa: 681b ldr r3, [r3, #0]
|
|
80082fc: 3301 adds r3, #1
|
|
80082fe: 613b str r3, [r7, #16]
|
|
|
|
/* Increment the RTOS tick, switching the delayed and overflowed
|
|
delayed lists if it wraps to 0. */
|
|
xTickCount = xConstTickCount;
|
|
8008300: 4a4c ldr r2, [pc, #304] ; (8008434 <xTaskIncrementTick+0x150>)
|
|
8008302: 693b ldr r3, [r7, #16]
|
|
8008304: 6013 str r3, [r2, #0]
|
|
|
|
if( xConstTickCount == ( TickType_t ) 0U ) /*lint !e774 'if' does not always evaluate to false as it is looking for an overflow. */
|
|
8008306: 693b ldr r3, [r7, #16]
|
|
8008308: 2b00 cmp r3, #0
|
|
800830a: d11f bne.n 800834c <xTaskIncrementTick+0x68>
|
|
{
|
|
taskSWITCH_DELAYED_LISTS();
|
|
800830c: 4b4a ldr r3, [pc, #296] ; (8008438 <xTaskIncrementTick+0x154>)
|
|
800830e: 681b ldr r3, [r3, #0]
|
|
8008310: 681b ldr r3, [r3, #0]
|
|
8008312: 2b00 cmp r3, #0
|
|
8008314: d009 beq.n 800832a <xTaskIncrementTick+0x46>
|
|
8008316: f04f 0350 mov.w r3, #80 ; 0x50
|
|
800831a: f383 8811 msr BASEPRI, r3
|
|
800831e: f3bf 8f6f isb sy
|
|
8008322: f3bf 8f4f dsb sy
|
|
8008326: 603b str r3, [r7, #0]
|
|
8008328: e7fe b.n 8008328 <xTaskIncrementTick+0x44>
|
|
800832a: 4b43 ldr r3, [pc, #268] ; (8008438 <xTaskIncrementTick+0x154>)
|
|
800832c: 681b ldr r3, [r3, #0]
|
|
800832e: 60fb str r3, [r7, #12]
|
|
8008330: 4b42 ldr r3, [pc, #264] ; (800843c <xTaskIncrementTick+0x158>)
|
|
8008332: 681b ldr r3, [r3, #0]
|
|
8008334: 4a40 ldr r2, [pc, #256] ; (8008438 <xTaskIncrementTick+0x154>)
|
|
8008336: 6013 str r3, [r2, #0]
|
|
8008338: 4a40 ldr r2, [pc, #256] ; (800843c <xTaskIncrementTick+0x158>)
|
|
800833a: 68fb ldr r3, [r7, #12]
|
|
800833c: 6013 str r3, [r2, #0]
|
|
800833e: 4b40 ldr r3, [pc, #256] ; (8008440 <xTaskIncrementTick+0x15c>)
|
|
8008340: 681b ldr r3, [r3, #0]
|
|
8008342: 3301 adds r3, #1
|
|
8008344: 4a3e ldr r2, [pc, #248] ; (8008440 <xTaskIncrementTick+0x15c>)
|
|
8008346: 6013 str r3, [r2, #0]
|
|
8008348: f000 f976 bl 8008638 <prvResetNextTaskUnblockTime>
|
|
|
|
/* See if this tick has made a timeout expire. Tasks are stored in
|
|
the queue in the order of their wake time - meaning once one task
|
|
has been found whose block time has not expired there is no need to
|
|
look any further down the list. */
|
|
if( xConstTickCount >= xNextTaskUnblockTime )
|
|
800834c: 4b3d ldr r3, [pc, #244] ; (8008444 <xTaskIncrementTick+0x160>)
|
|
800834e: 681b ldr r3, [r3, #0]
|
|
8008350: 693a ldr r2, [r7, #16]
|
|
8008352: 429a cmp r2, r3
|
|
8008354: d34d bcc.n 80083f2 <xTaskIncrementTick+0x10e>
|
|
{
|
|
for( ;; )
|
|
{
|
|
if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
|
|
8008356: 4b38 ldr r3, [pc, #224] ; (8008438 <xTaskIncrementTick+0x154>)
|
|
8008358: 681b ldr r3, [r3, #0]
|
|
800835a: 681b ldr r3, [r3, #0]
|
|
800835c: 2b00 cmp r3, #0
|
|
800835e: d101 bne.n 8008364 <xTaskIncrementTick+0x80>
|
|
8008360: 2301 movs r3, #1
|
|
8008362: e000 b.n 8008366 <xTaskIncrementTick+0x82>
|
|
8008364: 2300 movs r3, #0
|
|
8008366: 2b00 cmp r3, #0
|
|
8008368: d004 beq.n 8008374 <xTaskIncrementTick+0x90>
|
|
/* The delayed list is empty. Set xNextTaskUnblockTime
|
|
to the maximum possible value so it is extremely
|
|
unlikely that the
|
|
if( xTickCount >= xNextTaskUnblockTime ) test will pass
|
|
next time through. */
|
|
xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
|
|
800836a: 4b36 ldr r3, [pc, #216] ; (8008444 <xTaskIncrementTick+0x160>)
|
|
800836c: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
|
8008370: 601a str r2, [r3, #0]
|
|
break;
|
|
8008372: e03e b.n 80083f2 <xTaskIncrementTick+0x10e>
|
|
{
|
|
/* The delayed list is not empty, get the value of the
|
|
item at the head of the delayed list. This is the time
|
|
at which the task at the head of the delayed list must
|
|
be removed from the Blocked state. */
|
|
pxTCB = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList );
|
|
8008374: 4b30 ldr r3, [pc, #192] ; (8008438 <xTaskIncrementTick+0x154>)
|
|
8008376: 681b ldr r3, [r3, #0]
|
|
8008378: 68db ldr r3, [r3, #12]
|
|
800837a: 68db ldr r3, [r3, #12]
|
|
800837c: 60bb str r3, [r7, #8]
|
|
xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) );
|
|
800837e: 68bb ldr r3, [r7, #8]
|
|
8008380: 685b ldr r3, [r3, #4]
|
|
8008382: 607b str r3, [r7, #4]
|
|
|
|
if( xConstTickCount < xItemValue )
|
|
8008384: 693a ldr r2, [r7, #16]
|
|
8008386: 687b ldr r3, [r7, #4]
|
|
8008388: 429a cmp r2, r3
|
|
800838a: d203 bcs.n 8008394 <xTaskIncrementTick+0xb0>
|
|
/* It is not time to unblock this item yet, but the
|
|
item value is the time at which the task at the head
|
|
of the blocked list must be removed from the Blocked
|
|
state - so record the item value in
|
|
xNextTaskUnblockTime. */
|
|
xNextTaskUnblockTime = xItemValue;
|
|
800838c: 4a2d ldr r2, [pc, #180] ; (8008444 <xTaskIncrementTick+0x160>)
|
|
800838e: 687b ldr r3, [r7, #4]
|
|
8008390: 6013 str r3, [r2, #0]
|
|
break;
|
|
8008392: e02e b.n 80083f2 <xTaskIncrementTick+0x10e>
|
|
{
|
|
mtCOVERAGE_TEST_MARKER();
|
|
}
|
|
|
|
/* It is time to remove the item from the Blocked state. */
|
|
( void ) uxListRemove( &( pxTCB->xStateListItem ) );
|
|
8008394: 68bb ldr r3, [r7, #8]
|
|
8008396: 3304 adds r3, #4
|
|
8008398: 4618 mov r0, r3
|
|
800839a: f7ff fd2c bl 8007df6 <uxListRemove>
|
|
|
|
/* Is the task waiting on an event also? If so remove
|
|
it from the event list. */
|
|
if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
|
|
800839e: 68bb ldr r3, [r7, #8]
|
|
80083a0: 6a9b ldr r3, [r3, #40] ; 0x28
|
|
80083a2: 2b00 cmp r3, #0
|
|
80083a4: d004 beq.n 80083b0 <xTaskIncrementTick+0xcc>
|
|
{
|
|
( void ) uxListRemove( &( pxTCB->xEventListItem ) );
|
|
80083a6: 68bb ldr r3, [r7, #8]
|
|
80083a8: 3318 adds r3, #24
|
|
80083aa: 4618 mov r0, r3
|
|
80083ac: f7ff fd23 bl 8007df6 <uxListRemove>
|
|
mtCOVERAGE_TEST_MARKER();
|
|
}
|
|
|
|
/* Place the unblocked task into the appropriate ready
|
|
list. */
|
|
prvAddTaskToReadyList( pxTCB );
|
|
80083b0: 68bb ldr r3, [r7, #8]
|
|
80083b2: 6adb ldr r3, [r3, #44] ; 0x2c
|
|
80083b4: 2201 movs r2, #1
|
|
80083b6: 409a lsls r2, r3
|
|
80083b8: 4b23 ldr r3, [pc, #140] ; (8008448 <xTaskIncrementTick+0x164>)
|
|
80083ba: 681b ldr r3, [r3, #0]
|
|
80083bc: 4313 orrs r3, r2
|
|
80083be: 4a22 ldr r2, [pc, #136] ; (8008448 <xTaskIncrementTick+0x164>)
|
|
80083c0: 6013 str r3, [r2, #0]
|
|
80083c2: 68bb ldr r3, [r7, #8]
|
|
80083c4: 6ada ldr r2, [r3, #44] ; 0x2c
|
|
80083c6: 4613 mov r3, r2
|
|
80083c8: 009b lsls r3, r3, #2
|
|
80083ca: 4413 add r3, r2
|
|
80083cc: 009b lsls r3, r3, #2
|
|
80083ce: 4a1f ldr r2, [pc, #124] ; (800844c <xTaskIncrementTick+0x168>)
|
|
80083d0: 441a add r2, r3
|
|
80083d2: 68bb ldr r3, [r7, #8]
|
|
80083d4: 3304 adds r3, #4
|
|
80083d6: 4619 mov r1, r3
|
|
80083d8: 4610 mov r0, r2
|
|
80083da: f7ff fcb1 bl 8007d40 <vListInsertEnd>
|
|
{
|
|
/* Preemption is on, but a context switch should
|
|
only be performed if the unblocked task has a
|
|
priority that is equal to or higher than the
|
|
currently executing task. */
|
|
if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
|
|
80083de: 68bb ldr r3, [r7, #8]
|
|
80083e0: 6ada ldr r2, [r3, #44] ; 0x2c
|
|
80083e2: 4b1b ldr r3, [pc, #108] ; (8008450 <xTaskIncrementTick+0x16c>)
|
|
80083e4: 681b ldr r3, [r3, #0]
|
|
80083e6: 6adb ldr r3, [r3, #44] ; 0x2c
|
|
80083e8: 429a cmp r2, r3
|
|
80083ea: d3b4 bcc.n 8008356 <xTaskIncrementTick+0x72>
|
|
{
|
|
xSwitchRequired = pdTRUE;
|
|
80083ec: 2301 movs r3, #1
|
|
80083ee: 617b str r3, [r7, #20]
|
|
if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
|
|
80083f0: e7b1 b.n 8008356 <xTaskIncrementTick+0x72>
|
|
/* Tasks of equal priority to the currently running task will share
|
|
processing time (time slice) if preemption is on, and the application
|
|
writer has not explicitly turned time slicing off. */
|
|
#if ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) )
|
|
{
|
|
if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ pxCurrentTCB->uxPriority ] ) ) > ( UBaseType_t ) 1 )
|
|
80083f2: 4b17 ldr r3, [pc, #92] ; (8008450 <xTaskIncrementTick+0x16c>)
|
|
80083f4: 681b ldr r3, [r3, #0]
|
|
80083f6: 6ada ldr r2, [r3, #44] ; 0x2c
|
|
80083f8: 4914 ldr r1, [pc, #80] ; (800844c <xTaskIncrementTick+0x168>)
|
|
80083fa: 4613 mov r3, r2
|
|
80083fc: 009b lsls r3, r3, #2
|
|
80083fe: 4413 add r3, r2
|
|
8008400: 009b lsls r3, r3, #2
|
|
8008402: 440b add r3, r1
|
|
8008404: 681b ldr r3, [r3, #0]
|
|
8008406: 2b01 cmp r3, #1
|
|
8008408: d907 bls.n 800841a <xTaskIncrementTick+0x136>
|
|
{
|
|
xSwitchRequired = pdTRUE;
|
|
800840a: 2301 movs r3, #1
|
|
800840c: 617b str r3, [r7, #20]
|
|
800840e: e004 b.n 800841a <xTaskIncrementTick+0x136>
|
|
}
|
|
#endif /* configUSE_TICK_HOOK */
|
|
}
|
|
else
|
|
{
|
|
++uxPendedTicks;
|
|
8008410: 4b10 ldr r3, [pc, #64] ; (8008454 <xTaskIncrementTick+0x170>)
|
|
8008412: 681b ldr r3, [r3, #0]
|
|
8008414: 3301 adds r3, #1
|
|
8008416: 4a0f ldr r2, [pc, #60] ; (8008454 <xTaskIncrementTick+0x170>)
|
|
8008418: 6013 str r3, [r2, #0]
|
|
#endif
|
|
}
|
|
|
|
#if ( configUSE_PREEMPTION == 1 )
|
|
{
|
|
if( xYieldPending != pdFALSE )
|
|
800841a: 4b0f ldr r3, [pc, #60] ; (8008458 <xTaskIncrementTick+0x174>)
|
|
800841c: 681b ldr r3, [r3, #0]
|
|
800841e: 2b00 cmp r3, #0
|
|
8008420: d001 beq.n 8008426 <xTaskIncrementTick+0x142>
|
|
{
|
|
xSwitchRequired = pdTRUE;
|
|
8008422: 2301 movs r3, #1
|
|
8008424: 617b str r3, [r7, #20]
|
|
mtCOVERAGE_TEST_MARKER();
|
|
}
|
|
}
|
|
#endif /* configUSE_PREEMPTION */
|
|
|
|
return xSwitchRequired;
|
|
8008426: 697b ldr r3, [r7, #20]
|
|
}
|
|
8008428: 4618 mov r0, r3
|
|
800842a: 3718 adds r7, #24
|
|
800842c: 46bd mov sp, r7
|
|
800842e: bd80 pop {r7, pc}
|
|
8008430: 20000350 .word 0x20000350
|
|
8008434: 2000032c .word 0x2000032c
|
|
8008438: 200002e0 .word 0x200002e0
|
|
800843c: 200002e4 .word 0x200002e4
|
|
8008440: 20000340 .word 0x20000340
|
|
8008444: 20000348 .word 0x20000348
|
|
8008448: 20000330 .word 0x20000330
|
|
800844c: 2000022c .word 0x2000022c
|
|
8008450: 20000228 .word 0x20000228
|
|
8008454: 20000338 .word 0x20000338
|
|
8008458: 2000033c .word 0x2000033c
|
|
|
|
0800845c <vTaskSwitchContext>:
|
|
|
|
#endif /* configUSE_APPLICATION_TASK_TAG */
|
|
/*-----------------------------------------------------------*/
|
|
|
|
void vTaskSwitchContext( void )
|
|
{
|
|
800845c: b480 push {r7}
|
|
800845e: b087 sub sp, #28
|
|
8008460: af00 add r7, sp, #0
|
|
if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE )
|
|
8008462: 4b26 ldr r3, [pc, #152] ; (80084fc <vTaskSwitchContext+0xa0>)
|
|
8008464: 681b ldr r3, [r3, #0]
|
|
8008466: 2b00 cmp r3, #0
|
|
8008468: d003 beq.n 8008472 <vTaskSwitchContext+0x16>
|
|
{
|
|
/* The scheduler is currently suspended - do not allow a context
|
|
switch. */
|
|
xYieldPending = pdTRUE;
|
|
800846a: 4b25 ldr r3, [pc, #148] ; (8008500 <vTaskSwitchContext+0xa4>)
|
|
800846c: 2201 movs r2, #1
|
|
800846e: 601a str r2, [r3, #0]
|
|
structure specific to this task. */
|
|
_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
|
|
}
|
|
#endif /* configUSE_NEWLIB_REENTRANT */
|
|
}
|
|
}
|
|
8008470: e03e b.n 80084f0 <vTaskSwitchContext+0x94>
|
|
xYieldPending = pdFALSE;
|
|
8008472: 4b23 ldr r3, [pc, #140] ; (8008500 <vTaskSwitchContext+0xa4>)
|
|
8008474: 2200 movs r2, #0
|
|
8008476: 601a str r2, [r3, #0]
|
|
taskSELECT_HIGHEST_PRIORITY_TASK();
|
|
8008478: 4b22 ldr r3, [pc, #136] ; (8008504 <vTaskSwitchContext+0xa8>)
|
|
800847a: 681b ldr r3, [r3, #0]
|
|
800847c: 60fb str r3, [r7, #12]
|
|
__asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
|
|
800847e: 68fb ldr r3, [r7, #12]
|
|
8008480: fab3 f383 clz r3, r3
|
|
8008484: 72fb strb r3, [r7, #11]
|
|
return ucReturn;
|
|
8008486: 7afb ldrb r3, [r7, #11]
|
|
8008488: f1c3 031f rsb r3, r3, #31
|
|
800848c: 617b str r3, [r7, #20]
|
|
800848e: 491e ldr r1, [pc, #120] ; (8008508 <vTaskSwitchContext+0xac>)
|
|
8008490: 697a ldr r2, [r7, #20]
|
|
8008492: 4613 mov r3, r2
|
|
8008494: 009b lsls r3, r3, #2
|
|
8008496: 4413 add r3, r2
|
|
8008498: 009b lsls r3, r3, #2
|
|
800849a: 440b add r3, r1
|
|
800849c: 681b ldr r3, [r3, #0]
|
|
800849e: 2b00 cmp r3, #0
|
|
80084a0: d109 bne.n 80084b6 <vTaskSwitchContext+0x5a>
|
|
__asm volatile
|
|
80084a2: f04f 0350 mov.w r3, #80 ; 0x50
|
|
80084a6: f383 8811 msr BASEPRI, r3
|
|
80084aa: f3bf 8f6f isb sy
|
|
80084ae: f3bf 8f4f dsb sy
|
|
80084b2: 607b str r3, [r7, #4]
|
|
80084b4: e7fe b.n 80084b4 <vTaskSwitchContext+0x58>
|
|
80084b6: 697a ldr r2, [r7, #20]
|
|
80084b8: 4613 mov r3, r2
|
|
80084ba: 009b lsls r3, r3, #2
|
|
80084bc: 4413 add r3, r2
|
|
80084be: 009b lsls r3, r3, #2
|
|
80084c0: 4a11 ldr r2, [pc, #68] ; (8008508 <vTaskSwitchContext+0xac>)
|
|
80084c2: 4413 add r3, r2
|
|
80084c4: 613b str r3, [r7, #16]
|
|
80084c6: 693b ldr r3, [r7, #16]
|
|
80084c8: 685b ldr r3, [r3, #4]
|
|
80084ca: 685a ldr r2, [r3, #4]
|
|
80084cc: 693b ldr r3, [r7, #16]
|
|
80084ce: 605a str r2, [r3, #4]
|
|
80084d0: 693b ldr r3, [r7, #16]
|
|
80084d2: 685a ldr r2, [r3, #4]
|
|
80084d4: 693b ldr r3, [r7, #16]
|
|
80084d6: 3308 adds r3, #8
|
|
80084d8: 429a cmp r2, r3
|
|
80084da: d104 bne.n 80084e6 <vTaskSwitchContext+0x8a>
|
|
80084dc: 693b ldr r3, [r7, #16]
|
|
80084de: 685b ldr r3, [r3, #4]
|
|
80084e0: 685a ldr r2, [r3, #4]
|
|
80084e2: 693b ldr r3, [r7, #16]
|
|
80084e4: 605a str r2, [r3, #4]
|
|
80084e6: 693b ldr r3, [r7, #16]
|
|
80084e8: 685b ldr r3, [r3, #4]
|
|
80084ea: 68db ldr r3, [r3, #12]
|
|
80084ec: 4a07 ldr r2, [pc, #28] ; (800850c <vTaskSwitchContext+0xb0>)
|
|
80084ee: 6013 str r3, [r2, #0]
|
|
}
|
|
80084f0: bf00 nop
|
|
80084f2: 371c adds r7, #28
|
|
80084f4: 46bd mov sp, r7
|
|
80084f6: bc80 pop {r7}
|
|
80084f8: 4770 bx lr
|
|
80084fa: bf00 nop
|
|
80084fc: 20000350 .word 0x20000350
|
|
8008500: 2000033c .word 0x2000033c
|
|
8008504: 20000330 .word 0x20000330
|
|
8008508: 2000022c .word 0x2000022c
|
|
800850c: 20000228 .word 0x20000228
|
|
|
|
08008510 <prvIdleTask>:
|
|
*
|
|
* void prvIdleTask( void *pvParameters );
|
|
*
|
|
*/
|
|
static portTASK_FUNCTION( prvIdleTask, pvParameters )
|
|
{
|
|
8008510: b580 push {r7, lr}
|
|
8008512: b082 sub sp, #8
|
|
8008514: af00 add r7, sp, #0
|
|
8008516: 6078 str r0, [r7, #4]
|
|
|
|
for( ;; )
|
|
{
|
|
/* See if any tasks have deleted themselves - if so then the idle task
|
|
is responsible for freeing the deleted task's TCB and stack. */
|
|
prvCheckTasksWaitingTermination();
|
|
8008518: f000 f852 bl 80085c0 <prvCheckTasksWaitingTermination>
|
|
|
|
A critical region is not required here as we are just reading from
|
|
the list, and an occasional incorrect value will not matter. If
|
|
the ready list at the idle priority contains more than one task
|
|
then a task other than the idle task is ready to execute. */
|
|
if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( UBaseType_t ) 1 )
|
|
800851c: 4b06 ldr r3, [pc, #24] ; (8008538 <prvIdleTask+0x28>)
|
|
800851e: 681b ldr r3, [r3, #0]
|
|
8008520: 2b01 cmp r3, #1
|
|
8008522: d9f9 bls.n 8008518 <prvIdleTask+0x8>
|
|
{
|
|
taskYIELD();
|
|
8008524: 4b05 ldr r3, [pc, #20] ; (800853c <prvIdleTask+0x2c>)
|
|
8008526: f04f 5280 mov.w r2, #268435456 ; 0x10000000
|
|
800852a: 601a str r2, [r3, #0]
|
|
800852c: f3bf 8f4f dsb sy
|
|
8008530: f3bf 8f6f isb sy
|
|
prvCheckTasksWaitingTermination();
|
|
8008534: e7f0 b.n 8008518 <prvIdleTask+0x8>
|
|
8008536: bf00 nop
|
|
8008538: 2000022c .word 0x2000022c
|
|
800853c: e000ed04 .word 0xe000ed04
|
|
|
|
08008540 <prvInitialiseTaskLists>:
|
|
|
|
#endif /* portUSING_MPU_WRAPPERS */
|
|
/*-----------------------------------------------------------*/
|
|
|
|
static void prvInitialiseTaskLists( void )
|
|
{
|
|
8008540: b580 push {r7, lr}
|
|
8008542: b082 sub sp, #8
|
|
8008544: af00 add r7, sp, #0
|
|
UBaseType_t uxPriority;
|
|
|
|
for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
|
|
8008546: 2300 movs r3, #0
|
|
8008548: 607b str r3, [r7, #4]
|
|
800854a: e00c b.n 8008566 <prvInitialiseTaskLists+0x26>
|
|
{
|
|
vListInitialise( &( pxReadyTasksLists[ uxPriority ] ) );
|
|
800854c: 687a ldr r2, [r7, #4]
|
|
800854e: 4613 mov r3, r2
|
|
8008550: 009b lsls r3, r3, #2
|
|
8008552: 4413 add r3, r2
|
|
8008554: 009b lsls r3, r3, #2
|
|
8008556: 4a12 ldr r2, [pc, #72] ; (80085a0 <prvInitialiseTaskLists+0x60>)
|
|
8008558: 4413 add r3, r2
|
|
800855a: 4618 mov r0, r3
|
|
800855c: f7ff fbc5 bl 8007cea <vListInitialise>
|
|
for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
|
|
8008560: 687b ldr r3, [r7, #4]
|
|
8008562: 3301 adds r3, #1
|
|
8008564: 607b str r3, [r7, #4]
|
|
8008566: 687b ldr r3, [r7, #4]
|
|
8008568: 2b06 cmp r3, #6
|
|
800856a: d9ef bls.n 800854c <prvInitialiseTaskLists+0xc>
|
|
}
|
|
|
|
vListInitialise( &xDelayedTaskList1 );
|
|
800856c: 480d ldr r0, [pc, #52] ; (80085a4 <prvInitialiseTaskLists+0x64>)
|
|
800856e: f7ff fbbc bl 8007cea <vListInitialise>
|
|
vListInitialise( &xDelayedTaskList2 );
|
|
8008572: 480d ldr r0, [pc, #52] ; (80085a8 <prvInitialiseTaskLists+0x68>)
|
|
8008574: f7ff fbb9 bl 8007cea <vListInitialise>
|
|
vListInitialise( &xPendingReadyList );
|
|
8008578: 480c ldr r0, [pc, #48] ; (80085ac <prvInitialiseTaskLists+0x6c>)
|
|
800857a: f7ff fbb6 bl 8007cea <vListInitialise>
|
|
|
|
#if ( INCLUDE_vTaskDelete == 1 )
|
|
{
|
|
vListInitialise( &xTasksWaitingTermination );
|
|
800857e: 480c ldr r0, [pc, #48] ; (80085b0 <prvInitialiseTaskLists+0x70>)
|
|
8008580: f7ff fbb3 bl 8007cea <vListInitialise>
|
|
}
|
|
#endif /* INCLUDE_vTaskDelete */
|
|
|
|
#if ( INCLUDE_vTaskSuspend == 1 )
|
|
{
|
|
vListInitialise( &xSuspendedTaskList );
|
|
8008584: 480b ldr r0, [pc, #44] ; (80085b4 <prvInitialiseTaskLists+0x74>)
|
|
8008586: f7ff fbb0 bl 8007cea <vListInitialise>
|
|
}
|
|
#endif /* INCLUDE_vTaskSuspend */
|
|
|
|
/* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList
|
|
using list2. */
|
|
pxDelayedTaskList = &xDelayedTaskList1;
|
|
800858a: 4b0b ldr r3, [pc, #44] ; (80085b8 <prvInitialiseTaskLists+0x78>)
|
|
800858c: 4a05 ldr r2, [pc, #20] ; (80085a4 <prvInitialiseTaskLists+0x64>)
|
|
800858e: 601a str r2, [r3, #0]
|
|
pxOverflowDelayedTaskList = &xDelayedTaskList2;
|
|
8008590: 4b0a ldr r3, [pc, #40] ; (80085bc <prvInitialiseTaskLists+0x7c>)
|
|
8008592: 4a05 ldr r2, [pc, #20] ; (80085a8 <prvInitialiseTaskLists+0x68>)
|
|
8008594: 601a str r2, [r3, #0]
|
|
}
|
|
8008596: bf00 nop
|
|
8008598: 3708 adds r7, #8
|
|
800859a: 46bd mov sp, r7
|
|
800859c: bd80 pop {r7, pc}
|
|
800859e: bf00 nop
|
|
80085a0: 2000022c .word 0x2000022c
|
|
80085a4: 200002b8 .word 0x200002b8
|
|
80085a8: 200002cc .word 0x200002cc
|
|
80085ac: 200002e8 .word 0x200002e8
|
|
80085b0: 200002fc .word 0x200002fc
|
|
80085b4: 20000314 .word 0x20000314
|
|
80085b8: 200002e0 .word 0x200002e0
|
|
80085bc: 200002e4 .word 0x200002e4
|
|
|
|
080085c0 <prvCheckTasksWaitingTermination>:
|
|
/*-----------------------------------------------------------*/
|
|
|
|
static void prvCheckTasksWaitingTermination( void )
|
|
{
|
|
80085c0: b580 push {r7, lr}
|
|
80085c2: b082 sub sp, #8
|
|
80085c4: af00 add r7, sp, #0
|
|
{
|
|
TCB_t *pxTCB;
|
|
|
|
/* uxDeletedTasksWaitingCleanUp is used to prevent vTaskSuspendAll()
|
|
being called too often in the idle task. */
|
|
while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
|
|
80085c6: e019 b.n 80085fc <prvCheckTasksWaitingTermination+0x3c>
|
|
{
|
|
taskENTER_CRITICAL();
|
|
80085c8: f000 f9c6 bl 8008958 <vPortEnterCritical>
|
|
{
|
|
pxTCB = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) );
|
|
80085cc: 4b0f ldr r3, [pc, #60] ; (800860c <prvCheckTasksWaitingTermination+0x4c>)
|
|
80085ce: 68db ldr r3, [r3, #12]
|
|
80085d0: 68db ldr r3, [r3, #12]
|
|
80085d2: 607b str r3, [r7, #4]
|
|
( void ) uxListRemove( &( pxTCB->xStateListItem ) );
|
|
80085d4: 687b ldr r3, [r7, #4]
|
|
80085d6: 3304 adds r3, #4
|
|
80085d8: 4618 mov r0, r3
|
|
80085da: f7ff fc0c bl 8007df6 <uxListRemove>
|
|
--uxCurrentNumberOfTasks;
|
|
80085de: 4b0c ldr r3, [pc, #48] ; (8008610 <prvCheckTasksWaitingTermination+0x50>)
|
|
80085e0: 681b ldr r3, [r3, #0]
|
|
80085e2: 3b01 subs r3, #1
|
|
80085e4: 4a0a ldr r2, [pc, #40] ; (8008610 <prvCheckTasksWaitingTermination+0x50>)
|
|
80085e6: 6013 str r3, [r2, #0]
|
|
--uxDeletedTasksWaitingCleanUp;
|
|
80085e8: 4b0a ldr r3, [pc, #40] ; (8008614 <prvCheckTasksWaitingTermination+0x54>)
|
|
80085ea: 681b ldr r3, [r3, #0]
|
|
80085ec: 3b01 subs r3, #1
|
|
80085ee: 4a09 ldr r2, [pc, #36] ; (8008614 <prvCheckTasksWaitingTermination+0x54>)
|
|
80085f0: 6013 str r3, [r2, #0]
|
|
}
|
|
taskEXIT_CRITICAL();
|
|
80085f2: f000 f9df bl 80089b4 <vPortExitCritical>
|
|
|
|
prvDeleteTCB( pxTCB );
|
|
80085f6: 6878 ldr r0, [r7, #4]
|
|
80085f8: f000 f80e bl 8008618 <prvDeleteTCB>
|
|
while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
|
|
80085fc: 4b05 ldr r3, [pc, #20] ; (8008614 <prvCheckTasksWaitingTermination+0x54>)
|
|
80085fe: 681b ldr r3, [r3, #0]
|
|
8008600: 2b00 cmp r3, #0
|
|
8008602: d1e1 bne.n 80085c8 <prvCheckTasksWaitingTermination+0x8>
|
|
}
|
|
}
|
|
#endif /* INCLUDE_vTaskDelete */
|
|
}
|
|
8008604: bf00 nop
|
|
8008606: 3708 adds r7, #8
|
|
8008608: 46bd mov sp, r7
|
|
800860a: bd80 pop {r7, pc}
|
|
800860c: 200002fc .word 0x200002fc
|
|
8008610: 20000328 .word 0x20000328
|
|
8008614: 20000310 .word 0x20000310
|
|
|
|
08008618 <prvDeleteTCB>:
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if ( INCLUDE_vTaskDelete == 1 )
|
|
|
|
static void prvDeleteTCB( TCB_t *pxTCB )
|
|
{
|
|
8008618: b580 push {r7, lr}
|
|
800861a: b082 sub sp, #8
|
|
800861c: af00 add r7, sp, #0
|
|
800861e: 6078 str r0, [r7, #4]
|
|
|
|
#if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) && ( portUSING_MPU_WRAPPERS == 0 ) )
|
|
{
|
|
/* The task can only have been allocated dynamically - free both
|
|
the stack and TCB. */
|
|
vPortFree( pxTCB->pxStack );
|
|
8008620: 687b ldr r3, [r7, #4]
|
|
8008622: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
8008624: 4618 mov r0, r3
|
|
8008626: f000 fb13 bl 8008c50 <vPortFree>
|
|
vPortFree( pxTCB );
|
|
800862a: 6878 ldr r0, [r7, #4]
|
|
800862c: f000 fb10 bl 8008c50 <vPortFree>
|
|
configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB );
|
|
mtCOVERAGE_TEST_MARKER();
|
|
}
|
|
}
|
|
#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
|
|
}
|
|
8008630: bf00 nop
|
|
8008632: 3708 adds r7, #8
|
|
8008634: 46bd mov sp, r7
|
|
8008636: bd80 pop {r7, pc}
|
|
|
|
08008638 <prvResetNextTaskUnblockTime>:
|
|
|
|
#endif /* INCLUDE_vTaskDelete */
|
|
/*-----------------------------------------------------------*/
|
|
|
|
static void prvResetNextTaskUnblockTime( void )
|
|
{
|
|
8008638: b480 push {r7}
|
|
800863a: b083 sub sp, #12
|
|
800863c: af00 add r7, sp, #0
|
|
TCB_t *pxTCB;
|
|
|
|
if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
|
|
800863e: 4b0e ldr r3, [pc, #56] ; (8008678 <prvResetNextTaskUnblockTime+0x40>)
|
|
8008640: 681b ldr r3, [r3, #0]
|
|
8008642: 681b ldr r3, [r3, #0]
|
|
8008644: 2b00 cmp r3, #0
|
|
8008646: d101 bne.n 800864c <prvResetNextTaskUnblockTime+0x14>
|
|
8008648: 2301 movs r3, #1
|
|
800864a: e000 b.n 800864e <prvResetNextTaskUnblockTime+0x16>
|
|
800864c: 2300 movs r3, #0
|
|
800864e: 2b00 cmp r3, #0
|
|
8008650: d004 beq.n 800865c <prvResetNextTaskUnblockTime+0x24>
|
|
{
|
|
/* The new current delayed list is empty. Set xNextTaskUnblockTime to
|
|
the maximum possible value so it is extremely unlikely that the
|
|
if( xTickCount >= xNextTaskUnblockTime ) test will pass until
|
|
there is an item in the delayed list. */
|
|
xNextTaskUnblockTime = portMAX_DELAY;
|
|
8008652: 4b0a ldr r3, [pc, #40] ; (800867c <prvResetNextTaskUnblockTime+0x44>)
|
|
8008654: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
|
8008658: 601a str r2, [r3, #0]
|
|
which the task at the head of the delayed list should be removed
|
|
from the Blocked state. */
|
|
( pxTCB ) = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList );
|
|
xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
|
|
}
|
|
}
|
|
800865a: e008 b.n 800866e <prvResetNextTaskUnblockTime+0x36>
|
|
( pxTCB ) = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList );
|
|
800865c: 4b06 ldr r3, [pc, #24] ; (8008678 <prvResetNextTaskUnblockTime+0x40>)
|
|
800865e: 681b ldr r3, [r3, #0]
|
|
8008660: 68db ldr r3, [r3, #12]
|
|
8008662: 68db ldr r3, [r3, #12]
|
|
8008664: 607b str r3, [r7, #4]
|
|
xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
|
|
8008666: 687b ldr r3, [r7, #4]
|
|
8008668: 685b ldr r3, [r3, #4]
|
|
800866a: 4a04 ldr r2, [pc, #16] ; (800867c <prvResetNextTaskUnblockTime+0x44>)
|
|
800866c: 6013 str r3, [r2, #0]
|
|
}
|
|
800866e: bf00 nop
|
|
8008670: 370c adds r7, #12
|
|
8008672: 46bd mov sp, r7
|
|
8008674: bc80 pop {r7}
|
|
8008676: 4770 bx lr
|
|
8008678: 200002e0 .word 0x200002e0
|
|
800867c: 20000348 .word 0x20000348
|
|
|
|
08008680 <xTaskGetSchedulerState>:
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
|
|
|
|
BaseType_t xTaskGetSchedulerState( void )
|
|
{
|
|
8008680: b480 push {r7}
|
|
8008682: b083 sub sp, #12
|
|
8008684: af00 add r7, sp, #0
|
|
BaseType_t xReturn;
|
|
|
|
if( xSchedulerRunning == pdFALSE )
|
|
8008686: 4b0b ldr r3, [pc, #44] ; (80086b4 <xTaskGetSchedulerState+0x34>)
|
|
8008688: 681b ldr r3, [r3, #0]
|
|
800868a: 2b00 cmp r3, #0
|
|
800868c: d102 bne.n 8008694 <xTaskGetSchedulerState+0x14>
|
|
{
|
|
xReturn = taskSCHEDULER_NOT_STARTED;
|
|
800868e: 2301 movs r3, #1
|
|
8008690: 607b str r3, [r7, #4]
|
|
8008692: e008 b.n 80086a6 <xTaskGetSchedulerState+0x26>
|
|
}
|
|
else
|
|
{
|
|
if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
|
|
8008694: 4b08 ldr r3, [pc, #32] ; (80086b8 <xTaskGetSchedulerState+0x38>)
|
|
8008696: 681b ldr r3, [r3, #0]
|
|
8008698: 2b00 cmp r3, #0
|
|
800869a: d102 bne.n 80086a2 <xTaskGetSchedulerState+0x22>
|
|
{
|
|
xReturn = taskSCHEDULER_RUNNING;
|
|
800869c: 2302 movs r3, #2
|
|
800869e: 607b str r3, [r7, #4]
|
|
80086a0: e001 b.n 80086a6 <xTaskGetSchedulerState+0x26>
|
|
}
|
|
else
|
|
{
|
|
xReturn = taskSCHEDULER_SUSPENDED;
|
|
80086a2: 2300 movs r3, #0
|
|
80086a4: 607b str r3, [r7, #4]
|
|
}
|
|
}
|
|
|
|
return xReturn;
|
|
80086a6: 687b ldr r3, [r7, #4]
|
|
}
|
|
80086a8: 4618 mov r0, r3
|
|
80086aa: 370c adds r7, #12
|
|
80086ac: 46bd mov sp, r7
|
|
80086ae: bc80 pop {r7}
|
|
80086b0: 4770 bx lr
|
|
80086b2: bf00 nop
|
|
80086b4: 20000334 .word 0x20000334
|
|
80086b8: 20000350 .word 0x20000350
|
|
|
|
080086bc <prvAddCurrentTaskToDelayedList>:
|
|
#endif /* configUSE_TASK_NOTIFICATIONS */
|
|
/*-----------------------------------------------------------*/
|
|
|
|
|
|
static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely )
|
|
{
|
|
80086bc: b580 push {r7, lr}
|
|
80086be: b084 sub sp, #16
|
|
80086c0: af00 add r7, sp, #0
|
|
80086c2: 6078 str r0, [r7, #4]
|
|
80086c4: 6039 str r1, [r7, #0]
|
|
TickType_t xTimeToWake;
|
|
const TickType_t xConstTickCount = xTickCount;
|
|
80086c6: 4b29 ldr r3, [pc, #164] ; (800876c <prvAddCurrentTaskToDelayedList+0xb0>)
|
|
80086c8: 681b ldr r3, [r3, #0]
|
|
80086ca: 60fb str r3, [r7, #12]
|
|
}
|
|
#endif
|
|
|
|
/* Remove the task from the ready list before adding it to the blocked list
|
|
as the same list item is used for both lists. */
|
|
if( uxListRemove( &( pxCurrentTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
|
|
80086cc: 4b28 ldr r3, [pc, #160] ; (8008770 <prvAddCurrentTaskToDelayedList+0xb4>)
|
|
80086ce: 681b ldr r3, [r3, #0]
|
|
80086d0: 3304 adds r3, #4
|
|
80086d2: 4618 mov r0, r3
|
|
80086d4: f7ff fb8f bl 8007df6 <uxListRemove>
|
|
80086d8: 4603 mov r3, r0
|
|
80086da: 2b00 cmp r3, #0
|
|
80086dc: d10b bne.n 80086f6 <prvAddCurrentTaskToDelayedList+0x3a>
|
|
{
|
|
/* The current task must be in a ready list, so there is no need to
|
|
check, and the port reset macro can be called directly. */
|
|
portRESET_READY_PRIORITY( pxCurrentTCB->uxPriority, uxTopReadyPriority );
|
|
80086de: 4b24 ldr r3, [pc, #144] ; (8008770 <prvAddCurrentTaskToDelayedList+0xb4>)
|
|
80086e0: 681b ldr r3, [r3, #0]
|
|
80086e2: 6adb ldr r3, [r3, #44] ; 0x2c
|
|
80086e4: 2201 movs r2, #1
|
|
80086e6: fa02 f303 lsl.w r3, r2, r3
|
|
80086ea: 43da mvns r2, r3
|
|
80086ec: 4b21 ldr r3, [pc, #132] ; (8008774 <prvAddCurrentTaskToDelayedList+0xb8>)
|
|
80086ee: 681b ldr r3, [r3, #0]
|
|
80086f0: 4013 ands r3, r2
|
|
80086f2: 4a20 ldr r2, [pc, #128] ; (8008774 <prvAddCurrentTaskToDelayedList+0xb8>)
|
|
80086f4: 6013 str r3, [r2, #0]
|
|
mtCOVERAGE_TEST_MARKER();
|
|
}
|
|
|
|
#if ( INCLUDE_vTaskSuspend == 1 )
|
|
{
|
|
if( ( xTicksToWait == portMAX_DELAY ) && ( xCanBlockIndefinitely != pdFALSE ) )
|
|
80086f6: 687b ldr r3, [r7, #4]
|
|
80086f8: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
|
80086fc: d10a bne.n 8008714 <prvAddCurrentTaskToDelayedList+0x58>
|
|
80086fe: 683b ldr r3, [r7, #0]
|
|
8008700: 2b00 cmp r3, #0
|
|
8008702: d007 beq.n 8008714 <prvAddCurrentTaskToDelayedList+0x58>
|
|
{
|
|
/* Add the task to the suspended task list instead of a delayed task
|
|
list to ensure it is not woken by a timing event. It will block
|
|
indefinitely. */
|
|
vListInsertEnd( &xSuspendedTaskList, &( pxCurrentTCB->xStateListItem ) );
|
|
8008704: 4b1a ldr r3, [pc, #104] ; (8008770 <prvAddCurrentTaskToDelayedList+0xb4>)
|
|
8008706: 681b ldr r3, [r3, #0]
|
|
8008708: 3304 adds r3, #4
|
|
800870a: 4619 mov r1, r3
|
|
800870c: 481a ldr r0, [pc, #104] ; (8008778 <prvAddCurrentTaskToDelayedList+0xbc>)
|
|
800870e: f7ff fb17 bl 8007d40 <vListInsertEnd>
|
|
|
|
/* Avoid compiler warning when INCLUDE_vTaskSuspend is not 1. */
|
|
( void ) xCanBlockIndefinitely;
|
|
}
|
|
#endif /* INCLUDE_vTaskSuspend */
|
|
}
|
|
8008712: e026 b.n 8008762 <prvAddCurrentTaskToDelayedList+0xa6>
|
|
xTimeToWake = xConstTickCount + xTicksToWait;
|
|
8008714: 68fa ldr r2, [r7, #12]
|
|
8008716: 687b ldr r3, [r7, #4]
|
|
8008718: 4413 add r3, r2
|
|
800871a: 60bb str r3, [r7, #8]
|
|
listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake );
|
|
800871c: 4b14 ldr r3, [pc, #80] ; (8008770 <prvAddCurrentTaskToDelayedList+0xb4>)
|
|
800871e: 681b ldr r3, [r3, #0]
|
|
8008720: 68ba ldr r2, [r7, #8]
|
|
8008722: 605a str r2, [r3, #4]
|
|
if( xTimeToWake < xConstTickCount )
|
|
8008724: 68ba ldr r2, [r7, #8]
|
|
8008726: 68fb ldr r3, [r7, #12]
|
|
8008728: 429a cmp r2, r3
|
|
800872a: d209 bcs.n 8008740 <prvAddCurrentTaskToDelayedList+0x84>
|
|
vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
|
|
800872c: 4b13 ldr r3, [pc, #76] ; (800877c <prvAddCurrentTaskToDelayedList+0xc0>)
|
|
800872e: 681a ldr r2, [r3, #0]
|
|
8008730: 4b0f ldr r3, [pc, #60] ; (8008770 <prvAddCurrentTaskToDelayedList+0xb4>)
|
|
8008732: 681b ldr r3, [r3, #0]
|
|
8008734: 3304 adds r3, #4
|
|
8008736: 4619 mov r1, r3
|
|
8008738: 4610 mov r0, r2
|
|
800873a: f7ff fb24 bl 8007d86 <vListInsert>
|
|
}
|
|
800873e: e010 b.n 8008762 <prvAddCurrentTaskToDelayedList+0xa6>
|
|
vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
|
|
8008740: 4b0f ldr r3, [pc, #60] ; (8008780 <prvAddCurrentTaskToDelayedList+0xc4>)
|
|
8008742: 681a ldr r2, [r3, #0]
|
|
8008744: 4b0a ldr r3, [pc, #40] ; (8008770 <prvAddCurrentTaskToDelayedList+0xb4>)
|
|
8008746: 681b ldr r3, [r3, #0]
|
|
8008748: 3304 adds r3, #4
|
|
800874a: 4619 mov r1, r3
|
|
800874c: 4610 mov r0, r2
|
|
800874e: f7ff fb1a bl 8007d86 <vListInsert>
|
|
if( xTimeToWake < xNextTaskUnblockTime )
|
|
8008752: 4b0c ldr r3, [pc, #48] ; (8008784 <prvAddCurrentTaskToDelayedList+0xc8>)
|
|
8008754: 681b ldr r3, [r3, #0]
|
|
8008756: 68ba ldr r2, [r7, #8]
|
|
8008758: 429a cmp r2, r3
|
|
800875a: d202 bcs.n 8008762 <prvAddCurrentTaskToDelayedList+0xa6>
|
|
xNextTaskUnblockTime = xTimeToWake;
|
|
800875c: 4a09 ldr r2, [pc, #36] ; (8008784 <prvAddCurrentTaskToDelayedList+0xc8>)
|
|
800875e: 68bb ldr r3, [r7, #8]
|
|
8008760: 6013 str r3, [r2, #0]
|
|
}
|
|
8008762: bf00 nop
|
|
8008764: 3710 adds r7, #16
|
|
8008766: 46bd mov sp, r7
|
|
8008768: bd80 pop {r7, pc}
|
|
800876a: bf00 nop
|
|
800876c: 2000032c .word 0x2000032c
|
|
8008770: 20000228 .word 0x20000228
|
|
8008774: 20000330 .word 0x20000330
|
|
8008778: 20000314 .word 0x20000314
|
|
800877c: 200002e4 .word 0x200002e4
|
|
8008780: 200002e0 .word 0x200002e0
|
|
8008784: 20000348 .word 0x20000348
|
|
|
|
08008788 <pxPortInitialiseStack>:
|
|
|
|
/*
|
|
* See header file for description.
|
|
*/
|
|
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
|
|
{
|
|
8008788: b480 push {r7}
|
|
800878a: b085 sub sp, #20
|
|
800878c: af00 add r7, sp, #0
|
|
800878e: 60f8 str r0, [r7, #12]
|
|
8008790: 60b9 str r1, [r7, #8]
|
|
8008792: 607a str r2, [r7, #4]
|
|
/* Simulate the stack frame as it would be created by a context switch
|
|
interrupt. */
|
|
pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
|
|
8008794: 68fb ldr r3, [r7, #12]
|
|
8008796: 3b04 subs r3, #4
|
|
8008798: 60fb str r3, [r7, #12]
|
|
*pxTopOfStack = portINITIAL_XPSR; /* xPSR */
|
|
800879a: 68fb ldr r3, [r7, #12]
|
|
800879c: f04f 7280 mov.w r2, #16777216 ; 0x1000000
|
|
80087a0: 601a str r2, [r3, #0]
|
|
pxTopOfStack--;
|
|
80087a2: 68fb ldr r3, [r7, #12]
|
|
80087a4: 3b04 subs r3, #4
|
|
80087a6: 60fb str r3, [r7, #12]
|
|
*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
|
|
80087a8: 68bb ldr r3, [r7, #8]
|
|
80087aa: f023 0201 bic.w r2, r3, #1
|
|
80087ae: 68fb ldr r3, [r7, #12]
|
|
80087b0: 601a str r2, [r3, #0]
|
|
pxTopOfStack--;
|
|
80087b2: 68fb ldr r3, [r7, #12]
|
|
80087b4: 3b04 subs r3, #4
|
|
80087b6: 60fb str r3, [r7, #12]
|
|
*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
|
|
80087b8: 4a08 ldr r2, [pc, #32] ; (80087dc <pxPortInitialiseStack+0x54>)
|
|
80087ba: 68fb ldr r3, [r7, #12]
|
|
80087bc: 601a str r2, [r3, #0]
|
|
pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
|
|
80087be: 68fb ldr r3, [r7, #12]
|
|
80087c0: 3b14 subs r3, #20
|
|
80087c2: 60fb str r3, [r7, #12]
|
|
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
|
|
80087c4: 687a ldr r2, [r7, #4]
|
|
80087c6: 68fb ldr r3, [r7, #12]
|
|
80087c8: 601a str r2, [r3, #0]
|
|
pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
|
|
80087ca: 68fb ldr r3, [r7, #12]
|
|
80087cc: 3b20 subs r3, #32
|
|
80087ce: 60fb str r3, [r7, #12]
|
|
|
|
return pxTopOfStack;
|
|
80087d0: 68fb ldr r3, [r7, #12]
|
|
}
|
|
80087d2: 4618 mov r0, r3
|
|
80087d4: 3714 adds r7, #20
|
|
80087d6: 46bd mov sp, r7
|
|
80087d8: bc80 pop {r7}
|
|
80087da: 4770 bx lr
|
|
80087dc: 080087e1 .word 0x080087e1
|
|
|
|
080087e0 <prvTaskExitError>:
|
|
/*-----------------------------------------------------------*/
|
|
|
|
static void prvTaskExitError( void )
|
|
{
|
|
80087e0: b480 push {r7}
|
|
80087e2: b085 sub sp, #20
|
|
80087e4: af00 add r7, sp, #0
|
|
volatile uint32_t ulDummy = 0UL;
|
|
80087e6: 2300 movs r3, #0
|
|
80087e8: 607b str r3, [r7, #4]
|
|
its caller as there is nothing to return to. If a task wants to exit it
|
|
should instead call vTaskDelete( NULL ).
|
|
|
|
Artificially force an assert() to be triggered if configASSERT() is
|
|
defined, then stop here so application writers can catch the error. */
|
|
configASSERT( uxCriticalNesting == ~0UL );
|
|
80087ea: 4b10 ldr r3, [pc, #64] ; (800882c <prvTaskExitError+0x4c>)
|
|
80087ec: 681b ldr r3, [r3, #0]
|
|
80087ee: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
|
80087f2: d009 beq.n 8008808 <prvTaskExitError+0x28>
|
|
80087f4: f04f 0350 mov.w r3, #80 ; 0x50
|
|
80087f8: f383 8811 msr BASEPRI, r3
|
|
80087fc: f3bf 8f6f isb sy
|
|
8008800: f3bf 8f4f dsb sy
|
|
8008804: 60fb str r3, [r7, #12]
|
|
8008806: e7fe b.n 8008806 <prvTaskExitError+0x26>
|
|
8008808: f04f 0350 mov.w r3, #80 ; 0x50
|
|
800880c: f383 8811 msr BASEPRI, r3
|
|
8008810: f3bf 8f6f isb sy
|
|
8008814: f3bf 8f4f dsb sy
|
|
8008818: 60bb str r3, [r7, #8]
|
|
portDISABLE_INTERRUPTS();
|
|
while( ulDummy == 0 )
|
|
800881a: bf00 nop
|
|
800881c: 687b ldr r3, [r7, #4]
|
|
800881e: 2b00 cmp r3, #0
|
|
8008820: d0fc beq.n 800881c <prvTaskExitError+0x3c>
|
|
about code appearing after this function is called - making ulDummy
|
|
volatile makes the compiler think the function could return and
|
|
therefore not output an 'unreachable code' warning for code that appears
|
|
after it. */
|
|
}
|
|
}
|
|
8008822: bf00 nop
|
|
8008824: 3714 adds r7, #20
|
|
8008826: 46bd mov sp, r7
|
|
8008828: bc80 pop {r7}
|
|
800882a: 4770 bx lr
|
|
800882c: 20000130 .word 0x20000130
|
|
|
|
08008830 <SVC_Handler>:
|
|
/*-----------------------------------------------------------*/
|
|
|
|
void vPortSVCHandler( void )
|
|
{
|
|
__asm volatile (
|
|
8008830: 4b07 ldr r3, [pc, #28] ; (8008850 <pxCurrentTCBConst2>)
|
|
8008832: 6819 ldr r1, [r3, #0]
|
|
8008834: 6808 ldr r0, [r1, #0]
|
|
8008836: e8b0 0ff0 ldmia.w r0!, {r4, r5, r6, r7, r8, r9, sl, fp}
|
|
800883a: f380 8809 msr PSP, r0
|
|
800883e: f3bf 8f6f isb sy
|
|
8008842: f04f 0000 mov.w r0, #0
|
|
8008846: f380 8811 msr BASEPRI, r0
|
|
800884a: f04e 0e0d orr.w lr, lr, #13
|
|
800884e: 4770 bx lr
|
|
|
|
08008850 <pxCurrentTCBConst2>:
|
|
8008850: 20000228 .word 0x20000228
|
|
" bx r14 \n"
|
|
" \n"
|
|
" .align 4 \n"
|
|
"pxCurrentTCBConst2: .word pxCurrentTCB \n"
|
|
);
|
|
}
|
|
8008854: bf00 nop
|
|
8008856: bf00 nop
|
|
|
|
08008858 <prvPortStartFirstTask>:
|
|
/*-----------------------------------------------------------*/
|
|
|
|
static void prvPortStartFirstTask( void )
|
|
{
|
|
__asm volatile(
|
|
8008858: 4806 ldr r0, [pc, #24] ; (8008874 <prvPortStartFirstTask+0x1c>)
|
|
800885a: 6800 ldr r0, [r0, #0]
|
|
800885c: 6800 ldr r0, [r0, #0]
|
|
800885e: f380 8808 msr MSP, r0
|
|
8008862: b662 cpsie i
|
|
8008864: b661 cpsie f
|
|
8008866: f3bf 8f4f dsb sy
|
|
800886a: f3bf 8f6f isb sy
|
|
800886e: df00 svc 0
|
|
8008870: bf00 nop
|
|
" dsb \n"
|
|
" isb \n"
|
|
" svc 0 \n" /* System call to start first task. */
|
|
" nop \n"
|
|
);
|
|
}
|
|
8008872: bf00 nop
|
|
8008874: e000ed08 .word 0xe000ed08
|
|
|
|
08008878 <xPortStartScheduler>:
|
|
|
|
/*
|
|
* See header file for description.
|
|
*/
|
|
BaseType_t xPortStartScheduler( void )
|
|
{
|
|
8008878: b580 push {r7, lr}
|
|
800887a: b084 sub sp, #16
|
|
800887c: af00 add r7, sp, #0
|
|
configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
|
|
|
|
#if( configASSERT_DEFINED == 1 )
|
|
{
|
|
volatile uint32_t ulOriginalPriority;
|
|
volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
|
|
800887e: 4b31 ldr r3, [pc, #196] ; (8008944 <xPortStartScheduler+0xcc>)
|
|
8008880: 60fb str r3, [r7, #12]
|
|
functions can be called. ISR safe functions are those that end in
|
|
"FromISR". FreeRTOS maintains separate thread and ISR API functions to
|
|
ensure interrupt entry is as fast and simple as possible.
|
|
|
|
Save the interrupt priority value that is about to be clobbered. */
|
|
ulOriginalPriority = *pucFirstUserPriorityRegister;
|
|
8008882: 68fb ldr r3, [r7, #12]
|
|
8008884: 781b ldrb r3, [r3, #0]
|
|
8008886: b2db uxtb r3, r3
|
|
8008888: 607b str r3, [r7, #4]
|
|
|
|
/* Determine the number of priority bits available. First write to all
|
|
possible bits. */
|
|
*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
|
|
800888a: 68fb ldr r3, [r7, #12]
|
|
800888c: 22ff movs r2, #255 ; 0xff
|
|
800888e: 701a strb r2, [r3, #0]
|
|
|
|
/* Read the value back to see how many bits stuck. */
|
|
ucMaxPriorityValue = *pucFirstUserPriorityRegister;
|
|
8008890: 68fb ldr r3, [r7, #12]
|
|
8008892: 781b ldrb r3, [r3, #0]
|
|
8008894: b2db uxtb r3, r3
|
|
8008896: 70fb strb r3, [r7, #3]
|
|
|
|
/* Use the same mask on the maximum system call priority. */
|
|
ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
|
|
8008898: 78fb ldrb r3, [r7, #3]
|
|
800889a: b2db uxtb r3, r3
|
|
800889c: f003 0350 and.w r3, r3, #80 ; 0x50
|
|
80088a0: b2da uxtb r2, r3
|
|
80088a2: 4b29 ldr r3, [pc, #164] ; (8008948 <xPortStartScheduler+0xd0>)
|
|
80088a4: 701a strb r2, [r3, #0]
|
|
|
|
/* Calculate the maximum acceptable priority group value for the number
|
|
of bits read back. */
|
|
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
|
|
80088a6: 4b29 ldr r3, [pc, #164] ; (800894c <xPortStartScheduler+0xd4>)
|
|
80088a8: 2207 movs r2, #7
|
|
80088aa: 601a str r2, [r3, #0]
|
|
while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
|
|
80088ac: e009 b.n 80088c2 <xPortStartScheduler+0x4a>
|
|
{
|
|
ulMaxPRIGROUPValue--;
|
|
80088ae: 4b27 ldr r3, [pc, #156] ; (800894c <xPortStartScheduler+0xd4>)
|
|
80088b0: 681b ldr r3, [r3, #0]
|
|
80088b2: 3b01 subs r3, #1
|
|
80088b4: 4a25 ldr r2, [pc, #148] ; (800894c <xPortStartScheduler+0xd4>)
|
|
80088b6: 6013 str r3, [r2, #0]
|
|
ucMaxPriorityValue <<= ( uint8_t ) 0x01;
|
|
80088b8: 78fb ldrb r3, [r7, #3]
|
|
80088ba: b2db uxtb r3, r3
|
|
80088bc: 005b lsls r3, r3, #1
|
|
80088be: b2db uxtb r3, r3
|
|
80088c0: 70fb strb r3, [r7, #3]
|
|
while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
|
|
80088c2: 78fb ldrb r3, [r7, #3]
|
|
80088c4: b2db uxtb r3, r3
|
|
80088c6: f003 0380 and.w r3, r3, #128 ; 0x80
|
|
80088ca: 2b80 cmp r3, #128 ; 0x80
|
|
80088cc: d0ef beq.n 80088ae <xPortStartScheduler+0x36>
|
|
#ifdef configPRIO_BITS
|
|
{
|
|
/* Check the FreeRTOS configuration that defines the number of
|
|
priority bits matches the number of priority bits actually queried
|
|
from the hardware. */
|
|
configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
|
|
80088ce: 4b1f ldr r3, [pc, #124] ; (800894c <xPortStartScheduler+0xd4>)
|
|
80088d0: 681b ldr r3, [r3, #0]
|
|
80088d2: f1c3 0307 rsb r3, r3, #7
|
|
80088d6: 2b04 cmp r3, #4
|
|
80088d8: d009 beq.n 80088ee <xPortStartScheduler+0x76>
|
|
80088da: f04f 0350 mov.w r3, #80 ; 0x50
|
|
80088de: f383 8811 msr BASEPRI, r3
|
|
80088e2: f3bf 8f6f isb sy
|
|
80088e6: f3bf 8f4f dsb sy
|
|
80088ea: 60bb str r3, [r7, #8]
|
|
80088ec: e7fe b.n 80088ec <xPortStartScheduler+0x74>
|
|
}
|
|
#endif
|
|
|
|
/* Shift the priority group value back to its position within the AIRCR
|
|
register. */
|
|
ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
|
|
80088ee: 4b17 ldr r3, [pc, #92] ; (800894c <xPortStartScheduler+0xd4>)
|
|
80088f0: 681b ldr r3, [r3, #0]
|
|
80088f2: 021b lsls r3, r3, #8
|
|
80088f4: 4a15 ldr r2, [pc, #84] ; (800894c <xPortStartScheduler+0xd4>)
|
|
80088f6: 6013 str r3, [r2, #0]
|
|
ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
|
|
80088f8: 4b14 ldr r3, [pc, #80] ; (800894c <xPortStartScheduler+0xd4>)
|
|
80088fa: 681b ldr r3, [r3, #0]
|
|
80088fc: f403 63e0 and.w r3, r3, #1792 ; 0x700
|
|
8008900: 4a12 ldr r2, [pc, #72] ; (800894c <xPortStartScheduler+0xd4>)
|
|
8008902: 6013 str r3, [r2, #0]
|
|
|
|
/* Restore the clobbered interrupt priority register to its original
|
|
value. */
|
|
*pucFirstUserPriorityRegister = ulOriginalPriority;
|
|
8008904: 687b ldr r3, [r7, #4]
|
|
8008906: b2da uxtb r2, r3
|
|
8008908: 68fb ldr r3, [r7, #12]
|
|
800890a: 701a strb r2, [r3, #0]
|
|
}
|
|
#endif /* conifgASSERT_DEFINED */
|
|
|
|
/* Make PendSV and SysTick the lowest priority interrupts. */
|
|
portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
|
|
800890c: 4b10 ldr r3, [pc, #64] ; (8008950 <xPortStartScheduler+0xd8>)
|
|
800890e: 681b ldr r3, [r3, #0]
|
|
8008910: 4a0f ldr r2, [pc, #60] ; (8008950 <xPortStartScheduler+0xd8>)
|
|
8008912: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000
|
|
8008916: 6013 str r3, [r2, #0]
|
|
portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
|
|
8008918: 4b0d ldr r3, [pc, #52] ; (8008950 <xPortStartScheduler+0xd8>)
|
|
800891a: 681b ldr r3, [r3, #0]
|
|
800891c: 4a0c ldr r2, [pc, #48] ; (8008950 <xPortStartScheduler+0xd8>)
|
|
800891e: f043 4370 orr.w r3, r3, #4026531840 ; 0xf0000000
|
|
8008922: 6013 str r3, [r2, #0]
|
|
|
|
/* Start the timer that generates the tick ISR. Interrupts are disabled
|
|
here already. */
|
|
vPortSetupTimerInterrupt();
|
|
8008924: f000 f8b0 bl 8008a88 <vPortSetupTimerInterrupt>
|
|
|
|
/* Initialise the critical nesting count ready for the first task. */
|
|
uxCriticalNesting = 0;
|
|
8008928: 4b0a ldr r3, [pc, #40] ; (8008954 <xPortStartScheduler+0xdc>)
|
|
800892a: 2200 movs r2, #0
|
|
800892c: 601a str r2, [r3, #0]
|
|
|
|
/* Start the first task. */
|
|
prvPortStartFirstTask();
|
|
800892e: f7ff ff93 bl 8008858 <prvPortStartFirstTask>
|
|
exit error function to prevent compiler warnings about a static function
|
|
not being called in the case that the application writer overrides this
|
|
functionality by defining configTASK_RETURN_ADDRESS. Call
|
|
vTaskSwitchContext() so link time optimisation does not remove the
|
|
symbol. */
|
|
vTaskSwitchContext();
|
|
8008932: f7ff fd93 bl 800845c <vTaskSwitchContext>
|
|
prvTaskExitError();
|
|
8008936: f7ff ff53 bl 80087e0 <prvTaskExitError>
|
|
|
|
/* Should not get here! */
|
|
return 0;
|
|
800893a: 2300 movs r3, #0
|
|
}
|
|
800893c: 4618 mov r0, r3
|
|
800893e: 3710 adds r7, #16
|
|
8008940: 46bd mov sp, r7
|
|
8008942: bd80 pop {r7, pc}
|
|
8008944: e000e400 .word 0xe000e400
|
|
8008948: 20000354 .word 0x20000354
|
|
800894c: 20000358 .word 0x20000358
|
|
8008950: e000ed20 .word 0xe000ed20
|
|
8008954: 20000130 .word 0x20000130
|
|
|
|
08008958 <vPortEnterCritical>:
|
|
configASSERT( uxCriticalNesting == 1000UL );
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
void vPortEnterCritical( void )
|
|
{
|
|
8008958: b480 push {r7}
|
|
800895a: b083 sub sp, #12
|
|
800895c: af00 add r7, sp, #0
|
|
800895e: f04f 0350 mov.w r3, #80 ; 0x50
|
|
8008962: f383 8811 msr BASEPRI, r3
|
|
8008966: f3bf 8f6f isb sy
|
|
800896a: f3bf 8f4f dsb sy
|
|
800896e: 607b str r3, [r7, #4]
|
|
portDISABLE_INTERRUPTS();
|
|
uxCriticalNesting++;
|
|
8008970: 4b0e ldr r3, [pc, #56] ; (80089ac <vPortEnterCritical+0x54>)
|
|
8008972: 681b ldr r3, [r3, #0]
|
|
8008974: 3301 adds r3, #1
|
|
8008976: 4a0d ldr r2, [pc, #52] ; (80089ac <vPortEnterCritical+0x54>)
|
|
8008978: 6013 str r3, [r2, #0]
|
|
/* This is not the interrupt safe version of the enter critical function so
|
|
assert() if it is being called from an interrupt context. Only API
|
|
functions that end in "FromISR" can be used in an interrupt. Only assert if
|
|
the critical nesting count is 1 to protect against recursive calls if the
|
|
assert function also uses a critical section. */
|
|
if( uxCriticalNesting == 1 )
|
|
800897a: 4b0c ldr r3, [pc, #48] ; (80089ac <vPortEnterCritical+0x54>)
|
|
800897c: 681b ldr r3, [r3, #0]
|
|
800897e: 2b01 cmp r3, #1
|
|
8008980: d10e bne.n 80089a0 <vPortEnterCritical+0x48>
|
|
{
|
|
configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
|
|
8008982: 4b0b ldr r3, [pc, #44] ; (80089b0 <vPortEnterCritical+0x58>)
|
|
8008984: 681b ldr r3, [r3, #0]
|
|
8008986: b2db uxtb r3, r3
|
|
8008988: 2b00 cmp r3, #0
|
|
800898a: d009 beq.n 80089a0 <vPortEnterCritical+0x48>
|
|
800898c: f04f 0350 mov.w r3, #80 ; 0x50
|
|
8008990: f383 8811 msr BASEPRI, r3
|
|
8008994: f3bf 8f6f isb sy
|
|
8008998: f3bf 8f4f dsb sy
|
|
800899c: 603b str r3, [r7, #0]
|
|
800899e: e7fe b.n 800899e <vPortEnterCritical+0x46>
|
|
}
|
|
}
|
|
80089a0: bf00 nop
|
|
80089a2: 370c adds r7, #12
|
|
80089a4: 46bd mov sp, r7
|
|
80089a6: bc80 pop {r7}
|
|
80089a8: 4770 bx lr
|
|
80089aa: bf00 nop
|
|
80089ac: 20000130 .word 0x20000130
|
|
80089b0: e000ed04 .word 0xe000ed04
|
|
|
|
080089b4 <vPortExitCritical>:
|
|
/*-----------------------------------------------------------*/
|
|
|
|
void vPortExitCritical( void )
|
|
{
|
|
80089b4: b480 push {r7}
|
|
80089b6: b083 sub sp, #12
|
|
80089b8: af00 add r7, sp, #0
|
|
configASSERT( uxCriticalNesting );
|
|
80089ba: 4b10 ldr r3, [pc, #64] ; (80089fc <vPortExitCritical+0x48>)
|
|
80089bc: 681b ldr r3, [r3, #0]
|
|
80089be: 2b00 cmp r3, #0
|
|
80089c0: d109 bne.n 80089d6 <vPortExitCritical+0x22>
|
|
80089c2: f04f 0350 mov.w r3, #80 ; 0x50
|
|
80089c6: f383 8811 msr BASEPRI, r3
|
|
80089ca: f3bf 8f6f isb sy
|
|
80089ce: f3bf 8f4f dsb sy
|
|
80089d2: 607b str r3, [r7, #4]
|
|
80089d4: e7fe b.n 80089d4 <vPortExitCritical+0x20>
|
|
uxCriticalNesting--;
|
|
80089d6: 4b09 ldr r3, [pc, #36] ; (80089fc <vPortExitCritical+0x48>)
|
|
80089d8: 681b ldr r3, [r3, #0]
|
|
80089da: 3b01 subs r3, #1
|
|
80089dc: 4a07 ldr r2, [pc, #28] ; (80089fc <vPortExitCritical+0x48>)
|
|
80089de: 6013 str r3, [r2, #0]
|
|
if( uxCriticalNesting == 0 )
|
|
80089e0: 4b06 ldr r3, [pc, #24] ; (80089fc <vPortExitCritical+0x48>)
|
|
80089e2: 681b ldr r3, [r3, #0]
|
|
80089e4: 2b00 cmp r3, #0
|
|
80089e6: d104 bne.n 80089f2 <vPortExitCritical+0x3e>
|
|
80089e8: 2300 movs r3, #0
|
|
80089ea: 603b str r3, [r7, #0]
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
|
|
{
|
|
__asm volatile
|
|
80089ec: 683b ldr r3, [r7, #0]
|
|
80089ee: f383 8811 msr BASEPRI, r3
|
|
{
|
|
portENABLE_INTERRUPTS();
|
|
}
|
|
}
|
|
80089f2: bf00 nop
|
|
80089f4: 370c adds r7, #12
|
|
80089f6: 46bd mov sp, r7
|
|
80089f8: bc80 pop {r7}
|
|
80089fa: 4770 bx lr
|
|
80089fc: 20000130 .word 0x20000130
|
|
|
|
08008a00 <PendSV_Handler>:
|
|
|
|
void xPortPendSVHandler( void )
|
|
{
|
|
/* This is a naked function. */
|
|
|
|
__asm volatile
|
|
8008a00: f3ef 8009 mrs r0, PSP
|
|
8008a04: f3bf 8f6f isb sy
|
|
8008a08: 4b0d ldr r3, [pc, #52] ; (8008a40 <pxCurrentTCBConst>)
|
|
8008a0a: 681a ldr r2, [r3, #0]
|
|
8008a0c: e920 0ff0 stmdb r0!, {r4, r5, r6, r7, r8, r9, sl, fp}
|
|
8008a10: 6010 str r0, [r2, #0]
|
|
8008a12: e92d 4008 stmdb sp!, {r3, lr}
|
|
8008a16: f04f 0050 mov.w r0, #80 ; 0x50
|
|
8008a1a: f380 8811 msr BASEPRI, r0
|
|
8008a1e: f7ff fd1d bl 800845c <vTaskSwitchContext>
|
|
8008a22: f04f 0000 mov.w r0, #0
|
|
8008a26: f380 8811 msr BASEPRI, r0
|
|
8008a2a: e8bd 4008 ldmia.w sp!, {r3, lr}
|
|
8008a2e: 6819 ldr r1, [r3, #0]
|
|
8008a30: 6808 ldr r0, [r1, #0]
|
|
8008a32: e8b0 0ff0 ldmia.w r0!, {r4, r5, r6, r7, r8, r9, sl, fp}
|
|
8008a36: f380 8809 msr PSP, r0
|
|
8008a3a: f3bf 8f6f isb sy
|
|
8008a3e: 4770 bx lr
|
|
|
|
08008a40 <pxCurrentTCBConst>:
|
|
8008a40: 20000228 .word 0x20000228
|
|
" \n"
|
|
" .align 4 \n"
|
|
"pxCurrentTCBConst: .word pxCurrentTCB \n"
|
|
::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
|
|
);
|
|
}
|
|
8008a44: bf00 nop
|
|
8008a46: bf00 nop
|
|
|
|
08008a48 <xPortSysTickHandler>:
|
|
/*-----------------------------------------------------------*/
|
|
|
|
void xPortSysTickHandler( void )
|
|
{
|
|
8008a48: b580 push {r7, lr}
|
|
8008a4a: b082 sub sp, #8
|
|
8008a4c: af00 add r7, sp, #0
|
|
__asm volatile
|
|
8008a4e: f04f 0350 mov.w r3, #80 ; 0x50
|
|
8008a52: f383 8811 msr BASEPRI, r3
|
|
8008a56: f3bf 8f6f isb sy
|
|
8008a5a: f3bf 8f4f dsb sy
|
|
8008a5e: 607b str r3, [r7, #4]
|
|
save and then restore the interrupt mask value as its value is already
|
|
known. */
|
|
portDISABLE_INTERRUPTS();
|
|
{
|
|
/* Increment the RTOS tick. */
|
|
if( xTaskIncrementTick() != pdFALSE )
|
|
8008a60: f7ff fc40 bl 80082e4 <xTaskIncrementTick>
|
|
8008a64: 4603 mov r3, r0
|
|
8008a66: 2b00 cmp r3, #0
|
|
8008a68: d003 beq.n 8008a72 <xPortSysTickHandler+0x2a>
|
|
{
|
|
/* A context switch is required. Context switching is performed in
|
|
the PendSV interrupt. Pend the PendSV interrupt. */
|
|
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
|
|
8008a6a: 4b06 ldr r3, [pc, #24] ; (8008a84 <xPortSysTickHandler+0x3c>)
|
|
8008a6c: f04f 5280 mov.w r2, #268435456 ; 0x10000000
|
|
8008a70: 601a str r2, [r3, #0]
|
|
8008a72: 2300 movs r3, #0
|
|
8008a74: 603b str r3, [r7, #0]
|
|
__asm volatile
|
|
8008a76: 683b ldr r3, [r7, #0]
|
|
8008a78: f383 8811 msr BASEPRI, r3
|
|
}
|
|
}
|
|
portENABLE_INTERRUPTS();
|
|
}
|
|
8008a7c: bf00 nop
|
|
8008a7e: 3708 adds r7, #8
|
|
8008a80: 46bd mov sp, r7
|
|
8008a82: bd80 pop {r7, pc}
|
|
8008a84: e000ed04 .word 0xe000ed04
|
|
|
|
08008a88 <vPortSetupTimerInterrupt>:
|
|
/*
|
|
* Setup the systick timer to generate the tick interrupts at the required
|
|
* frequency.
|
|
*/
|
|
__attribute__(( weak )) void vPortSetupTimerInterrupt( void )
|
|
{
|
|
8008a88: b480 push {r7}
|
|
8008a8a: af00 add r7, sp, #0
|
|
ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
|
|
}
|
|
#endif /* configUSE_TICKLESS_IDLE */
|
|
|
|
/* Stop and clear the SysTick. */
|
|
portNVIC_SYSTICK_CTRL_REG = 0UL;
|
|
8008a8c: 4b0a ldr r3, [pc, #40] ; (8008ab8 <vPortSetupTimerInterrupt+0x30>)
|
|
8008a8e: 2200 movs r2, #0
|
|
8008a90: 601a str r2, [r3, #0]
|
|
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
|
8008a92: 4b0a ldr r3, [pc, #40] ; (8008abc <vPortSetupTimerInterrupt+0x34>)
|
|
8008a94: 2200 movs r2, #0
|
|
8008a96: 601a str r2, [r3, #0]
|
|
|
|
/* Configure SysTick to interrupt at the requested rate. */
|
|
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
|
8008a98: 4b09 ldr r3, [pc, #36] ; (8008ac0 <vPortSetupTimerInterrupt+0x38>)
|
|
8008a9a: 681b ldr r3, [r3, #0]
|
|
8008a9c: 4a09 ldr r2, [pc, #36] ; (8008ac4 <vPortSetupTimerInterrupt+0x3c>)
|
|
8008a9e: fba2 2303 umull r2, r3, r2, r3
|
|
8008aa2: 099b lsrs r3, r3, #6
|
|
8008aa4: 4a08 ldr r2, [pc, #32] ; (8008ac8 <vPortSetupTimerInterrupt+0x40>)
|
|
8008aa6: 3b01 subs r3, #1
|
|
8008aa8: 6013 str r3, [r2, #0]
|
|
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
|
8008aaa: 4b03 ldr r3, [pc, #12] ; (8008ab8 <vPortSetupTimerInterrupt+0x30>)
|
|
8008aac: 2207 movs r2, #7
|
|
8008aae: 601a str r2, [r3, #0]
|
|
}
|
|
8008ab0: bf00 nop
|
|
8008ab2: 46bd mov sp, r7
|
|
8008ab4: bc80 pop {r7}
|
|
8008ab6: 4770 bx lr
|
|
8008ab8: e000e010 .word 0xe000e010
|
|
8008abc: e000e018 .word 0xe000e018
|
|
8008ac0: 20000140 .word 0x20000140
|
|
8008ac4: 10624dd3 .word 0x10624dd3
|
|
8008ac8: e000e014 .word 0xe000e014
|
|
|
|
08008acc <pvPortMalloc>:
|
|
static size_t xBlockAllocatedBit = 0;
|
|
|
|
/*-----------------------------------------------------------*/
|
|
|
|
void *pvPortMalloc( size_t xWantedSize )
|
|
{
|
|
8008acc: b580 push {r7, lr}
|
|
8008ace: b08a sub sp, #40 ; 0x28
|
|
8008ad0: af00 add r7, sp, #0
|
|
8008ad2: 6078 str r0, [r7, #4]
|
|
BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
|
|
void *pvReturn = NULL;
|
|
8008ad4: 2300 movs r3, #0
|
|
8008ad6: 61fb str r3, [r7, #28]
|
|
|
|
vTaskSuspendAll();
|
|
8008ad8: f7ff fb5a bl 8008190 <vTaskSuspendAll>
|
|
{
|
|
/* If this is the first call to malloc then the heap will require
|
|
initialisation to setup the list of free blocks. */
|
|
if( pxEnd == NULL )
|
|
8008adc: 4b57 ldr r3, [pc, #348] ; (8008c3c <pvPortMalloc+0x170>)
|
|
8008ade: 681b ldr r3, [r3, #0]
|
|
8008ae0: 2b00 cmp r3, #0
|
|
8008ae2: d101 bne.n 8008ae8 <pvPortMalloc+0x1c>
|
|
{
|
|
prvHeapInit();
|
|
8008ae4: f000 f90c bl 8008d00 <prvHeapInit>
|
|
|
|
/* Check the requested block size is not so large that the top bit is
|
|
set. The top bit of the block size member of the BlockLink_t structure
|
|
is used to determine who owns the block - the application or the
|
|
kernel, so it must be free. */
|
|
if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
|
|
8008ae8: 4b55 ldr r3, [pc, #340] ; (8008c40 <pvPortMalloc+0x174>)
|
|
8008aea: 681a ldr r2, [r3, #0]
|
|
8008aec: 687b ldr r3, [r7, #4]
|
|
8008aee: 4013 ands r3, r2
|
|
8008af0: 2b00 cmp r3, #0
|
|
8008af2: f040 808c bne.w 8008c0e <pvPortMalloc+0x142>
|
|
{
|
|
/* The wanted size is increased so it can contain a BlockLink_t
|
|
structure in addition to the requested amount of bytes. */
|
|
if( xWantedSize > 0 )
|
|
8008af6: 687b ldr r3, [r7, #4]
|
|
8008af8: 2b00 cmp r3, #0
|
|
8008afa: d01c beq.n 8008b36 <pvPortMalloc+0x6a>
|
|
{
|
|
xWantedSize += xHeapStructSize;
|
|
8008afc: 2208 movs r2, #8
|
|
8008afe: 687b ldr r3, [r7, #4]
|
|
8008b00: 4413 add r3, r2
|
|
8008b02: 607b str r3, [r7, #4]
|
|
|
|
/* Ensure that blocks are always aligned to the required number
|
|
of bytes. */
|
|
if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 )
|
|
8008b04: 687b ldr r3, [r7, #4]
|
|
8008b06: f003 0307 and.w r3, r3, #7
|
|
8008b0a: 2b00 cmp r3, #0
|
|
8008b0c: d013 beq.n 8008b36 <pvPortMalloc+0x6a>
|
|
{
|
|
/* Byte alignment required. */
|
|
xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
|
|
8008b0e: 687b ldr r3, [r7, #4]
|
|
8008b10: f023 0307 bic.w r3, r3, #7
|
|
8008b14: 3308 adds r3, #8
|
|
8008b16: 607b str r3, [r7, #4]
|
|
configASSERT( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) == 0 );
|
|
8008b18: 687b ldr r3, [r7, #4]
|
|
8008b1a: f003 0307 and.w r3, r3, #7
|
|
8008b1e: 2b00 cmp r3, #0
|
|
8008b20: d009 beq.n 8008b36 <pvPortMalloc+0x6a>
|
|
__asm volatile
|
|
8008b22: f04f 0350 mov.w r3, #80 ; 0x50
|
|
8008b26: f383 8811 msr BASEPRI, r3
|
|
8008b2a: f3bf 8f6f isb sy
|
|
8008b2e: f3bf 8f4f dsb sy
|
|
8008b32: 617b str r3, [r7, #20]
|
|
8008b34: e7fe b.n 8008b34 <pvPortMalloc+0x68>
|
|
else
|
|
{
|
|
mtCOVERAGE_TEST_MARKER();
|
|
}
|
|
|
|
if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
|
|
8008b36: 687b ldr r3, [r7, #4]
|
|
8008b38: 2b00 cmp r3, #0
|
|
8008b3a: d068 beq.n 8008c0e <pvPortMalloc+0x142>
|
|
8008b3c: 4b41 ldr r3, [pc, #260] ; (8008c44 <pvPortMalloc+0x178>)
|
|
8008b3e: 681b ldr r3, [r3, #0]
|
|
8008b40: 687a ldr r2, [r7, #4]
|
|
8008b42: 429a cmp r2, r3
|
|
8008b44: d863 bhi.n 8008c0e <pvPortMalloc+0x142>
|
|
{
|
|
/* Traverse the list from the start (lowest address) block until
|
|
one of adequate size is found. */
|
|
pxPreviousBlock = &xStart;
|
|
8008b46: 4b40 ldr r3, [pc, #256] ; (8008c48 <pvPortMalloc+0x17c>)
|
|
8008b48: 623b str r3, [r7, #32]
|
|
pxBlock = xStart.pxNextFreeBlock;
|
|
8008b4a: 4b3f ldr r3, [pc, #252] ; (8008c48 <pvPortMalloc+0x17c>)
|
|
8008b4c: 681b ldr r3, [r3, #0]
|
|
8008b4e: 627b str r3, [r7, #36] ; 0x24
|
|
while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
|
|
8008b50: e004 b.n 8008b5c <pvPortMalloc+0x90>
|
|
{
|
|
pxPreviousBlock = pxBlock;
|
|
8008b52: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8008b54: 623b str r3, [r7, #32]
|
|
pxBlock = pxBlock->pxNextFreeBlock;
|
|
8008b56: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8008b58: 681b ldr r3, [r3, #0]
|
|
8008b5a: 627b str r3, [r7, #36] ; 0x24
|
|
while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
|
|
8008b5c: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8008b5e: 685b ldr r3, [r3, #4]
|
|
8008b60: 687a ldr r2, [r7, #4]
|
|
8008b62: 429a cmp r2, r3
|
|
8008b64: d903 bls.n 8008b6e <pvPortMalloc+0xa2>
|
|
8008b66: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8008b68: 681b ldr r3, [r3, #0]
|
|
8008b6a: 2b00 cmp r3, #0
|
|
8008b6c: d1f1 bne.n 8008b52 <pvPortMalloc+0x86>
|
|
}
|
|
|
|
/* If the end marker was reached then a block of adequate size
|
|
was not found. */
|
|
if( pxBlock != pxEnd )
|
|
8008b6e: 4b33 ldr r3, [pc, #204] ; (8008c3c <pvPortMalloc+0x170>)
|
|
8008b70: 681b ldr r3, [r3, #0]
|
|
8008b72: 6a7a ldr r2, [r7, #36] ; 0x24
|
|
8008b74: 429a cmp r2, r3
|
|
8008b76: d04a beq.n 8008c0e <pvPortMalloc+0x142>
|
|
{
|
|
/* Return the memory space pointed to - jumping over the
|
|
BlockLink_t structure at its start. */
|
|
pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
|
|
8008b78: 6a3b ldr r3, [r7, #32]
|
|
8008b7a: 681b ldr r3, [r3, #0]
|
|
8008b7c: 2208 movs r2, #8
|
|
8008b7e: 4413 add r3, r2
|
|
8008b80: 61fb str r3, [r7, #28]
|
|
|
|
/* This block is being returned for use so must be taken out
|
|
of the list of free blocks. */
|
|
pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
|
|
8008b82: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8008b84: 681a ldr r2, [r3, #0]
|
|
8008b86: 6a3b ldr r3, [r7, #32]
|
|
8008b88: 601a str r2, [r3, #0]
|
|
|
|
/* If the block is larger than required it can be split into
|
|
two. */
|
|
if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
|
|
8008b8a: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8008b8c: 685a ldr r2, [r3, #4]
|
|
8008b8e: 687b ldr r3, [r7, #4]
|
|
8008b90: 1ad2 subs r2, r2, r3
|
|
8008b92: 2308 movs r3, #8
|
|
8008b94: 005b lsls r3, r3, #1
|
|
8008b96: 429a cmp r2, r3
|
|
8008b98: d91e bls.n 8008bd8 <pvPortMalloc+0x10c>
|
|
{
|
|
/* This block is to be split into two. Create a new
|
|
block following the number of bytes requested. The void
|
|
cast is used to prevent byte alignment warnings from the
|
|
compiler. */
|
|
pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
|
|
8008b9a: 6a7a ldr r2, [r7, #36] ; 0x24
|
|
8008b9c: 687b ldr r3, [r7, #4]
|
|
8008b9e: 4413 add r3, r2
|
|
8008ba0: 61bb str r3, [r7, #24]
|
|
configASSERT( ( ( ( size_t ) pxNewBlockLink ) & portBYTE_ALIGNMENT_MASK ) == 0 );
|
|
8008ba2: 69bb ldr r3, [r7, #24]
|
|
8008ba4: f003 0307 and.w r3, r3, #7
|
|
8008ba8: 2b00 cmp r3, #0
|
|
8008baa: d009 beq.n 8008bc0 <pvPortMalloc+0xf4>
|
|
8008bac: f04f 0350 mov.w r3, #80 ; 0x50
|
|
8008bb0: f383 8811 msr BASEPRI, r3
|
|
8008bb4: f3bf 8f6f isb sy
|
|
8008bb8: f3bf 8f4f dsb sy
|
|
8008bbc: 613b str r3, [r7, #16]
|
|
8008bbe: e7fe b.n 8008bbe <pvPortMalloc+0xf2>
|
|
|
|
/* Calculate the sizes of two blocks split from the
|
|
single block. */
|
|
pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
|
|
8008bc0: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8008bc2: 685a ldr r2, [r3, #4]
|
|
8008bc4: 687b ldr r3, [r7, #4]
|
|
8008bc6: 1ad2 subs r2, r2, r3
|
|
8008bc8: 69bb ldr r3, [r7, #24]
|
|
8008bca: 605a str r2, [r3, #4]
|
|
pxBlock->xBlockSize = xWantedSize;
|
|
8008bcc: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8008bce: 687a ldr r2, [r7, #4]
|
|
8008bd0: 605a str r2, [r3, #4]
|
|
|
|
/* Insert the new block into the list of free blocks. */
|
|
prvInsertBlockIntoFreeList( pxNewBlockLink );
|
|
8008bd2: 69b8 ldr r0, [r7, #24]
|
|
8008bd4: f000 f8f6 bl 8008dc4 <prvInsertBlockIntoFreeList>
|
|
else
|
|
{
|
|
mtCOVERAGE_TEST_MARKER();
|
|
}
|
|
|
|
xFreeBytesRemaining -= pxBlock->xBlockSize;
|
|
8008bd8: 4b1a ldr r3, [pc, #104] ; (8008c44 <pvPortMalloc+0x178>)
|
|
8008bda: 681a ldr r2, [r3, #0]
|
|
8008bdc: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8008bde: 685b ldr r3, [r3, #4]
|
|
8008be0: 1ad3 subs r3, r2, r3
|
|
8008be2: 4a18 ldr r2, [pc, #96] ; (8008c44 <pvPortMalloc+0x178>)
|
|
8008be4: 6013 str r3, [r2, #0]
|
|
|
|
if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
|
|
8008be6: 4b17 ldr r3, [pc, #92] ; (8008c44 <pvPortMalloc+0x178>)
|
|
8008be8: 681a ldr r2, [r3, #0]
|
|
8008bea: 4b18 ldr r3, [pc, #96] ; (8008c4c <pvPortMalloc+0x180>)
|
|
8008bec: 681b ldr r3, [r3, #0]
|
|
8008bee: 429a cmp r2, r3
|
|
8008bf0: d203 bcs.n 8008bfa <pvPortMalloc+0x12e>
|
|
{
|
|
xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
|
|
8008bf2: 4b14 ldr r3, [pc, #80] ; (8008c44 <pvPortMalloc+0x178>)
|
|
8008bf4: 681b ldr r3, [r3, #0]
|
|
8008bf6: 4a15 ldr r2, [pc, #84] ; (8008c4c <pvPortMalloc+0x180>)
|
|
8008bf8: 6013 str r3, [r2, #0]
|
|
mtCOVERAGE_TEST_MARKER();
|
|
}
|
|
|
|
/* The block is being returned - it is allocated and owned
|
|
by the application and has no "next" block. */
|
|
pxBlock->xBlockSize |= xBlockAllocatedBit;
|
|
8008bfa: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8008bfc: 685a ldr r2, [r3, #4]
|
|
8008bfe: 4b10 ldr r3, [pc, #64] ; (8008c40 <pvPortMalloc+0x174>)
|
|
8008c00: 681b ldr r3, [r3, #0]
|
|
8008c02: 431a orrs r2, r3
|
|
8008c04: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8008c06: 605a str r2, [r3, #4]
|
|
pxBlock->pxNextFreeBlock = NULL;
|
|
8008c08: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8008c0a: 2200 movs r2, #0
|
|
8008c0c: 601a str r2, [r3, #0]
|
|
mtCOVERAGE_TEST_MARKER();
|
|
}
|
|
|
|
traceMALLOC( pvReturn, xWantedSize );
|
|
}
|
|
( void ) xTaskResumeAll();
|
|
8008c0e: f7ff facd bl 80081ac <xTaskResumeAll>
|
|
mtCOVERAGE_TEST_MARKER();
|
|
}
|
|
}
|
|
#endif
|
|
|
|
configASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) portBYTE_ALIGNMENT_MASK ) == 0 );
|
|
8008c12: 69fb ldr r3, [r7, #28]
|
|
8008c14: f003 0307 and.w r3, r3, #7
|
|
8008c18: 2b00 cmp r3, #0
|
|
8008c1a: d009 beq.n 8008c30 <pvPortMalloc+0x164>
|
|
8008c1c: f04f 0350 mov.w r3, #80 ; 0x50
|
|
8008c20: f383 8811 msr BASEPRI, r3
|
|
8008c24: f3bf 8f6f isb sy
|
|
8008c28: f3bf 8f4f dsb sy
|
|
8008c2c: 60fb str r3, [r7, #12]
|
|
8008c2e: e7fe b.n 8008c2e <pvPortMalloc+0x162>
|
|
return pvReturn;
|
|
8008c30: 69fb ldr r3, [r7, #28]
|
|
}
|
|
8008c32: 4618 mov r0, r3
|
|
8008c34: 3728 adds r7, #40 ; 0x28
|
|
8008c36: 46bd mov sp, r7
|
|
8008c38: bd80 pop {r7, pc}
|
|
8008c3a: bf00 nop
|
|
8008c3c: 20000f64 .word 0x20000f64
|
|
8008c40: 20000f70 .word 0x20000f70
|
|
8008c44: 20000f68 .word 0x20000f68
|
|
8008c48: 20000f5c .word 0x20000f5c
|
|
8008c4c: 20000f6c .word 0x20000f6c
|
|
|
|
08008c50 <vPortFree>:
|
|
/*-----------------------------------------------------------*/
|
|
|
|
void vPortFree( void *pv )
|
|
{
|
|
8008c50: b580 push {r7, lr}
|
|
8008c52: b086 sub sp, #24
|
|
8008c54: af00 add r7, sp, #0
|
|
8008c56: 6078 str r0, [r7, #4]
|
|
uint8_t *puc = ( uint8_t * ) pv;
|
|
8008c58: 687b ldr r3, [r7, #4]
|
|
8008c5a: 617b str r3, [r7, #20]
|
|
BlockLink_t *pxLink;
|
|
|
|
if( pv != NULL )
|
|
8008c5c: 687b ldr r3, [r7, #4]
|
|
8008c5e: 2b00 cmp r3, #0
|
|
8008c60: d046 beq.n 8008cf0 <vPortFree+0xa0>
|
|
{
|
|
/* The memory being freed will have an BlockLink_t structure immediately
|
|
before it. */
|
|
puc -= xHeapStructSize;
|
|
8008c62: 2308 movs r3, #8
|
|
8008c64: 425b negs r3, r3
|
|
8008c66: 697a ldr r2, [r7, #20]
|
|
8008c68: 4413 add r3, r2
|
|
8008c6a: 617b str r3, [r7, #20]
|
|
|
|
/* This casting is to keep the compiler from issuing warnings. */
|
|
pxLink = ( void * ) puc;
|
|
8008c6c: 697b ldr r3, [r7, #20]
|
|
8008c6e: 613b str r3, [r7, #16]
|
|
|
|
/* Check the block is actually allocated. */
|
|
configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
|
|
8008c70: 693b ldr r3, [r7, #16]
|
|
8008c72: 685a ldr r2, [r3, #4]
|
|
8008c74: 4b20 ldr r3, [pc, #128] ; (8008cf8 <vPortFree+0xa8>)
|
|
8008c76: 681b ldr r3, [r3, #0]
|
|
8008c78: 4013 ands r3, r2
|
|
8008c7a: 2b00 cmp r3, #0
|
|
8008c7c: d109 bne.n 8008c92 <vPortFree+0x42>
|
|
8008c7e: f04f 0350 mov.w r3, #80 ; 0x50
|
|
8008c82: f383 8811 msr BASEPRI, r3
|
|
8008c86: f3bf 8f6f isb sy
|
|
8008c8a: f3bf 8f4f dsb sy
|
|
8008c8e: 60fb str r3, [r7, #12]
|
|
8008c90: e7fe b.n 8008c90 <vPortFree+0x40>
|
|
configASSERT( pxLink->pxNextFreeBlock == NULL );
|
|
8008c92: 693b ldr r3, [r7, #16]
|
|
8008c94: 681b ldr r3, [r3, #0]
|
|
8008c96: 2b00 cmp r3, #0
|
|
8008c98: d009 beq.n 8008cae <vPortFree+0x5e>
|
|
8008c9a: f04f 0350 mov.w r3, #80 ; 0x50
|
|
8008c9e: f383 8811 msr BASEPRI, r3
|
|
8008ca2: f3bf 8f6f isb sy
|
|
8008ca6: f3bf 8f4f dsb sy
|
|
8008caa: 60bb str r3, [r7, #8]
|
|
8008cac: e7fe b.n 8008cac <vPortFree+0x5c>
|
|
|
|
if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
|
|
8008cae: 693b ldr r3, [r7, #16]
|
|
8008cb0: 685a ldr r2, [r3, #4]
|
|
8008cb2: 4b11 ldr r3, [pc, #68] ; (8008cf8 <vPortFree+0xa8>)
|
|
8008cb4: 681b ldr r3, [r3, #0]
|
|
8008cb6: 4013 ands r3, r2
|
|
8008cb8: 2b00 cmp r3, #0
|
|
8008cba: d019 beq.n 8008cf0 <vPortFree+0xa0>
|
|
{
|
|
if( pxLink->pxNextFreeBlock == NULL )
|
|
8008cbc: 693b ldr r3, [r7, #16]
|
|
8008cbe: 681b ldr r3, [r3, #0]
|
|
8008cc0: 2b00 cmp r3, #0
|
|
8008cc2: d115 bne.n 8008cf0 <vPortFree+0xa0>
|
|
{
|
|
/* The block is being returned to the heap - it is no longer
|
|
allocated. */
|
|
pxLink->xBlockSize &= ~xBlockAllocatedBit;
|
|
8008cc4: 693b ldr r3, [r7, #16]
|
|
8008cc6: 685a ldr r2, [r3, #4]
|
|
8008cc8: 4b0b ldr r3, [pc, #44] ; (8008cf8 <vPortFree+0xa8>)
|
|
8008cca: 681b ldr r3, [r3, #0]
|
|
8008ccc: 43db mvns r3, r3
|
|
8008cce: 401a ands r2, r3
|
|
8008cd0: 693b ldr r3, [r7, #16]
|
|
8008cd2: 605a str r2, [r3, #4]
|
|
|
|
vTaskSuspendAll();
|
|
8008cd4: f7ff fa5c bl 8008190 <vTaskSuspendAll>
|
|
{
|
|
/* Add this block to the list of free blocks. */
|
|
xFreeBytesRemaining += pxLink->xBlockSize;
|
|
8008cd8: 693b ldr r3, [r7, #16]
|
|
8008cda: 685a ldr r2, [r3, #4]
|
|
8008cdc: 4b07 ldr r3, [pc, #28] ; (8008cfc <vPortFree+0xac>)
|
|
8008cde: 681b ldr r3, [r3, #0]
|
|
8008ce0: 4413 add r3, r2
|
|
8008ce2: 4a06 ldr r2, [pc, #24] ; (8008cfc <vPortFree+0xac>)
|
|
8008ce4: 6013 str r3, [r2, #0]
|
|
traceFREE( pv, pxLink->xBlockSize );
|
|
prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
|
|
8008ce6: 6938 ldr r0, [r7, #16]
|
|
8008ce8: f000 f86c bl 8008dc4 <prvInsertBlockIntoFreeList>
|
|
}
|
|
( void ) xTaskResumeAll();
|
|
8008cec: f7ff fa5e bl 80081ac <xTaskResumeAll>
|
|
else
|
|
{
|
|
mtCOVERAGE_TEST_MARKER();
|
|
}
|
|
}
|
|
}
|
|
8008cf0: bf00 nop
|
|
8008cf2: 3718 adds r7, #24
|
|
8008cf4: 46bd mov sp, r7
|
|
8008cf6: bd80 pop {r7, pc}
|
|
8008cf8: 20000f70 .word 0x20000f70
|
|
8008cfc: 20000f68 .word 0x20000f68
|
|
|
|
08008d00 <prvHeapInit>:
|
|
/* This just exists to keep the linker quiet. */
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
static void prvHeapInit( void )
|
|
{
|
|
8008d00: b480 push {r7}
|
|
8008d02: b085 sub sp, #20
|
|
8008d04: af00 add r7, sp, #0
|
|
BlockLink_t *pxFirstFreeBlock;
|
|
uint8_t *pucAlignedHeap;
|
|
size_t uxAddress;
|
|
size_t xTotalHeapSize = configTOTAL_HEAP_SIZE;
|
|
8008d06: f44f 6340 mov.w r3, #3072 ; 0xc00
|
|
8008d0a: 60bb str r3, [r7, #8]
|
|
|
|
/* Ensure the heap starts on a correctly aligned boundary. */
|
|
uxAddress = ( size_t ) ucHeap;
|
|
8008d0c: 4b27 ldr r3, [pc, #156] ; (8008dac <prvHeapInit+0xac>)
|
|
8008d0e: 60fb str r3, [r7, #12]
|
|
|
|
if( ( uxAddress & portBYTE_ALIGNMENT_MASK ) != 0 )
|
|
8008d10: 68fb ldr r3, [r7, #12]
|
|
8008d12: f003 0307 and.w r3, r3, #7
|
|
8008d16: 2b00 cmp r3, #0
|
|
8008d18: d00c beq.n 8008d34 <prvHeapInit+0x34>
|
|
{
|
|
uxAddress += ( portBYTE_ALIGNMENT - 1 );
|
|
8008d1a: 68fb ldr r3, [r7, #12]
|
|
8008d1c: 3307 adds r3, #7
|
|
8008d1e: 60fb str r3, [r7, #12]
|
|
uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
|
|
8008d20: 68fb ldr r3, [r7, #12]
|
|
8008d22: f023 0307 bic.w r3, r3, #7
|
|
8008d26: 60fb str r3, [r7, #12]
|
|
xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
|
|
8008d28: 68ba ldr r2, [r7, #8]
|
|
8008d2a: 68fb ldr r3, [r7, #12]
|
|
8008d2c: 1ad3 subs r3, r2, r3
|
|
8008d2e: 4a1f ldr r2, [pc, #124] ; (8008dac <prvHeapInit+0xac>)
|
|
8008d30: 4413 add r3, r2
|
|
8008d32: 60bb str r3, [r7, #8]
|
|
}
|
|
|
|
pucAlignedHeap = ( uint8_t * ) uxAddress;
|
|
8008d34: 68fb ldr r3, [r7, #12]
|
|
8008d36: 607b str r3, [r7, #4]
|
|
|
|
/* xStart is used to hold a pointer to the first item in the list of free
|
|
blocks. The void cast is used to prevent compiler warnings. */
|
|
xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
|
|
8008d38: 4a1d ldr r2, [pc, #116] ; (8008db0 <prvHeapInit+0xb0>)
|
|
8008d3a: 687b ldr r3, [r7, #4]
|
|
8008d3c: 6013 str r3, [r2, #0]
|
|
xStart.xBlockSize = ( size_t ) 0;
|
|
8008d3e: 4b1c ldr r3, [pc, #112] ; (8008db0 <prvHeapInit+0xb0>)
|
|
8008d40: 2200 movs r2, #0
|
|
8008d42: 605a str r2, [r3, #4]
|
|
|
|
/* pxEnd is used to mark the end of the list of free blocks and is inserted
|
|
at the end of the heap space. */
|
|
uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
|
|
8008d44: 687b ldr r3, [r7, #4]
|
|
8008d46: 68ba ldr r2, [r7, #8]
|
|
8008d48: 4413 add r3, r2
|
|
8008d4a: 60fb str r3, [r7, #12]
|
|
uxAddress -= xHeapStructSize;
|
|
8008d4c: 2208 movs r2, #8
|
|
8008d4e: 68fb ldr r3, [r7, #12]
|
|
8008d50: 1a9b subs r3, r3, r2
|
|
8008d52: 60fb str r3, [r7, #12]
|
|
uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
|
|
8008d54: 68fb ldr r3, [r7, #12]
|
|
8008d56: f023 0307 bic.w r3, r3, #7
|
|
8008d5a: 60fb str r3, [r7, #12]
|
|
pxEnd = ( void * ) uxAddress;
|
|
8008d5c: 68fb ldr r3, [r7, #12]
|
|
8008d5e: 4a15 ldr r2, [pc, #84] ; (8008db4 <prvHeapInit+0xb4>)
|
|
8008d60: 6013 str r3, [r2, #0]
|
|
pxEnd->xBlockSize = 0;
|
|
8008d62: 4b14 ldr r3, [pc, #80] ; (8008db4 <prvHeapInit+0xb4>)
|
|
8008d64: 681b ldr r3, [r3, #0]
|
|
8008d66: 2200 movs r2, #0
|
|
8008d68: 605a str r2, [r3, #4]
|
|
pxEnd->pxNextFreeBlock = NULL;
|
|
8008d6a: 4b12 ldr r3, [pc, #72] ; (8008db4 <prvHeapInit+0xb4>)
|
|
8008d6c: 681b ldr r3, [r3, #0]
|
|
8008d6e: 2200 movs r2, #0
|
|
8008d70: 601a str r2, [r3, #0]
|
|
|
|
/* To start with there is a single free block that is sized to take up the
|
|
entire heap space, minus the space taken by pxEnd. */
|
|
pxFirstFreeBlock = ( void * ) pucAlignedHeap;
|
|
8008d72: 687b ldr r3, [r7, #4]
|
|
8008d74: 603b str r3, [r7, #0]
|
|
pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
|
|
8008d76: 683b ldr r3, [r7, #0]
|
|
8008d78: 68fa ldr r2, [r7, #12]
|
|
8008d7a: 1ad2 subs r2, r2, r3
|
|
8008d7c: 683b ldr r3, [r7, #0]
|
|
8008d7e: 605a str r2, [r3, #4]
|
|
pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
|
|
8008d80: 4b0c ldr r3, [pc, #48] ; (8008db4 <prvHeapInit+0xb4>)
|
|
8008d82: 681a ldr r2, [r3, #0]
|
|
8008d84: 683b ldr r3, [r7, #0]
|
|
8008d86: 601a str r2, [r3, #0]
|
|
|
|
/* Only one block exists - and it covers the entire usable heap space. */
|
|
xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
|
|
8008d88: 683b ldr r3, [r7, #0]
|
|
8008d8a: 685b ldr r3, [r3, #4]
|
|
8008d8c: 4a0a ldr r2, [pc, #40] ; (8008db8 <prvHeapInit+0xb8>)
|
|
8008d8e: 6013 str r3, [r2, #0]
|
|
xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
|
|
8008d90: 683b ldr r3, [r7, #0]
|
|
8008d92: 685b ldr r3, [r3, #4]
|
|
8008d94: 4a09 ldr r2, [pc, #36] ; (8008dbc <prvHeapInit+0xbc>)
|
|
8008d96: 6013 str r3, [r2, #0]
|
|
|
|
/* Work out the position of the top bit in a size_t variable. */
|
|
xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 );
|
|
8008d98: 4b09 ldr r3, [pc, #36] ; (8008dc0 <prvHeapInit+0xc0>)
|
|
8008d9a: f04f 4200 mov.w r2, #2147483648 ; 0x80000000
|
|
8008d9e: 601a str r2, [r3, #0]
|
|
}
|
|
8008da0: bf00 nop
|
|
8008da2: 3714 adds r7, #20
|
|
8008da4: 46bd mov sp, r7
|
|
8008da6: bc80 pop {r7}
|
|
8008da8: 4770 bx lr
|
|
8008daa: bf00 nop
|
|
8008dac: 2000035c .word 0x2000035c
|
|
8008db0: 20000f5c .word 0x20000f5c
|
|
8008db4: 20000f64 .word 0x20000f64
|
|
8008db8: 20000f6c .word 0x20000f6c
|
|
8008dbc: 20000f68 .word 0x20000f68
|
|
8008dc0: 20000f70 .word 0x20000f70
|
|
|
|
08008dc4 <prvInsertBlockIntoFreeList>:
|
|
/*-----------------------------------------------------------*/
|
|
|
|
static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert )
|
|
{
|
|
8008dc4: b480 push {r7}
|
|
8008dc6: b085 sub sp, #20
|
|
8008dc8: af00 add r7, sp, #0
|
|
8008dca: 6078 str r0, [r7, #4]
|
|
BlockLink_t *pxIterator;
|
|
uint8_t *puc;
|
|
|
|
/* Iterate through the list until a block is found that has a higher address
|
|
than the block being inserted. */
|
|
for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
|
|
8008dcc: 4b27 ldr r3, [pc, #156] ; (8008e6c <prvInsertBlockIntoFreeList+0xa8>)
|
|
8008dce: 60fb str r3, [r7, #12]
|
|
8008dd0: e002 b.n 8008dd8 <prvInsertBlockIntoFreeList+0x14>
|
|
8008dd2: 68fb ldr r3, [r7, #12]
|
|
8008dd4: 681b ldr r3, [r3, #0]
|
|
8008dd6: 60fb str r3, [r7, #12]
|
|
8008dd8: 68fb ldr r3, [r7, #12]
|
|
8008dda: 681b ldr r3, [r3, #0]
|
|
8008ddc: 687a ldr r2, [r7, #4]
|
|
8008dde: 429a cmp r2, r3
|
|
8008de0: d8f7 bhi.n 8008dd2 <prvInsertBlockIntoFreeList+0xe>
|
|
/* Nothing to do here, just iterate to the right position. */
|
|
}
|
|
|
|
/* Do the block being inserted, and the block it is being inserted after
|
|
make a contiguous block of memory? */
|
|
puc = ( uint8_t * ) pxIterator;
|
|
8008de2: 68fb ldr r3, [r7, #12]
|
|
8008de4: 60bb str r3, [r7, #8]
|
|
if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
|
|
8008de6: 68fb ldr r3, [r7, #12]
|
|
8008de8: 685b ldr r3, [r3, #4]
|
|
8008dea: 68ba ldr r2, [r7, #8]
|
|
8008dec: 4413 add r3, r2
|
|
8008dee: 687a ldr r2, [r7, #4]
|
|
8008df0: 429a cmp r2, r3
|
|
8008df2: d108 bne.n 8008e06 <prvInsertBlockIntoFreeList+0x42>
|
|
{
|
|
pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
|
|
8008df4: 68fb ldr r3, [r7, #12]
|
|
8008df6: 685a ldr r2, [r3, #4]
|
|
8008df8: 687b ldr r3, [r7, #4]
|
|
8008dfa: 685b ldr r3, [r3, #4]
|
|
8008dfc: 441a add r2, r3
|
|
8008dfe: 68fb ldr r3, [r7, #12]
|
|
8008e00: 605a str r2, [r3, #4]
|
|
pxBlockToInsert = pxIterator;
|
|
8008e02: 68fb ldr r3, [r7, #12]
|
|
8008e04: 607b str r3, [r7, #4]
|
|
mtCOVERAGE_TEST_MARKER();
|
|
}
|
|
|
|
/* Do the block being inserted, and the block it is being inserted before
|
|
make a contiguous block of memory? */
|
|
puc = ( uint8_t * ) pxBlockToInsert;
|
|
8008e06: 687b ldr r3, [r7, #4]
|
|
8008e08: 60bb str r3, [r7, #8]
|
|
if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
|
|
8008e0a: 687b ldr r3, [r7, #4]
|
|
8008e0c: 685b ldr r3, [r3, #4]
|
|
8008e0e: 68ba ldr r2, [r7, #8]
|
|
8008e10: 441a add r2, r3
|
|
8008e12: 68fb ldr r3, [r7, #12]
|
|
8008e14: 681b ldr r3, [r3, #0]
|
|
8008e16: 429a cmp r2, r3
|
|
8008e18: d118 bne.n 8008e4c <prvInsertBlockIntoFreeList+0x88>
|
|
{
|
|
if( pxIterator->pxNextFreeBlock != pxEnd )
|
|
8008e1a: 68fb ldr r3, [r7, #12]
|
|
8008e1c: 681a ldr r2, [r3, #0]
|
|
8008e1e: 4b14 ldr r3, [pc, #80] ; (8008e70 <prvInsertBlockIntoFreeList+0xac>)
|
|
8008e20: 681b ldr r3, [r3, #0]
|
|
8008e22: 429a cmp r2, r3
|
|
8008e24: d00d beq.n 8008e42 <prvInsertBlockIntoFreeList+0x7e>
|
|
{
|
|
/* Form one big block from the two blocks. */
|
|
pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
|
|
8008e26: 687b ldr r3, [r7, #4]
|
|
8008e28: 685a ldr r2, [r3, #4]
|
|
8008e2a: 68fb ldr r3, [r7, #12]
|
|
8008e2c: 681b ldr r3, [r3, #0]
|
|
8008e2e: 685b ldr r3, [r3, #4]
|
|
8008e30: 441a add r2, r3
|
|
8008e32: 687b ldr r3, [r7, #4]
|
|
8008e34: 605a str r2, [r3, #4]
|
|
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
|
|
8008e36: 68fb ldr r3, [r7, #12]
|
|
8008e38: 681b ldr r3, [r3, #0]
|
|
8008e3a: 681a ldr r2, [r3, #0]
|
|
8008e3c: 687b ldr r3, [r7, #4]
|
|
8008e3e: 601a str r2, [r3, #0]
|
|
8008e40: e008 b.n 8008e54 <prvInsertBlockIntoFreeList+0x90>
|
|
}
|
|
else
|
|
{
|
|
pxBlockToInsert->pxNextFreeBlock = pxEnd;
|
|
8008e42: 4b0b ldr r3, [pc, #44] ; (8008e70 <prvInsertBlockIntoFreeList+0xac>)
|
|
8008e44: 681a ldr r2, [r3, #0]
|
|
8008e46: 687b ldr r3, [r7, #4]
|
|
8008e48: 601a str r2, [r3, #0]
|
|
8008e4a: e003 b.n 8008e54 <prvInsertBlockIntoFreeList+0x90>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
|
|
8008e4c: 68fb ldr r3, [r7, #12]
|
|
8008e4e: 681a ldr r2, [r3, #0]
|
|
8008e50: 687b ldr r3, [r7, #4]
|
|
8008e52: 601a str r2, [r3, #0]
|
|
|
|
/* If the block being inserted plugged a gab, so was merged with the block
|
|
before and the block after, then it's pxNextFreeBlock pointer will have
|
|
already been set, and should not be set here as that would make it point
|
|
to itself. */
|
|
if( pxIterator != pxBlockToInsert )
|
|
8008e54: 68fa ldr r2, [r7, #12]
|
|
8008e56: 687b ldr r3, [r7, #4]
|
|
8008e58: 429a cmp r2, r3
|
|
8008e5a: d002 beq.n 8008e62 <prvInsertBlockIntoFreeList+0x9e>
|
|
{
|
|
pxIterator->pxNextFreeBlock = pxBlockToInsert;
|
|
8008e5c: 68fb ldr r3, [r7, #12]
|
|
8008e5e: 687a ldr r2, [r7, #4]
|
|
8008e60: 601a str r2, [r3, #0]
|
|
}
|
|
else
|
|
{
|
|
mtCOVERAGE_TEST_MARKER();
|
|
}
|
|
}
|
|
8008e62: bf00 nop
|
|
8008e64: 3714 adds r7, #20
|
|
8008e66: 46bd mov sp, r7
|
|
8008e68: bc80 pop {r7}
|
|
8008e6a: 4770 bx lr
|
|
8008e6c: 20000f5c .word 0x20000f5c
|
|
8008e70: 20000f64 .word 0x20000f64
|
|
|
|
08008e74 <main>:
|
|
/**
|
|
* @brief The application entry point.
|
|
* @retval int
|
|
*/
|
|
int main(void)
|
|
{
|
|
8008e74: b5b0 push {r4, r5, r7, lr}
|
|
8008e76: b08a sub sp, #40 ; 0x28
|
|
8008e78: af00 add r7, sp, #0
|
|
|
|
|
|
/* MCU Configuration--------------------------------------------------------*/
|
|
|
|
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
|
|
HAL_Init();
|
|
8008e7a: f7f8 f8bb bl 8000ff4 <HAL_Init>
|
|
/* USER CODE BEGIN Init */
|
|
|
|
/* USER CODE END Init */
|
|
|
|
/* Configure the system clock */
|
|
SystemClock_Config();
|
|
8008e7e: f000 f837 bl 8008ef0 <SystemClock_Config>
|
|
/* USER CODE BEGIN SysInit */
|
|
|
|
/* USER CODE END SysInit */
|
|
|
|
/* Initialize all configured peripherals */
|
|
MX_GPIO_Init();
|
|
8008e82: f000 f9c1 bl 8009208 <MX_GPIO_Init>
|
|
MX_I2C1_Init();
|
|
8008e86: f000 f893 bl 8008fb0 <MX_I2C1_Init>
|
|
MX_SPI2_Init();
|
|
8008e8a: f000 f909 bl 80090a0 <MX_SPI2_Init>
|
|
MX_USART2_UART_Init();
|
|
8008e8e: f000 f991 bl 80091b4 <MX_USART2_UART_Init>
|
|
MX_TIM2_Init();
|
|
8008e92: f000 f93b bl 800910c <MX_TIM2_Init>
|
|
MX_RTC_Init();
|
|
8008e96: f000 f8b9 bl 800900c <MX_RTC_Init>
|
|
/* add queues, ... */
|
|
/* USER CODE END RTOS_QUEUES */
|
|
|
|
/* Create the thread(s) */
|
|
/* definition and creation of defaultTask */
|
|
osThreadDef(defaultTask, StartDefaultTask, osPriorityNormal, 0, 128);
|
|
8008e9a: 4b11 ldr r3, [pc, #68] ; (8008ee0 <main+0x6c>)
|
|
8008e9c: f107 0414 add.w r4, r7, #20
|
|
8008ea0: 461d mov r5, r3
|
|
8008ea2: cd0f ldmia r5!, {r0, r1, r2, r3}
|
|
8008ea4: c40f stmia r4!, {r0, r1, r2, r3}
|
|
8008ea6: 682b ldr r3, [r5, #0]
|
|
8008ea8: 6023 str r3, [r4, #0]
|
|
defaultTaskHandle = osThreadCreate(osThread(defaultTask), NULL);
|
|
8008eaa: f107 0314 add.w r3, r7, #20
|
|
8008eae: 2100 movs r1, #0
|
|
8008eb0: 4618 mov r0, r3
|
|
8008eb2: f7fe fedf bl 8007c74 <osThreadCreate>
|
|
8008eb6: 4602 mov r2, r0
|
|
8008eb8: 4b0a ldr r3, [pc, #40] ; (8008ee4 <main+0x70>)
|
|
8008eba: 601a str r2, [r3, #0]
|
|
|
|
/* definition and creation of myTask02 */
|
|
osThreadDef(myTask02, StartTask02, osPriorityNormal, 0, 128);
|
|
8008ebc: 4b0a ldr r3, [pc, #40] ; (8008ee8 <main+0x74>)
|
|
8008ebe: 463c mov r4, r7
|
|
8008ec0: 461d mov r5, r3
|
|
8008ec2: cd0f ldmia r5!, {r0, r1, r2, r3}
|
|
8008ec4: c40f stmia r4!, {r0, r1, r2, r3}
|
|
8008ec6: 682b ldr r3, [r5, #0]
|
|
8008ec8: 6023 str r3, [r4, #0]
|
|
myTask02Handle = osThreadCreate(osThread(myTask02), NULL);
|
|
8008eca: 463b mov r3, r7
|
|
8008ecc: 2100 movs r1, #0
|
|
8008ece: 4618 mov r0, r3
|
|
8008ed0: f7fe fed0 bl 8007c74 <osThreadCreate>
|
|
8008ed4: 4602 mov r2, r0
|
|
8008ed6: 4b05 ldr r3, [pc, #20] ; (8008eec <main+0x78>)
|
|
8008ed8: 601a str r2, [r3, #0]
|
|
/* USER CODE BEGIN RTOS_THREADS */
|
|
/* add threads, ... */
|
|
/* USER CODE END RTOS_THREADS */
|
|
|
|
/* Start scheduler */
|
|
osKernelStart();
|
|
8008eda: f7fe fec4 bl 8007c66 <osKernelStart>
|
|
|
|
/* We should never get here as control is now taken by the scheduler */
|
|
|
|
/* Infinite loop */
|
|
/* USER CODE BEGIN WHILE */
|
|
while (1) {
|
|
8008ede: e7fe b.n 8008ede <main+0x6a>
|
|
8008ee0: 0800c6b8 .word 0x0800c6b8
|
|
8008ee4: 200011f8 .word 0x200011f8
|
|
8008ee8: 0800c6d8 .word 0x0800c6d8
|
|
8008eec: 200012a8 .word 0x200012a8
|
|
|
|
08008ef0 <SystemClock_Config>:
|
|
/**
|
|
* @brief System Clock Configuration
|
|
* @retval None
|
|
*/
|
|
void SystemClock_Config(void)
|
|
{
|
|
8008ef0: b580 push {r7, lr}
|
|
8008ef2: b094 sub sp, #80 ; 0x50
|
|
8008ef4: af00 add r7, sp, #0
|
|
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
|
8008ef6: f107 0328 add.w r3, r7, #40 ; 0x28
|
|
8008efa: 2228 movs r2, #40 ; 0x28
|
|
8008efc: 2100 movs r1, #0
|
|
8008efe: 4618 mov r0, r3
|
|
8008f00: f001 fee5 bl 800acce <memset>
|
|
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
|
8008f04: f107 0314 add.w r3, r7, #20
|
|
8008f08: 2200 movs r2, #0
|
|
8008f0a: 601a str r2, [r3, #0]
|
|
8008f0c: 605a str r2, [r3, #4]
|
|
8008f0e: 609a str r2, [r3, #8]
|
|
8008f10: 60da str r2, [r3, #12]
|
|
8008f12: 611a str r2, [r3, #16]
|
|
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
|
|
8008f14: 1d3b adds r3, r7, #4
|
|
8008f16: 2200 movs r2, #0
|
|
8008f18: 601a str r2, [r3, #0]
|
|
8008f1a: 605a str r2, [r3, #4]
|
|
8008f1c: 609a str r2, [r3, #8]
|
|
8008f1e: 60da str r2, [r3, #12]
|
|
|
|
/** Initializes the CPU, AHB and APB busses clocks
|
|
*/
|
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE;
|
|
8008f20: 2309 movs r3, #9
|
|
8008f22: 62bb str r3, [r7, #40] ; 0x28
|
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
|
8008f24: f44f 3380 mov.w r3, #65536 ; 0x10000
|
|
8008f28: 62fb str r3, [r7, #44] ; 0x2c
|
|
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
|
|
8008f2a: 2300 movs r3, #0
|
|
8008f2c: 633b str r3, [r7, #48] ; 0x30
|
|
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
|
|
8008f2e: 2301 movs r3, #1
|
|
8008f30: 63bb str r3, [r7, #56] ; 0x38
|
|
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
|
|
8008f32: 2301 movs r3, #1
|
|
8008f34: 643b str r3, [r7, #64] ; 0x40
|
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
|
8008f36: 2302 movs r3, #2
|
|
8008f38: 647b str r3, [r7, #68] ; 0x44
|
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
|
8008f3a: f44f 3380 mov.w r3, #65536 ; 0x10000
|
|
8008f3e: 64bb str r3, [r7, #72] ; 0x48
|
|
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
|
|
8008f40: f44f 13e0 mov.w r3, #1835008 ; 0x1c0000
|
|
8008f44: 64fb str r3, [r7, #76] ; 0x4c
|
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
|
8008f46: f107 0328 add.w r3, r7, #40 ; 0x28
|
|
8008f4a: 4618 mov r0, r3
|
|
8008f4c: f7f9 fb84 bl 8002658 <HAL_RCC_OscConfig>
|
|
8008f50: 4603 mov r3, r0
|
|
8008f52: 2b00 cmp r3, #0
|
|
8008f54: d001 beq.n 8008f5a <SystemClock_Config+0x6a>
|
|
{
|
|
Error_Handler();
|
|
8008f56: f000 fff3 bl 8009f40 <Error_Handler>
|
|
}
|
|
/** Initializes the CPU, AHB and APB busses clocks
|
|
*/
|
|
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
|
8008f5a: 230f movs r3, #15
|
|
8008f5c: 617b str r3, [r7, #20]
|
|
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
|
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
|
8008f5e: 2302 movs r3, #2
|
|
8008f60: 61bb str r3, [r7, #24]
|
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
|
8008f62: 2300 movs r3, #0
|
|
8008f64: 61fb str r3, [r7, #28]
|
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
|
|
8008f66: f44f 6380 mov.w r3, #1024 ; 0x400
|
|
8008f6a: 623b str r3, [r7, #32]
|
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
|
|
8008f6c: 2300 movs r3, #0
|
|
8008f6e: 627b str r3, [r7, #36] ; 0x24
|
|
|
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
|
|
8008f70: f107 0314 add.w r3, r7, #20
|
|
8008f74: 2102 movs r1, #2
|
|
8008f76: 4618 mov r0, r3
|
|
8008f78: f7f9 fdee bl 8002b58 <HAL_RCC_ClockConfig>
|
|
8008f7c: 4603 mov r3, r0
|
|
8008f7e: 2b00 cmp r3, #0
|
|
8008f80: d001 beq.n 8008f86 <SystemClock_Config+0x96>
|
|
{
|
|
Error_Handler();
|
|
8008f82: f000 ffdd bl 8009f40 <Error_Handler>
|
|
}
|
|
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USB;
|
|
8008f86: 2311 movs r3, #17
|
|
8008f88: 607b str r3, [r7, #4]
|
|
PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSI;
|
|
8008f8a: f44f 7300 mov.w r3, #512 ; 0x200
|
|
8008f8e: 60bb str r3, [r7, #8]
|
|
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
|
|
8008f90: 2300 movs r3, #0
|
|
8008f92: 613b str r3, [r7, #16]
|
|
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
|
|
8008f94: 1d3b adds r3, r7, #4
|
|
8008f96: 4618 mov r0, r3
|
|
8008f98: f7f9 ff7a bl 8002e90 <HAL_RCCEx_PeriphCLKConfig>
|
|
8008f9c: 4603 mov r3, r0
|
|
8008f9e: 2b00 cmp r3, #0
|
|
8008fa0: d001 beq.n 8008fa6 <SystemClock_Config+0xb6>
|
|
{
|
|
Error_Handler();
|
|
8008fa2: f000 ffcd bl 8009f40 <Error_Handler>
|
|
}
|
|
}
|
|
8008fa6: bf00 nop
|
|
8008fa8: 3750 adds r7, #80 ; 0x50
|
|
8008faa: 46bd mov sp, r7
|
|
8008fac: bd80 pop {r7, pc}
|
|
...
|
|
|
|
08008fb0 <MX_I2C1_Init>:
|
|
* @brief I2C1 Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_I2C1_Init(void)
|
|
{
|
|
8008fb0: b580 push {r7, lr}
|
|
8008fb2: af00 add r7, sp, #0
|
|
/* USER CODE END I2C1_Init 0 */
|
|
|
|
/* USER CODE BEGIN I2C1_Init 1 */
|
|
|
|
/* USER CODE END I2C1_Init 1 */
|
|
hi2c1.Instance = I2C1;
|
|
8008fb4: 4b12 ldr r3, [pc, #72] ; (8009000 <MX_I2C1_Init+0x50>)
|
|
8008fb6: 4a13 ldr r2, [pc, #76] ; (8009004 <MX_I2C1_Init+0x54>)
|
|
8008fb8: 601a str r2, [r3, #0]
|
|
hi2c1.Init.ClockSpeed = 100000;
|
|
8008fba: 4b11 ldr r3, [pc, #68] ; (8009000 <MX_I2C1_Init+0x50>)
|
|
8008fbc: 4a12 ldr r2, [pc, #72] ; (8009008 <MX_I2C1_Init+0x58>)
|
|
8008fbe: 605a str r2, [r3, #4]
|
|
hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2;
|
|
8008fc0: 4b0f ldr r3, [pc, #60] ; (8009000 <MX_I2C1_Init+0x50>)
|
|
8008fc2: 2200 movs r2, #0
|
|
8008fc4: 609a str r2, [r3, #8]
|
|
hi2c1.Init.OwnAddress1 = 0;
|
|
8008fc6: 4b0e ldr r3, [pc, #56] ; (8009000 <MX_I2C1_Init+0x50>)
|
|
8008fc8: 2200 movs r2, #0
|
|
8008fca: 60da str r2, [r3, #12]
|
|
hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
|
|
8008fcc: 4b0c ldr r3, [pc, #48] ; (8009000 <MX_I2C1_Init+0x50>)
|
|
8008fce: f44f 4280 mov.w r2, #16384 ; 0x4000
|
|
8008fd2: 611a str r2, [r3, #16]
|
|
hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
|
|
8008fd4: 4b0a ldr r3, [pc, #40] ; (8009000 <MX_I2C1_Init+0x50>)
|
|
8008fd6: 2200 movs r2, #0
|
|
8008fd8: 615a str r2, [r3, #20]
|
|
hi2c1.Init.OwnAddress2 = 0;
|
|
8008fda: 4b09 ldr r3, [pc, #36] ; (8009000 <MX_I2C1_Init+0x50>)
|
|
8008fdc: 2200 movs r2, #0
|
|
8008fde: 619a str r2, [r3, #24]
|
|
hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
|
|
8008fe0: 4b07 ldr r3, [pc, #28] ; (8009000 <MX_I2C1_Init+0x50>)
|
|
8008fe2: 2200 movs r2, #0
|
|
8008fe4: 61da str r2, [r3, #28]
|
|
hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
|
|
8008fe6: 4b06 ldr r3, [pc, #24] ; (8009000 <MX_I2C1_Init+0x50>)
|
|
8008fe8: 2200 movs r2, #0
|
|
8008fea: 621a str r2, [r3, #32]
|
|
if (HAL_I2C_Init(&hi2c1) != HAL_OK)
|
|
8008fec: 4804 ldr r0, [pc, #16] ; (8009000 <MX_I2C1_Init+0x50>)
|
|
8008fee: f7f8 fb1d bl 800162c <HAL_I2C_Init>
|
|
8008ff2: 4603 mov r3, r0
|
|
8008ff4: 2b00 cmp r3, #0
|
|
8008ff6: d001 beq.n 8008ffc <MX_I2C1_Init+0x4c>
|
|
{
|
|
Error_Handler();
|
|
8008ff8: f000 ffa2 bl 8009f40 <Error_Handler>
|
|
}
|
|
/* USER CODE BEGIN I2C1_Init 2 */
|
|
|
|
/* USER CODE END I2C1_Init 2 */
|
|
|
|
}
|
|
8008ffc: bf00 nop
|
|
8008ffe: bd80 pop {r7, pc}
|
|
8009000: 20001254 .word 0x20001254
|
|
8009004: 40005400 .word 0x40005400
|
|
8009008: 000186a0 .word 0x000186a0
|
|
|
|
0800900c <MX_RTC_Init>:
|
|
* @brief RTC Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_RTC_Init(void)
|
|
{
|
|
800900c: b580 push {r7, lr}
|
|
800900e: b082 sub sp, #8
|
|
8009010: af00 add r7, sp, #0
|
|
|
|
/* USER CODE BEGIN RTC_Init 0 */
|
|
|
|
/* USER CODE END RTC_Init 0 */
|
|
|
|
RTC_TimeTypeDef sTime = {0};
|
|
8009012: 1d3b adds r3, r7, #4
|
|
8009014: 2100 movs r1, #0
|
|
8009016: 460a mov r2, r1
|
|
8009018: 801a strh r2, [r3, #0]
|
|
800901a: 460a mov r2, r1
|
|
800901c: 709a strb r2, [r3, #2]
|
|
RTC_DateTypeDef DateToUpdate = {0};
|
|
800901e: 2300 movs r3, #0
|
|
8009020: 603b str r3, [r7, #0]
|
|
/* USER CODE BEGIN RTC_Init 1 */
|
|
|
|
/* USER CODE END RTC_Init 1 */
|
|
/** Initialize RTC Only
|
|
*/
|
|
hrtc.Instance = RTC;
|
|
8009022: 4b1d ldr r3, [pc, #116] ; (8009098 <MX_RTC_Init+0x8c>)
|
|
8009024: 4a1d ldr r2, [pc, #116] ; (800909c <MX_RTC_Init+0x90>)
|
|
8009026: 601a str r2, [r3, #0]
|
|
hrtc.Init.AsynchPrediv = RTC_AUTO_1_SECOND;
|
|
8009028: 4b1b ldr r3, [pc, #108] ; (8009098 <MX_RTC_Init+0x8c>)
|
|
800902a: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
|
800902e: 605a str r2, [r3, #4]
|
|
hrtc.Init.OutPut = RTC_OUTPUTSOURCE_ALARM;
|
|
8009030: 4b19 ldr r3, [pc, #100] ; (8009098 <MX_RTC_Init+0x8c>)
|
|
8009032: f44f 7280 mov.w r2, #256 ; 0x100
|
|
8009036: 609a str r2, [r3, #8]
|
|
if (HAL_RTC_Init(&hrtc) != HAL_OK)
|
|
8009038: 4817 ldr r0, [pc, #92] ; (8009098 <MX_RTC_Init+0x8c>)
|
|
800903a: f7fa f89b bl 8003174 <HAL_RTC_Init>
|
|
800903e: 4603 mov r3, r0
|
|
8009040: 2b00 cmp r3, #0
|
|
8009042: d001 beq.n 8009048 <MX_RTC_Init+0x3c>
|
|
{
|
|
Error_Handler();
|
|
8009044: f000 ff7c bl 8009f40 <Error_Handler>
|
|
|
|
/* USER CODE END Check_RTC_BKUP */
|
|
|
|
/** Initialize RTC and set the Time and Date
|
|
*/
|
|
sTime.Hours = 14;
|
|
8009048: 230e movs r3, #14
|
|
800904a: 713b strb r3, [r7, #4]
|
|
sTime.Minutes = 54;
|
|
800904c: 2336 movs r3, #54 ; 0x36
|
|
800904e: 717b strb r3, [r7, #5]
|
|
sTime.Seconds = 0;
|
|
8009050: 2300 movs r3, #0
|
|
8009052: 71bb strb r3, [r7, #6]
|
|
|
|
if (HAL_RTC_SetTime(&hrtc, &sTime, RTC_FORMAT_BIN) != HAL_OK)
|
|
8009054: 1d3b adds r3, r7, #4
|
|
8009056: 2200 movs r2, #0
|
|
8009058: 4619 mov r1, r3
|
|
800905a: 480f ldr r0, [pc, #60] ; (8009098 <MX_RTC_Init+0x8c>)
|
|
800905c: f7fa f920 bl 80032a0 <HAL_RTC_SetTime>
|
|
8009060: 4603 mov r3, r0
|
|
8009062: 2b00 cmp r3, #0
|
|
8009064: d001 beq.n 800906a <MX_RTC_Init+0x5e>
|
|
{
|
|
Error_Handler();
|
|
8009066: f000 ff6b bl 8009f40 <Error_Handler>
|
|
}
|
|
DateToUpdate.WeekDay = RTC_WEEKDAY_MONDAY;
|
|
800906a: 2301 movs r3, #1
|
|
800906c: 703b strb r3, [r7, #0]
|
|
DateToUpdate.Month = RTC_MONTH_JANUARY;
|
|
800906e: 2301 movs r3, #1
|
|
8009070: 707b strb r3, [r7, #1]
|
|
DateToUpdate.Date = 1;
|
|
8009072: 2301 movs r3, #1
|
|
8009074: 70bb strb r3, [r7, #2]
|
|
DateToUpdate.Year = 0;
|
|
8009076: 2300 movs r3, #0
|
|
8009078: 70fb strb r3, [r7, #3]
|
|
|
|
if (HAL_RTC_SetDate(&hrtc, &DateToUpdate, RTC_FORMAT_BIN) != HAL_OK)
|
|
800907a: 463b mov r3, r7
|
|
800907c: 2200 movs r2, #0
|
|
800907e: 4619 mov r1, r3
|
|
8009080: 4805 ldr r0, [pc, #20] ; (8009098 <MX_RTC_Init+0x8c>)
|
|
8009082: f7fa fa7d bl 8003580 <HAL_RTC_SetDate>
|
|
8009086: 4603 mov r3, r0
|
|
8009088: 2b00 cmp r3, #0
|
|
800908a: d001 beq.n 8009090 <MX_RTC_Init+0x84>
|
|
{
|
|
Error_Handler();
|
|
800908c: f000 ff58 bl 8009f40 <Error_Handler>
|
|
}
|
|
/* USER CODE BEGIN RTC_Init 2 */
|
|
|
|
/* USER CODE END RTC_Init 2 */
|
|
|
|
}
|
|
8009090: bf00 nop
|
|
8009092: 3708 adds r7, #8
|
|
8009094: 46bd mov sp, r7
|
|
8009096: bd80 pop {r7, pc}
|
|
8009098: 200012ac .word 0x200012ac
|
|
800909c: 40002800 .word 0x40002800
|
|
|
|
080090a0 <MX_SPI2_Init>:
|
|
* @brief SPI2 Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_SPI2_Init(void)
|
|
{
|
|
80090a0: b580 push {r7, lr}
|
|
80090a2: af00 add r7, sp, #0
|
|
|
|
/* USER CODE BEGIN SPI2_Init 1 */
|
|
|
|
/* USER CODE END SPI2_Init 1 */
|
|
/* SPI2 parameter configuration*/
|
|
hspi2.Instance = SPI2;
|
|
80090a4: 4b17 ldr r3, [pc, #92] ; (8009104 <MX_SPI2_Init+0x64>)
|
|
80090a6: 4a18 ldr r2, [pc, #96] ; (8009108 <MX_SPI2_Init+0x68>)
|
|
80090a8: 601a str r2, [r3, #0]
|
|
hspi2.Init.Mode = SPI_MODE_MASTER;
|
|
80090aa: 4b16 ldr r3, [pc, #88] ; (8009104 <MX_SPI2_Init+0x64>)
|
|
80090ac: f44f 7282 mov.w r2, #260 ; 0x104
|
|
80090b0: 605a str r2, [r3, #4]
|
|
hspi2.Init.Direction = SPI_DIRECTION_2LINES;
|
|
80090b2: 4b14 ldr r3, [pc, #80] ; (8009104 <MX_SPI2_Init+0x64>)
|
|
80090b4: 2200 movs r2, #0
|
|
80090b6: 609a str r2, [r3, #8]
|
|
hspi2.Init.DataSize = SPI_DATASIZE_8BIT;
|
|
80090b8: 4b12 ldr r3, [pc, #72] ; (8009104 <MX_SPI2_Init+0x64>)
|
|
80090ba: 2200 movs r2, #0
|
|
80090bc: 60da str r2, [r3, #12]
|
|
hspi2.Init.CLKPolarity = SPI_POLARITY_LOW;
|
|
80090be: 4b11 ldr r3, [pc, #68] ; (8009104 <MX_SPI2_Init+0x64>)
|
|
80090c0: 2200 movs r2, #0
|
|
80090c2: 611a str r2, [r3, #16]
|
|
hspi2.Init.CLKPhase = SPI_PHASE_1EDGE;
|
|
80090c4: 4b0f ldr r3, [pc, #60] ; (8009104 <MX_SPI2_Init+0x64>)
|
|
80090c6: 2200 movs r2, #0
|
|
80090c8: 615a str r2, [r3, #20]
|
|
hspi2.Init.NSS = SPI_NSS_SOFT;
|
|
80090ca: 4b0e ldr r3, [pc, #56] ; (8009104 <MX_SPI2_Init+0x64>)
|
|
80090cc: f44f 7200 mov.w r2, #512 ; 0x200
|
|
80090d0: 619a str r2, [r3, #24]
|
|
hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
|
|
80090d2: 4b0c ldr r3, [pc, #48] ; (8009104 <MX_SPI2_Init+0x64>)
|
|
80090d4: 2200 movs r2, #0
|
|
80090d6: 61da str r2, [r3, #28]
|
|
hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB;
|
|
80090d8: 4b0a ldr r3, [pc, #40] ; (8009104 <MX_SPI2_Init+0x64>)
|
|
80090da: 2200 movs r2, #0
|
|
80090dc: 621a str r2, [r3, #32]
|
|
hspi2.Init.TIMode = SPI_TIMODE_DISABLE;
|
|
80090de: 4b09 ldr r3, [pc, #36] ; (8009104 <MX_SPI2_Init+0x64>)
|
|
80090e0: 2200 movs r2, #0
|
|
80090e2: 625a str r2, [r3, #36] ; 0x24
|
|
hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
|
|
80090e4: 4b07 ldr r3, [pc, #28] ; (8009104 <MX_SPI2_Init+0x64>)
|
|
80090e6: 2200 movs r2, #0
|
|
80090e8: 629a str r2, [r3, #40] ; 0x28
|
|
hspi2.Init.CRCPolynomial = 10;
|
|
80090ea: 4b06 ldr r3, [pc, #24] ; (8009104 <MX_SPI2_Init+0x64>)
|
|
80090ec: 220a movs r2, #10
|
|
80090ee: 62da str r2, [r3, #44] ; 0x2c
|
|
if (HAL_SPI_Init(&hspi2) != HAL_OK)
|
|
80090f0: 4804 ldr r0, [pc, #16] ; (8009104 <MX_SPI2_Init+0x64>)
|
|
80090f2: f7fa fd9d bl 8003c30 <HAL_SPI_Init>
|
|
80090f6: 4603 mov r3, r0
|
|
80090f8: 2b00 cmp r3, #0
|
|
80090fa: d001 beq.n 8009100 <MX_SPI2_Init+0x60>
|
|
{
|
|
Error_Handler();
|
|
80090fc: f000 ff20 bl 8009f40 <Error_Handler>
|
|
}
|
|
/* USER CODE BEGIN SPI2_Init 2 */
|
|
|
|
/* USER CODE END SPI2_Init 2 */
|
|
|
|
}
|
|
8009100: bf00 nop
|
|
8009102: bd80 pop {r7, pc}
|
|
8009104: 200011fc .word 0x200011fc
|
|
8009108: 40003800 .word 0x40003800
|
|
|
|
0800910c <MX_TIM2_Init>:
|
|
* @brief TIM2 Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_TIM2_Init(void)
|
|
{
|
|
800910c: b580 push {r7, lr}
|
|
800910e: b08c sub sp, #48 ; 0x30
|
|
8009110: af00 add r7, sp, #0
|
|
|
|
/* USER CODE BEGIN TIM2_Init 0 */
|
|
|
|
/* USER CODE END TIM2_Init 0 */
|
|
|
|
TIM_Encoder_InitTypeDef sConfig = {0};
|
|
8009112: f107 030c add.w r3, r7, #12
|
|
8009116: 2224 movs r2, #36 ; 0x24
|
|
8009118: 2100 movs r1, #0
|
|
800911a: 4618 mov r0, r3
|
|
800911c: f001 fdd7 bl 800acce <memset>
|
|
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
|
8009120: 1d3b adds r3, r7, #4
|
|
8009122: 2200 movs r2, #0
|
|
8009124: 601a str r2, [r3, #0]
|
|
8009126: 605a str r2, [r3, #4]
|
|
|
|
/* USER CODE BEGIN TIM2_Init 1 */
|
|
|
|
/* USER CODE END TIM2_Init 1 */
|
|
htim2.Instance = TIM2;
|
|
8009128: 4b21 ldr r3, [pc, #132] ; (80091b0 <MX_TIM2_Init+0xa4>)
|
|
800912a: f04f 4280 mov.w r2, #1073741824 ; 0x40000000
|
|
800912e: 601a str r2, [r3, #0]
|
|
htim2.Init.Prescaler = 0;
|
|
8009130: 4b1f ldr r3, [pc, #124] ; (80091b0 <MX_TIM2_Init+0xa4>)
|
|
8009132: 2200 movs r2, #0
|
|
8009134: 605a str r2, [r3, #4]
|
|
htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
|
|
8009136: 4b1e ldr r3, [pc, #120] ; (80091b0 <MX_TIM2_Init+0xa4>)
|
|
8009138: 2200 movs r2, #0
|
|
800913a: 609a str r2, [r3, #8]
|
|
htim2.Init.Period = 65535;
|
|
800913c: 4b1c ldr r3, [pc, #112] ; (80091b0 <MX_TIM2_Init+0xa4>)
|
|
800913e: f64f 72ff movw r2, #65535 ; 0xffff
|
|
8009142: 60da str r2, [r3, #12]
|
|
htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
|
8009144: 4b1a ldr r3, [pc, #104] ; (80091b0 <MX_TIM2_Init+0xa4>)
|
|
8009146: 2200 movs r2, #0
|
|
8009148: 611a str r2, [r3, #16]
|
|
htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
|
800914a: 4b19 ldr r3, [pc, #100] ; (80091b0 <MX_TIM2_Init+0xa4>)
|
|
800914c: 2200 movs r2, #0
|
|
800914e: 619a str r2, [r3, #24]
|
|
sConfig.EncoderMode = TIM_ENCODERMODE_TI12;
|
|
8009150: 2303 movs r3, #3
|
|
8009152: 60fb str r3, [r7, #12]
|
|
sConfig.IC1Polarity = TIM_ICPOLARITY_RISING;
|
|
8009154: 2300 movs r3, #0
|
|
8009156: 613b str r3, [r7, #16]
|
|
sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI;
|
|
8009158: 2301 movs r3, #1
|
|
800915a: 617b str r3, [r7, #20]
|
|
sConfig.IC1Prescaler = TIM_ICPSC_DIV1;
|
|
800915c: 2300 movs r3, #0
|
|
800915e: 61bb str r3, [r7, #24]
|
|
sConfig.IC1Filter = 0;
|
|
8009160: 2300 movs r3, #0
|
|
8009162: 61fb str r3, [r7, #28]
|
|
sConfig.IC2Polarity = TIM_ICPOLARITY_RISING;
|
|
8009164: 2300 movs r3, #0
|
|
8009166: 623b str r3, [r7, #32]
|
|
sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI;
|
|
8009168: 2301 movs r3, #1
|
|
800916a: 627b str r3, [r7, #36] ; 0x24
|
|
sConfig.IC2Prescaler = TIM_ICPSC_DIV1;
|
|
800916c: 2300 movs r3, #0
|
|
800916e: 62bb str r3, [r7, #40] ; 0x28
|
|
sConfig.IC2Filter = 0;
|
|
8009170: 2300 movs r3, #0
|
|
8009172: 62fb str r3, [r7, #44] ; 0x2c
|
|
if (HAL_TIM_Encoder_Init(&htim2, &sConfig) != HAL_OK)
|
|
8009174: f107 030c add.w r3, r7, #12
|
|
8009178: 4619 mov r1, r3
|
|
800917a: 480d ldr r0, [pc, #52] ; (80091b0 <MX_TIM2_Init+0xa4>)
|
|
800917c: f7fa ff75 bl 800406a <HAL_TIM_Encoder_Init>
|
|
8009180: 4603 mov r3, r0
|
|
8009182: 2b00 cmp r3, #0
|
|
8009184: d001 beq.n 800918a <MX_TIM2_Init+0x7e>
|
|
{
|
|
Error_Handler();
|
|
8009186: f000 fedb bl 8009f40 <Error_Handler>
|
|
}
|
|
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
|
|
800918a: 2300 movs r3, #0
|
|
800918c: 607b str r3, [r7, #4]
|
|
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
|
800918e: 2300 movs r3, #0
|
|
8009190: 60bb str r3, [r7, #8]
|
|
if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
|
|
8009192: 1d3b adds r3, r7, #4
|
|
8009194: 4619 mov r1, r3
|
|
8009196: 4806 ldr r0, [pc, #24] ; (80091b0 <MX_TIM2_Init+0xa4>)
|
|
8009198: f7fb f8b2 bl 8004300 <HAL_TIMEx_MasterConfigSynchronization>
|
|
800919c: 4603 mov r3, r0
|
|
800919e: 2b00 cmp r3, #0
|
|
80091a0: d001 beq.n 80091a6 <MX_TIM2_Init+0x9a>
|
|
{
|
|
Error_Handler();
|
|
80091a2: f000 fecd bl 8009f40 <Error_Handler>
|
|
}
|
|
/* USER CODE BEGIN TIM2_Init 2 */
|
|
|
|
/* USER CODE END TIM2_Init 2 */
|
|
|
|
}
|
|
80091a6: bf00 nop
|
|
80091a8: 3730 adds r7, #48 ; 0x30
|
|
80091aa: 46bd mov sp, r7
|
|
80091ac: bd80 pop {r7, pc}
|
|
80091ae: bf00 nop
|
|
80091b0: 200012c0 .word 0x200012c0
|
|
|
|
080091b4 <MX_USART2_UART_Init>:
|
|
* @brief USART2 Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_USART2_UART_Init(void)
|
|
{
|
|
80091b4: b580 push {r7, lr}
|
|
80091b6: af00 add r7, sp, #0
|
|
/* USER CODE END USART2_Init 0 */
|
|
|
|
/* USER CODE BEGIN USART2_Init 1 */
|
|
|
|
/* USER CODE END USART2_Init 1 */
|
|
huart2.Instance = USART2;
|
|
80091b8: 4b11 ldr r3, [pc, #68] ; (8009200 <MX_USART2_UART_Init+0x4c>)
|
|
80091ba: 4a12 ldr r2, [pc, #72] ; (8009204 <MX_USART2_UART_Init+0x50>)
|
|
80091bc: 601a str r2, [r3, #0]
|
|
huart2.Init.BaudRate = 115200;
|
|
80091be: 4b10 ldr r3, [pc, #64] ; (8009200 <MX_USART2_UART_Init+0x4c>)
|
|
80091c0: f44f 32e1 mov.w r2, #115200 ; 0x1c200
|
|
80091c4: 605a str r2, [r3, #4]
|
|
huart2.Init.WordLength = UART_WORDLENGTH_8B;
|
|
80091c6: 4b0e ldr r3, [pc, #56] ; (8009200 <MX_USART2_UART_Init+0x4c>)
|
|
80091c8: 2200 movs r2, #0
|
|
80091ca: 609a str r2, [r3, #8]
|
|
huart2.Init.StopBits = UART_STOPBITS_1;
|
|
80091cc: 4b0c ldr r3, [pc, #48] ; (8009200 <MX_USART2_UART_Init+0x4c>)
|
|
80091ce: 2200 movs r2, #0
|
|
80091d0: 60da str r2, [r3, #12]
|
|
huart2.Init.Parity = UART_PARITY_NONE;
|
|
80091d2: 4b0b ldr r3, [pc, #44] ; (8009200 <MX_USART2_UART_Init+0x4c>)
|
|
80091d4: 2200 movs r2, #0
|
|
80091d6: 611a str r2, [r3, #16]
|
|
huart2.Init.Mode = UART_MODE_TX_RX;
|
|
80091d8: 4b09 ldr r3, [pc, #36] ; (8009200 <MX_USART2_UART_Init+0x4c>)
|
|
80091da: 220c movs r2, #12
|
|
80091dc: 615a str r2, [r3, #20]
|
|
huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
|
80091de: 4b08 ldr r3, [pc, #32] ; (8009200 <MX_USART2_UART_Init+0x4c>)
|
|
80091e0: 2200 movs r2, #0
|
|
80091e2: 619a str r2, [r3, #24]
|
|
huart2.Init.OverSampling = UART_OVERSAMPLING_16;
|
|
80091e4: 4b06 ldr r3, [pc, #24] ; (8009200 <MX_USART2_UART_Init+0x4c>)
|
|
80091e6: 2200 movs r2, #0
|
|
80091e8: 61da str r2, [r3, #28]
|
|
if (HAL_UART_Init(&huart2) != HAL_OK)
|
|
80091ea: 4805 ldr r0, [pc, #20] ; (8009200 <MX_USART2_UART_Init+0x4c>)
|
|
80091ec: f7fb f8cc bl 8004388 <HAL_UART_Init>
|
|
80091f0: 4603 mov r3, r0
|
|
80091f2: 2b00 cmp r3, #0
|
|
80091f4: d001 beq.n 80091fa <MX_USART2_UART_Init+0x46>
|
|
{
|
|
Error_Handler();
|
|
80091f6: f000 fea3 bl 8009f40 <Error_Handler>
|
|
}
|
|
/* USER CODE BEGIN USART2_Init 2 */
|
|
|
|
/* USER CODE END USART2_Init 2 */
|
|
|
|
}
|
|
80091fa: bf00 nop
|
|
80091fc: bd80 pop {r7, pc}
|
|
80091fe: bf00 nop
|
|
8009200: 20001300 .word 0x20001300
|
|
8009204: 40004400 .word 0x40004400
|
|
|
|
08009208 <MX_GPIO_Init>:
|
|
* @brief GPIO Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_GPIO_Init(void)
|
|
{
|
|
8009208: b580 push {r7, lr}
|
|
800920a: b088 sub sp, #32
|
|
800920c: af00 add r7, sp, #0
|
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
800920e: f107 0310 add.w r3, r7, #16
|
|
8009212: 2200 movs r2, #0
|
|
8009214: 601a str r2, [r3, #0]
|
|
8009216: 605a str r2, [r3, #4]
|
|
8009218: 609a str r2, [r3, #8]
|
|
800921a: 60da str r2, [r3, #12]
|
|
|
|
/* GPIO Ports Clock Enable */
|
|
__HAL_RCC_GPIOC_CLK_ENABLE();
|
|
800921c: 4b29 ldr r3, [pc, #164] ; (80092c4 <MX_GPIO_Init+0xbc>)
|
|
800921e: 699b ldr r3, [r3, #24]
|
|
8009220: 4a28 ldr r2, [pc, #160] ; (80092c4 <MX_GPIO_Init+0xbc>)
|
|
8009222: f043 0310 orr.w r3, r3, #16
|
|
8009226: 6193 str r3, [r2, #24]
|
|
8009228: 4b26 ldr r3, [pc, #152] ; (80092c4 <MX_GPIO_Init+0xbc>)
|
|
800922a: 699b ldr r3, [r3, #24]
|
|
800922c: f003 0310 and.w r3, r3, #16
|
|
8009230: 60fb str r3, [r7, #12]
|
|
8009232: 68fb ldr r3, [r7, #12]
|
|
__HAL_RCC_GPIOD_CLK_ENABLE();
|
|
8009234: 4b23 ldr r3, [pc, #140] ; (80092c4 <MX_GPIO_Init+0xbc>)
|
|
8009236: 699b ldr r3, [r3, #24]
|
|
8009238: 4a22 ldr r2, [pc, #136] ; (80092c4 <MX_GPIO_Init+0xbc>)
|
|
800923a: f043 0320 orr.w r3, r3, #32
|
|
800923e: 6193 str r3, [r2, #24]
|
|
8009240: 4b20 ldr r3, [pc, #128] ; (80092c4 <MX_GPIO_Init+0xbc>)
|
|
8009242: 699b ldr r3, [r3, #24]
|
|
8009244: f003 0320 and.w r3, r3, #32
|
|
8009248: 60bb str r3, [r7, #8]
|
|
800924a: 68bb ldr r3, [r7, #8]
|
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
|
800924c: 4b1d ldr r3, [pc, #116] ; (80092c4 <MX_GPIO_Init+0xbc>)
|
|
800924e: 699b ldr r3, [r3, #24]
|
|
8009250: 4a1c ldr r2, [pc, #112] ; (80092c4 <MX_GPIO_Init+0xbc>)
|
|
8009252: f043 0304 orr.w r3, r3, #4
|
|
8009256: 6193 str r3, [r2, #24]
|
|
8009258: 4b1a ldr r3, [pc, #104] ; (80092c4 <MX_GPIO_Init+0xbc>)
|
|
800925a: 699b ldr r3, [r3, #24]
|
|
800925c: f003 0304 and.w r3, r3, #4
|
|
8009260: 607b str r3, [r7, #4]
|
|
8009262: 687b ldr r3, [r7, #4]
|
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
|
8009264: 4b17 ldr r3, [pc, #92] ; (80092c4 <MX_GPIO_Init+0xbc>)
|
|
8009266: 699b ldr r3, [r3, #24]
|
|
8009268: 4a16 ldr r2, [pc, #88] ; (80092c4 <MX_GPIO_Init+0xbc>)
|
|
800926a: f043 0308 orr.w r3, r3, #8
|
|
800926e: 6193 str r3, [r2, #24]
|
|
8009270: 4b14 ldr r3, [pc, #80] ; (80092c4 <MX_GPIO_Init+0xbc>)
|
|
8009272: 699b ldr r3, [r3, #24]
|
|
8009274: f003 0308 and.w r3, r3, #8
|
|
8009278: 603b str r3, [r7, #0]
|
|
800927a: 683b ldr r3, [r7, #0]
|
|
|
|
/*Configure GPIO pin Output Level */
|
|
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7, GPIO_PIN_RESET);
|
|
800927c: 2200 movs r2, #0
|
|
800927e: 21e0 movs r1, #224 ; 0xe0
|
|
8009280: 4811 ldr r0, [pc, #68] ; (80092c8 <MX_GPIO_Init+0xc0>)
|
|
8009282: f7f8 f9ba bl 80015fa <HAL_GPIO_WritePin>
|
|
|
|
/*Configure GPIO pin : PA4 */
|
|
GPIO_InitStruct.Pin = GPIO_PIN_4;
|
|
8009286: 2310 movs r3, #16
|
|
8009288: 613b str r3, [r7, #16]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
|
800928a: 2300 movs r3, #0
|
|
800928c: 617b str r3, [r7, #20]
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
800928e: 2300 movs r3, #0
|
|
8009290: 61bb str r3, [r7, #24]
|
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
|
8009292: f107 0310 add.w r3, r7, #16
|
|
8009296: 4619 mov r1, r3
|
|
8009298: 480b ldr r0, [pc, #44] ; (80092c8 <MX_GPIO_Init+0xc0>)
|
|
800929a: f7f8 f83d bl 8001318 <HAL_GPIO_Init>
|
|
|
|
/*Configure GPIO pins : PA5 PA6 PA7 */
|
|
GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7;
|
|
800929e: 23e0 movs r3, #224 ; 0xe0
|
|
80092a0: 613b str r3, [r7, #16]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
|
80092a2: 2301 movs r3, #1
|
|
80092a4: 617b str r3, [r7, #20]
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
80092a6: 2300 movs r3, #0
|
|
80092a8: 61bb str r3, [r7, #24]
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
|
80092aa: 2302 movs r3, #2
|
|
80092ac: 61fb str r3, [r7, #28]
|
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
|
80092ae: f107 0310 add.w r3, r7, #16
|
|
80092b2: 4619 mov r1, r3
|
|
80092b4: 4804 ldr r0, [pc, #16] ; (80092c8 <MX_GPIO_Init+0xc0>)
|
|
80092b6: f7f8 f82f bl 8001318 <HAL_GPIO_Init>
|
|
|
|
}
|
|
80092ba: bf00 nop
|
|
80092bc: 3720 adds r7, #32
|
|
80092be: 46bd mov sp, r7
|
|
80092c0: bd80 pop {r7, pc}
|
|
80092c2: bf00 nop
|
|
80092c4: 40021000 .word 0x40021000
|
|
80092c8: 40010800 .word 0x40010800
|
|
|
|
080092cc <initDisplay>:
|
|
|
|
/* USER CODE BEGIN 4 */
|
|
void initDisplay() {
|
|
80092cc: b580 push {r7, lr}
|
|
80092ce: af00 add r7, sp, #0
|
|
ILI9341_Unselect();
|
|
80092d0: f7fc fae8 bl 80058a4 <ILI9341_Unselect>
|
|
ILI9341_TouchUnselect();
|
|
80092d4: f7fd f978 bl 80065c8 <ILI9341_TouchUnselect>
|
|
ILI9341_Init();
|
|
80092d8: f7fc fb92 bl 8005a00 <ILI9341_Init>
|
|
}
|
|
80092dc: bf00 nop
|
|
80092de: bd80 pop {r7, pc}
|
|
|
|
080092e0 <drawLineCircle>:
|
|
HAL_MAX_DELAY);
|
|
va_end(args);
|
|
}
|
|
|
|
void drawLineCircle (int32_t centreX, int32_t centreY, int32_t diameter, uint16_t color)
|
|
{
|
|
80092e0: b5b0 push {r4, r5, r7, lr}
|
|
80092e2: b08c sub sp, #48 ; 0x30
|
|
80092e4: af02 add r7, sp, #8
|
|
80092e6: 60f8 str r0, [r7, #12]
|
|
80092e8: 60b9 str r1, [r7, #8]
|
|
80092ea: 607a str r2, [r7, #4]
|
|
80092ec: 807b strh r3, [r7, #2]
|
|
int32_t dxOuter, dyOuter, dxi, dyi;
|
|
for (float i = 0; i <360; i = i + 22.5) {
|
|
80092ee: f04f 0300 mov.w r3, #0
|
|
80092f2: 627b str r3, [r7, #36] ; 0x24
|
|
80092f4: e0a5 b.n 8009442 <drawLineCircle+0x162>
|
|
dxOuter = diameter * cos((i-90)*M_PI/180.0);
|
|
80092f6: 6878 ldr r0, [r7, #4]
|
|
80092f8: f7f7 f87c bl 80003f4 <__aeabi_i2d>
|
|
80092fc: 4604 mov r4, r0
|
|
80092fe: 460d mov r5, r1
|
|
8009300: 495b ldr r1, [pc, #364] ; (8009470 <drawLineCircle+0x190>)
|
|
8009302: 6a78 ldr r0, [r7, #36] ; 0x24
|
|
8009304: f7f7 fba6 bl 8000a54 <__aeabi_fsub>
|
|
8009308: 4603 mov r3, r0
|
|
800930a: 4618 mov r0, r3
|
|
800930c: f7f7 f884 bl 8000418 <__aeabi_f2d>
|
|
8009310: a353 add r3, pc, #332 ; (adr r3, 8009460 <drawLineCircle+0x180>)
|
|
8009312: e9d3 2300 ldrd r2, r3, [r3]
|
|
8009316: f7f7 f8d7 bl 80004c8 <__aeabi_dmul>
|
|
800931a: 4602 mov r2, r0
|
|
800931c: 460b mov r3, r1
|
|
800931e: 4610 mov r0, r2
|
|
8009320: 4619 mov r1, r3
|
|
8009322: f04f 0200 mov.w r2, #0
|
|
8009326: 4b53 ldr r3, [pc, #332] ; (8009474 <drawLineCircle+0x194>)
|
|
8009328: f7f7 f9f8 bl 800071c <__aeabi_ddiv>
|
|
800932c: 4602 mov r2, r0
|
|
800932e: 460b mov r3, r1
|
|
8009330: 4610 mov r0, r2
|
|
8009332: 4619 mov r1, r3
|
|
8009334: f002 f910 bl 800b558 <cos>
|
|
8009338: 4602 mov r2, r0
|
|
800933a: 460b mov r3, r1
|
|
800933c: 4620 mov r0, r4
|
|
800933e: 4629 mov r1, r5
|
|
8009340: f7f7 f8c2 bl 80004c8 <__aeabi_dmul>
|
|
8009344: 4603 mov r3, r0
|
|
8009346: 460c mov r4, r1
|
|
8009348: 4618 mov r0, r3
|
|
800934a: 4621 mov r1, r4
|
|
800934c: f7f7 fb56 bl 80009fc <__aeabi_d2iz>
|
|
8009350: 4603 mov r3, r0
|
|
8009352: 623b str r3, [r7, #32]
|
|
dyOuter = diameter * sin((i-90)*M_PI/180.0);
|
|
8009354: 6878 ldr r0, [r7, #4]
|
|
8009356: f7f7 f84d bl 80003f4 <__aeabi_i2d>
|
|
800935a: 4604 mov r4, r0
|
|
800935c: 460d mov r5, r1
|
|
800935e: 4944 ldr r1, [pc, #272] ; (8009470 <drawLineCircle+0x190>)
|
|
8009360: 6a78 ldr r0, [r7, #36] ; 0x24
|
|
8009362: f7f7 fb77 bl 8000a54 <__aeabi_fsub>
|
|
8009366: 4603 mov r3, r0
|
|
8009368: 4618 mov r0, r3
|
|
800936a: f7f7 f855 bl 8000418 <__aeabi_f2d>
|
|
800936e: a33c add r3, pc, #240 ; (adr r3, 8009460 <drawLineCircle+0x180>)
|
|
8009370: e9d3 2300 ldrd r2, r3, [r3]
|
|
8009374: f7f7 f8a8 bl 80004c8 <__aeabi_dmul>
|
|
8009378: 4602 mov r2, r0
|
|
800937a: 460b mov r3, r1
|
|
800937c: 4610 mov r0, r2
|
|
800937e: 4619 mov r1, r3
|
|
8009380: f04f 0200 mov.w r2, #0
|
|
8009384: 4b3b ldr r3, [pc, #236] ; (8009474 <drawLineCircle+0x194>)
|
|
8009386: f7f7 f9c9 bl 800071c <__aeabi_ddiv>
|
|
800938a: 4602 mov r2, r0
|
|
800938c: 460b mov r3, r1
|
|
800938e: 4610 mov r0, r2
|
|
8009390: 4619 mov r1, r3
|
|
8009392: f002 f95d bl 800b650 <sin>
|
|
8009396: 4602 mov r2, r0
|
|
8009398: 460b mov r3, r1
|
|
800939a: 4620 mov r0, r4
|
|
800939c: 4629 mov r1, r5
|
|
800939e: f7f7 f893 bl 80004c8 <__aeabi_dmul>
|
|
80093a2: 4603 mov r3, r0
|
|
80093a4: 460c mov r4, r1
|
|
80093a6: 4618 mov r0, r3
|
|
80093a8: 4621 mov r1, r4
|
|
80093aa: f7f7 fb27 bl 80009fc <__aeabi_d2iz>
|
|
80093ae: 4603 mov r3, r0
|
|
80093b0: 61fb str r3, [r7, #28]
|
|
dxi = dxOuter * 0.98;
|
|
80093b2: 6a38 ldr r0, [r7, #32]
|
|
80093b4: f7f7 f81e bl 80003f4 <__aeabi_i2d>
|
|
80093b8: a32b add r3, pc, #172 ; (adr r3, 8009468 <drawLineCircle+0x188>)
|
|
80093ba: e9d3 2300 ldrd r2, r3, [r3]
|
|
80093be: f7f7 f883 bl 80004c8 <__aeabi_dmul>
|
|
80093c2: 4603 mov r3, r0
|
|
80093c4: 460c mov r4, r1
|
|
80093c6: 4618 mov r0, r3
|
|
80093c8: 4621 mov r1, r4
|
|
80093ca: f7f7 fb17 bl 80009fc <__aeabi_d2iz>
|
|
80093ce: 4603 mov r3, r0
|
|
80093d0: 61bb str r3, [r7, #24]
|
|
dyi = dyOuter * 0.98;
|
|
80093d2: 69f8 ldr r0, [r7, #28]
|
|
80093d4: f7f7 f80e bl 80003f4 <__aeabi_i2d>
|
|
80093d8: a323 add r3, pc, #140 ; (adr r3, 8009468 <drawLineCircle+0x188>)
|
|
80093da: e9d3 2300 ldrd r2, r3, [r3]
|
|
80093de: f7f7 f873 bl 80004c8 <__aeabi_dmul>
|
|
80093e2: 4603 mov r3, r0
|
|
80093e4: 460c mov r4, r1
|
|
80093e6: 4618 mov r0, r3
|
|
80093e8: 4621 mov r1, r4
|
|
80093ea: f7f7 fb07 bl 80009fc <__aeabi_d2iz>
|
|
80093ee: 4603 mov r3, r0
|
|
80093f0: 617b str r3, [r7, #20]
|
|
ILI9341_writeLine(dxi+centreX,dyi+centreY,dxOuter+centreX,dyOuter+centreY,color);
|
|
80093f2: 69bb ldr r3, [r7, #24]
|
|
80093f4: b29a uxth r2, r3
|
|
80093f6: 68fb ldr r3, [r7, #12]
|
|
80093f8: b29b uxth r3, r3
|
|
80093fa: 4413 add r3, r2
|
|
80093fc: b29b uxth r3, r3
|
|
80093fe: b218 sxth r0, r3
|
|
8009400: 697b ldr r3, [r7, #20]
|
|
8009402: b29a uxth r2, r3
|
|
8009404: 68bb ldr r3, [r7, #8]
|
|
8009406: b29b uxth r3, r3
|
|
8009408: 4413 add r3, r2
|
|
800940a: b29b uxth r3, r3
|
|
800940c: b219 sxth r1, r3
|
|
800940e: 6a3b ldr r3, [r7, #32]
|
|
8009410: b29a uxth r2, r3
|
|
8009412: 68fb ldr r3, [r7, #12]
|
|
8009414: b29b uxth r3, r3
|
|
8009416: 4413 add r3, r2
|
|
8009418: b29b uxth r3, r3
|
|
800941a: b21c sxth r4, r3
|
|
800941c: 69fb ldr r3, [r7, #28]
|
|
800941e: b29a uxth r2, r3
|
|
8009420: 68bb ldr r3, [r7, #8]
|
|
8009422: b29b uxth r3, r3
|
|
8009424: 4413 add r3, r2
|
|
8009426: b29b uxth r3, r3
|
|
8009428: b21a sxth r2, r3
|
|
800942a: 887b ldrh r3, [r7, #2]
|
|
800942c: 9300 str r3, [sp, #0]
|
|
800942e: 4613 mov r3, r2
|
|
8009430: 4622 mov r2, r4
|
|
8009432: f7fc fd7d bl 8005f30 <ILI9341_writeLine>
|
|
for (float i = 0; i <360; i = i + 22.5) {
|
|
8009436: 4910 ldr r1, [pc, #64] ; (8009478 <drawLineCircle+0x198>)
|
|
8009438: 6a78 ldr r0, [r7, #36] ; 0x24
|
|
800943a: f7f7 fb0d bl 8000a58 <__addsf3>
|
|
800943e: 4603 mov r3, r0
|
|
8009440: 627b str r3, [r7, #36] ; 0x24
|
|
8009442: 490e ldr r1, [pc, #56] ; (800947c <drawLineCircle+0x19c>)
|
|
8009444: 6a78 ldr r0, [r7, #36] ; 0x24
|
|
8009446: f7f7 fdad bl 8000fa4 <__aeabi_fcmplt>
|
|
800944a: 4603 mov r3, r0
|
|
800944c: 2b00 cmp r3, #0
|
|
800944e: f47f af52 bne.w 80092f6 <drawLineCircle+0x16>
|
|
}
|
|
}
|
|
8009452: bf00 nop
|
|
8009454: 3728 adds r7, #40 ; 0x28
|
|
8009456: 46bd mov sp, r7
|
|
8009458: bdb0 pop {r4, r5, r7, pc}
|
|
800945a: bf00 nop
|
|
800945c: f3af 8000 nop.w
|
|
8009460: 54442d18 .word 0x54442d18
|
|
8009464: 400921fb .word 0x400921fb
|
|
8009468: f5c28f5c .word 0xf5c28f5c
|
|
800946c: 3fef5c28 .word 0x3fef5c28
|
|
8009470: 42b40000 .word 0x42b40000
|
|
8009474: 40668000 .word 0x40668000
|
|
8009478: 41b40000 .word 0x41b40000
|
|
800947c: 43b40000 .word 0x43b40000
|
|
|
|
08009480 <drawStatic>:
|
|
|
|
void drawStatic (void)
|
|
{
|
|
8009480: b580 push {r7, lr}
|
|
8009482: b084 sub sp, #16
|
|
8009484: af04 add r7, sp, #16
|
|
ILI9341_FillScreen(ILI9341_BLACK);
|
|
8009486: 2000 movs r0, #0
|
|
8009488: f7fd f88c bl 80065a4 <ILI9341_FillScreen>
|
|
ILI9341_WriteString(0, 0, "ANTENNA ROTATOR", Font_11x18, ILI9341_RED, ILI9341_BLACK);
|
|
800948c: 4b61 ldr r3, [pc, #388] ; (8009614 <drawStatic+0x194>)
|
|
800948e: 2200 movs r2, #0
|
|
8009490: 9202 str r2, [sp, #8]
|
|
8009492: f44f 4278 mov.w r2, #63488 ; 0xf800
|
|
8009496: 9201 str r2, [sp, #4]
|
|
8009498: 685a ldr r2, [r3, #4]
|
|
800949a: 9200 str r2, [sp, #0]
|
|
800949c: 681b ldr r3, [r3, #0]
|
|
800949e: 4a5e ldr r2, [pc, #376] ; (8009618 <drawStatic+0x198>)
|
|
80094a0: 2100 movs r1, #0
|
|
80094a2: 2000 movs r0, #0
|
|
80094a4: f7fc fc89 bl 8005dba <ILI9341_WriteString>
|
|
ILI9341_WriteString(30, 18, "CONTROLLER", Font_11x18, ILI9341_RED, ILI9341_BLACK);
|
|
80094a8: 4b5a ldr r3, [pc, #360] ; (8009614 <drawStatic+0x194>)
|
|
80094aa: 2200 movs r2, #0
|
|
80094ac: 9202 str r2, [sp, #8]
|
|
80094ae: f44f 4278 mov.w r2, #63488 ; 0xf800
|
|
80094b2: 9201 str r2, [sp, #4]
|
|
80094b4: 685a ldr r2, [r3, #4]
|
|
80094b6: 9200 str r2, [sp, #0]
|
|
80094b8: 681b ldr r3, [r3, #0]
|
|
80094ba: 4a58 ldr r2, [pc, #352] ; (800961c <drawStatic+0x19c>)
|
|
80094bc: 2112 movs r1, #18
|
|
80094be: 201e movs r0, #30
|
|
80094c0: f7fc fc7b bl 8005dba <ILI9341_WriteString>
|
|
ILI9341_WriteString(5, 80, "Cur pos:", Font_11x18, ILI9341_RED, ILI9341_BLACK);
|
|
80094c4: 4b53 ldr r3, [pc, #332] ; (8009614 <drawStatic+0x194>)
|
|
80094c6: 2200 movs r2, #0
|
|
80094c8: 9202 str r2, [sp, #8]
|
|
80094ca: f44f 4278 mov.w r2, #63488 ; 0xf800
|
|
80094ce: 9201 str r2, [sp, #4]
|
|
80094d0: 685a ldr r2, [r3, #4]
|
|
80094d2: 9200 str r2, [sp, #0]
|
|
80094d4: 681b ldr r3, [r3, #0]
|
|
80094d6: 4a52 ldr r2, [pc, #328] ; (8009620 <drawStatic+0x1a0>)
|
|
80094d8: 2150 movs r1, #80 ; 0x50
|
|
80094da: 2005 movs r0, #5
|
|
80094dc: f7fc fc6d bl 8005dba <ILI9341_WriteString>
|
|
ILI9341_WriteString(55, 100, "O", Font_7x10, ILI9341_RED, ILI9341_BLACK);
|
|
80094e0: 4b50 ldr r3, [pc, #320] ; (8009624 <drawStatic+0x1a4>)
|
|
80094e2: 2200 movs r2, #0
|
|
80094e4: 9202 str r2, [sp, #8]
|
|
80094e6: f44f 4278 mov.w r2, #63488 ; 0xf800
|
|
80094ea: 9201 str r2, [sp, #4]
|
|
80094ec: 685a ldr r2, [r3, #4]
|
|
80094ee: 9200 str r2, [sp, #0]
|
|
80094f0: 681b ldr r3, [r3, #0]
|
|
80094f2: 4a4d ldr r2, [pc, #308] ; (8009628 <drawStatic+0x1a8>)
|
|
80094f4: 2164 movs r1, #100 ; 0x64
|
|
80094f6: 2037 movs r0, #55 ; 0x37
|
|
80094f8: f7fc fc5f bl 8005dba <ILI9341_WriteString>
|
|
ILI9341_WriteString(5, 126, "Set pos:", Font_11x18, ILI9341_RED, ILI9341_BLACK);
|
|
80094fc: 4b45 ldr r3, [pc, #276] ; (8009614 <drawStatic+0x194>)
|
|
80094fe: 2200 movs r2, #0
|
|
8009500: 9202 str r2, [sp, #8]
|
|
8009502: f44f 4278 mov.w r2, #63488 ; 0xf800
|
|
8009506: 9201 str r2, [sp, #4]
|
|
8009508: 685a ldr r2, [r3, #4]
|
|
800950a: 9200 str r2, [sp, #0]
|
|
800950c: 681b ldr r3, [r3, #0]
|
|
800950e: 4a47 ldr r2, [pc, #284] ; (800962c <drawStatic+0x1ac>)
|
|
8009510: 217e movs r1, #126 ; 0x7e
|
|
8009512: 2005 movs r0, #5
|
|
8009514: f7fc fc51 bl 8005dba <ILI9341_WriteString>
|
|
ILI9341_WriteString(55, 145, "O", Font_7x10, ILI9341_RED, ILI9341_BLACK);
|
|
8009518: 4b42 ldr r3, [pc, #264] ; (8009624 <drawStatic+0x1a4>)
|
|
800951a: 2200 movs r2, #0
|
|
800951c: 9202 str r2, [sp, #8]
|
|
800951e: f44f 4278 mov.w r2, #63488 ; 0xf800
|
|
8009522: 9201 str r2, [sp, #4]
|
|
8009524: 685a ldr r2, [r3, #4]
|
|
8009526: 9200 str r2, [sp, #0]
|
|
8009528: 681b ldr r3, [r3, #0]
|
|
800952a: 4a3f ldr r2, [pc, #252] ; (8009628 <drawStatic+0x1a8>)
|
|
800952c: 2191 movs r1, #145 ; 0x91
|
|
800952e: 2037 movs r0, #55 ; 0x37
|
|
8009530: f7fc fc43 bl 8005dba <ILI9341_WriteString>
|
|
ILI9341_WriteString(x_center+radius+7, y_center-5, "90", Font_7x10, ILI9341_GREEN, ILI9341_BLACK);
|
|
8009534: 4b3e ldr r3, [pc, #248] ; (8009630 <drawStatic+0x1b0>)
|
|
8009536: 681b ldr r3, [r3, #0]
|
|
8009538: b29a uxth r2, r3
|
|
800953a: 4b3e ldr r3, [pc, #248] ; (8009634 <drawStatic+0x1b4>)
|
|
800953c: 681b ldr r3, [r3, #0]
|
|
800953e: b29b uxth r3, r3
|
|
8009540: 4413 add r3, r2
|
|
8009542: b29b uxth r3, r3
|
|
8009544: 3307 adds r3, #7
|
|
8009546: b298 uxth r0, r3
|
|
8009548: 4b3b ldr r3, [pc, #236] ; (8009638 <drawStatic+0x1b8>)
|
|
800954a: 681b ldr r3, [r3, #0]
|
|
800954c: b29b uxth r3, r3
|
|
800954e: 3b05 subs r3, #5
|
|
8009550: b299 uxth r1, r3
|
|
8009552: 4b34 ldr r3, [pc, #208] ; (8009624 <drawStatic+0x1a4>)
|
|
8009554: 2200 movs r2, #0
|
|
8009556: 9202 str r2, [sp, #8]
|
|
8009558: f44f 62fc mov.w r2, #2016 ; 0x7e0
|
|
800955c: 9201 str r2, [sp, #4]
|
|
800955e: 685a ldr r2, [r3, #4]
|
|
8009560: 9200 str r2, [sp, #0]
|
|
8009562: 681b ldr r3, [r3, #0]
|
|
8009564: 4a35 ldr r2, [pc, #212] ; (800963c <drawStatic+0x1bc>)
|
|
8009566: f7fc fc28 bl 8005dba <ILI9341_WriteString>
|
|
ILI9341_WriteString(x_center-radius-28, y_center-5, "270", Font_7x10, ILI9341_GREEN, ILI9341_BLACK);
|
|
800956a: 4b31 ldr r3, [pc, #196] ; (8009630 <drawStatic+0x1b0>)
|
|
800956c: 681b ldr r3, [r3, #0]
|
|
800956e: b29a uxth r2, r3
|
|
8009570: 4b30 ldr r3, [pc, #192] ; (8009634 <drawStatic+0x1b4>)
|
|
8009572: 681b ldr r3, [r3, #0]
|
|
8009574: b29b uxth r3, r3
|
|
8009576: 1ad3 subs r3, r2, r3
|
|
8009578: b29b uxth r3, r3
|
|
800957a: 3b1c subs r3, #28
|
|
800957c: b298 uxth r0, r3
|
|
800957e: 4b2e ldr r3, [pc, #184] ; (8009638 <drawStatic+0x1b8>)
|
|
8009580: 681b ldr r3, [r3, #0]
|
|
8009582: b29b uxth r3, r3
|
|
8009584: 3b05 subs r3, #5
|
|
8009586: b299 uxth r1, r3
|
|
8009588: 4b26 ldr r3, [pc, #152] ; (8009624 <drawStatic+0x1a4>)
|
|
800958a: 2200 movs r2, #0
|
|
800958c: 9202 str r2, [sp, #8]
|
|
800958e: f44f 62fc mov.w r2, #2016 ; 0x7e0
|
|
8009592: 9201 str r2, [sp, #4]
|
|
8009594: 685a ldr r2, [r3, #4]
|
|
8009596: 9200 str r2, [sp, #0]
|
|
8009598: 681b ldr r3, [r3, #0]
|
|
800959a: 4a29 ldr r2, [pc, #164] ; (8009640 <drawStatic+0x1c0>)
|
|
800959c: f7fc fc0d bl 8005dba <ILI9341_WriteString>
|
|
ILI9341_WriteString(x_center-10, y_center+radius+7, "180", Font_7x10, ILI9341_GREEN, ILI9341_BLACK);
|
|
80095a0: 4b23 ldr r3, [pc, #140] ; (8009630 <drawStatic+0x1b0>)
|
|
80095a2: 681b ldr r3, [r3, #0]
|
|
80095a4: b29b uxth r3, r3
|
|
80095a6: 3b0a subs r3, #10
|
|
80095a8: b298 uxth r0, r3
|
|
80095aa: 4b23 ldr r3, [pc, #140] ; (8009638 <drawStatic+0x1b8>)
|
|
80095ac: 681b ldr r3, [r3, #0]
|
|
80095ae: b29a uxth r2, r3
|
|
80095b0: 4b20 ldr r3, [pc, #128] ; (8009634 <drawStatic+0x1b4>)
|
|
80095b2: 681b ldr r3, [r3, #0]
|
|
80095b4: b29b uxth r3, r3
|
|
80095b6: 4413 add r3, r2
|
|
80095b8: b29b uxth r3, r3
|
|
80095ba: 3307 adds r3, #7
|
|
80095bc: b299 uxth r1, r3
|
|
80095be: 4b19 ldr r3, [pc, #100] ; (8009624 <drawStatic+0x1a4>)
|
|
80095c0: 2200 movs r2, #0
|
|
80095c2: 9202 str r2, [sp, #8]
|
|
80095c4: f44f 62fc mov.w r2, #2016 ; 0x7e0
|
|
80095c8: 9201 str r2, [sp, #4]
|
|
80095ca: 685a ldr r2, [r3, #4]
|
|
80095cc: 9200 str r2, [sp, #0]
|
|
80095ce: 681b ldr r3, [r3, #0]
|
|
80095d0: 4a1c ldr r2, [pc, #112] ; (8009644 <drawStatic+0x1c4>)
|
|
80095d2: f7fc fbf2 bl 8005dba <ILI9341_WriteString>
|
|
ILI9341_WriteString(x_center-3, y_center-radius-17, "0", Font_7x10, ILI9341_GREEN, ILI9341_BLACK);
|
|
80095d6: 4b16 ldr r3, [pc, #88] ; (8009630 <drawStatic+0x1b0>)
|
|
80095d8: 681b ldr r3, [r3, #0]
|
|
80095da: b29b uxth r3, r3
|
|
80095dc: 3b03 subs r3, #3
|
|
80095de: b298 uxth r0, r3
|
|
80095e0: 4b15 ldr r3, [pc, #84] ; (8009638 <drawStatic+0x1b8>)
|
|
80095e2: 681b ldr r3, [r3, #0]
|
|
80095e4: b29a uxth r2, r3
|
|
80095e6: 4b13 ldr r3, [pc, #76] ; (8009634 <drawStatic+0x1b4>)
|
|
80095e8: 681b ldr r3, [r3, #0]
|
|
80095ea: b29b uxth r3, r3
|
|
80095ec: 1ad3 subs r3, r2, r3
|
|
80095ee: b29b uxth r3, r3
|
|
80095f0: 3b11 subs r3, #17
|
|
80095f2: b299 uxth r1, r3
|
|
80095f4: 4b0b ldr r3, [pc, #44] ; (8009624 <drawStatic+0x1a4>)
|
|
80095f6: 2200 movs r2, #0
|
|
80095f8: 9202 str r2, [sp, #8]
|
|
80095fa: f44f 62fc mov.w r2, #2016 ; 0x7e0
|
|
80095fe: 9201 str r2, [sp, #4]
|
|
8009600: 685a ldr r2, [r3, #4]
|
|
8009602: 9200 str r2, [sp, #0]
|
|
8009604: 681b ldr r3, [r3, #0]
|
|
8009606: 4a10 ldr r2, [pc, #64] ; (8009648 <drawStatic+0x1c8>)
|
|
8009608: f7fc fbd7 bl 8005dba <ILI9341_WriteString>
|
|
}
|
|
800960c: bf00 nop
|
|
800960e: 46bd mov sp, r7
|
|
8009610: bd80 pop {r7, pc}
|
|
8009612: bf00 nop
|
|
8009614: 20000010 .word 0x20000010
|
|
8009618: 0800c6ec .word 0x0800c6ec
|
|
800961c: 0800c6fc .word 0x0800c6fc
|
|
8009620: 0800c708 .word 0x0800c708
|
|
8009624: 20000008 .word 0x20000008
|
|
8009628: 0800c714 .word 0x0800c714
|
|
800962c: 0800c718 .word 0x0800c718
|
|
8009630: 20000138 .word 0x20000138
|
|
8009634: 20000134 .word 0x20000134
|
|
8009638: 2000013c .word 0x2000013c
|
|
800963c: 0800c724 .word 0x0800c724
|
|
8009640: 0800c728 .word 0x0800c728
|
|
8009644: 0800c72c .word 0x0800c72c
|
|
8009648: 0800c730 .word 0x0800c730
|
|
800964c: 00000000 .word 0x00000000
|
|
|
|
08009650 <drawDirection>:
|
|
|
|
void drawDirection (int32_t angle, int32_t x, int32_t y, uint16_t color) {
|
|
8009650: b580 push {r7, lr}
|
|
8009652: b088 sub sp, #32
|
|
8009654: af04 add r7, sp, #16
|
|
8009656: 60f8 str r0, [r7, #12]
|
|
8009658: 60b9 str r1, [r7, #8]
|
|
800965a: 607a str r2, [r7, #4]
|
|
800965c: 807b strh r3, [r7, #2]
|
|
if((angle < 22.5) || (angle > 337.5 )) ILI9341_WriteString(x,y,"North ",Font_16x26,color, ILI9341_BLACK);
|
|
800965e: 68f8 ldr r0, [r7, #12]
|
|
8009660: f7f6 fec8 bl 80003f4 <__aeabi_i2d>
|
|
8009664: f04f 0200 mov.w r2, #0
|
|
8009668: 4ba3 ldr r3, [pc, #652] ; (80098f8 <drawDirection+0x2a8>)
|
|
800966a: f7f7 f99f bl 80009ac <__aeabi_dcmplt>
|
|
800966e: 4603 mov r3, r0
|
|
8009670: 2b00 cmp r3, #0
|
|
8009672: d10a bne.n 800968a <drawDirection+0x3a>
|
|
8009674: 68f8 ldr r0, [r7, #12]
|
|
8009676: f7f6 febd bl 80003f4 <__aeabi_i2d>
|
|
800967a: a391 add r3, pc, #580 ; (adr r3, 80098c0 <drawDirection+0x270>)
|
|
800967c: e9d3 2300 ldrd r2, r3, [r3]
|
|
8009680: f7f7 f9b2 bl 80009e8 <__aeabi_dcmpgt>
|
|
8009684: 4603 mov r3, r0
|
|
8009686: 2b00 cmp r3, #0
|
|
8009688: d00e beq.n 80096a8 <drawDirection+0x58>
|
|
800968a: 68bb ldr r3, [r7, #8]
|
|
800968c: b298 uxth r0, r3
|
|
800968e: 687b ldr r3, [r7, #4]
|
|
8009690: b299 uxth r1, r3
|
|
8009692: 4b9a ldr r3, [pc, #616] ; (80098fc <drawDirection+0x2ac>)
|
|
8009694: 2200 movs r2, #0
|
|
8009696: 9202 str r2, [sp, #8]
|
|
8009698: 887a ldrh r2, [r7, #2]
|
|
800969a: 9201 str r2, [sp, #4]
|
|
800969c: 685a ldr r2, [r3, #4]
|
|
800969e: 9200 str r2, [sp, #0]
|
|
80096a0: 681b ldr r3, [r3, #0]
|
|
80096a2: 4a97 ldr r2, [pc, #604] ; (8009900 <drawDirection+0x2b0>)
|
|
80096a4: f7fc fb89 bl 8005dba <ILI9341_WriteString>
|
|
if((angle > 22.5) && (angle < 67.5 )) ILI9341_WriteString(x,y,"North-East",Font_16x26,color, ILI9341_BLACK);
|
|
80096a8: 68f8 ldr r0, [r7, #12]
|
|
80096aa: f7f6 fea3 bl 80003f4 <__aeabi_i2d>
|
|
80096ae: f04f 0200 mov.w r2, #0
|
|
80096b2: 4b91 ldr r3, [pc, #580] ; (80098f8 <drawDirection+0x2a8>)
|
|
80096b4: f7f7 f998 bl 80009e8 <__aeabi_dcmpgt>
|
|
80096b8: 4603 mov r3, r0
|
|
80096ba: 2b00 cmp r3, #0
|
|
80096bc: d019 beq.n 80096f2 <drawDirection+0xa2>
|
|
80096be: 68f8 ldr r0, [r7, #12]
|
|
80096c0: f7f6 fe98 bl 80003f4 <__aeabi_i2d>
|
|
80096c4: a380 add r3, pc, #512 ; (adr r3, 80098c8 <drawDirection+0x278>)
|
|
80096c6: e9d3 2300 ldrd r2, r3, [r3]
|
|
80096ca: f7f7 f96f bl 80009ac <__aeabi_dcmplt>
|
|
80096ce: 4603 mov r3, r0
|
|
80096d0: 2b00 cmp r3, #0
|
|
80096d2: d00e beq.n 80096f2 <drawDirection+0xa2>
|
|
80096d4: 68bb ldr r3, [r7, #8]
|
|
80096d6: b298 uxth r0, r3
|
|
80096d8: 687b ldr r3, [r7, #4]
|
|
80096da: b299 uxth r1, r3
|
|
80096dc: 4b87 ldr r3, [pc, #540] ; (80098fc <drawDirection+0x2ac>)
|
|
80096de: 2200 movs r2, #0
|
|
80096e0: 9202 str r2, [sp, #8]
|
|
80096e2: 887a ldrh r2, [r7, #2]
|
|
80096e4: 9201 str r2, [sp, #4]
|
|
80096e6: 685a ldr r2, [r3, #4]
|
|
80096e8: 9200 str r2, [sp, #0]
|
|
80096ea: 681b ldr r3, [r3, #0]
|
|
80096ec: 4a85 ldr r2, [pc, #532] ; (8009904 <drawDirection+0x2b4>)
|
|
80096ee: f7fc fb64 bl 8005dba <ILI9341_WriteString>
|
|
if((angle > 67.5) && (angle < 112.5 )) ILI9341_WriteString(x,y,"East ",Font_16x26,color, ILI9341_BLACK);
|
|
80096f2: 68f8 ldr r0, [r7, #12]
|
|
80096f4: f7f6 fe7e bl 80003f4 <__aeabi_i2d>
|
|
80096f8: a373 add r3, pc, #460 ; (adr r3, 80098c8 <drawDirection+0x278>)
|
|
80096fa: e9d3 2300 ldrd r2, r3, [r3]
|
|
80096fe: f7f7 f973 bl 80009e8 <__aeabi_dcmpgt>
|
|
8009702: 4603 mov r3, r0
|
|
8009704: 2b00 cmp r3, #0
|
|
8009706: d019 beq.n 800973c <drawDirection+0xec>
|
|
8009708: 68f8 ldr r0, [r7, #12]
|
|
800970a: f7f6 fe73 bl 80003f4 <__aeabi_i2d>
|
|
800970e: a370 add r3, pc, #448 ; (adr r3, 80098d0 <drawDirection+0x280>)
|
|
8009710: e9d3 2300 ldrd r2, r3, [r3]
|
|
8009714: f7f7 f94a bl 80009ac <__aeabi_dcmplt>
|
|
8009718: 4603 mov r3, r0
|
|
800971a: 2b00 cmp r3, #0
|
|
800971c: d00e beq.n 800973c <drawDirection+0xec>
|
|
800971e: 68bb ldr r3, [r7, #8]
|
|
8009720: b298 uxth r0, r3
|
|
8009722: 687b ldr r3, [r7, #4]
|
|
8009724: b299 uxth r1, r3
|
|
8009726: 4b75 ldr r3, [pc, #468] ; (80098fc <drawDirection+0x2ac>)
|
|
8009728: 2200 movs r2, #0
|
|
800972a: 9202 str r2, [sp, #8]
|
|
800972c: 887a ldrh r2, [r7, #2]
|
|
800972e: 9201 str r2, [sp, #4]
|
|
8009730: 685a ldr r2, [r3, #4]
|
|
8009732: 9200 str r2, [sp, #0]
|
|
8009734: 681b ldr r3, [r3, #0]
|
|
8009736: 4a74 ldr r2, [pc, #464] ; (8009908 <drawDirection+0x2b8>)
|
|
8009738: f7fc fb3f bl 8005dba <ILI9341_WriteString>
|
|
if((angle > 112.5) && (angle < 157.5 )) ILI9341_WriteString(x,y,"South-East",Font_16x26,color, ILI9341_BLACK);
|
|
800973c: 68f8 ldr r0, [r7, #12]
|
|
800973e: f7f6 fe59 bl 80003f4 <__aeabi_i2d>
|
|
8009742: a363 add r3, pc, #396 ; (adr r3, 80098d0 <drawDirection+0x280>)
|
|
8009744: e9d3 2300 ldrd r2, r3, [r3]
|
|
8009748: f7f7 f94e bl 80009e8 <__aeabi_dcmpgt>
|
|
800974c: 4603 mov r3, r0
|
|
800974e: 2b00 cmp r3, #0
|
|
8009750: d019 beq.n 8009786 <drawDirection+0x136>
|
|
8009752: 68f8 ldr r0, [r7, #12]
|
|
8009754: f7f6 fe4e bl 80003f4 <__aeabi_i2d>
|
|
8009758: a35f add r3, pc, #380 ; (adr r3, 80098d8 <drawDirection+0x288>)
|
|
800975a: e9d3 2300 ldrd r2, r3, [r3]
|
|
800975e: f7f7 f925 bl 80009ac <__aeabi_dcmplt>
|
|
8009762: 4603 mov r3, r0
|
|
8009764: 2b00 cmp r3, #0
|
|
8009766: d00e beq.n 8009786 <drawDirection+0x136>
|
|
8009768: 68bb ldr r3, [r7, #8]
|
|
800976a: b298 uxth r0, r3
|
|
800976c: 687b ldr r3, [r7, #4]
|
|
800976e: b299 uxth r1, r3
|
|
8009770: 4b62 ldr r3, [pc, #392] ; (80098fc <drawDirection+0x2ac>)
|
|
8009772: 2200 movs r2, #0
|
|
8009774: 9202 str r2, [sp, #8]
|
|
8009776: 887a ldrh r2, [r7, #2]
|
|
8009778: 9201 str r2, [sp, #4]
|
|
800977a: 685a ldr r2, [r3, #4]
|
|
800977c: 9200 str r2, [sp, #0]
|
|
800977e: 681b ldr r3, [r3, #0]
|
|
8009780: 4a62 ldr r2, [pc, #392] ; (800990c <drawDirection+0x2bc>)
|
|
8009782: f7fc fb1a bl 8005dba <ILI9341_WriteString>
|
|
if((angle > 157.5) && (angle < 202.5 )) ILI9341_WriteString(x,y,"South ",Font_16x26,color, ILI9341_BLACK);
|
|
8009786: 68f8 ldr r0, [r7, #12]
|
|
8009788: f7f6 fe34 bl 80003f4 <__aeabi_i2d>
|
|
800978c: a352 add r3, pc, #328 ; (adr r3, 80098d8 <drawDirection+0x288>)
|
|
800978e: e9d3 2300 ldrd r2, r3, [r3]
|
|
8009792: f7f7 f929 bl 80009e8 <__aeabi_dcmpgt>
|
|
8009796: 4603 mov r3, r0
|
|
8009798: 2b00 cmp r3, #0
|
|
800979a: d019 beq.n 80097d0 <drawDirection+0x180>
|
|
800979c: 68f8 ldr r0, [r7, #12]
|
|
800979e: f7f6 fe29 bl 80003f4 <__aeabi_i2d>
|
|
80097a2: a34f add r3, pc, #316 ; (adr r3, 80098e0 <drawDirection+0x290>)
|
|
80097a4: e9d3 2300 ldrd r2, r3, [r3]
|
|
80097a8: f7f7 f900 bl 80009ac <__aeabi_dcmplt>
|
|
80097ac: 4603 mov r3, r0
|
|
80097ae: 2b00 cmp r3, #0
|
|
80097b0: d00e beq.n 80097d0 <drawDirection+0x180>
|
|
80097b2: 68bb ldr r3, [r7, #8]
|
|
80097b4: b298 uxth r0, r3
|
|
80097b6: 687b ldr r3, [r7, #4]
|
|
80097b8: b299 uxth r1, r3
|
|
80097ba: 4b50 ldr r3, [pc, #320] ; (80098fc <drawDirection+0x2ac>)
|
|
80097bc: 2200 movs r2, #0
|
|
80097be: 9202 str r2, [sp, #8]
|
|
80097c0: 887a ldrh r2, [r7, #2]
|
|
80097c2: 9201 str r2, [sp, #4]
|
|
80097c4: 685a ldr r2, [r3, #4]
|
|
80097c6: 9200 str r2, [sp, #0]
|
|
80097c8: 681b ldr r3, [r3, #0]
|
|
80097ca: 4a51 ldr r2, [pc, #324] ; (8009910 <drawDirection+0x2c0>)
|
|
80097cc: f7fc faf5 bl 8005dba <ILI9341_WriteString>
|
|
if((angle > 202.5) && (angle < 247.5 )) ILI9341_WriteString(x,y,"South-West",Font_16x26,color, ILI9341_BLACK);
|
|
80097d0: 68f8 ldr r0, [r7, #12]
|
|
80097d2: f7f6 fe0f bl 80003f4 <__aeabi_i2d>
|
|
80097d6: a342 add r3, pc, #264 ; (adr r3, 80098e0 <drawDirection+0x290>)
|
|
80097d8: e9d3 2300 ldrd r2, r3, [r3]
|
|
80097dc: f7f7 f904 bl 80009e8 <__aeabi_dcmpgt>
|
|
80097e0: 4603 mov r3, r0
|
|
80097e2: 2b00 cmp r3, #0
|
|
80097e4: d019 beq.n 800981a <drawDirection+0x1ca>
|
|
80097e6: 68f8 ldr r0, [r7, #12]
|
|
80097e8: f7f6 fe04 bl 80003f4 <__aeabi_i2d>
|
|
80097ec: a33e add r3, pc, #248 ; (adr r3, 80098e8 <drawDirection+0x298>)
|
|
80097ee: e9d3 2300 ldrd r2, r3, [r3]
|
|
80097f2: f7f7 f8db bl 80009ac <__aeabi_dcmplt>
|
|
80097f6: 4603 mov r3, r0
|
|
80097f8: 2b00 cmp r3, #0
|
|
80097fa: d00e beq.n 800981a <drawDirection+0x1ca>
|
|
80097fc: 68bb ldr r3, [r7, #8]
|
|
80097fe: b298 uxth r0, r3
|
|
8009800: 687b ldr r3, [r7, #4]
|
|
8009802: b299 uxth r1, r3
|
|
8009804: 4b3d ldr r3, [pc, #244] ; (80098fc <drawDirection+0x2ac>)
|
|
8009806: 2200 movs r2, #0
|
|
8009808: 9202 str r2, [sp, #8]
|
|
800980a: 887a ldrh r2, [r7, #2]
|
|
800980c: 9201 str r2, [sp, #4]
|
|
800980e: 685a ldr r2, [r3, #4]
|
|
8009810: 9200 str r2, [sp, #0]
|
|
8009812: 681b ldr r3, [r3, #0]
|
|
8009814: 4a3f ldr r2, [pc, #252] ; (8009914 <drawDirection+0x2c4>)
|
|
8009816: f7fc fad0 bl 8005dba <ILI9341_WriteString>
|
|
if((angle > 247.5) && (angle < 292.5 )) ILI9341_WriteString(x,y,"West ",Font_16x26,color, ILI9341_BLACK);
|
|
800981a: 68f8 ldr r0, [r7, #12]
|
|
800981c: f7f6 fdea bl 80003f4 <__aeabi_i2d>
|
|
8009820: a331 add r3, pc, #196 ; (adr r3, 80098e8 <drawDirection+0x298>)
|
|
8009822: e9d3 2300 ldrd r2, r3, [r3]
|
|
8009826: f7f7 f8df bl 80009e8 <__aeabi_dcmpgt>
|
|
800982a: 4603 mov r3, r0
|
|
800982c: 2b00 cmp r3, #0
|
|
800982e: d019 beq.n 8009864 <drawDirection+0x214>
|
|
8009830: 68f8 ldr r0, [r7, #12]
|
|
8009832: f7f6 fddf bl 80003f4 <__aeabi_i2d>
|
|
8009836: a32e add r3, pc, #184 ; (adr r3, 80098f0 <drawDirection+0x2a0>)
|
|
8009838: e9d3 2300 ldrd r2, r3, [r3]
|
|
800983c: f7f7 f8b6 bl 80009ac <__aeabi_dcmplt>
|
|
8009840: 4603 mov r3, r0
|
|
8009842: 2b00 cmp r3, #0
|
|
8009844: d00e beq.n 8009864 <drawDirection+0x214>
|
|
8009846: 68bb ldr r3, [r7, #8]
|
|
8009848: b298 uxth r0, r3
|
|
800984a: 687b ldr r3, [r7, #4]
|
|
800984c: b299 uxth r1, r3
|
|
800984e: 4b2b ldr r3, [pc, #172] ; (80098fc <drawDirection+0x2ac>)
|
|
8009850: 2200 movs r2, #0
|
|
8009852: 9202 str r2, [sp, #8]
|
|
8009854: 887a ldrh r2, [r7, #2]
|
|
8009856: 9201 str r2, [sp, #4]
|
|
8009858: 685a ldr r2, [r3, #4]
|
|
800985a: 9200 str r2, [sp, #0]
|
|
800985c: 681b ldr r3, [r3, #0]
|
|
800985e: 4a2e ldr r2, [pc, #184] ; (8009918 <drawDirection+0x2c8>)
|
|
8009860: f7fc faab bl 8005dba <ILI9341_WriteString>
|
|
if((angle > 292.5) && (angle < 337.5 )) ILI9341_WriteString(x,y,"North-West",Font_16x26,color, ILI9341_BLACK);
|
|
8009864: 68f8 ldr r0, [r7, #12]
|
|
8009866: f7f6 fdc5 bl 80003f4 <__aeabi_i2d>
|
|
800986a: a321 add r3, pc, #132 ; (adr r3, 80098f0 <drawDirection+0x2a0>)
|
|
800986c: e9d3 2300 ldrd r2, r3, [r3]
|
|
8009870: f7f7 f8ba bl 80009e8 <__aeabi_dcmpgt>
|
|
8009874: 4603 mov r3, r0
|
|
8009876: 2b00 cmp r3, #0
|
|
8009878: d100 bne.n 800987c <drawDirection+0x22c>
|
|
}
|
|
800987a: e01a b.n 80098b2 <drawDirection+0x262>
|
|
if((angle > 292.5) && (angle < 337.5 )) ILI9341_WriteString(x,y,"North-West",Font_16x26,color, ILI9341_BLACK);
|
|
800987c: 68f8 ldr r0, [r7, #12]
|
|
800987e: f7f6 fdb9 bl 80003f4 <__aeabi_i2d>
|
|
8009882: a30f add r3, pc, #60 ; (adr r3, 80098c0 <drawDirection+0x270>)
|
|
8009884: e9d3 2300 ldrd r2, r3, [r3]
|
|
8009888: f7f7 f890 bl 80009ac <__aeabi_dcmplt>
|
|
800988c: 4603 mov r3, r0
|
|
800988e: 2b00 cmp r3, #0
|
|
8009890: d100 bne.n 8009894 <drawDirection+0x244>
|
|
}
|
|
8009892: e00e b.n 80098b2 <drawDirection+0x262>
|
|
if((angle > 292.5) && (angle < 337.5 )) ILI9341_WriteString(x,y,"North-West",Font_16x26,color, ILI9341_BLACK);
|
|
8009894: 68bb ldr r3, [r7, #8]
|
|
8009896: b298 uxth r0, r3
|
|
8009898: 687b ldr r3, [r7, #4]
|
|
800989a: b299 uxth r1, r3
|
|
800989c: 4b17 ldr r3, [pc, #92] ; (80098fc <drawDirection+0x2ac>)
|
|
800989e: 2200 movs r2, #0
|
|
80098a0: 9202 str r2, [sp, #8]
|
|
80098a2: 887a ldrh r2, [r7, #2]
|
|
80098a4: 9201 str r2, [sp, #4]
|
|
80098a6: 685a ldr r2, [r3, #4]
|
|
80098a8: 9200 str r2, [sp, #0]
|
|
80098aa: 681b ldr r3, [r3, #0]
|
|
80098ac: 4a1b ldr r2, [pc, #108] ; (800991c <drawDirection+0x2cc>)
|
|
80098ae: f7fc fa84 bl 8005dba <ILI9341_WriteString>
|
|
}
|
|
80098b2: bf00 nop
|
|
80098b4: 3710 adds r7, #16
|
|
80098b6: 46bd mov sp, r7
|
|
80098b8: bd80 pop {r7, pc}
|
|
80098ba: bf00 nop
|
|
80098bc: f3af 8000 nop.w
|
|
80098c0: 00000000 .word 0x00000000
|
|
80098c4: 40751800 .word 0x40751800
|
|
80098c8: 00000000 .word 0x00000000
|
|
80098cc: 4050e000 .word 0x4050e000
|
|
80098d0: 00000000 .word 0x00000000
|
|
80098d4: 405c2000 .word 0x405c2000
|
|
80098d8: 00000000 .word 0x00000000
|
|
80098dc: 4063b000 .word 0x4063b000
|
|
80098e0: 00000000 .word 0x00000000
|
|
80098e4: 40695000 .word 0x40695000
|
|
80098e8: 00000000 .word 0x00000000
|
|
80098ec: 406ef000 .word 0x406ef000
|
|
80098f0: 00000000 .word 0x00000000
|
|
80098f4: 40724800 .word 0x40724800
|
|
80098f8: 40368000 .word 0x40368000
|
|
80098fc: 20000018 .word 0x20000018
|
|
8009900: 0800c734 .word 0x0800c734
|
|
8009904: 0800c740 .word 0x0800c740
|
|
8009908: 0800c74c .word 0x0800c74c
|
|
800990c: 0800c758 .word 0x0800c758
|
|
8009910: 0800c764 .word 0x0800c764
|
|
8009914: 0800c770 .word 0x0800c770
|
|
8009918: 0800c77c .word 0x0800c77c
|
|
800991c: 0800c788 .word 0x0800c788
|
|
|
|
08009920 <GetTime>:
|
|
|
|
void GetTime (void)
|
|
{
|
|
8009920: b580 push {r7, lr}
|
|
8009922: b082 sub sp, #8
|
|
8009924: af02 add r7, sp, #8
|
|
HAL_RTC_GetTime(&hrtc, &sTime, RTC_FORMAT_BIN);
|
|
8009926: 2200 movs r2, #0
|
|
8009928: 490b ldr r1, [pc, #44] ; (8009958 <GetTime+0x38>)
|
|
800992a: 480c ldr r0, [pc, #48] ; (800995c <GetTime+0x3c>)
|
|
800992c: f7f9 fd50 bl 80033d0 <HAL_RTC_GetTime>
|
|
snprintf(time_str, 63, "%02d:%02d:%02d", sTime.Hours, sTime.Minutes, sTime.Seconds);
|
|
8009930: 4b09 ldr r3, [pc, #36] ; (8009958 <GetTime+0x38>)
|
|
8009932: 781b ldrb r3, [r3, #0]
|
|
8009934: 4619 mov r1, r3
|
|
8009936: 4b08 ldr r3, [pc, #32] ; (8009958 <GetTime+0x38>)
|
|
8009938: 785b ldrb r3, [r3, #1]
|
|
800993a: 461a mov r2, r3
|
|
800993c: 4b06 ldr r3, [pc, #24] ; (8009958 <GetTime+0x38>)
|
|
800993e: 789b ldrb r3, [r3, #2]
|
|
8009940: 9301 str r3, [sp, #4]
|
|
8009942: 9200 str r2, [sp, #0]
|
|
8009944: 460b mov r3, r1
|
|
8009946: 4a06 ldr r2, [pc, #24] ; (8009960 <GetTime+0x40>)
|
|
8009948: 213f movs r1, #63 ; 0x3f
|
|
800994a: 4806 ldr r0, [pc, #24] ; (8009964 <GetTime+0x44>)
|
|
800994c: f001 f9c8 bl 800ace0 <sniprintf>
|
|
}
|
|
8009950: bf00 nop
|
|
8009952: 46bd mov sp, r7
|
|
8009954: bd80 pop {r7, pc}
|
|
8009956: bf00 nop
|
|
8009958: 20000f74 .word 0x20000f74
|
|
800995c: 200012ac .word 0x200012ac
|
|
8009960: 0800c794 .word 0x0800c794
|
|
8009964: 20000f78 .word 0x20000f78
|
|
|
|
08009968 <GetEncoder>:
|
|
|
|
void GetEncoder (void)
|
|
{
|
|
8009968: b480 push {r7}
|
|
800996a: af00 add r7, sp, #0
|
|
capture = TIM2->CNT / 4;
|
|
800996c: f04f 4380 mov.w r3, #1073741824 ; 0x40000000
|
|
8009970: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
8009972: 089b lsrs r3, r3, #2
|
|
8009974: 461a mov r2, r3
|
|
8009976: 4b29 ldr r3, [pc, #164] ; (8009a1c <GetEncoder+0xb4>)
|
|
8009978: 601a str r2, [r3, #0]
|
|
if (capture > 8000) { capture -= 65535 / 4; }
|
|
800997a: 4b28 ldr r3, [pc, #160] ; (8009a1c <GetEncoder+0xb4>)
|
|
800997c: 681b ldr r3, [r3, #0]
|
|
800997e: f5b3 5ffa cmp.w r3, #8000 ; 0x1f40
|
|
8009982: dd06 ble.n 8009992 <GetEncoder+0x2a>
|
|
8009984: 4b25 ldr r3, [pc, #148] ; (8009a1c <GetEncoder+0xb4>)
|
|
8009986: 681b ldr r3, [r3, #0]
|
|
8009988: f5a3 537f sub.w r3, r3, #16320 ; 0x3fc0
|
|
800998c: 3b3f subs r3, #63 ; 0x3f
|
|
800998e: 4a23 ldr r2, [pc, #140] ; (8009a1c <GetEncoder+0xb4>)
|
|
8009990: 6013 str r3, [r2, #0]
|
|
if (capture != capture_prev) {
|
|
8009992: 4b22 ldr r3, [pc, #136] ; (8009a1c <GetEncoder+0xb4>)
|
|
8009994: 681a ldr r2, [r3, #0]
|
|
8009996: 4b22 ldr r3, [pc, #136] ; (8009a20 <GetEncoder+0xb8>)
|
|
8009998: 681b ldr r3, [r3, #0]
|
|
800999a: 429a cmp r2, r3
|
|
800999c: d004 beq.n 80099a8 <GetEncoder+0x40>
|
|
encoder_prev = encoder; }
|
|
800999e: 4b21 ldr r3, [pc, #132] ; (8009a24 <GetEncoder+0xbc>)
|
|
80099a0: 681b ldr r3, [r3, #0]
|
|
80099a2: 4a21 ldr r2, [pc, #132] ; (8009a28 <GetEncoder+0xc0>)
|
|
80099a4: 6013 str r3, [r2, #0]
|
|
80099a6: e003 b.n 80099b0 <GetEncoder+0x48>
|
|
else { encoder_prev = 10000; }
|
|
80099a8: 4b1f ldr r3, [pc, #124] ; (8009a28 <GetEncoder+0xc0>)
|
|
80099aa: f242 7210 movw r2, #10000 ; 0x2710
|
|
80099ae: 601a str r2, [r3, #0]
|
|
encoder += capture - capture_prev;
|
|
80099b0: 4b1a ldr r3, [pc, #104] ; (8009a1c <GetEncoder+0xb4>)
|
|
80099b2: 681a ldr r2, [r3, #0]
|
|
80099b4: 4b1a ldr r3, [pc, #104] ; (8009a20 <GetEncoder+0xb8>)
|
|
80099b6: 681b ldr r3, [r3, #0]
|
|
80099b8: 1ad2 subs r2, r2, r3
|
|
80099ba: 4b1a ldr r3, [pc, #104] ; (8009a24 <GetEncoder+0xbc>)
|
|
80099bc: 681b ldr r3, [r3, #0]
|
|
80099be: 4413 add r3, r2
|
|
80099c0: 4a18 ldr r2, [pc, #96] ; (8009a24 <GetEncoder+0xbc>)
|
|
80099c2: 6013 str r3, [r2, #0]
|
|
encoder = (encoder + 360) % 360;
|
|
80099c4: 4b17 ldr r3, [pc, #92] ; (8009a24 <GetEncoder+0xbc>)
|
|
80099c6: 681b ldr r3, [r3, #0]
|
|
80099c8: f503 73b4 add.w r3, r3, #360 ; 0x168
|
|
80099cc: 4a17 ldr r2, [pc, #92] ; (8009a2c <GetEncoder+0xc4>)
|
|
80099ce: fb82 1203 smull r1, r2, r2, r3
|
|
80099d2: 441a add r2, r3
|
|
80099d4: 1211 asrs r1, r2, #8
|
|
80099d6: 17da asrs r2, r3, #31
|
|
80099d8: 1a8a subs r2, r1, r2
|
|
80099da: f44f 71b4 mov.w r1, #360 ; 0x168
|
|
80099de: fb01 f202 mul.w r2, r1, r2
|
|
80099e2: 1a9a subs r2, r3, r2
|
|
80099e4: 4b0f ldr r3, [pc, #60] ; (8009a24 <GetEncoder+0xbc>)
|
|
80099e6: 601a str r2, [r3, #0]
|
|
if (encoder == 0) { TIM2->CNT = 0; }
|
|
80099e8: 4b0e ldr r3, [pc, #56] ; (8009a24 <GetEncoder+0xbc>)
|
|
80099ea: 681b ldr r3, [r3, #0]
|
|
80099ec: 2b00 cmp r3, #0
|
|
80099ee: d103 bne.n 80099f8 <GetEncoder+0x90>
|
|
80099f0: f04f 4380 mov.w r3, #1073741824 ; 0x40000000
|
|
80099f4: 2200 movs r2, #0
|
|
80099f6: 625a str r2, [r3, #36] ; 0x24
|
|
if (encoder > 360) {TIM2->CNT = 0; }
|
|
80099f8: 4b0a ldr r3, [pc, #40] ; (8009a24 <GetEncoder+0xbc>)
|
|
80099fa: 681b ldr r3, [r3, #0]
|
|
80099fc: f5b3 7fb4 cmp.w r3, #360 ; 0x168
|
|
8009a00: dd03 ble.n 8009a0a <GetEncoder+0xa2>
|
|
8009a02: f04f 4380 mov.w r3, #1073741824 ; 0x40000000
|
|
8009a06: 2200 movs r2, #0
|
|
8009a08: 625a str r2, [r3, #36] ; 0x24
|
|
capture_prev = capture;
|
|
8009a0a: 4b04 ldr r3, [pc, #16] ; (8009a1c <GetEncoder+0xb4>)
|
|
8009a0c: 681b ldr r3, [r3, #0]
|
|
8009a0e: 4a04 ldr r2, [pc, #16] ; (8009a20 <GetEncoder+0xb8>)
|
|
8009a10: 6013 str r3, [r2, #0]
|
|
}
|
|
8009a12: bf00 nop
|
|
8009a14: 46bd mov sp, r7
|
|
8009a16: bc80 pop {r7}
|
|
8009a18: 4770 bx lr
|
|
8009a1a: bf00 nop
|
|
8009a1c: 20000fc0 .word 0x20000fc0
|
|
8009a20: 20000fc4 .word 0x20000fc4
|
|
8009a24: 20000fb8 .word 0x20000fb8
|
|
8009a28: 20000fbc .word 0x20000fbc
|
|
8009a2c: b60b60b7 .word 0xb60b60b7
|
|
|
|
08009a30 <StartDefaultTask>:
|
|
* @param argument: Not used
|
|
* @retval None
|
|
*/
|
|
/* USER CODE END Header_StartDefaultTask */
|
|
void StartDefaultTask(void const * argument)
|
|
{
|
|
8009a30: b580 push {r7, lr}
|
|
8009a32: b082 sub sp, #8
|
|
8009a34: af00 add r7, sp, #0
|
|
8009a36: 6078 str r0, [r7, #4]
|
|
/* init code for USB_DEVICE */
|
|
MX_USB_DEVICE_Init();
|
|
8009a38: f000 fc84 bl 800a344 <MX_USB_DEVICE_Init>
|
|
|
|
/* USER CODE BEGIN 5 */
|
|
/* Infinite loop */
|
|
for (;;) {
|
|
osDelay(1);
|
|
8009a3c: 2001 movs r0, #1
|
|
8009a3e: f7fe f940 bl 8007cc2 <osDelay>
|
|
8009a42: e7fb b.n 8009a3c <StartDefaultTask+0xc>
|
|
8009a44: 0000 movs r0, r0
|
|
...
|
|
|
|
08009a48 <StartTask02>:
|
|
* @param argument: Not used
|
|
* @retval None
|
|
*/
|
|
/* USER CODE END Header_StartTask02 */
|
|
void StartTask02(void const * argument)
|
|
{
|
|
8009a48: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
|
8009a4c: b08f sub sp, #60 ; 0x3c
|
|
8009a4e: af04 add r7, sp, #16
|
|
8009a50: 6078 str r0, [r7, #4]
|
|
/* USER CODE BEGIN StartTask02 */
|
|
char buf[25];
|
|
|
|
initDisplay();
|
|
8009a52: f7ff fc3b bl 80092cc <initDisplay>
|
|
hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
|
|
8009a56: 4bcc ldr r3, [pc, #816] ; (8009d88 <StartTask02+0x340>)
|
|
8009a58: 2200 movs r2, #0
|
|
8009a5a: 61da str r2, [r3, #28]
|
|
HAL_TIM_Encoder_Start(&htim2, TIM_CHANNEL_ALL);
|
|
8009a5c: 213c movs r1, #60 ; 0x3c
|
|
8009a5e: 48cb ldr r0, [pc, #812] ; (8009d8c <StartTask02+0x344>)
|
|
8009a60: f7fa fb91 bl 8004186 <HAL_TIM_Encoder_Start>
|
|
drawStatic();
|
|
8009a64: f7ff fd0c bl 8009480 <drawStatic>
|
|
|
|
/* Infinite loop */
|
|
for (;;) {
|
|
GetTime();
|
|
8009a68: f7ff ff5a bl 8009920 <GetTime>
|
|
GetEncoder();
|
|
8009a6c: f7ff ff7c bl 8009968 <GetEncoder>
|
|
|
|
if (HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_4) == 0) {
|
|
8009a70: 2110 movs r1, #16
|
|
8009a72: 48c7 ldr r0, [pc, #796] ; (8009d90 <StartTask02+0x348>)
|
|
8009a74: f7f7 fdaa bl 80015cc <HAL_GPIO_ReadPin>
|
|
|
|
}
|
|
|
|
sprintf(buf, "%03ld", encoder);
|
|
8009a78: 4bc6 ldr r3, [pc, #792] ; (8009d94 <StartTask02+0x34c>)
|
|
8009a7a: 681a ldr r2, [r3, #0]
|
|
8009a7c: f107 030c add.w r3, r7, #12
|
|
8009a80: 49c5 ldr r1, [pc, #788] ; (8009d98 <StartTask02+0x350>)
|
|
8009a82: 4618 mov r0, r3
|
|
8009a84: f001 f960 bl 800ad48 <siprintf>
|
|
drawDirection(encoder,0,210, ILI9341_CYAN);
|
|
8009a88: 4bc2 ldr r3, [pc, #776] ; (8009d94 <StartTask02+0x34c>)
|
|
8009a8a: 6818 ldr r0, [r3, #0]
|
|
8009a8c: f240 73ff movw r3, #2047 ; 0x7ff
|
|
8009a90: 22d2 movs r2, #210 ; 0xd2
|
|
8009a92: 2100 movs r1, #0
|
|
8009a94: f7ff fddc bl 8009650 <drawDirection>
|
|
ILI9341_WriteString(5, 100, buf, Font_16x26, ILI9341_RED, ILI9341_BLACK);
|
|
8009a98: 4bc0 ldr r3, [pc, #768] ; (8009d9c <StartTask02+0x354>)
|
|
8009a9a: f107 010c add.w r1, r7, #12
|
|
8009a9e: 2200 movs r2, #0
|
|
8009aa0: 9202 str r2, [sp, #8]
|
|
8009aa2: f44f 4278 mov.w r2, #63488 ; 0xf800
|
|
8009aa6: 9201 str r2, [sp, #4]
|
|
8009aa8: 685a ldr r2, [r3, #4]
|
|
8009aaa: 9200 str r2, [sp, #0]
|
|
8009aac: 681b ldr r3, [r3, #0]
|
|
8009aae: 460a mov r2, r1
|
|
8009ab0: 2164 movs r1, #100 ; 0x64
|
|
8009ab2: 2005 movs r0, #5
|
|
8009ab4: f7fc f981 bl 8005dba <ILI9341_WriteString>
|
|
ILI9341_WriteString(5, 145, buf, Font_16x26, ILI9341_RED, ILI9341_BLACK);
|
|
8009ab8: 4bb8 ldr r3, [pc, #736] ; (8009d9c <StartTask02+0x354>)
|
|
8009aba: f107 010c add.w r1, r7, #12
|
|
8009abe: 2200 movs r2, #0
|
|
8009ac0: 9202 str r2, [sp, #8]
|
|
8009ac2: f44f 4278 mov.w r2, #63488 ; 0xf800
|
|
8009ac6: 9201 str r2, [sp, #4]
|
|
8009ac8: 685a ldr r2, [r3, #4]
|
|
8009aca: 9200 str r2, [sp, #0]
|
|
8009acc: 681b ldr r3, [r3, #0]
|
|
8009ace: 460a mov r2, r1
|
|
8009ad0: 2191 movs r1, #145 ; 0x91
|
|
8009ad2: 2005 movs r0, #5
|
|
8009ad4: f7fc f971 bl 8005dba <ILI9341_WriteString>
|
|
ILI9341_WriteString(229, 0, time_str, Font_11x18, ILI9341_GREEN, ILI9341_BLACK);
|
|
8009ad8: 4bb1 ldr r3, [pc, #708] ; (8009da0 <StartTask02+0x358>)
|
|
8009ada: 2200 movs r2, #0
|
|
8009adc: 9202 str r2, [sp, #8]
|
|
8009ade: f44f 62fc mov.w r2, #2016 ; 0x7e0
|
|
8009ae2: 9201 str r2, [sp, #4]
|
|
8009ae4: 685a ldr r2, [r3, #4]
|
|
8009ae6: 9200 str r2, [sp, #0]
|
|
8009ae8: 681b ldr r3, [r3, #0]
|
|
8009aea: 4aae ldr r2, [pc, #696] ; (8009da4 <StartTask02+0x35c>)
|
|
8009aec: 2100 movs r1, #0
|
|
8009aee: 20e5 movs r0, #229 ; 0xe5
|
|
8009af0: f7fc f963 bl 8005dba <ILI9341_WriteString>
|
|
ILI9341_DrawArrow(x_center, y_center, x_center+radius*cos((encoder/180.0*M_PI)-(90/180.0*M_PI)), y_center+radius*sin((encoder/180.0*M_PI)-(90/180.0 * M_PI)), 0.23, ILI9341_RED);
|
|
8009af4: 4bac ldr r3, [pc, #688] ; (8009da8 <StartTask02+0x360>)
|
|
8009af6: 681b ldr r3, [r3, #0]
|
|
8009af8: b21c sxth r4, r3
|
|
8009afa: 4bac ldr r3, [pc, #688] ; (8009dac <StartTask02+0x364>)
|
|
8009afc: 681b ldr r3, [r3, #0]
|
|
8009afe: b21d sxth r5, r3
|
|
8009b00: 4ba9 ldr r3, [pc, #676] ; (8009da8 <StartTask02+0x360>)
|
|
8009b02: 681b ldr r3, [r3, #0]
|
|
8009b04: 4618 mov r0, r3
|
|
8009b06: f7f6 fc75 bl 80003f4 <__aeabi_i2d>
|
|
8009b0a: 4680 mov r8, r0
|
|
8009b0c: 4689 mov r9, r1
|
|
8009b0e: 4ba8 ldr r3, [pc, #672] ; (8009db0 <StartTask02+0x368>)
|
|
8009b10: 681b ldr r3, [r3, #0]
|
|
8009b12: 4618 mov r0, r3
|
|
8009b14: f7f6 fc6e bl 80003f4 <__aeabi_i2d>
|
|
8009b18: 4682 mov sl, r0
|
|
8009b1a: 468b mov fp, r1
|
|
8009b1c: 4b9d ldr r3, [pc, #628] ; (8009d94 <StartTask02+0x34c>)
|
|
8009b1e: 681b ldr r3, [r3, #0]
|
|
8009b20: 4618 mov r0, r3
|
|
8009b22: f7f6 fc67 bl 80003f4 <__aeabi_i2d>
|
|
8009b26: f04f 0200 mov.w r2, #0
|
|
8009b2a: 4ba2 ldr r3, [pc, #648] ; (8009db4 <StartTask02+0x36c>)
|
|
8009b2c: f7f6 fdf6 bl 800071c <__aeabi_ddiv>
|
|
8009b30: 4602 mov r2, r0
|
|
8009b32: 460b mov r3, r1
|
|
8009b34: 4610 mov r0, r2
|
|
8009b36: 4619 mov r1, r3
|
|
8009b38: a38f add r3, pc, #572 ; (adr r3, 8009d78 <StartTask02+0x330>)
|
|
8009b3a: e9d3 2300 ldrd r2, r3, [r3]
|
|
8009b3e: f7f6 fcc3 bl 80004c8 <__aeabi_dmul>
|
|
8009b42: 4602 mov r2, r0
|
|
8009b44: 460b mov r3, r1
|
|
8009b46: 4610 mov r0, r2
|
|
8009b48: 4619 mov r1, r3
|
|
8009b4a: a38d add r3, pc, #564 ; (adr r3, 8009d80 <StartTask02+0x338>)
|
|
8009b4c: e9d3 2300 ldrd r2, r3, [r3]
|
|
8009b50: f7f6 fb02 bl 8000158 <__aeabi_dsub>
|
|
8009b54: 4602 mov r2, r0
|
|
8009b56: 460b mov r3, r1
|
|
8009b58: 4610 mov r0, r2
|
|
8009b5a: 4619 mov r1, r3
|
|
8009b5c: f001 fcfc bl 800b558 <cos>
|
|
8009b60: 4602 mov r2, r0
|
|
8009b62: 460b mov r3, r1
|
|
8009b64: 4650 mov r0, sl
|
|
8009b66: 4659 mov r1, fp
|
|
8009b68: f7f6 fcae bl 80004c8 <__aeabi_dmul>
|
|
8009b6c: 4602 mov r2, r0
|
|
8009b6e: 460b mov r3, r1
|
|
8009b70: 4640 mov r0, r8
|
|
8009b72: 4649 mov r1, r9
|
|
8009b74: f7f6 faf2 bl 800015c <__adddf3>
|
|
8009b78: 4602 mov r2, r0
|
|
8009b7a: 460b mov r3, r1
|
|
8009b7c: 4610 mov r0, r2
|
|
8009b7e: 4619 mov r1, r3
|
|
8009b80: f7f6 ff3c bl 80009fc <__aeabi_d2iz>
|
|
8009b84: 4603 mov r3, r0
|
|
8009b86: b21e sxth r6, r3
|
|
8009b88: 4b88 ldr r3, [pc, #544] ; (8009dac <StartTask02+0x364>)
|
|
8009b8a: 681b ldr r3, [r3, #0]
|
|
8009b8c: 4618 mov r0, r3
|
|
8009b8e: f7f6 fc31 bl 80003f4 <__aeabi_i2d>
|
|
8009b92: 4680 mov r8, r0
|
|
8009b94: 4689 mov r9, r1
|
|
8009b96: 4b86 ldr r3, [pc, #536] ; (8009db0 <StartTask02+0x368>)
|
|
8009b98: 681b ldr r3, [r3, #0]
|
|
8009b9a: 4618 mov r0, r3
|
|
8009b9c: f7f6 fc2a bl 80003f4 <__aeabi_i2d>
|
|
8009ba0: 4682 mov sl, r0
|
|
8009ba2: 468b mov fp, r1
|
|
8009ba4: 4b7b ldr r3, [pc, #492] ; (8009d94 <StartTask02+0x34c>)
|
|
8009ba6: 681b ldr r3, [r3, #0]
|
|
8009ba8: 4618 mov r0, r3
|
|
8009baa: f7f6 fc23 bl 80003f4 <__aeabi_i2d>
|
|
8009bae: f04f 0200 mov.w r2, #0
|
|
8009bb2: 4b80 ldr r3, [pc, #512] ; (8009db4 <StartTask02+0x36c>)
|
|
8009bb4: f7f6 fdb2 bl 800071c <__aeabi_ddiv>
|
|
8009bb8: 4602 mov r2, r0
|
|
8009bba: 460b mov r3, r1
|
|
8009bbc: 4610 mov r0, r2
|
|
8009bbe: 4619 mov r1, r3
|
|
8009bc0: a36d add r3, pc, #436 ; (adr r3, 8009d78 <StartTask02+0x330>)
|
|
8009bc2: e9d3 2300 ldrd r2, r3, [r3]
|
|
8009bc6: f7f6 fc7f bl 80004c8 <__aeabi_dmul>
|
|
8009bca: 4602 mov r2, r0
|
|
8009bcc: 460b mov r3, r1
|
|
8009bce: 4610 mov r0, r2
|
|
8009bd0: 4619 mov r1, r3
|
|
8009bd2: a36b add r3, pc, #428 ; (adr r3, 8009d80 <StartTask02+0x338>)
|
|
8009bd4: e9d3 2300 ldrd r2, r3, [r3]
|
|
8009bd8: f7f6 fabe bl 8000158 <__aeabi_dsub>
|
|
8009bdc: 4602 mov r2, r0
|
|
8009bde: 460b mov r3, r1
|
|
8009be0: 4610 mov r0, r2
|
|
8009be2: 4619 mov r1, r3
|
|
8009be4: f001 fd34 bl 800b650 <sin>
|
|
8009be8: 4602 mov r2, r0
|
|
8009bea: 460b mov r3, r1
|
|
8009bec: 4650 mov r0, sl
|
|
8009bee: 4659 mov r1, fp
|
|
8009bf0: f7f6 fc6a bl 80004c8 <__aeabi_dmul>
|
|
8009bf4: 4602 mov r2, r0
|
|
8009bf6: 460b mov r3, r1
|
|
8009bf8: 4640 mov r0, r8
|
|
8009bfa: 4649 mov r1, r9
|
|
8009bfc: f7f6 faae bl 800015c <__adddf3>
|
|
8009c00: 4602 mov r2, r0
|
|
8009c02: 460b mov r3, r1
|
|
8009c04: 4610 mov r0, r2
|
|
8009c06: 4619 mov r1, r3
|
|
8009c08: f7f6 fef8 bl 80009fc <__aeabi_d2iz>
|
|
8009c0c: 4603 mov r3, r0
|
|
8009c0e: b21a sxth r2, r3
|
|
8009c10: f44f 4378 mov.w r3, #63488 ; 0xf800
|
|
8009c14: 9301 str r3, [sp, #4]
|
|
8009c16: 4b68 ldr r3, [pc, #416] ; (8009db8 <StartTask02+0x370>)
|
|
8009c18: 9300 str r3, [sp, #0]
|
|
8009c1a: 4613 mov r3, r2
|
|
8009c1c: 4632 mov r2, r6
|
|
8009c1e: 4629 mov r1, r5
|
|
8009c20: 4620 mov r0, r4
|
|
8009c22: f7fc fa26 bl 8006072 <ILI9341_DrawArrow>
|
|
ILI9341_drawCircle(x_center, y_center, radius, ILI9341_RED);
|
|
8009c26: 4b60 ldr r3, [pc, #384] ; (8009da8 <StartTask02+0x360>)
|
|
8009c28: 681b ldr r3, [r3, #0]
|
|
8009c2a: b218 sxth r0, r3
|
|
8009c2c: 4b5f ldr r3, [pc, #380] ; (8009dac <StartTask02+0x364>)
|
|
8009c2e: 681b ldr r3, [r3, #0]
|
|
8009c30: b219 sxth r1, r3
|
|
8009c32: 4b5f ldr r3, [pc, #380] ; (8009db0 <StartTask02+0x368>)
|
|
8009c34: 681b ldr r3, [r3, #0]
|
|
8009c36: b21a sxth r2, r3
|
|
8009c38: f44f 4378 mov.w r3, #63488 ; 0xf800
|
|
8009c3c: f7fc fbc3 bl 80063c6 <ILI9341_drawCircle>
|
|
drawLineCircle(x_center,y_center,radius,ILI9341_YELLOW);
|
|
8009c40: 4b59 ldr r3, [pc, #356] ; (8009da8 <StartTask02+0x360>)
|
|
8009c42: 6818 ldr r0, [r3, #0]
|
|
8009c44: 4b59 ldr r3, [pc, #356] ; (8009dac <StartTask02+0x364>)
|
|
8009c46: 6819 ldr r1, [r3, #0]
|
|
8009c48: 4b59 ldr r3, [pc, #356] ; (8009db0 <StartTask02+0x368>)
|
|
8009c4a: 681a ldr r2, [r3, #0]
|
|
8009c4c: f64f 73e0 movw r3, #65504 ; 0xffe0
|
|
8009c50: f7ff fb46 bl 80092e0 <drawLineCircle>
|
|
if (encoder_prev != 10000) {
|
|
8009c54: 4b59 ldr r3, [pc, #356] ; (8009dbc <StartTask02+0x374>)
|
|
8009c56: 681b ldr r3, [r3, #0]
|
|
8009c58: f242 7210 movw r2, #10000 ; 0x2710
|
|
8009c5c: 4293 cmp r3, r2
|
|
8009c5e: f000 8157 beq.w 8009f10 <StartTask02+0x4c8>
|
|
ILI9341_DrawArrow(x_center, y_center, x_center+radius*cos((encoder_prev/180.0*M_PI)-(90/180.0*M_PI)), y_center+radius*sin((encoder_prev/180.0*M_PI)-(90/180.0 * M_PI)), 0.23, ILI9341_BLACK);
|
|
8009c62: 4b51 ldr r3, [pc, #324] ; (8009da8 <StartTask02+0x360>)
|
|
8009c64: 681b ldr r3, [r3, #0]
|
|
8009c66: b21c sxth r4, r3
|
|
8009c68: 4b50 ldr r3, [pc, #320] ; (8009dac <StartTask02+0x364>)
|
|
8009c6a: 681b ldr r3, [r3, #0]
|
|
8009c6c: b21d sxth r5, r3
|
|
8009c6e: 4b4e ldr r3, [pc, #312] ; (8009da8 <StartTask02+0x360>)
|
|
8009c70: 681b ldr r3, [r3, #0]
|
|
8009c72: 4618 mov r0, r3
|
|
8009c74: f7f6 fbbe bl 80003f4 <__aeabi_i2d>
|
|
8009c78: 4680 mov r8, r0
|
|
8009c7a: 4689 mov r9, r1
|
|
8009c7c: 4b4c ldr r3, [pc, #304] ; (8009db0 <StartTask02+0x368>)
|
|
8009c7e: 681b ldr r3, [r3, #0]
|
|
8009c80: 4618 mov r0, r3
|
|
8009c82: f7f6 fbb7 bl 80003f4 <__aeabi_i2d>
|
|
8009c86: 4682 mov sl, r0
|
|
8009c88: 468b mov fp, r1
|
|
8009c8a: 4b4c ldr r3, [pc, #304] ; (8009dbc <StartTask02+0x374>)
|
|
8009c8c: 681b ldr r3, [r3, #0]
|
|
8009c8e: 4618 mov r0, r3
|
|
8009c90: f7f6 fbb0 bl 80003f4 <__aeabi_i2d>
|
|
8009c94: f04f 0200 mov.w r2, #0
|
|
8009c98: 4b46 ldr r3, [pc, #280] ; (8009db4 <StartTask02+0x36c>)
|
|
8009c9a: f7f6 fd3f bl 800071c <__aeabi_ddiv>
|
|
8009c9e: 4602 mov r2, r0
|
|
8009ca0: 460b mov r3, r1
|
|
8009ca2: 4610 mov r0, r2
|
|
8009ca4: 4619 mov r1, r3
|
|
8009ca6: a334 add r3, pc, #208 ; (adr r3, 8009d78 <StartTask02+0x330>)
|
|
8009ca8: e9d3 2300 ldrd r2, r3, [r3]
|
|
8009cac: f7f6 fc0c bl 80004c8 <__aeabi_dmul>
|
|
8009cb0: 4602 mov r2, r0
|
|
8009cb2: 460b mov r3, r1
|
|
8009cb4: 4610 mov r0, r2
|
|
8009cb6: 4619 mov r1, r3
|
|
8009cb8: a331 add r3, pc, #196 ; (adr r3, 8009d80 <StartTask02+0x338>)
|
|
8009cba: e9d3 2300 ldrd r2, r3, [r3]
|
|
8009cbe: f7f6 fa4b bl 8000158 <__aeabi_dsub>
|
|
8009cc2: 4602 mov r2, r0
|
|
8009cc4: 460b mov r3, r1
|
|
8009cc6: 4610 mov r0, r2
|
|
8009cc8: 4619 mov r1, r3
|
|
8009cca: f001 fc45 bl 800b558 <cos>
|
|
8009cce: 4602 mov r2, r0
|
|
8009cd0: 460b mov r3, r1
|
|
8009cd2: 4650 mov r0, sl
|
|
8009cd4: 4659 mov r1, fp
|
|
8009cd6: f7f6 fbf7 bl 80004c8 <__aeabi_dmul>
|
|
8009cda: 4602 mov r2, r0
|
|
8009cdc: 460b mov r3, r1
|
|
8009cde: 4640 mov r0, r8
|
|
8009ce0: 4649 mov r1, r9
|
|
8009ce2: f7f6 fa3b bl 800015c <__adddf3>
|
|
8009ce6: 4602 mov r2, r0
|
|
8009ce8: 460b mov r3, r1
|
|
8009cea: 4610 mov r0, r2
|
|
8009cec: 4619 mov r1, r3
|
|
8009cee: f7f6 fe85 bl 80009fc <__aeabi_d2iz>
|
|
8009cf2: 4603 mov r3, r0
|
|
8009cf4: b21e sxth r6, r3
|
|
8009cf6: 4b2d ldr r3, [pc, #180] ; (8009dac <StartTask02+0x364>)
|
|
8009cf8: 681b ldr r3, [r3, #0]
|
|
8009cfa: 4618 mov r0, r3
|
|
8009cfc: f7f6 fb7a bl 80003f4 <__aeabi_i2d>
|
|
8009d00: 4680 mov r8, r0
|
|
8009d02: 4689 mov r9, r1
|
|
8009d04: 4b2a ldr r3, [pc, #168] ; (8009db0 <StartTask02+0x368>)
|
|
8009d06: 681b ldr r3, [r3, #0]
|
|
8009d08: 4618 mov r0, r3
|
|
8009d0a: f7f6 fb73 bl 80003f4 <__aeabi_i2d>
|
|
8009d0e: 4682 mov sl, r0
|
|
8009d10: 468b mov fp, r1
|
|
8009d12: 4b2a ldr r3, [pc, #168] ; (8009dbc <StartTask02+0x374>)
|
|
8009d14: 681b ldr r3, [r3, #0]
|
|
8009d16: 4618 mov r0, r3
|
|
8009d18: f7f6 fb6c bl 80003f4 <__aeabi_i2d>
|
|
8009d1c: f04f 0200 mov.w r2, #0
|
|
8009d20: 4b24 ldr r3, [pc, #144] ; (8009db4 <StartTask02+0x36c>)
|
|
8009d22: f7f6 fcfb bl 800071c <__aeabi_ddiv>
|
|
8009d26: 4602 mov r2, r0
|
|
8009d28: 460b mov r3, r1
|
|
8009d2a: 4610 mov r0, r2
|
|
8009d2c: 4619 mov r1, r3
|
|
8009d2e: a312 add r3, pc, #72 ; (adr r3, 8009d78 <StartTask02+0x330>)
|
|
8009d30: e9d3 2300 ldrd r2, r3, [r3]
|
|
8009d34: f7f6 fbc8 bl 80004c8 <__aeabi_dmul>
|
|
8009d38: 4602 mov r2, r0
|
|
8009d3a: 460b mov r3, r1
|
|
8009d3c: 4610 mov r0, r2
|
|
8009d3e: 4619 mov r1, r3
|
|
8009d40: a30f add r3, pc, #60 ; (adr r3, 8009d80 <StartTask02+0x338>)
|
|
8009d42: e9d3 2300 ldrd r2, r3, [r3]
|
|
8009d46: f7f6 fa07 bl 8000158 <__aeabi_dsub>
|
|
8009d4a: 4602 mov r2, r0
|
|
8009d4c: 460b mov r3, r1
|
|
8009d4e: 4610 mov r0, r2
|
|
8009d50: 4619 mov r1, r3
|
|
8009d52: f001 fc7d bl 800b650 <sin>
|
|
8009d56: 4602 mov r2, r0
|
|
8009d58: 460b mov r3, r1
|
|
8009d5a: 4650 mov r0, sl
|
|
8009d5c: 4659 mov r1, fp
|
|
8009d5e: f7f6 fbb3 bl 80004c8 <__aeabi_dmul>
|
|
8009d62: 4602 mov r2, r0
|
|
8009d64: 460b mov r3, r1
|
|
8009d66: 4640 mov r0, r8
|
|
8009d68: 4649 mov r1, r9
|
|
8009d6a: f7f6 f9f7 bl 800015c <__adddf3>
|
|
8009d6e: 4602 mov r2, r0
|
|
8009d70: 460b mov r3, r1
|
|
8009d72: 4610 mov r0, r2
|
|
8009d74: e024 b.n 8009dc0 <StartTask02+0x378>
|
|
8009d76: bf00 nop
|
|
8009d78: 54442d18 .word 0x54442d18
|
|
8009d7c: 400921fb .word 0x400921fb
|
|
8009d80: 54442d18 .word 0x54442d18
|
|
8009d84: 3ff921fb .word 0x3ff921fb
|
|
8009d88: 200011fc .word 0x200011fc
|
|
8009d8c: 200012c0 .word 0x200012c0
|
|
8009d90: 40010800 .word 0x40010800
|
|
8009d94: 20000fb8 .word 0x20000fb8
|
|
8009d98: 0800c7a4 .word 0x0800c7a4
|
|
8009d9c: 20000018 .word 0x20000018
|
|
8009da0: 20000010 .word 0x20000010
|
|
8009da4: 20000f78 .word 0x20000f78
|
|
8009da8: 20000138 .word 0x20000138
|
|
8009dac: 2000013c .word 0x2000013c
|
|
8009db0: 20000134 .word 0x20000134
|
|
8009db4: 40668000 .word 0x40668000
|
|
8009db8: 3e6b851f .word 0x3e6b851f
|
|
8009dbc: 20000fbc .word 0x20000fbc
|
|
8009dc0: 4619 mov r1, r3
|
|
8009dc2: f7f6 fe1b bl 80009fc <__aeabi_d2iz>
|
|
8009dc6: 4603 mov r3, r0
|
|
8009dc8: b21a sxth r2, r3
|
|
8009dca: 2300 movs r3, #0
|
|
8009dcc: 9301 str r3, [sp, #4]
|
|
8009dce: 4b56 ldr r3, [pc, #344] ; (8009f28 <StartTask02+0x4e0>)
|
|
8009dd0: 9300 str r3, [sp, #0]
|
|
8009dd2: 4613 mov r3, r2
|
|
8009dd4: 4632 mov r2, r6
|
|
8009dd6: 4629 mov r1, r5
|
|
8009dd8: 4620 mov r0, r4
|
|
8009dda: f7fc f94a bl 8006072 <ILI9341_DrawArrow>
|
|
ILI9341_DrawArrow(x_center, y_center, x_center+radius*cos((encoder/180.0*M_PI)-(90/180.0*M_PI)), y_center+radius*sin((encoder/180.0*M_PI)-(90/180.0 * M_PI)), 0.23, ILI9341_RED);
|
|
8009dde: 4b53 ldr r3, [pc, #332] ; (8009f2c <StartTask02+0x4e4>)
|
|
8009de0: 681b ldr r3, [r3, #0]
|
|
8009de2: b21c sxth r4, r3
|
|
8009de4: 4b52 ldr r3, [pc, #328] ; (8009f30 <StartTask02+0x4e8>)
|
|
8009de6: 681b ldr r3, [r3, #0]
|
|
8009de8: b21d sxth r5, r3
|
|
8009dea: 4b50 ldr r3, [pc, #320] ; (8009f2c <StartTask02+0x4e4>)
|
|
8009dec: 681b ldr r3, [r3, #0]
|
|
8009dee: 4618 mov r0, r3
|
|
8009df0: f7f6 fb00 bl 80003f4 <__aeabi_i2d>
|
|
8009df4: 4680 mov r8, r0
|
|
8009df6: 4689 mov r9, r1
|
|
8009df8: 4b4e ldr r3, [pc, #312] ; (8009f34 <StartTask02+0x4ec>)
|
|
8009dfa: 681b ldr r3, [r3, #0]
|
|
8009dfc: 4618 mov r0, r3
|
|
8009dfe: f7f6 faf9 bl 80003f4 <__aeabi_i2d>
|
|
8009e02: 4682 mov sl, r0
|
|
8009e04: 468b mov fp, r1
|
|
8009e06: 4b4c ldr r3, [pc, #304] ; (8009f38 <StartTask02+0x4f0>)
|
|
8009e08: 681b ldr r3, [r3, #0]
|
|
8009e0a: 4618 mov r0, r3
|
|
8009e0c: f7f6 faf2 bl 80003f4 <__aeabi_i2d>
|
|
8009e10: f04f 0200 mov.w r2, #0
|
|
8009e14: 4b49 ldr r3, [pc, #292] ; (8009f3c <StartTask02+0x4f4>)
|
|
8009e16: f7f6 fc81 bl 800071c <__aeabi_ddiv>
|
|
8009e1a: 4602 mov r2, r0
|
|
8009e1c: 460b mov r3, r1
|
|
8009e1e: 4610 mov r0, r2
|
|
8009e20: 4619 mov r1, r3
|
|
8009e22: a33d add r3, pc, #244 ; (adr r3, 8009f18 <StartTask02+0x4d0>)
|
|
8009e24: e9d3 2300 ldrd r2, r3, [r3]
|
|
8009e28: f7f6 fb4e bl 80004c8 <__aeabi_dmul>
|
|
8009e2c: 4602 mov r2, r0
|
|
8009e2e: 460b mov r3, r1
|
|
8009e30: 4610 mov r0, r2
|
|
8009e32: 4619 mov r1, r3
|
|
8009e34: a33a add r3, pc, #232 ; (adr r3, 8009f20 <StartTask02+0x4d8>)
|
|
8009e36: e9d3 2300 ldrd r2, r3, [r3]
|
|
8009e3a: f7f6 f98d bl 8000158 <__aeabi_dsub>
|
|
8009e3e: 4602 mov r2, r0
|
|
8009e40: 460b mov r3, r1
|
|
8009e42: 4610 mov r0, r2
|
|
8009e44: 4619 mov r1, r3
|
|
8009e46: f001 fb87 bl 800b558 <cos>
|
|
8009e4a: 4602 mov r2, r0
|
|
8009e4c: 460b mov r3, r1
|
|
8009e4e: 4650 mov r0, sl
|
|
8009e50: 4659 mov r1, fp
|
|
8009e52: f7f6 fb39 bl 80004c8 <__aeabi_dmul>
|
|
8009e56: 4602 mov r2, r0
|
|
8009e58: 460b mov r3, r1
|
|
8009e5a: 4640 mov r0, r8
|
|
8009e5c: 4649 mov r1, r9
|
|
8009e5e: f7f6 f97d bl 800015c <__adddf3>
|
|
8009e62: 4602 mov r2, r0
|
|
8009e64: 460b mov r3, r1
|
|
8009e66: 4610 mov r0, r2
|
|
8009e68: 4619 mov r1, r3
|
|
8009e6a: f7f6 fdc7 bl 80009fc <__aeabi_d2iz>
|
|
8009e6e: 4603 mov r3, r0
|
|
8009e70: b21e sxth r6, r3
|
|
8009e72: 4b2f ldr r3, [pc, #188] ; (8009f30 <StartTask02+0x4e8>)
|
|
8009e74: 681b ldr r3, [r3, #0]
|
|
8009e76: 4618 mov r0, r3
|
|
8009e78: f7f6 fabc bl 80003f4 <__aeabi_i2d>
|
|
8009e7c: 4680 mov r8, r0
|
|
8009e7e: 4689 mov r9, r1
|
|
8009e80: 4b2c ldr r3, [pc, #176] ; (8009f34 <StartTask02+0x4ec>)
|
|
8009e82: 681b ldr r3, [r3, #0]
|
|
8009e84: 4618 mov r0, r3
|
|
8009e86: f7f6 fab5 bl 80003f4 <__aeabi_i2d>
|
|
8009e8a: 4682 mov sl, r0
|
|
8009e8c: 468b mov fp, r1
|
|
8009e8e: 4b2a ldr r3, [pc, #168] ; (8009f38 <StartTask02+0x4f0>)
|
|
8009e90: 681b ldr r3, [r3, #0]
|
|
8009e92: 4618 mov r0, r3
|
|
8009e94: f7f6 faae bl 80003f4 <__aeabi_i2d>
|
|
8009e98: f04f 0200 mov.w r2, #0
|
|
8009e9c: 4b27 ldr r3, [pc, #156] ; (8009f3c <StartTask02+0x4f4>)
|
|
8009e9e: f7f6 fc3d bl 800071c <__aeabi_ddiv>
|
|
8009ea2: 4602 mov r2, r0
|
|
8009ea4: 460b mov r3, r1
|
|
8009ea6: 4610 mov r0, r2
|
|
8009ea8: 4619 mov r1, r3
|
|
8009eaa: a31b add r3, pc, #108 ; (adr r3, 8009f18 <StartTask02+0x4d0>)
|
|
8009eac: e9d3 2300 ldrd r2, r3, [r3]
|
|
8009eb0: f7f6 fb0a bl 80004c8 <__aeabi_dmul>
|
|
8009eb4: 4602 mov r2, r0
|
|
8009eb6: 460b mov r3, r1
|
|
8009eb8: 4610 mov r0, r2
|
|
8009eba: 4619 mov r1, r3
|
|
8009ebc: a318 add r3, pc, #96 ; (adr r3, 8009f20 <StartTask02+0x4d8>)
|
|
8009ebe: e9d3 2300 ldrd r2, r3, [r3]
|
|
8009ec2: f7f6 f949 bl 8000158 <__aeabi_dsub>
|
|
8009ec6: 4602 mov r2, r0
|
|
8009ec8: 460b mov r3, r1
|
|
8009eca: 4610 mov r0, r2
|
|
8009ecc: 4619 mov r1, r3
|
|
8009ece: f001 fbbf bl 800b650 <sin>
|
|
8009ed2: 4602 mov r2, r0
|
|
8009ed4: 460b mov r3, r1
|
|
8009ed6: 4650 mov r0, sl
|
|
8009ed8: 4659 mov r1, fp
|
|
8009eda: f7f6 faf5 bl 80004c8 <__aeabi_dmul>
|
|
8009ede: 4602 mov r2, r0
|
|
8009ee0: 460b mov r3, r1
|
|
8009ee2: 4640 mov r0, r8
|
|
8009ee4: 4649 mov r1, r9
|
|
8009ee6: f7f6 f939 bl 800015c <__adddf3>
|
|
8009eea: 4602 mov r2, r0
|
|
8009eec: 460b mov r3, r1
|
|
8009eee: 4610 mov r0, r2
|
|
8009ef0: 4619 mov r1, r3
|
|
8009ef2: f7f6 fd83 bl 80009fc <__aeabi_d2iz>
|
|
8009ef6: 4603 mov r3, r0
|
|
8009ef8: b21a sxth r2, r3
|
|
8009efa: f44f 4378 mov.w r3, #63488 ; 0xf800
|
|
8009efe: 9301 str r3, [sp, #4]
|
|
8009f00: 4b09 ldr r3, [pc, #36] ; (8009f28 <StartTask02+0x4e0>)
|
|
8009f02: 9300 str r3, [sp, #0]
|
|
8009f04: 4613 mov r3, r2
|
|
8009f06: 4632 mov r2, r6
|
|
8009f08: 4629 mov r1, r5
|
|
8009f0a: 4620 mov r0, r4
|
|
8009f0c: f7fc f8b1 bl 8006072 <ILI9341_DrawArrow>
|
|
}
|
|
osDelay(1);
|
|
8009f10: 2001 movs r0, #1
|
|
8009f12: f7fd fed6 bl 8007cc2 <osDelay>
|
|
GetTime();
|
|
8009f16: e5a7 b.n 8009a68 <StartTask02+0x20>
|
|
8009f18: 54442d18 .word 0x54442d18
|
|
8009f1c: 400921fb .word 0x400921fb
|
|
8009f20: 54442d18 .word 0x54442d18
|
|
8009f24: 3ff921fb .word 0x3ff921fb
|
|
8009f28: 3e6b851f .word 0x3e6b851f
|
|
8009f2c: 20000138 .word 0x20000138
|
|
8009f30: 2000013c .word 0x2000013c
|
|
8009f34: 20000134 .word 0x20000134
|
|
8009f38: 20000fb8 .word 0x20000fb8
|
|
8009f3c: 40668000 .word 0x40668000
|
|
|
|
08009f40 <Error_Handler>:
|
|
/**
|
|
* @brief This function is executed in case of error occurrence.
|
|
* @retval None
|
|
*/
|
|
void Error_Handler(void)
|
|
{
|
|
8009f40: b480 push {r7}
|
|
8009f42: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN Error_Handler_Debug */
|
|
/* User can add his own implementation to report the HAL error return state */
|
|
|
|
/* USER CODE END Error_Handler_Debug */
|
|
}
|
|
8009f44: bf00 nop
|
|
8009f46: 46bd mov sp, r7
|
|
8009f48: bc80 pop {r7}
|
|
8009f4a: 4770 bx lr
|
|
|
|
08009f4c <HAL_MspInit>:
|
|
/* USER CODE END 0 */
|
|
/**
|
|
* Initializes the Global MSP.
|
|
*/
|
|
void HAL_MspInit(void)
|
|
{
|
|
8009f4c: b580 push {r7, lr}
|
|
8009f4e: b084 sub sp, #16
|
|
8009f50: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN MspInit 0 */
|
|
|
|
/* USER CODE END MspInit 0 */
|
|
|
|
__HAL_RCC_AFIO_CLK_ENABLE();
|
|
8009f52: 4b18 ldr r3, [pc, #96] ; (8009fb4 <HAL_MspInit+0x68>)
|
|
8009f54: 699b ldr r3, [r3, #24]
|
|
8009f56: 4a17 ldr r2, [pc, #92] ; (8009fb4 <HAL_MspInit+0x68>)
|
|
8009f58: f043 0301 orr.w r3, r3, #1
|
|
8009f5c: 6193 str r3, [r2, #24]
|
|
8009f5e: 4b15 ldr r3, [pc, #84] ; (8009fb4 <HAL_MspInit+0x68>)
|
|
8009f60: 699b ldr r3, [r3, #24]
|
|
8009f62: f003 0301 and.w r3, r3, #1
|
|
8009f66: 60bb str r3, [r7, #8]
|
|
8009f68: 68bb ldr r3, [r7, #8]
|
|
__HAL_RCC_PWR_CLK_ENABLE();
|
|
8009f6a: 4b12 ldr r3, [pc, #72] ; (8009fb4 <HAL_MspInit+0x68>)
|
|
8009f6c: 69db ldr r3, [r3, #28]
|
|
8009f6e: 4a11 ldr r2, [pc, #68] ; (8009fb4 <HAL_MspInit+0x68>)
|
|
8009f70: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
|
|
8009f74: 61d3 str r3, [r2, #28]
|
|
8009f76: 4b0f ldr r3, [pc, #60] ; (8009fb4 <HAL_MspInit+0x68>)
|
|
8009f78: 69db ldr r3, [r3, #28]
|
|
8009f7a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
|
8009f7e: 607b str r3, [r7, #4]
|
|
8009f80: 687b ldr r3, [r7, #4]
|
|
|
|
/* System interrupt init*/
|
|
/* PendSV_IRQn interrupt configuration */
|
|
HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
|
|
8009f82: 2200 movs r2, #0
|
|
8009f84: 210f movs r1, #15
|
|
8009f86: f06f 0001 mvn.w r0, #1
|
|
8009f8a: f7f7 f98e bl 80012aa <HAL_NVIC_SetPriority>
|
|
|
|
/** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
|
|
*/
|
|
__HAL_AFIO_REMAP_SWJ_NOJTAG();
|
|
8009f8e: 4b0a ldr r3, [pc, #40] ; (8009fb8 <HAL_MspInit+0x6c>)
|
|
8009f90: 685b ldr r3, [r3, #4]
|
|
8009f92: 60fb str r3, [r7, #12]
|
|
8009f94: 68fb ldr r3, [r7, #12]
|
|
8009f96: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000
|
|
8009f9a: 60fb str r3, [r7, #12]
|
|
8009f9c: 68fb ldr r3, [r7, #12]
|
|
8009f9e: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000
|
|
8009fa2: 60fb str r3, [r7, #12]
|
|
8009fa4: 4a04 ldr r2, [pc, #16] ; (8009fb8 <HAL_MspInit+0x6c>)
|
|
8009fa6: 68fb ldr r3, [r7, #12]
|
|
8009fa8: 6053 str r3, [r2, #4]
|
|
|
|
/* USER CODE BEGIN MspInit 1 */
|
|
|
|
/* USER CODE END MspInit 1 */
|
|
}
|
|
8009faa: bf00 nop
|
|
8009fac: 3710 adds r7, #16
|
|
8009fae: 46bd mov sp, r7
|
|
8009fb0: bd80 pop {r7, pc}
|
|
8009fb2: bf00 nop
|
|
8009fb4: 40021000 .word 0x40021000
|
|
8009fb8: 40010000 .word 0x40010000
|
|
|
|
08009fbc <HAL_I2C_MspInit>:
|
|
* This function configures the hardware resources used in this example
|
|
* @param hi2c: I2C handle pointer
|
|
* @retval None
|
|
*/
|
|
void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
|
|
{
|
|
8009fbc: b580 push {r7, lr}
|
|
8009fbe: b088 sub sp, #32
|
|
8009fc0: af00 add r7, sp, #0
|
|
8009fc2: 6078 str r0, [r7, #4]
|
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
8009fc4: f107 0310 add.w r3, r7, #16
|
|
8009fc8: 2200 movs r2, #0
|
|
8009fca: 601a str r2, [r3, #0]
|
|
8009fcc: 605a str r2, [r3, #4]
|
|
8009fce: 609a str r2, [r3, #8]
|
|
8009fd0: 60da str r2, [r3, #12]
|
|
if(hi2c->Instance==I2C1)
|
|
8009fd2: 687b ldr r3, [r7, #4]
|
|
8009fd4: 681b ldr r3, [r3, #0]
|
|
8009fd6: 4a15 ldr r2, [pc, #84] ; (800a02c <HAL_I2C_MspInit+0x70>)
|
|
8009fd8: 4293 cmp r3, r2
|
|
8009fda: d123 bne.n 800a024 <HAL_I2C_MspInit+0x68>
|
|
{
|
|
/* USER CODE BEGIN I2C1_MspInit 0 */
|
|
|
|
/* USER CODE END I2C1_MspInit 0 */
|
|
|
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
|
8009fdc: 4b14 ldr r3, [pc, #80] ; (800a030 <HAL_I2C_MspInit+0x74>)
|
|
8009fde: 699b ldr r3, [r3, #24]
|
|
8009fe0: 4a13 ldr r2, [pc, #76] ; (800a030 <HAL_I2C_MspInit+0x74>)
|
|
8009fe2: f043 0308 orr.w r3, r3, #8
|
|
8009fe6: 6193 str r3, [r2, #24]
|
|
8009fe8: 4b11 ldr r3, [pc, #68] ; (800a030 <HAL_I2C_MspInit+0x74>)
|
|
8009fea: 699b ldr r3, [r3, #24]
|
|
8009fec: f003 0308 and.w r3, r3, #8
|
|
8009ff0: 60fb str r3, [r7, #12]
|
|
8009ff2: 68fb ldr r3, [r7, #12]
|
|
/**I2C1 GPIO Configuration
|
|
PB6 ------> I2C1_SCL
|
|
PB7 ------> I2C1_SDA
|
|
*/
|
|
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
|
|
8009ff4: 23c0 movs r3, #192 ; 0xc0
|
|
8009ff6: 613b str r3, [r7, #16]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
|
|
8009ff8: 2312 movs r3, #18
|
|
8009ffa: 617b str r3, [r7, #20]
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
|
8009ffc: 2303 movs r3, #3
|
|
8009ffe: 61fb str r3, [r7, #28]
|
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
|
800a000: f107 0310 add.w r3, r7, #16
|
|
800a004: 4619 mov r1, r3
|
|
800a006: 480b ldr r0, [pc, #44] ; (800a034 <HAL_I2C_MspInit+0x78>)
|
|
800a008: f7f7 f986 bl 8001318 <HAL_GPIO_Init>
|
|
|
|
/* Peripheral clock enable */
|
|
__HAL_RCC_I2C1_CLK_ENABLE();
|
|
800a00c: 4b08 ldr r3, [pc, #32] ; (800a030 <HAL_I2C_MspInit+0x74>)
|
|
800a00e: 69db ldr r3, [r3, #28]
|
|
800a010: 4a07 ldr r2, [pc, #28] ; (800a030 <HAL_I2C_MspInit+0x74>)
|
|
800a012: f443 1300 orr.w r3, r3, #2097152 ; 0x200000
|
|
800a016: 61d3 str r3, [r2, #28]
|
|
800a018: 4b05 ldr r3, [pc, #20] ; (800a030 <HAL_I2C_MspInit+0x74>)
|
|
800a01a: 69db ldr r3, [r3, #28]
|
|
800a01c: f403 1300 and.w r3, r3, #2097152 ; 0x200000
|
|
800a020: 60bb str r3, [r7, #8]
|
|
800a022: 68bb ldr r3, [r7, #8]
|
|
/* USER CODE BEGIN I2C1_MspInit 1 */
|
|
|
|
/* USER CODE END I2C1_MspInit 1 */
|
|
}
|
|
|
|
}
|
|
800a024: bf00 nop
|
|
800a026: 3720 adds r7, #32
|
|
800a028: 46bd mov sp, r7
|
|
800a02a: bd80 pop {r7, pc}
|
|
800a02c: 40005400 .word 0x40005400
|
|
800a030: 40021000 .word 0x40021000
|
|
800a034: 40010c00 .word 0x40010c00
|
|
|
|
0800a038 <HAL_RTC_MspInit>:
|
|
* This function configures the hardware resources used in this example
|
|
* @param hrtc: RTC handle pointer
|
|
* @retval None
|
|
*/
|
|
void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
|
|
{
|
|
800a038: b580 push {r7, lr}
|
|
800a03a: b084 sub sp, #16
|
|
800a03c: af00 add r7, sp, #0
|
|
800a03e: 6078 str r0, [r7, #4]
|
|
if(hrtc->Instance==RTC)
|
|
800a040: 687b ldr r3, [r7, #4]
|
|
800a042: 681b ldr r3, [r3, #0]
|
|
800a044: 4a0b ldr r2, [pc, #44] ; (800a074 <HAL_RTC_MspInit+0x3c>)
|
|
800a046: 4293 cmp r3, r2
|
|
800a048: d110 bne.n 800a06c <HAL_RTC_MspInit+0x34>
|
|
{
|
|
/* USER CODE BEGIN RTC_MspInit 0 */
|
|
|
|
/* USER CODE END RTC_MspInit 0 */
|
|
HAL_PWR_EnableBkUpAccess();
|
|
800a04a: f7f8 faf9 bl 8002640 <HAL_PWR_EnableBkUpAccess>
|
|
/* Enable BKP CLK enable for backup registers */
|
|
__HAL_RCC_BKP_CLK_ENABLE();
|
|
800a04e: 4b0a ldr r3, [pc, #40] ; (800a078 <HAL_RTC_MspInit+0x40>)
|
|
800a050: 69db ldr r3, [r3, #28]
|
|
800a052: 4a09 ldr r2, [pc, #36] ; (800a078 <HAL_RTC_MspInit+0x40>)
|
|
800a054: f043 6300 orr.w r3, r3, #134217728 ; 0x8000000
|
|
800a058: 61d3 str r3, [r2, #28]
|
|
800a05a: 4b07 ldr r3, [pc, #28] ; (800a078 <HAL_RTC_MspInit+0x40>)
|
|
800a05c: 69db ldr r3, [r3, #28]
|
|
800a05e: f003 6300 and.w r3, r3, #134217728 ; 0x8000000
|
|
800a062: 60fb str r3, [r7, #12]
|
|
800a064: 68fb ldr r3, [r7, #12]
|
|
/* Peripheral clock enable */
|
|
__HAL_RCC_RTC_ENABLE();
|
|
800a066: 4b05 ldr r3, [pc, #20] ; (800a07c <HAL_RTC_MspInit+0x44>)
|
|
800a068: 2201 movs r2, #1
|
|
800a06a: 601a str r2, [r3, #0]
|
|
/* USER CODE BEGIN RTC_MspInit 1 */
|
|
|
|
/* USER CODE END RTC_MspInit 1 */
|
|
}
|
|
|
|
}
|
|
800a06c: bf00 nop
|
|
800a06e: 3710 adds r7, #16
|
|
800a070: 46bd mov sp, r7
|
|
800a072: bd80 pop {r7, pc}
|
|
800a074: 40002800 .word 0x40002800
|
|
800a078: 40021000 .word 0x40021000
|
|
800a07c: 4242043c .word 0x4242043c
|
|
|
|
0800a080 <HAL_SPI_MspInit>:
|
|
* This function configures the hardware resources used in this example
|
|
* @param hspi: SPI handle pointer
|
|
* @retval None
|
|
*/
|
|
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
|
|
{
|
|
800a080: b580 push {r7, lr}
|
|
800a082: b088 sub sp, #32
|
|
800a084: af00 add r7, sp, #0
|
|
800a086: 6078 str r0, [r7, #4]
|
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
800a088: f107 0310 add.w r3, r7, #16
|
|
800a08c: 2200 movs r2, #0
|
|
800a08e: 601a str r2, [r3, #0]
|
|
800a090: 605a str r2, [r3, #4]
|
|
800a092: 609a str r2, [r3, #8]
|
|
800a094: 60da str r2, [r3, #12]
|
|
if(hspi->Instance==SPI2)
|
|
800a096: 687b ldr r3, [r7, #4]
|
|
800a098: 681b ldr r3, [r3, #0]
|
|
800a09a: 4a1c ldr r2, [pc, #112] ; (800a10c <HAL_SPI_MspInit+0x8c>)
|
|
800a09c: 4293 cmp r3, r2
|
|
800a09e: d131 bne.n 800a104 <HAL_SPI_MspInit+0x84>
|
|
{
|
|
/* USER CODE BEGIN SPI2_MspInit 0 */
|
|
|
|
/* USER CODE END SPI2_MspInit 0 */
|
|
/* Peripheral clock enable */
|
|
__HAL_RCC_SPI2_CLK_ENABLE();
|
|
800a0a0: 4b1b ldr r3, [pc, #108] ; (800a110 <HAL_SPI_MspInit+0x90>)
|
|
800a0a2: 69db ldr r3, [r3, #28]
|
|
800a0a4: 4a1a ldr r2, [pc, #104] ; (800a110 <HAL_SPI_MspInit+0x90>)
|
|
800a0a6: f443 4380 orr.w r3, r3, #16384 ; 0x4000
|
|
800a0aa: 61d3 str r3, [r2, #28]
|
|
800a0ac: 4b18 ldr r3, [pc, #96] ; (800a110 <HAL_SPI_MspInit+0x90>)
|
|
800a0ae: 69db ldr r3, [r3, #28]
|
|
800a0b0: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
800a0b4: 60fb str r3, [r7, #12]
|
|
800a0b6: 68fb ldr r3, [r7, #12]
|
|
|
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
|
800a0b8: 4b15 ldr r3, [pc, #84] ; (800a110 <HAL_SPI_MspInit+0x90>)
|
|
800a0ba: 699b ldr r3, [r3, #24]
|
|
800a0bc: 4a14 ldr r2, [pc, #80] ; (800a110 <HAL_SPI_MspInit+0x90>)
|
|
800a0be: f043 0308 orr.w r3, r3, #8
|
|
800a0c2: 6193 str r3, [r2, #24]
|
|
800a0c4: 4b12 ldr r3, [pc, #72] ; (800a110 <HAL_SPI_MspInit+0x90>)
|
|
800a0c6: 699b ldr r3, [r3, #24]
|
|
800a0c8: f003 0308 and.w r3, r3, #8
|
|
800a0cc: 60bb str r3, [r7, #8]
|
|
800a0ce: 68bb ldr r3, [r7, #8]
|
|
/**SPI2 GPIO Configuration
|
|
PB13 ------> SPI2_SCK
|
|
PB14 ------> SPI2_MISO
|
|
PB15 ------> SPI2_MOSI
|
|
*/
|
|
GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_15;
|
|
800a0d0: f44f 4320 mov.w r3, #40960 ; 0xa000
|
|
800a0d4: 613b str r3, [r7, #16]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
800a0d6: 2302 movs r3, #2
|
|
800a0d8: 617b str r3, [r7, #20]
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
|
800a0da: 2303 movs r3, #3
|
|
800a0dc: 61fb str r3, [r7, #28]
|
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
|
800a0de: f107 0310 add.w r3, r7, #16
|
|
800a0e2: 4619 mov r1, r3
|
|
800a0e4: 480b ldr r0, [pc, #44] ; (800a114 <HAL_SPI_MspInit+0x94>)
|
|
800a0e6: f7f7 f917 bl 8001318 <HAL_GPIO_Init>
|
|
|
|
GPIO_InitStruct.Pin = GPIO_PIN_14;
|
|
800a0ea: f44f 4380 mov.w r3, #16384 ; 0x4000
|
|
800a0ee: 613b str r3, [r7, #16]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
|
800a0f0: 2300 movs r3, #0
|
|
800a0f2: 617b str r3, [r7, #20]
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
800a0f4: 2300 movs r3, #0
|
|
800a0f6: 61bb str r3, [r7, #24]
|
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
|
800a0f8: f107 0310 add.w r3, r7, #16
|
|
800a0fc: 4619 mov r1, r3
|
|
800a0fe: 4805 ldr r0, [pc, #20] ; (800a114 <HAL_SPI_MspInit+0x94>)
|
|
800a100: f7f7 f90a bl 8001318 <HAL_GPIO_Init>
|
|
/* USER CODE BEGIN SPI2_MspInit 1 */
|
|
|
|
/* USER CODE END SPI2_MspInit 1 */
|
|
}
|
|
|
|
}
|
|
800a104: bf00 nop
|
|
800a106: 3720 adds r7, #32
|
|
800a108: 46bd mov sp, r7
|
|
800a10a: bd80 pop {r7, pc}
|
|
800a10c: 40003800 .word 0x40003800
|
|
800a110: 40021000 .word 0x40021000
|
|
800a114: 40010c00 .word 0x40010c00
|
|
|
|
0800a118 <HAL_TIM_Encoder_MspInit>:
|
|
* This function configures the hardware resources used in this example
|
|
* @param htim_encoder: TIM_Encoder handle pointer
|
|
* @retval None
|
|
*/
|
|
void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef* htim_encoder)
|
|
{
|
|
800a118: b580 push {r7, lr}
|
|
800a11a: b088 sub sp, #32
|
|
800a11c: af00 add r7, sp, #0
|
|
800a11e: 6078 str r0, [r7, #4]
|
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
800a120: f107 0310 add.w r3, r7, #16
|
|
800a124: 2200 movs r2, #0
|
|
800a126: 601a str r2, [r3, #0]
|
|
800a128: 605a str r2, [r3, #4]
|
|
800a12a: 609a str r2, [r3, #8]
|
|
800a12c: 60da str r2, [r3, #12]
|
|
if(htim_encoder->Instance==TIM2)
|
|
800a12e: 687b ldr r3, [r7, #4]
|
|
800a130: 681b ldr r3, [r3, #0]
|
|
800a132: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000
|
|
800a136: d123 bne.n 800a180 <HAL_TIM_Encoder_MspInit+0x68>
|
|
{
|
|
/* USER CODE BEGIN TIM2_MspInit 0 */
|
|
|
|
/* USER CODE END TIM2_MspInit 0 */
|
|
/* Peripheral clock enable */
|
|
__HAL_RCC_TIM2_CLK_ENABLE();
|
|
800a138: 4b13 ldr r3, [pc, #76] ; (800a188 <HAL_TIM_Encoder_MspInit+0x70>)
|
|
800a13a: 69db ldr r3, [r3, #28]
|
|
800a13c: 4a12 ldr r2, [pc, #72] ; (800a188 <HAL_TIM_Encoder_MspInit+0x70>)
|
|
800a13e: f043 0301 orr.w r3, r3, #1
|
|
800a142: 61d3 str r3, [r2, #28]
|
|
800a144: 4b10 ldr r3, [pc, #64] ; (800a188 <HAL_TIM_Encoder_MspInit+0x70>)
|
|
800a146: 69db ldr r3, [r3, #28]
|
|
800a148: f003 0301 and.w r3, r3, #1
|
|
800a14c: 60fb str r3, [r7, #12]
|
|
800a14e: 68fb ldr r3, [r7, #12]
|
|
|
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
|
800a150: 4b0d ldr r3, [pc, #52] ; (800a188 <HAL_TIM_Encoder_MspInit+0x70>)
|
|
800a152: 699b ldr r3, [r3, #24]
|
|
800a154: 4a0c ldr r2, [pc, #48] ; (800a188 <HAL_TIM_Encoder_MspInit+0x70>)
|
|
800a156: f043 0304 orr.w r3, r3, #4
|
|
800a15a: 6193 str r3, [r2, #24]
|
|
800a15c: 4b0a ldr r3, [pc, #40] ; (800a188 <HAL_TIM_Encoder_MspInit+0x70>)
|
|
800a15e: 699b ldr r3, [r3, #24]
|
|
800a160: f003 0304 and.w r3, r3, #4
|
|
800a164: 60bb str r3, [r7, #8]
|
|
800a166: 68bb ldr r3, [r7, #8]
|
|
/**TIM2 GPIO Configuration
|
|
PA0-WKUP ------> TIM2_CH1
|
|
PA1 ------> TIM2_CH2
|
|
*/
|
|
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
|
|
800a168: 2303 movs r3, #3
|
|
800a16a: 613b str r3, [r7, #16]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
|
800a16c: 2300 movs r3, #0
|
|
800a16e: 617b str r3, [r7, #20]
|
|
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
|
800a170: 2301 movs r3, #1
|
|
800a172: 61bb str r3, [r7, #24]
|
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
|
800a174: f107 0310 add.w r3, r7, #16
|
|
800a178: 4619 mov r1, r3
|
|
800a17a: 4804 ldr r0, [pc, #16] ; (800a18c <HAL_TIM_Encoder_MspInit+0x74>)
|
|
800a17c: f7f7 f8cc bl 8001318 <HAL_GPIO_Init>
|
|
/* USER CODE BEGIN TIM2_MspInit 1 */
|
|
|
|
/* USER CODE END TIM2_MspInit 1 */
|
|
}
|
|
|
|
}
|
|
800a180: bf00 nop
|
|
800a182: 3720 adds r7, #32
|
|
800a184: 46bd mov sp, r7
|
|
800a186: bd80 pop {r7, pc}
|
|
800a188: 40021000 .word 0x40021000
|
|
800a18c: 40010800 .word 0x40010800
|
|
|
|
0800a190 <HAL_UART_MspInit>:
|
|
* This function configures the hardware resources used in this example
|
|
* @param huart: UART handle pointer
|
|
* @retval None
|
|
*/
|
|
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
|
|
{
|
|
800a190: b580 push {r7, lr}
|
|
800a192: b088 sub sp, #32
|
|
800a194: af00 add r7, sp, #0
|
|
800a196: 6078 str r0, [r7, #4]
|
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
800a198: f107 0310 add.w r3, r7, #16
|
|
800a19c: 2200 movs r2, #0
|
|
800a19e: 601a str r2, [r3, #0]
|
|
800a1a0: 605a str r2, [r3, #4]
|
|
800a1a2: 609a str r2, [r3, #8]
|
|
800a1a4: 60da str r2, [r3, #12]
|
|
if(huart->Instance==USART2)
|
|
800a1a6: 687b ldr r3, [r7, #4]
|
|
800a1a8: 681b ldr r3, [r3, #0]
|
|
800a1aa: 4a1b ldr r2, [pc, #108] ; (800a218 <HAL_UART_MspInit+0x88>)
|
|
800a1ac: 4293 cmp r3, r2
|
|
800a1ae: d12f bne.n 800a210 <HAL_UART_MspInit+0x80>
|
|
{
|
|
/* USER CODE BEGIN USART2_MspInit 0 */
|
|
|
|
/* USER CODE END USART2_MspInit 0 */
|
|
/* Peripheral clock enable */
|
|
__HAL_RCC_USART2_CLK_ENABLE();
|
|
800a1b0: 4b1a ldr r3, [pc, #104] ; (800a21c <HAL_UART_MspInit+0x8c>)
|
|
800a1b2: 69db ldr r3, [r3, #28]
|
|
800a1b4: 4a19 ldr r2, [pc, #100] ; (800a21c <HAL_UART_MspInit+0x8c>)
|
|
800a1b6: f443 3300 orr.w r3, r3, #131072 ; 0x20000
|
|
800a1ba: 61d3 str r3, [r2, #28]
|
|
800a1bc: 4b17 ldr r3, [pc, #92] ; (800a21c <HAL_UART_MspInit+0x8c>)
|
|
800a1be: 69db ldr r3, [r3, #28]
|
|
800a1c0: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
|
800a1c4: 60fb str r3, [r7, #12]
|
|
800a1c6: 68fb ldr r3, [r7, #12]
|
|
|
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
|
800a1c8: 4b14 ldr r3, [pc, #80] ; (800a21c <HAL_UART_MspInit+0x8c>)
|
|
800a1ca: 699b ldr r3, [r3, #24]
|
|
800a1cc: 4a13 ldr r2, [pc, #76] ; (800a21c <HAL_UART_MspInit+0x8c>)
|
|
800a1ce: f043 0304 orr.w r3, r3, #4
|
|
800a1d2: 6193 str r3, [r2, #24]
|
|
800a1d4: 4b11 ldr r3, [pc, #68] ; (800a21c <HAL_UART_MspInit+0x8c>)
|
|
800a1d6: 699b ldr r3, [r3, #24]
|
|
800a1d8: f003 0304 and.w r3, r3, #4
|
|
800a1dc: 60bb str r3, [r7, #8]
|
|
800a1de: 68bb ldr r3, [r7, #8]
|
|
/**USART2 GPIO Configuration
|
|
PA2 ------> USART2_TX
|
|
PA3 ------> USART2_RX
|
|
*/
|
|
GPIO_InitStruct.Pin = GPIO_PIN_2;
|
|
800a1e0: 2304 movs r3, #4
|
|
800a1e2: 613b str r3, [r7, #16]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
800a1e4: 2302 movs r3, #2
|
|
800a1e6: 617b str r3, [r7, #20]
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
|
800a1e8: 2303 movs r3, #3
|
|
800a1ea: 61fb str r3, [r7, #28]
|
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
|
800a1ec: f107 0310 add.w r3, r7, #16
|
|
800a1f0: 4619 mov r1, r3
|
|
800a1f2: 480b ldr r0, [pc, #44] ; (800a220 <HAL_UART_MspInit+0x90>)
|
|
800a1f4: f7f7 f890 bl 8001318 <HAL_GPIO_Init>
|
|
|
|
GPIO_InitStruct.Pin = GPIO_PIN_3;
|
|
800a1f8: 2308 movs r3, #8
|
|
800a1fa: 613b str r3, [r7, #16]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
|
800a1fc: 2300 movs r3, #0
|
|
800a1fe: 617b str r3, [r7, #20]
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
800a200: 2300 movs r3, #0
|
|
800a202: 61bb str r3, [r7, #24]
|
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
|
800a204: f107 0310 add.w r3, r7, #16
|
|
800a208: 4619 mov r1, r3
|
|
800a20a: 4805 ldr r0, [pc, #20] ; (800a220 <HAL_UART_MspInit+0x90>)
|
|
800a20c: f7f7 f884 bl 8001318 <HAL_GPIO_Init>
|
|
/* USER CODE BEGIN USART2_MspInit 1 */
|
|
|
|
/* USER CODE END USART2_MspInit 1 */
|
|
}
|
|
|
|
}
|
|
800a210: bf00 nop
|
|
800a212: 3720 adds r7, #32
|
|
800a214: 46bd mov sp, r7
|
|
800a216: bd80 pop {r7, pc}
|
|
800a218: 40004400 .word 0x40004400
|
|
800a21c: 40021000 .word 0x40021000
|
|
800a220: 40010800 .word 0x40010800
|
|
|
|
0800a224 <NMI_Handler>:
|
|
/******************************************************************************/
|
|
/**
|
|
* @brief This function handles Non maskable interrupt.
|
|
*/
|
|
void NMI_Handler(void)
|
|
{
|
|
800a224: b480 push {r7}
|
|
800a226: af00 add r7, sp, #0
|
|
|
|
/* USER CODE END NonMaskableInt_IRQn 0 */
|
|
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
|
|
|
/* USER CODE END NonMaskableInt_IRQn 1 */
|
|
}
|
|
800a228: bf00 nop
|
|
800a22a: 46bd mov sp, r7
|
|
800a22c: bc80 pop {r7}
|
|
800a22e: 4770 bx lr
|
|
|
|
0800a230 <HardFault_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles Hard fault interrupt.
|
|
*/
|
|
void HardFault_Handler(void)
|
|
{
|
|
800a230: b480 push {r7}
|
|
800a232: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN HardFault_IRQn 0 */
|
|
|
|
/* USER CODE END HardFault_IRQn 0 */
|
|
while (1)
|
|
800a234: e7fe b.n 800a234 <HardFault_Handler+0x4>
|
|
|
|
0800a236 <MemManage_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles Memory management fault.
|
|
*/
|
|
void MemManage_Handler(void)
|
|
{
|
|
800a236: b480 push {r7}
|
|
800a238: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
|
|
|
/* USER CODE END MemoryManagement_IRQn 0 */
|
|
while (1)
|
|
800a23a: e7fe b.n 800a23a <MemManage_Handler+0x4>
|
|
|
|
0800a23c <BusFault_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles Prefetch fault, memory access fault.
|
|
*/
|
|
void BusFault_Handler(void)
|
|
{
|
|
800a23c: b480 push {r7}
|
|
800a23e: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN BusFault_IRQn 0 */
|
|
|
|
/* USER CODE END BusFault_IRQn 0 */
|
|
while (1)
|
|
800a240: e7fe b.n 800a240 <BusFault_Handler+0x4>
|
|
|
|
0800a242 <UsageFault_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles Undefined instruction or illegal state.
|
|
*/
|
|
void UsageFault_Handler(void)
|
|
{
|
|
800a242: b480 push {r7}
|
|
800a244: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
|
|
|
/* USER CODE END UsageFault_IRQn 0 */
|
|
while (1)
|
|
800a246: e7fe b.n 800a246 <UsageFault_Handler+0x4>
|
|
|
|
0800a248 <DebugMon_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles Debug monitor.
|
|
*/
|
|
void DebugMon_Handler(void)
|
|
{
|
|
800a248: b480 push {r7}
|
|
800a24a: af00 add r7, sp, #0
|
|
|
|
/* USER CODE END DebugMonitor_IRQn 0 */
|
|
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
|
|
|
/* USER CODE END DebugMonitor_IRQn 1 */
|
|
}
|
|
800a24c: bf00 nop
|
|
800a24e: 46bd mov sp, r7
|
|
800a250: bc80 pop {r7}
|
|
800a252: 4770 bx lr
|
|
|
|
0800a254 <SysTick_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles System tick timer.
|
|
*/
|
|
void SysTick_Handler(void)
|
|
{
|
|
800a254: b580 push {r7, lr}
|
|
800a256: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN SysTick_IRQn 0 */
|
|
|
|
/* USER CODE END SysTick_IRQn 0 */
|
|
HAL_IncTick();
|
|
800a258: f7f6 ff12 bl 8001080 <HAL_IncTick>
|
|
#if (INCLUDE_xTaskGetSchedulerState == 1 )
|
|
if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED)
|
|
800a25c: f7fe fa10 bl 8008680 <xTaskGetSchedulerState>
|
|
800a260: 4603 mov r3, r0
|
|
800a262: 2b01 cmp r3, #1
|
|
800a264: d001 beq.n 800a26a <SysTick_Handler+0x16>
|
|
{
|
|
#endif /* INCLUDE_xTaskGetSchedulerState */
|
|
xPortSysTickHandler();
|
|
800a266: f7fe fbef bl 8008a48 <xPortSysTickHandler>
|
|
}
|
|
#endif /* INCLUDE_xTaskGetSchedulerState */
|
|
/* USER CODE BEGIN SysTick_IRQn 1 */
|
|
|
|
/* USER CODE END SysTick_IRQn 1 */
|
|
}
|
|
800a26a: bf00 nop
|
|
800a26c: bd80 pop {r7, pc}
|
|
...
|
|
|
|
0800a270 <USB_LP_CAN1_RX0_IRQHandler>:
|
|
|
|
/**
|
|
* @brief This function handles USB low priority or CAN RX0 interrupts.
|
|
*/
|
|
void USB_LP_CAN1_RX0_IRQHandler(void)
|
|
{
|
|
800a270: b580 push {r7, lr}
|
|
800a272: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 0 */
|
|
|
|
/* USER CODE END USB_LP_CAN1_RX0_IRQn 0 */
|
|
HAL_PCD_IRQHandler(&hpcd_USB_FS);
|
|
800a274: 4802 ldr r0, [pc, #8] ; (800a280 <USB_LP_CAN1_RX0_IRQHandler+0x10>)
|
|
800a276: f7f7 fc08 bl 8001a8a <HAL_PCD_IRQHandler>
|
|
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 1 */
|
|
|
|
/* USER CODE END USB_LP_CAN1_RX0_IRQn 1 */
|
|
}
|
|
800a27a: bf00 nop
|
|
800a27c: bd80 pop {r7, pc}
|
|
800a27e: bf00 nop
|
|
800a280: 20001dd4 .word 0x20001dd4
|
|
|
|
0800a284 <_sbrk>:
|
|
/**
|
|
_sbrk
|
|
Increase program data space. Malloc and related functions depend on this
|
|
**/
|
|
caddr_t _sbrk(int incr)
|
|
{
|
|
800a284: b580 push {r7, lr}
|
|
800a286: b084 sub sp, #16
|
|
800a288: af00 add r7, sp, #0
|
|
800a28a: 6078 str r0, [r7, #4]
|
|
extern char end asm("end");
|
|
static char *heap_end;
|
|
char *prev_heap_end;
|
|
|
|
if (heap_end == 0)
|
|
800a28c: 4b11 ldr r3, [pc, #68] ; (800a2d4 <_sbrk+0x50>)
|
|
800a28e: 681b ldr r3, [r3, #0]
|
|
800a290: 2b00 cmp r3, #0
|
|
800a292: d102 bne.n 800a29a <_sbrk+0x16>
|
|
heap_end = &end;
|
|
800a294: 4b0f ldr r3, [pc, #60] ; (800a2d4 <_sbrk+0x50>)
|
|
800a296: 4a10 ldr r2, [pc, #64] ; (800a2d8 <_sbrk+0x54>)
|
|
800a298: 601a str r2, [r3, #0]
|
|
|
|
prev_heap_end = heap_end;
|
|
800a29a: 4b0e ldr r3, [pc, #56] ; (800a2d4 <_sbrk+0x50>)
|
|
800a29c: 681b ldr r3, [r3, #0]
|
|
800a29e: 60fb str r3, [r7, #12]
|
|
if (heap_end + incr > stack_ptr)
|
|
800a2a0: 4b0c ldr r3, [pc, #48] ; (800a2d4 <_sbrk+0x50>)
|
|
800a2a2: 681a ldr r2, [r3, #0]
|
|
800a2a4: 687b ldr r3, [r7, #4]
|
|
800a2a6: 4413 add r3, r2
|
|
800a2a8: 466a mov r2, sp
|
|
800a2aa: 4293 cmp r3, r2
|
|
800a2ac: d907 bls.n 800a2be <_sbrk+0x3a>
|
|
{
|
|
errno = ENOMEM;
|
|
800a2ae: f000 fcd9 bl 800ac64 <__errno>
|
|
800a2b2: 4602 mov r2, r0
|
|
800a2b4: 230c movs r3, #12
|
|
800a2b6: 6013 str r3, [r2, #0]
|
|
return (caddr_t) -1;
|
|
800a2b8: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
|
|
800a2bc: e006 b.n 800a2cc <_sbrk+0x48>
|
|
}
|
|
|
|
heap_end += incr;
|
|
800a2be: 4b05 ldr r3, [pc, #20] ; (800a2d4 <_sbrk+0x50>)
|
|
800a2c0: 681a ldr r2, [r3, #0]
|
|
800a2c2: 687b ldr r3, [r7, #4]
|
|
800a2c4: 4413 add r3, r2
|
|
800a2c6: 4a03 ldr r2, [pc, #12] ; (800a2d4 <_sbrk+0x50>)
|
|
800a2c8: 6013 str r3, [r2, #0]
|
|
|
|
return (caddr_t) prev_heap_end;
|
|
800a2ca: 68fb ldr r3, [r7, #12]
|
|
}
|
|
800a2cc: 4618 mov r0, r3
|
|
800a2ce: 3710 adds r7, #16
|
|
800a2d0: 46bd mov sp, r7
|
|
800a2d2: bd80 pop {r7, pc}
|
|
800a2d4: 20000fc8 .word 0x20000fc8
|
|
800a2d8: 20002248 .word 0x20002248
|
|
|
|
0800a2dc <SystemInit>:
|
|
* @note This function should be used only after reset.
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
void SystemInit (void)
|
|
{
|
|
800a2dc: b480 push {r7}
|
|
800a2de: af00 add r7, sp, #0
|
|
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
|
|
/* Set HSION bit */
|
|
RCC->CR |= 0x00000001U;
|
|
800a2e0: 4b15 ldr r3, [pc, #84] ; (800a338 <SystemInit+0x5c>)
|
|
800a2e2: 681b ldr r3, [r3, #0]
|
|
800a2e4: 4a14 ldr r2, [pc, #80] ; (800a338 <SystemInit+0x5c>)
|
|
800a2e6: f043 0301 orr.w r3, r3, #1
|
|
800a2ea: 6013 str r3, [r2, #0]
|
|
|
|
/* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
|
|
#if !defined(STM32F105xC) && !defined(STM32F107xC)
|
|
RCC->CFGR &= 0xF8FF0000U;
|
|
800a2ec: 4b12 ldr r3, [pc, #72] ; (800a338 <SystemInit+0x5c>)
|
|
800a2ee: 685a ldr r2, [r3, #4]
|
|
800a2f0: 4911 ldr r1, [pc, #68] ; (800a338 <SystemInit+0x5c>)
|
|
800a2f2: 4b12 ldr r3, [pc, #72] ; (800a33c <SystemInit+0x60>)
|
|
800a2f4: 4013 ands r3, r2
|
|
800a2f6: 604b str r3, [r1, #4]
|
|
#else
|
|
RCC->CFGR &= 0xF0FF0000U;
|
|
#endif /* STM32F105xC */
|
|
|
|
/* Reset HSEON, CSSON and PLLON bits */
|
|
RCC->CR &= 0xFEF6FFFFU;
|
|
800a2f8: 4b0f ldr r3, [pc, #60] ; (800a338 <SystemInit+0x5c>)
|
|
800a2fa: 681b ldr r3, [r3, #0]
|
|
800a2fc: 4a0e ldr r2, [pc, #56] ; (800a338 <SystemInit+0x5c>)
|
|
800a2fe: f023 7384 bic.w r3, r3, #17301504 ; 0x1080000
|
|
800a302: f423 3380 bic.w r3, r3, #65536 ; 0x10000
|
|
800a306: 6013 str r3, [r2, #0]
|
|
|
|
/* Reset HSEBYP bit */
|
|
RCC->CR &= 0xFFFBFFFFU;
|
|
800a308: 4b0b ldr r3, [pc, #44] ; (800a338 <SystemInit+0x5c>)
|
|
800a30a: 681b ldr r3, [r3, #0]
|
|
800a30c: 4a0a ldr r2, [pc, #40] ; (800a338 <SystemInit+0x5c>)
|
|
800a30e: f423 2380 bic.w r3, r3, #262144 ; 0x40000
|
|
800a312: 6013 str r3, [r2, #0]
|
|
|
|
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
|
|
RCC->CFGR &= 0xFF80FFFFU;
|
|
800a314: 4b08 ldr r3, [pc, #32] ; (800a338 <SystemInit+0x5c>)
|
|
800a316: 685b ldr r3, [r3, #4]
|
|
800a318: 4a07 ldr r2, [pc, #28] ; (800a338 <SystemInit+0x5c>)
|
|
800a31a: f423 03fe bic.w r3, r3, #8323072 ; 0x7f0000
|
|
800a31e: 6053 str r3, [r2, #4]
|
|
|
|
/* Reset CFGR2 register */
|
|
RCC->CFGR2 = 0x00000000U;
|
|
#else
|
|
/* Disable all interrupts and clear pending bits */
|
|
RCC->CIR = 0x009F0000U;
|
|
800a320: 4b05 ldr r3, [pc, #20] ; (800a338 <SystemInit+0x5c>)
|
|
800a322: f44f 021f mov.w r2, #10420224 ; 0x9f0000
|
|
800a326: 609a str r2, [r3, #8]
|
|
#endif
|
|
|
|
#ifdef VECT_TAB_SRAM
|
|
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
|
|
#else
|
|
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
|
|
800a328: 4b05 ldr r3, [pc, #20] ; (800a340 <SystemInit+0x64>)
|
|
800a32a: f04f 6200 mov.w r2, #134217728 ; 0x8000000
|
|
800a32e: 609a str r2, [r3, #8]
|
|
#endif
|
|
}
|
|
800a330: bf00 nop
|
|
800a332: 46bd mov sp, r7
|
|
800a334: bc80 pop {r7}
|
|
800a336: 4770 bx lr
|
|
800a338: 40021000 .word 0x40021000
|
|
800a33c: f8ff0000 .word 0xf8ff0000
|
|
800a340: e000ed00 .word 0xe000ed00
|
|
|
|
0800a344 <MX_USB_DEVICE_Init>:
|
|
/**
|
|
* Init USB device Library, add supported class and start the library
|
|
* @retval None
|
|
*/
|
|
void MX_USB_DEVICE_Init(void)
|
|
{
|
|
800a344: b580 push {r7, lr}
|
|
800a346: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */
|
|
|
|
/* USER CODE END USB_DEVICE_Init_PreTreatment */
|
|
|
|
/* Init Device Library, add supported class and start the library. */
|
|
if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK)
|
|
800a348: 2200 movs r2, #0
|
|
800a34a: 4912 ldr r1, [pc, #72] ; (800a394 <MX_USB_DEVICE_Init+0x50>)
|
|
800a34c: 4812 ldr r0, [pc, #72] ; (800a398 <MX_USB_DEVICE_Init+0x54>)
|
|
800a34e: f7fc fbe7 bl 8006b20 <USBD_Init>
|
|
800a352: 4603 mov r3, r0
|
|
800a354: 2b00 cmp r3, #0
|
|
800a356: d001 beq.n 800a35c <MX_USB_DEVICE_Init+0x18>
|
|
{
|
|
Error_Handler();
|
|
800a358: f7ff fdf2 bl 8009f40 <Error_Handler>
|
|
}
|
|
if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC) != USBD_OK)
|
|
800a35c: 490f ldr r1, [pc, #60] ; (800a39c <MX_USB_DEVICE_Init+0x58>)
|
|
800a35e: 480e ldr r0, [pc, #56] ; (800a398 <MX_USB_DEVICE_Init+0x54>)
|
|
800a360: f7fc fc09 bl 8006b76 <USBD_RegisterClass>
|
|
800a364: 4603 mov r3, r0
|
|
800a366: 2b00 cmp r3, #0
|
|
800a368: d001 beq.n 800a36e <MX_USB_DEVICE_Init+0x2a>
|
|
{
|
|
Error_Handler();
|
|
800a36a: f7ff fde9 bl 8009f40 <Error_Handler>
|
|
}
|
|
if (USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS) != USBD_OK)
|
|
800a36e: 490c ldr r1, [pc, #48] ; (800a3a0 <MX_USB_DEVICE_Init+0x5c>)
|
|
800a370: 4809 ldr r0, [pc, #36] ; (800a398 <MX_USB_DEVICE_Init+0x54>)
|
|
800a372: f7fc fb69 bl 8006a48 <USBD_CDC_RegisterInterface>
|
|
800a376: 4603 mov r3, r0
|
|
800a378: 2b00 cmp r3, #0
|
|
800a37a: d001 beq.n 800a380 <MX_USB_DEVICE_Init+0x3c>
|
|
{
|
|
Error_Handler();
|
|
800a37c: f7ff fde0 bl 8009f40 <Error_Handler>
|
|
}
|
|
if (USBD_Start(&hUsbDeviceFS) != USBD_OK)
|
|
800a380: 4805 ldr r0, [pc, #20] ; (800a398 <MX_USB_DEVICE_Init+0x54>)
|
|
800a382: f7fc fc11 bl 8006ba8 <USBD_Start>
|
|
800a386: 4603 mov r3, r0
|
|
800a388: 2b00 cmp r3, #0
|
|
800a38a: d001 beq.n 800a390 <MX_USB_DEVICE_Init+0x4c>
|
|
{
|
|
Error_Handler();
|
|
800a38c: f7ff fdd8 bl 8009f40 <Error_Handler>
|
|
}
|
|
|
|
/* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */
|
|
|
|
/* USER CODE END USB_DEVICE_Init_PostTreatment */
|
|
}
|
|
800a390: bf00 nop
|
|
800a392: bd80 pop {r7, pc}
|
|
800a394: 20000154 .word 0x20000154
|
|
800a398: 20001340 .word 0x20001340
|
|
800a39c: 2000002c .word 0x2000002c
|
|
800a3a0: 20000144 .word 0x20000144
|
|
|
|
0800a3a4 <CDC_Init_FS>:
|
|
/**
|
|
* @brief Initializes the CDC media low layer over the FS USB IP
|
|
* @retval USBD_OK if all operations are OK else USBD_FAIL
|
|
*/
|
|
static int8_t CDC_Init_FS(void)
|
|
{
|
|
800a3a4: b580 push {r7, lr}
|
|
800a3a6: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN 3 */
|
|
/* Set Application Buffers */
|
|
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, UserTxBufferFS, 0);
|
|
800a3a8: 2200 movs r2, #0
|
|
800a3aa: 4905 ldr r1, [pc, #20] ; (800a3c0 <CDC_Init_FS+0x1c>)
|
|
800a3ac: 4805 ldr r0, [pc, #20] ; (800a3c4 <CDC_Init_FS+0x20>)
|
|
800a3ae: f7fc fb61 bl 8006a74 <USBD_CDC_SetTxBuffer>
|
|
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, UserRxBufferFS);
|
|
800a3b2: 4905 ldr r1, [pc, #20] ; (800a3c8 <CDC_Init_FS+0x24>)
|
|
800a3b4: 4803 ldr r0, [pc, #12] ; (800a3c4 <CDC_Init_FS+0x20>)
|
|
800a3b6: f7fc fb76 bl 8006aa6 <USBD_CDC_SetRxBuffer>
|
|
return (USBD_OK);
|
|
800a3ba: 2300 movs r3, #0
|
|
/* USER CODE END 3 */
|
|
}
|
|
800a3bc: 4618 mov r0, r3
|
|
800a3be: bd80 pop {r7, pc}
|
|
800a3c0: 200019ec .word 0x200019ec
|
|
800a3c4: 20001340 .word 0x20001340
|
|
800a3c8: 20001604 .word 0x20001604
|
|
|
|
0800a3cc <CDC_DeInit_FS>:
|
|
/**
|
|
* @brief DeInitializes the CDC media low layer
|
|
* @retval USBD_OK if all operations are OK else USBD_FAIL
|
|
*/
|
|
static int8_t CDC_DeInit_FS(void)
|
|
{
|
|
800a3cc: b480 push {r7}
|
|
800a3ce: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN 4 */
|
|
return (USBD_OK);
|
|
800a3d0: 2300 movs r3, #0
|
|
/* USER CODE END 4 */
|
|
}
|
|
800a3d2: 4618 mov r0, r3
|
|
800a3d4: 46bd mov sp, r7
|
|
800a3d6: bc80 pop {r7}
|
|
800a3d8: 4770 bx lr
|
|
...
|
|
|
|
0800a3dc <CDC_Control_FS>:
|
|
* @param pbuf: Buffer containing command data (request parameters)
|
|
* @param length: Number of data to be sent (in bytes)
|
|
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
|
|
*/
|
|
static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length)
|
|
{
|
|
800a3dc: b480 push {r7}
|
|
800a3de: b083 sub sp, #12
|
|
800a3e0: af00 add r7, sp, #0
|
|
800a3e2: 4603 mov r3, r0
|
|
800a3e4: 6039 str r1, [r7, #0]
|
|
800a3e6: 71fb strb r3, [r7, #7]
|
|
800a3e8: 4613 mov r3, r2
|
|
800a3ea: 80bb strh r3, [r7, #4]
|
|
/* USER CODE BEGIN 5 */
|
|
switch(cmd)
|
|
800a3ec: 79fb ldrb r3, [r7, #7]
|
|
800a3ee: 2b23 cmp r3, #35 ; 0x23
|
|
800a3f0: d84a bhi.n 800a488 <CDC_Control_FS+0xac>
|
|
800a3f2: a201 add r2, pc, #4 ; (adr r2, 800a3f8 <CDC_Control_FS+0x1c>)
|
|
800a3f4: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
800a3f8: 0800a489 .word 0x0800a489
|
|
800a3fc: 0800a489 .word 0x0800a489
|
|
800a400: 0800a489 .word 0x0800a489
|
|
800a404: 0800a489 .word 0x0800a489
|
|
800a408: 0800a489 .word 0x0800a489
|
|
800a40c: 0800a489 .word 0x0800a489
|
|
800a410: 0800a489 .word 0x0800a489
|
|
800a414: 0800a489 .word 0x0800a489
|
|
800a418: 0800a489 .word 0x0800a489
|
|
800a41c: 0800a489 .word 0x0800a489
|
|
800a420: 0800a489 .word 0x0800a489
|
|
800a424: 0800a489 .word 0x0800a489
|
|
800a428: 0800a489 .word 0x0800a489
|
|
800a42c: 0800a489 .word 0x0800a489
|
|
800a430: 0800a489 .word 0x0800a489
|
|
800a434: 0800a489 .word 0x0800a489
|
|
800a438: 0800a489 .word 0x0800a489
|
|
800a43c: 0800a489 .word 0x0800a489
|
|
800a440: 0800a489 .word 0x0800a489
|
|
800a444: 0800a489 .word 0x0800a489
|
|
800a448: 0800a489 .word 0x0800a489
|
|
800a44c: 0800a489 .word 0x0800a489
|
|
800a450: 0800a489 .word 0x0800a489
|
|
800a454: 0800a489 .word 0x0800a489
|
|
800a458: 0800a489 .word 0x0800a489
|
|
800a45c: 0800a489 .word 0x0800a489
|
|
800a460: 0800a489 .word 0x0800a489
|
|
800a464: 0800a489 .word 0x0800a489
|
|
800a468: 0800a489 .word 0x0800a489
|
|
800a46c: 0800a489 .word 0x0800a489
|
|
800a470: 0800a489 .word 0x0800a489
|
|
800a474: 0800a489 .word 0x0800a489
|
|
800a478: 0800a489 .word 0x0800a489
|
|
800a47c: 0800a489 .word 0x0800a489
|
|
800a480: 0800a489 .word 0x0800a489
|
|
800a484: 0800a489 .word 0x0800a489
|
|
case CDC_SEND_BREAK:
|
|
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
800a488: bf00 nop
|
|
}
|
|
|
|
return (USBD_OK);
|
|
800a48a: 2300 movs r3, #0
|
|
/* USER CODE END 5 */
|
|
}
|
|
800a48c: 4618 mov r0, r3
|
|
800a48e: 370c adds r7, #12
|
|
800a490: 46bd mov sp, r7
|
|
800a492: bc80 pop {r7}
|
|
800a494: 4770 bx lr
|
|
800a496: bf00 nop
|
|
|
|
0800a498 <CDC_Receive_FS>:
|
|
* @param Buf: Buffer of data to be received
|
|
* @param Len: Number of data received (in bytes)
|
|
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
|
|
*/
|
|
static int8_t CDC_Receive_FS(uint8_t* Buf, uint32_t *Len)
|
|
{
|
|
800a498: b580 push {r7, lr}
|
|
800a49a: b082 sub sp, #8
|
|
800a49c: af00 add r7, sp, #0
|
|
800a49e: 6078 str r0, [r7, #4]
|
|
800a4a0: 6039 str r1, [r7, #0]
|
|
/* USER CODE BEGIN 6 */
|
|
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, &Buf[0]);
|
|
800a4a2: 6879 ldr r1, [r7, #4]
|
|
800a4a4: 4805 ldr r0, [pc, #20] ; (800a4bc <CDC_Receive_FS+0x24>)
|
|
800a4a6: f7fc fafe bl 8006aa6 <USBD_CDC_SetRxBuffer>
|
|
USBD_CDC_ReceivePacket(&hUsbDeviceFS);
|
|
800a4aa: 4804 ldr r0, [pc, #16] ; (800a4bc <CDC_Receive_FS+0x24>)
|
|
800a4ac: f7fc fb0e bl 8006acc <USBD_CDC_ReceivePacket>
|
|
return (USBD_OK);
|
|
800a4b0: 2300 movs r3, #0
|
|
/* USER CODE END 6 */
|
|
}
|
|
800a4b2: 4618 mov r0, r3
|
|
800a4b4: 3708 adds r7, #8
|
|
800a4b6: 46bd mov sp, r7
|
|
800a4b8: bd80 pop {r7, pc}
|
|
800a4ba: bf00 nop
|
|
800a4bc: 20001340 .word 0x20001340
|
|
|
|
0800a4c0 <HAL_PCD_MspInit>:
|
|
LL Driver Callbacks (PCD -> USB Device Library)
|
|
*******************************************************************************/
|
|
/* MSP Init */
|
|
|
|
void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
|
|
{
|
|
800a4c0: b580 push {r7, lr}
|
|
800a4c2: b084 sub sp, #16
|
|
800a4c4: af00 add r7, sp, #0
|
|
800a4c6: 6078 str r0, [r7, #4]
|
|
if(pcdHandle->Instance==USB)
|
|
800a4c8: 687b ldr r3, [r7, #4]
|
|
800a4ca: 681b ldr r3, [r3, #0]
|
|
800a4cc: 4a0d ldr r2, [pc, #52] ; (800a504 <HAL_PCD_MspInit+0x44>)
|
|
800a4ce: 4293 cmp r3, r2
|
|
800a4d0: d113 bne.n 800a4fa <HAL_PCD_MspInit+0x3a>
|
|
{
|
|
/* USER CODE BEGIN USB_MspInit 0 */
|
|
|
|
/* USER CODE END USB_MspInit 0 */
|
|
/* Peripheral clock enable */
|
|
__HAL_RCC_USB_CLK_ENABLE();
|
|
800a4d2: 4b0d ldr r3, [pc, #52] ; (800a508 <HAL_PCD_MspInit+0x48>)
|
|
800a4d4: 69db ldr r3, [r3, #28]
|
|
800a4d6: 4a0c ldr r2, [pc, #48] ; (800a508 <HAL_PCD_MspInit+0x48>)
|
|
800a4d8: f443 0300 orr.w r3, r3, #8388608 ; 0x800000
|
|
800a4dc: 61d3 str r3, [r2, #28]
|
|
800a4de: 4b0a ldr r3, [pc, #40] ; (800a508 <HAL_PCD_MspInit+0x48>)
|
|
800a4e0: 69db ldr r3, [r3, #28]
|
|
800a4e2: f403 0300 and.w r3, r3, #8388608 ; 0x800000
|
|
800a4e6: 60fb str r3, [r7, #12]
|
|
800a4e8: 68fb ldr r3, [r7, #12]
|
|
|
|
/* Peripheral interrupt init */
|
|
HAL_NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 5, 0);
|
|
800a4ea: 2200 movs r2, #0
|
|
800a4ec: 2105 movs r1, #5
|
|
800a4ee: 2014 movs r0, #20
|
|
800a4f0: f7f6 fedb bl 80012aa <HAL_NVIC_SetPriority>
|
|
HAL_NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn);
|
|
800a4f4: 2014 movs r0, #20
|
|
800a4f6: f7f6 fef4 bl 80012e2 <HAL_NVIC_EnableIRQ>
|
|
/* USER CODE BEGIN USB_MspInit 1 */
|
|
|
|
/* USER CODE END USB_MspInit 1 */
|
|
}
|
|
}
|
|
800a4fa: bf00 nop
|
|
800a4fc: 3710 adds r7, #16
|
|
800a4fe: 46bd mov sp, r7
|
|
800a500: bd80 pop {r7, pc}
|
|
800a502: bf00 nop
|
|
800a504: 40005c00 .word 0x40005c00
|
|
800a508: 40021000 .word 0x40021000
|
|
|
|
0800a50c <HAL_PCD_SetupStageCallback>:
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
|
|
#else
|
|
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
{
|
|
800a50c: b580 push {r7, lr}
|
|
800a50e: b082 sub sp, #8
|
|
800a510: af00 add r7, sp, #0
|
|
800a512: 6078 str r0, [r7, #4]
|
|
USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
|
|
800a514: 687b ldr r3, [r7, #4]
|
|
800a516: f8d3 2268 ldr.w r2, [r3, #616] ; 0x268
|
|
800a51a: 687b ldr r3, [r7, #4]
|
|
800a51c: f503 730c add.w r3, r3, #560 ; 0x230
|
|
800a520: 4619 mov r1, r3
|
|
800a522: 4610 mov r0, r2
|
|
800a524: f7fc fb88 bl 8006c38 <USBD_LL_SetupStage>
|
|
}
|
|
800a528: bf00 nop
|
|
800a52a: 3708 adds r7, #8
|
|
800a52c: 46bd mov sp, r7
|
|
800a52e: bd80 pop {r7, pc}
|
|
|
|
0800a530 <HAL_PCD_DataOutStageCallback>:
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
|
|
#else
|
|
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
{
|
|
800a530: b580 push {r7, lr}
|
|
800a532: b082 sub sp, #8
|
|
800a534: af00 add r7, sp, #0
|
|
800a536: 6078 str r0, [r7, #4]
|
|
800a538: 460b mov r3, r1
|
|
800a53a: 70fb strb r3, [r7, #3]
|
|
USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
|
|
800a53c: 687b ldr r3, [r7, #4]
|
|
800a53e: f8d3 0268 ldr.w r0, [r3, #616] ; 0x268
|
|
800a542: 78fb ldrb r3, [r7, #3]
|
|
800a544: 687a ldr r2, [r7, #4]
|
|
800a546: 015b lsls r3, r3, #5
|
|
800a548: 4413 add r3, r2
|
|
800a54a: f503 739e add.w r3, r3, #316 ; 0x13c
|
|
800a54e: 681a ldr r2, [r3, #0]
|
|
800a550: 78fb ldrb r3, [r7, #3]
|
|
800a552: 4619 mov r1, r3
|
|
800a554: f7fc fbbb bl 8006cce <USBD_LL_DataOutStage>
|
|
}
|
|
800a558: bf00 nop
|
|
800a55a: 3708 adds r7, #8
|
|
800a55c: 46bd mov sp, r7
|
|
800a55e: bd80 pop {r7, pc}
|
|
|
|
0800a560 <HAL_PCD_DataInStageCallback>:
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
|
|
#else
|
|
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
{
|
|
800a560: b580 push {r7, lr}
|
|
800a562: b082 sub sp, #8
|
|
800a564: af00 add r7, sp, #0
|
|
800a566: 6078 str r0, [r7, #4]
|
|
800a568: 460b mov r3, r1
|
|
800a56a: 70fb strb r3, [r7, #3]
|
|
USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
|
|
800a56c: 687b ldr r3, [r7, #4]
|
|
800a56e: f8d3 0268 ldr.w r0, [r3, #616] ; 0x268
|
|
800a572: 78fb ldrb r3, [r7, #3]
|
|
800a574: 687a ldr r2, [r7, #4]
|
|
800a576: 015b lsls r3, r3, #5
|
|
800a578: 4413 add r3, r2
|
|
800a57a: 333c adds r3, #60 ; 0x3c
|
|
800a57c: 681a ldr r2, [r3, #0]
|
|
800a57e: 78fb ldrb r3, [r7, #3]
|
|
800a580: 4619 mov r1, r3
|
|
800a582: f7fc fc15 bl 8006db0 <USBD_LL_DataInStage>
|
|
}
|
|
800a586: bf00 nop
|
|
800a588: 3708 adds r7, #8
|
|
800a58a: 46bd mov sp, r7
|
|
800a58c: bd80 pop {r7, pc}
|
|
|
|
0800a58e <HAL_PCD_SOFCallback>:
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
|
|
#else
|
|
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
{
|
|
800a58e: b580 push {r7, lr}
|
|
800a590: b082 sub sp, #8
|
|
800a592: af00 add r7, sp, #0
|
|
800a594: 6078 str r0, [r7, #4]
|
|
USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
|
|
800a596: 687b ldr r3, [r7, #4]
|
|
800a598: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268
|
|
800a59c: 4618 mov r0, r3
|
|
800a59e: f7fc fd25 bl 8006fec <USBD_LL_SOF>
|
|
}
|
|
800a5a2: bf00 nop
|
|
800a5a4: 3708 adds r7, #8
|
|
800a5a6: 46bd mov sp, r7
|
|
800a5a8: bd80 pop {r7, pc}
|
|
|
|
0800a5aa <HAL_PCD_ResetCallback>:
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
|
|
#else
|
|
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
{
|
|
800a5aa: b580 push {r7, lr}
|
|
800a5ac: b084 sub sp, #16
|
|
800a5ae: af00 add r7, sp, #0
|
|
800a5b0: 6078 str r0, [r7, #4]
|
|
USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
|
|
800a5b2: 2301 movs r3, #1
|
|
800a5b4: 73fb strb r3, [r7, #15]
|
|
|
|
if ( hpcd->Init.speed != PCD_SPEED_FULL)
|
|
800a5b6: 687b ldr r3, [r7, #4]
|
|
800a5b8: 689b ldr r3, [r3, #8]
|
|
800a5ba: 2b02 cmp r3, #2
|
|
800a5bc: d001 beq.n 800a5c2 <HAL_PCD_ResetCallback+0x18>
|
|
{
|
|
Error_Handler();
|
|
800a5be: f7ff fcbf bl 8009f40 <Error_Handler>
|
|
}
|
|
/* Set Speed. */
|
|
USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
|
|
800a5c2: 687b ldr r3, [r7, #4]
|
|
800a5c4: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268
|
|
800a5c8: 7bfa ldrb r2, [r7, #15]
|
|
800a5ca: 4611 mov r1, r2
|
|
800a5cc: 4618 mov r0, r3
|
|
800a5ce: f7fc fcd5 bl 8006f7c <USBD_LL_SetSpeed>
|
|
|
|
/* Reset Device. */
|
|
USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
|
|
800a5d2: 687b ldr r3, [r7, #4]
|
|
800a5d4: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268
|
|
800a5d8: 4618 mov r0, r3
|
|
800a5da: f7fc fc8e bl 8006efa <USBD_LL_Reset>
|
|
}
|
|
800a5de: bf00 nop
|
|
800a5e0: 3710 adds r7, #16
|
|
800a5e2: 46bd mov sp, r7
|
|
800a5e4: bd80 pop {r7, pc}
|
|
...
|
|
|
|
0800a5e8 <HAL_PCD_SuspendCallback>:
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
|
|
#else
|
|
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
{
|
|
800a5e8: b580 push {r7, lr}
|
|
800a5ea: b082 sub sp, #8
|
|
800a5ec: af00 add r7, sp, #0
|
|
800a5ee: 6078 str r0, [r7, #4]
|
|
/* Inform USB library that core enters in suspend Mode. */
|
|
USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
|
|
800a5f0: 687b ldr r3, [r7, #4]
|
|
800a5f2: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268
|
|
800a5f6: 4618 mov r0, r3
|
|
800a5f8: f7fc fccf bl 8006f9a <USBD_LL_Suspend>
|
|
/* Enter in STOP mode. */
|
|
/* USER CODE BEGIN 2 */
|
|
if (hpcd->Init.low_power_enable)
|
|
800a5fc: 687b ldr r3, [r7, #4]
|
|
800a5fe: 699b ldr r3, [r3, #24]
|
|
800a600: 2b00 cmp r3, #0
|
|
800a602: d005 beq.n 800a610 <HAL_PCD_SuspendCallback+0x28>
|
|
{
|
|
/* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */
|
|
SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
|
|
800a604: 4b04 ldr r3, [pc, #16] ; (800a618 <HAL_PCD_SuspendCallback+0x30>)
|
|
800a606: 691b ldr r3, [r3, #16]
|
|
800a608: 4a03 ldr r2, [pc, #12] ; (800a618 <HAL_PCD_SuspendCallback+0x30>)
|
|
800a60a: f043 0306 orr.w r3, r3, #6
|
|
800a60e: 6113 str r3, [r2, #16]
|
|
}
|
|
/* USER CODE END 2 */
|
|
}
|
|
800a610: bf00 nop
|
|
800a612: 3708 adds r7, #8
|
|
800a614: 46bd mov sp, r7
|
|
800a616: bd80 pop {r7, pc}
|
|
800a618: e000ed00 .word 0xe000ed00
|
|
|
|
0800a61c <HAL_PCD_ResumeCallback>:
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
|
|
#else
|
|
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
{
|
|
800a61c: b580 push {r7, lr}
|
|
800a61e: b082 sub sp, #8
|
|
800a620: af00 add r7, sp, #0
|
|
800a622: 6078 str r0, [r7, #4]
|
|
/* USER CODE BEGIN 3 */
|
|
|
|
/* USER CODE END 3 */
|
|
USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
|
|
800a624: 687b ldr r3, [r7, #4]
|
|
800a626: f8d3 3268 ldr.w r3, [r3, #616] ; 0x268
|
|
800a62a: 4618 mov r0, r3
|
|
800a62c: f7fc fcc9 bl 8006fc2 <USBD_LL_Resume>
|
|
}
|
|
800a630: bf00 nop
|
|
800a632: 3708 adds r7, #8
|
|
800a634: 46bd mov sp, r7
|
|
800a636: bd80 pop {r7, pc}
|
|
|
|
0800a638 <USBD_LL_Init>:
|
|
* @brief Initializes the low level portion of the device driver.
|
|
* @param pdev: Device handle
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
|
|
{
|
|
800a638: b580 push {r7, lr}
|
|
800a63a: b082 sub sp, #8
|
|
800a63c: af00 add r7, sp, #0
|
|
800a63e: 6078 str r0, [r7, #4]
|
|
/* Init USB Ip. */
|
|
/* Link the driver to the stack. */
|
|
hpcd_USB_FS.pData = pdev;
|
|
800a640: 4a28 ldr r2, [pc, #160] ; (800a6e4 <USBD_LL_Init+0xac>)
|
|
800a642: 687b ldr r3, [r7, #4]
|
|
800a644: f8c2 3268 str.w r3, [r2, #616] ; 0x268
|
|
pdev->pData = &hpcd_USB_FS;
|
|
800a648: 687b ldr r3, [r7, #4]
|
|
800a64a: 4a26 ldr r2, [pc, #152] ; (800a6e4 <USBD_LL_Init+0xac>)
|
|
800a64c: f8c3 22c0 str.w r2, [r3, #704] ; 0x2c0
|
|
|
|
hpcd_USB_FS.Instance = USB;
|
|
800a650: 4b24 ldr r3, [pc, #144] ; (800a6e4 <USBD_LL_Init+0xac>)
|
|
800a652: 4a25 ldr r2, [pc, #148] ; (800a6e8 <USBD_LL_Init+0xb0>)
|
|
800a654: 601a str r2, [r3, #0]
|
|
hpcd_USB_FS.Init.dev_endpoints = 8;
|
|
800a656: 4b23 ldr r3, [pc, #140] ; (800a6e4 <USBD_LL_Init+0xac>)
|
|
800a658: 2208 movs r2, #8
|
|
800a65a: 605a str r2, [r3, #4]
|
|
hpcd_USB_FS.Init.speed = PCD_SPEED_FULL;
|
|
800a65c: 4b21 ldr r3, [pc, #132] ; (800a6e4 <USBD_LL_Init+0xac>)
|
|
800a65e: 2202 movs r2, #2
|
|
800a660: 609a str r2, [r3, #8]
|
|
hpcd_USB_FS.Init.low_power_enable = DISABLE;
|
|
800a662: 4b20 ldr r3, [pc, #128] ; (800a6e4 <USBD_LL_Init+0xac>)
|
|
800a664: 2200 movs r2, #0
|
|
800a666: 619a str r2, [r3, #24]
|
|
hpcd_USB_FS.Init.lpm_enable = DISABLE;
|
|
800a668: 4b1e ldr r3, [pc, #120] ; (800a6e4 <USBD_LL_Init+0xac>)
|
|
800a66a: 2200 movs r2, #0
|
|
800a66c: 61da str r2, [r3, #28]
|
|
hpcd_USB_FS.Init.battery_charging_enable = DISABLE;
|
|
800a66e: 4b1d ldr r3, [pc, #116] ; (800a6e4 <USBD_LL_Init+0xac>)
|
|
800a670: 2200 movs r2, #0
|
|
800a672: 621a str r2, [r3, #32]
|
|
if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK)
|
|
800a674: 481b ldr r0, [pc, #108] ; (800a6e4 <USBD_LL_Init+0xac>)
|
|
800a676: f7f7 f901 bl 800187c <HAL_PCD_Init>
|
|
800a67a: 4603 mov r3, r0
|
|
800a67c: 2b00 cmp r3, #0
|
|
800a67e: d001 beq.n 800a684 <USBD_LL_Init+0x4c>
|
|
{
|
|
Error_Handler( );
|
|
800a680: f7ff fc5e bl 8009f40 <Error_Handler>
|
|
HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback);
|
|
HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback);
|
|
HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback);
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
/* USER CODE BEGIN EndPoint_Configuration */
|
|
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18);
|
|
800a684: 687b ldr r3, [r7, #4]
|
|
800a686: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
|
|
800a68a: 2318 movs r3, #24
|
|
800a68c: 2200 movs r2, #0
|
|
800a68e: 2100 movs r1, #0
|
|
800a690: f7f7 ff9a bl 80025c8 <HAL_PCDEx_PMAConfig>
|
|
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x58);
|
|
800a694: 687b ldr r3, [r7, #4]
|
|
800a696: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
|
|
800a69a: 2358 movs r3, #88 ; 0x58
|
|
800a69c: 2200 movs r2, #0
|
|
800a69e: 2180 movs r1, #128 ; 0x80
|
|
800a6a0: f7f7 ff92 bl 80025c8 <HAL_PCDEx_PMAConfig>
|
|
/* USER CODE END EndPoint_Configuration */
|
|
/* USER CODE BEGIN EndPoint_Configuration_CDC */
|
|
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x81 , PCD_SNG_BUF, 0xC0);
|
|
800a6a4: 687b ldr r3, [r7, #4]
|
|
800a6a6: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
|
|
800a6aa: 23c0 movs r3, #192 ; 0xc0
|
|
800a6ac: 2200 movs r2, #0
|
|
800a6ae: 2181 movs r1, #129 ; 0x81
|
|
800a6b0: f7f7 ff8a bl 80025c8 <HAL_PCDEx_PMAConfig>
|
|
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x01 , PCD_SNG_BUF, 0x110);
|
|
800a6b4: 687b ldr r3, [r7, #4]
|
|
800a6b6: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
|
|
800a6ba: f44f 7388 mov.w r3, #272 ; 0x110
|
|
800a6be: 2200 movs r2, #0
|
|
800a6c0: 2101 movs r1, #1
|
|
800a6c2: f7f7 ff81 bl 80025c8 <HAL_PCDEx_PMAConfig>
|
|
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x82 , PCD_SNG_BUF, 0x100);
|
|
800a6c6: 687b ldr r3, [r7, #4]
|
|
800a6c8: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
|
|
800a6cc: f44f 7380 mov.w r3, #256 ; 0x100
|
|
800a6d0: 2200 movs r2, #0
|
|
800a6d2: 2182 movs r1, #130 ; 0x82
|
|
800a6d4: f7f7 ff78 bl 80025c8 <HAL_PCDEx_PMAConfig>
|
|
/* USER CODE END EndPoint_Configuration_CDC */
|
|
return USBD_OK;
|
|
800a6d8: 2300 movs r3, #0
|
|
}
|
|
800a6da: 4618 mov r0, r3
|
|
800a6dc: 3708 adds r7, #8
|
|
800a6de: 46bd mov sp, r7
|
|
800a6e0: bd80 pop {r7, pc}
|
|
800a6e2: bf00 nop
|
|
800a6e4: 20001dd4 .word 0x20001dd4
|
|
800a6e8: 40005c00 .word 0x40005c00
|
|
|
|
0800a6ec <USBD_LL_Start>:
|
|
* @brief Starts the low level portion of the device driver.
|
|
* @param pdev: Device handle
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
|
|
{
|
|
800a6ec: b580 push {r7, lr}
|
|
800a6ee: b084 sub sp, #16
|
|
800a6f0: af00 add r7, sp, #0
|
|
800a6f2: 6078 str r0, [r7, #4]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
800a6f4: 2300 movs r3, #0
|
|
800a6f6: 73fb strb r3, [r7, #15]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
800a6f8: 2300 movs r3, #0
|
|
800a6fa: 73bb strb r3, [r7, #14]
|
|
|
|
hal_status = HAL_PCD_Start(pdev->pData);
|
|
800a6fc: 687b ldr r3, [r7, #4]
|
|
800a6fe: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
|
|
800a702: 4618 mov r0, r3
|
|
800a704: f7f7 f99b bl 8001a3e <HAL_PCD_Start>
|
|
800a708: 4603 mov r3, r0
|
|
800a70a: 73fb strb r3, [r7, #15]
|
|
|
|
usb_status = USBD_Get_USB_Status(hal_status);
|
|
800a70c: 7bfb ldrb r3, [r7, #15]
|
|
800a70e: 4618 mov r0, r3
|
|
800a710: f000 f948 bl 800a9a4 <USBD_Get_USB_Status>
|
|
800a714: 4603 mov r3, r0
|
|
800a716: 73bb strb r3, [r7, #14]
|
|
|
|
return usb_status;
|
|
800a718: 7bbb ldrb r3, [r7, #14]
|
|
}
|
|
800a71a: 4618 mov r0, r3
|
|
800a71c: 3710 adds r7, #16
|
|
800a71e: 46bd mov sp, r7
|
|
800a720: bd80 pop {r7, pc}
|
|
|
|
0800a722 <USBD_LL_OpenEP>:
|
|
* @param ep_type: Endpoint type
|
|
* @param ep_mps: Endpoint max packet size
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps)
|
|
{
|
|
800a722: b580 push {r7, lr}
|
|
800a724: b084 sub sp, #16
|
|
800a726: af00 add r7, sp, #0
|
|
800a728: 6078 str r0, [r7, #4]
|
|
800a72a: 4608 mov r0, r1
|
|
800a72c: 4611 mov r1, r2
|
|
800a72e: 461a mov r2, r3
|
|
800a730: 4603 mov r3, r0
|
|
800a732: 70fb strb r3, [r7, #3]
|
|
800a734: 460b mov r3, r1
|
|
800a736: 70bb strb r3, [r7, #2]
|
|
800a738: 4613 mov r3, r2
|
|
800a73a: 803b strh r3, [r7, #0]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
800a73c: 2300 movs r3, #0
|
|
800a73e: 73fb strb r3, [r7, #15]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
800a740: 2300 movs r3, #0
|
|
800a742: 73bb strb r3, [r7, #14]
|
|
|
|
hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
|
|
800a744: 687b ldr r3, [r7, #4]
|
|
800a746: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
|
|
800a74a: 78bb ldrb r3, [r7, #2]
|
|
800a74c: 883a ldrh r2, [r7, #0]
|
|
800a74e: 78f9 ldrb r1, [r7, #3]
|
|
800a750: f7f7 face bl 8001cf0 <HAL_PCD_EP_Open>
|
|
800a754: 4603 mov r3, r0
|
|
800a756: 73fb strb r3, [r7, #15]
|
|
|
|
usb_status = USBD_Get_USB_Status(hal_status);
|
|
800a758: 7bfb ldrb r3, [r7, #15]
|
|
800a75a: 4618 mov r0, r3
|
|
800a75c: f000 f922 bl 800a9a4 <USBD_Get_USB_Status>
|
|
800a760: 4603 mov r3, r0
|
|
800a762: 73bb strb r3, [r7, #14]
|
|
|
|
return usb_status;
|
|
800a764: 7bbb ldrb r3, [r7, #14]
|
|
}
|
|
800a766: 4618 mov r0, r3
|
|
800a768: 3710 adds r7, #16
|
|
800a76a: 46bd mov sp, r7
|
|
800a76c: bd80 pop {r7, pc}
|
|
|
|
0800a76e <USBD_LL_CloseEP>:
|
|
* @param pdev: Device handle
|
|
* @param ep_addr: Endpoint number
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
|
|
{
|
|
800a76e: b580 push {r7, lr}
|
|
800a770: b084 sub sp, #16
|
|
800a772: af00 add r7, sp, #0
|
|
800a774: 6078 str r0, [r7, #4]
|
|
800a776: 460b mov r3, r1
|
|
800a778: 70fb strb r3, [r7, #3]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
800a77a: 2300 movs r3, #0
|
|
800a77c: 73fb strb r3, [r7, #15]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
800a77e: 2300 movs r3, #0
|
|
800a780: 73bb strb r3, [r7, #14]
|
|
|
|
hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr);
|
|
800a782: 687b ldr r3, [r7, #4]
|
|
800a784: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
|
|
800a788: 78fa ldrb r2, [r7, #3]
|
|
800a78a: 4611 mov r1, r2
|
|
800a78c: 4618 mov r0, r3
|
|
800a78e: f7f7 fb0f bl 8001db0 <HAL_PCD_EP_Close>
|
|
800a792: 4603 mov r3, r0
|
|
800a794: 73fb strb r3, [r7, #15]
|
|
|
|
usb_status = USBD_Get_USB_Status(hal_status);
|
|
800a796: 7bfb ldrb r3, [r7, #15]
|
|
800a798: 4618 mov r0, r3
|
|
800a79a: f000 f903 bl 800a9a4 <USBD_Get_USB_Status>
|
|
800a79e: 4603 mov r3, r0
|
|
800a7a0: 73bb strb r3, [r7, #14]
|
|
|
|
return usb_status;
|
|
800a7a2: 7bbb ldrb r3, [r7, #14]
|
|
}
|
|
800a7a4: 4618 mov r0, r3
|
|
800a7a6: 3710 adds r7, #16
|
|
800a7a8: 46bd mov sp, r7
|
|
800a7aa: bd80 pop {r7, pc}
|
|
|
|
0800a7ac <USBD_LL_StallEP>:
|
|
* @param pdev: Device handle
|
|
* @param ep_addr: Endpoint number
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
|
|
{
|
|
800a7ac: b580 push {r7, lr}
|
|
800a7ae: b084 sub sp, #16
|
|
800a7b0: af00 add r7, sp, #0
|
|
800a7b2: 6078 str r0, [r7, #4]
|
|
800a7b4: 460b mov r3, r1
|
|
800a7b6: 70fb strb r3, [r7, #3]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
800a7b8: 2300 movs r3, #0
|
|
800a7ba: 73fb strb r3, [r7, #15]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
800a7bc: 2300 movs r3, #0
|
|
800a7be: 73bb strb r3, [r7, #14]
|
|
|
|
hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
|
|
800a7c0: 687b ldr r3, [r7, #4]
|
|
800a7c2: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
|
|
800a7c6: 78fa ldrb r2, [r7, #3]
|
|
800a7c8: 4611 mov r1, r2
|
|
800a7ca: 4618 mov r0, r3
|
|
800a7cc: f7f7 fbb9 bl 8001f42 <HAL_PCD_EP_SetStall>
|
|
800a7d0: 4603 mov r3, r0
|
|
800a7d2: 73fb strb r3, [r7, #15]
|
|
|
|
usb_status = USBD_Get_USB_Status(hal_status);
|
|
800a7d4: 7bfb ldrb r3, [r7, #15]
|
|
800a7d6: 4618 mov r0, r3
|
|
800a7d8: f000 f8e4 bl 800a9a4 <USBD_Get_USB_Status>
|
|
800a7dc: 4603 mov r3, r0
|
|
800a7de: 73bb strb r3, [r7, #14]
|
|
|
|
return usb_status;
|
|
800a7e0: 7bbb ldrb r3, [r7, #14]
|
|
}
|
|
800a7e2: 4618 mov r0, r3
|
|
800a7e4: 3710 adds r7, #16
|
|
800a7e6: 46bd mov sp, r7
|
|
800a7e8: bd80 pop {r7, pc}
|
|
|
|
0800a7ea <USBD_LL_ClearStallEP>:
|
|
* @param pdev: Device handle
|
|
* @param ep_addr: Endpoint number
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
|
|
{
|
|
800a7ea: b580 push {r7, lr}
|
|
800a7ec: b084 sub sp, #16
|
|
800a7ee: af00 add r7, sp, #0
|
|
800a7f0: 6078 str r0, [r7, #4]
|
|
800a7f2: 460b mov r3, r1
|
|
800a7f4: 70fb strb r3, [r7, #3]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
800a7f6: 2300 movs r3, #0
|
|
800a7f8: 73fb strb r3, [r7, #15]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
800a7fa: 2300 movs r3, #0
|
|
800a7fc: 73bb strb r3, [r7, #14]
|
|
|
|
hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
|
|
800a7fe: 687b ldr r3, [r7, #4]
|
|
800a800: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
|
|
800a804: 78fa ldrb r2, [r7, #3]
|
|
800a806: 4611 mov r1, r2
|
|
800a808: 4618 mov r0, r3
|
|
800a80a: f7f7 fbf4 bl 8001ff6 <HAL_PCD_EP_ClrStall>
|
|
800a80e: 4603 mov r3, r0
|
|
800a810: 73fb strb r3, [r7, #15]
|
|
|
|
usb_status = USBD_Get_USB_Status(hal_status);
|
|
800a812: 7bfb ldrb r3, [r7, #15]
|
|
800a814: 4618 mov r0, r3
|
|
800a816: f000 f8c5 bl 800a9a4 <USBD_Get_USB_Status>
|
|
800a81a: 4603 mov r3, r0
|
|
800a81c: 73bb strb r3, [r7, #14]
|
|
|
|
return usb_status;
|
|
800a81e: 7bbb ldrb r3, [r7, #14]
|
|
}
|
|
800a820: 4618 mov r0, r3
|
|
800a822: 3710 adds r7, #16
|
|
800a824: 46bd mov sp, r7
|
|
800a826: bd80 pop {r7, pc}
|
|
|
|
0800a828 <USBD_LL_IsStallEP>:
|
|
* @param pdev: Device handle
|
|
* @param ep_addr: Endpoint number
|
|
* @retval Stall (1: Yes, 0: No)
|
|
*/
|
|
uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
|
|
{
|
|
800a828: b480 push {r7}
|
|
800a82a: b085 sub sp, #20
|
|
800a82c: af00 add r7, sp, #0
|
|
800a82e: 6078 str r0, [r7, #4]
|
|
800a830: 460b mov r3, r1
|
|
800a832: 70fb strb r3, [r7, #3]
|
|
PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData;
|
|
800a834: 687b ldr r3, [r7, #4]
|
|
800a836: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
|
|
800a83a: 60fb str r3, [r7, #12]
|
|
|
|
if((ep_addr & 0x80) == 0x80)
|
|
800a83c: f997 3003 ldrsb.w r3, [r7, #3]
|
|
800a840: 2b00 cmp r3, #0
|
|
800a842: da08 bge.n 800a856 <USBD_LL_IsStallEP+0x2e>
|
|
{
|
|
return hpcd->IN_ep[ep_addr & 0x7F].is_stall;
|
|
800a844: 78fb ldrb r3, [r7, #3]
|
|
800a846: f003 037f and.w r3, r3, #127 ; 0x7f
|
|
800a84a: 68fa ldr r2, [r7, #12]
|
|
800a84c: 015b lsls r3, r3, #5
|
|
800a84e: 4413 add r3, r2
|
|
800a850: 332a adds r3, #42 ; 0x2a
|
|
800a852: 781b ldrb r3, [r3, #0]
|
|
800a854: e008 b.n 800a868 <USBD_LL_IsStallEP+0x40>
|
|
}
|
|
else
|
|
{
|
|
return hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
|
|
800a856: 78fb ldrb r3, [r7, #3]
|
|
800a858: f003 037f and.w r3, r3, #127 ; 0x7f
|
|
800a85c: 68fa ldr r2, [r7, #12]
|
|
800a85e: 015b lsls r3, r3, #5
|
|
800a860: 4413 add r3, r2
|
|
800a862: f503 7395 add.w r3, r3, #298 ; 0x12a
|
|
800a866: 781b ldrb r3, [r3, #0]
|
|
}
|
|
}
|
|
800a868: 4618 mov r0, r3
|
|
800a86a: 3714 adds r7, #20
|
|
800a86c: 46bd mov sp, r7
|
|
800a86e: bc80 pop {r7}
|
|
800a870: 4770 bx lr
|
|
|
|
0800a872 <USBD_LL_SetUSBAddress>:
|
|
* @param pdev: Device handle
|
|
* @param dev_addr: Device address
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr)
|
|
{
|
|
800a872: b580 push {r7, lr}
|
|
800a874: b084 sub sp, #16
|
|
800a876: af00 add r7, sp, #0
|
|
800a878: 6078 str r0, [r7, #4]
|
|
800a87a: 460b mov r3, r1
|
|
800a87c: 70fb strb r3, [r7, #3]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
800a87e: 2300 movs r3, #0
|
|
800a880: 73fb strb r3, [r7, #15]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
800a882: 2300 movs r3, #0
|
|
800a884: 73bb strb r3, [r7, #14]
|
|
|
|
hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
|
|
800a886: 687b ldr r3, [r7, #4]
|
|
800a888: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
|
|
800a88c: 78fa ldrb r2, [r7, #3]
|
|
800a88e: 4611 mov r1, r2
|
|
800a890: 4618 mov r0, r3
|
|
800a892: f7f7 fa08 bl 8001ca6 <HAL_PCD_SetAddress>
|
|
800a896: 4603 mov r3, r0
|
|
800a898: 73fb strb r3, [r7, #15]
|
|
|
|
usb_status = USBD_Get_USB_Status(hal_status);
|
|
800a89a: 7bfb ldrb r3, [r7, #15]
|
|
800a89c: 4618 mov r0, r3
|
|
800a89e: f000 f881 bl 800a9a4 <USBD_Get_USB_Status>
|
|
800a8a2: 4603 mov r3, r0
|
|
800a8a4: 73bb strb r3, [r7, #14]
|
|
|
|
return usb_status;
|
|
800a8a6: 7bbb ldrb r3, [r7, #14]
|
|
}
|
|
800a8a8: 4618 mov r0, r3
|
|
800a8aa: 3710 adds r7, #16
|
|
800a8ac: 46bd mov sp, r7
|
|
800a8ae: bd80 pop {r7, pc}
|
|
|
|
0800a8b0 <USBD_LL_Transmit>:
|
|
* @param pbuf: Pointer to data to be sent
|
|
* @param size: Data size
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
|
|
{
|
|
800a8b0: b580 push {r7, lr}
|
|
800a8b2: b086 sub sp, #24
|
|
800a8b4: af00 add r7, sp, #0
|
|
800a8b6: 60f8 str r0, [r7, #12]
|
|
800a8b8: 607a str r2, [r7, #4]
|
|
800a8ba: 461a mov r2, r3
|
|
800a8bc: 460b mov r3, r1
|
|
800a8be: 72fb strb r3, [r7, #11]
|
|
800a8c0: 4613 mov r3, r2
|
|
800a8c2: 813b strh r3, [r7, #8]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
800a8c4: 2300 movs r3, #0
|
|
800a8c6: 75fb strb r3, [r7, #23]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
800a8c8: 2300 movs r3, #0
|
|
800a8ca: 75bb strb r3, [r7, #22]
|
|
|
|
hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
|
|
800a8cc: 68fb ldr r3, [r7, #12]
|
|
800a8ce: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
|
|
800a8d2: 893b ldrh r3, [r7, #8]
|
|
800a8d4: 7af9 ldrb r1, [r7, #11]
|
|
800a8d6: 687a ldr r2, [r7, #4]
|
|
800a8d8: f7f7 fafa bl 8001ed0 <HAL_PCD_EP_Transmit>
|
|
800a8dc: 4603 mov r3, r0
|
|
800a8de: 75fb strb r3, [r7, #23]
|
|
|
|
usb_status = USBD_Get_USB_Status(hal_status);
|
|
800a8e0: 7dfb ldrb r3, [r7, #23]
|
|
800a8e2: 4618 mov r0, r3
|
|
800a8e4: f000 f85e bl 800a9a4 <USBD_Get_USB_Status>
|
|
800a8e8: 4603 mov r3, r0
|
|
800a8ea: 75bb strb r3, [r7, #22]
|
|
|
|
return usb_status;
|
|
800a8ec: 7dbb ldrb r3, [r7, #22]
|
|
}
|
|
800a8ee: 4618 mov r0, r3
|
|
800a8f0: 3718 adds r7, #24
|
|
800a8f2: 46bd mov sp, r7
|
|
800a8f4: bd80 pop {r7, pc}
|
|
|
|
0800a8f6 <USBD_LL_PrepareReceive>:
|
|
* @param pbuf: Pointer to data to be received
|
|
* @param size: Data size
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
|
|
{
|
|
800a8f6: b580 push {r7, lr}
|
|
800a8f8: b086 sub sp, #24
|
|
800a8fa: af00 add r7, sp, #0
|
|
800a8fc: 60f8 str r0, [r7, #12]
|
|
800a8fe: 607a str r2, [r7, #4]
|
|
800a900: 461a mov r2, r3
|
|
800a902: 460b mov r3, r1
|
|
800a904: 72fb strb r3, [r7, #11]
|
|
800a906: 4613 mov r3, r2
|
|
800a908: 813b strh r3, [r7, #8]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
800a90a: 2300 movs r3, #0
|
|
800a90c: 75fb strb r3, [r7, #23]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
800a90e: 2300 movs r3, #0
|
|
800a910: 75bb strb r3, [r7, #22]
|
|
|
|
hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
|
|
800a912: 68fb ldr r3, [r7, #12]
|
|
800a914: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
|
|
800a918: 893b ldrh r3, [r7, #8]
|
|
800a91a: 7af9 ldrb r1, [r7, #11]
|
|
800a91c: 687a ldr r2, [r7, #4]
|
|
800a91e: f7f7 fa89 bl 8001e34 <HAL_PCD_EP_Receive>
|
|
800a922: 4603 mov r3, r0
|
|
800a924: 75fb strb r3, [r7, #23]
|
|
|
|
usb_status = USBD_Get_USB_Status(hal_status);
|
|
800a926: 7dfb ldrb r3, [r7, #23]
|
|
800a928: 4618 mov r0, r3
|
|
800a92a: f000 f83b bl 800a9a4 <USBD_Get_USB_Status>
|
|
800a92e: 4603 mov r3, r0
|
|
800a930: 75bb strb r3, [r7, #22]
|
|
|
|
return usb_status;
|
|
800a932: 7dbb ldrb r3, [r7, #22]
|
|
}
|
|
800a934: 4618 mov r0, r3
|
|
800a936: 3718 adds r7, #24
|
|
800a938: 46bd mov sp, r7
|
|
800a93a: bd80 pop {r7, pc}
|
|
|
|
0800a93c <USBD_LL_GetRxDataSize>:
|
|
* @param pdev: Device handle
|
|
* @param ep_addr: Endpoint number
|
|
* @retval Recived Data Size
|
|
*/
|
|
uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
|
|
{
|
|
800a93c: b580 push {r7, lr}
|
|
800a93e: b082 sub sp, #8
|
|
800a940: af00 add r7, sp, #0
|
|
800a942: 6078 str r0, [r7, #4]
|
|
800a944: 460b mov r3, r1
|
|
800a946: 70fb strb r3, [r7, #3]
|
|
return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr);
|
|
800a948: 687b ldr r3, [r7, #4]
|
|
800a94a: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
|
|
800a94e: 78fa ldrb r2, [r7, #3]
|
|
800a950: 4611 mov r1, r2
|
|
800a952: 4618 mov r0, r3
|
|
800a954: f7f7 faa8 bl 8001ea8 <HAL_PCD_EP_GetRxCount>
|
|
800a958: 4603 mov r3, r0
|
|
}
|
|
800a95a: 4618 mov r0, r3
|
|
800a95c: 3708 adds r7, #8
|
|
800a95e: 46bd mov sp, r7
|
|
800a960: bd80 pop {r7, pc}
|
|
...
|
|
|
|
0800a964 <USBD_static_malloc>:
|
|
* @brief Static single allocation.
|
|
* @param size: Size of allocated memory
|
|
* @retval None
|
|
*/
|
|
void *USBD_static_malloc(uint32_t size)
|
|
{
|
|
800a964: b480 push {r7}
|
|
800a966: b083 sub sp, #12
|
|
800a968: af00 add r7, sp, #0
|
|
800a96a: 6078 str r0, [r7, #4]
|
|
static uint32_t mem[(sizeof(USBD_CDC_HandleTypeDef)/4)+1];/* On 32-bit boundary */
|
|
return mem;
|
|
800a96c: 4b02 ldr r3, [pc, #8] ; (800a978 <USBD_static_malloc+0x14>)
|
|
}
|
|
800a96e: 4618 mov r0, r3
|
|
800a970: 370c adds r7, #12
|
|
800a972: 46bd mov sp, r7
|
|
800a974: bc80 pop {r7}
|
|
800a976: 4770 bx lr
|
|
800a978: 20000fcc .word 0x20000fcc
|
|
|
|
0800a97c <USBD_static_free>:
|
|
* @brief Dummy memory free
|
|
* @param p: Pointer to allocated memory address
|
|
* @retval None
|
|
*/
|
|
void USBD_static_free(void *p)
|
|
{
|
|
800a97c: b480 push {r7}
|
|
800a97e: b083 sub sp, #12
|
|
800a980: af00 add r7, sp, #0
|
|
800a982: 6078 str r0, [r7, #4]
|
|
|
|
}
|
|
800a984: bf00 nop
|
|
800a986: 370c adds r7, #12
|
|
800a988: 46bd mov sp, r7
|
|
800a98a: bc80 pop {r7}
|
|
800a98c: 4770 bx lr
|
|
|
|
0800a98e <HAL_PCDEx_SetConnectionState>:
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
static void PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
|
|
#else
|
|
void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
{
|
|
800a98e: b480 push {r7}
|
|
800a990: b083 sub sp, #12
|
|
800a992: af00 add r7, sp, #0
|
|
800a994: 6078 str r0, [r7, #4]
|
|
800a996: 460b mov r3, r1
|
|
800a998: 70fb strb r3, [r7, #3]
|
|
{
|
|
/* Configure High connection state. */
|
|
|
|
}
|
|
/* USER CODE END 6 */
|
|
}
|
|
800a99a: bf00 nop
|
|
800a99c: 370c adds r7, #12
|
|
800a99e: 46bd mov sp, r7
|
|
800a9a0: bc80 pop {r7}
|
|
800a9a2: 4770 bx lr
|
|
|
|
0800a9a4 <USBD_Get_USB_Status>:
|
|
* @brief Retuns the USB status depending on the HAL status:
|
|
* @param hal_status: HAL status
|
|
* @retval USB status
|
|
*/
|
|
USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
|
|
{
|
|
800a9a4: b480 push {r7}
|
|
800a9a6: b085 sub sp, #20
|
|
800a9a8: af00 add r7, sp, #0
|
|
800a9aa: 4603 mov r3, r0
|
|
800a9ac: 71fb strb r3, [r7, #7]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
800a9ae: 2300 movs r3, #0
|
|
800a9b0: 73fb strb r3, [r7, #15]
|
|
|
|
switch (hal_status)
|
|
800a9b2: 79fb ldrb r3, [r7, #7]
|
|
800a9b4: 2b03 cmp r3, #3
|
|
800a9b6: d817 bhi.n 800a9e8 <USBD_Get_USB_Status+0x44>
|
|
800a9b8: a201 add r2, pc, #4 ; (adr r2, 800a9c0 <USBD_Get_USB_Status+0x1c>)
|
|
800a9ba: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
800a9be: bf00 nop
|
|
800a9c0: 0800a9d1 .word 0x0800a9d1
|
|
800a9c4: 0800a9d7 .word 0x0800a9d7
|
|
800a9c8: 0800a9dd .word 0x0800a9dd
|
|
800a9cc: 0800a9e3 .word 0x0800a9e3
|
|
{
|
|
case HAL_OK :
|
|
usb_status = USBD_OK;
|
|
800a9d0: 2300 movs r3, #0
|
|
800a9d2: 73fb strb r3, [r7, #15]
|
|
break;
|
|
800a9d4: e00b b.n 800a9ee <USBD_Get_USB_Status+0x4a>
|
|
case HAL_ERROR :
|
|
usb_status = USBD_FAIL;
|
|
800a9d6: 2302 movs r3, #2
|
|
800a9d8: 73fb strb r3, [r7, #15]
|
|
break;
|
|
800a9da: e008 b.n 800a9ee <USBD_Get_USB_Status+0x4a>
|
|
case HAL_BUSY :
|
|
usb_status = USBD_BUSY;
|
|
800a9dc: 2301 movs r3, #1
|
|
800a9de: 73fb strb r3, [r7, #15]
|
|
break;
|
|
800a9e0: e005 b.n 800a9ee <USBD_Get_USB_Status+0x4a>
|
|
case HAL_TIMEOUT :
|
|
usb_status = USBD_FAIL;
|
|
800a9e2: 2302 movs r3, #2
|
|
800a9e4: 73fb strb r3, [r7, #15]
|
|
break;
|
|
800a9e6: e002 b.n 800a9ee <USBD_Get_USB_Status+0x4a>
|
|
default :
|
|
usb_status = USBD_FAIL;
|
|
800a9e8: 2302 movs r3, #2
|
|
800a9ea: 73fb strb r3, [r7, #15]
|
|
break;
|
|
800a9ec: bf00 nop
|
|
}
|
|
return usb_status;
|
|
800a9ee: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
800a9f0: 4618 mov r0, r3
|
|
800a9f2: 3714 adds r7, #20
|
|
800a9f4: 46bd mov sp, r7
|
|
800a9f6: bc80 pop {r7}
|
|
800a9f8: 4770 bx lr
|
|
800a9fa: bf00 nop
|
|
|
|
0800a9fc <USBD_FS_DeviceDescriptor>:
|
|
* @param speed : Current device speed
|
|
* @param length : Pointer to data length variable
|
|
* @retval Pointer to descriptor buffer
|
|
*/
|
|
uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
|
|
{
|
|
800a9fc: b480 push {r7}
|
|
800a9fe: b083 sub sp, #12
|
|
800aa00: af00 add r7, sp, #0
|
|
800aa02: 4603 mov r3, r0
|
|
800aa04: 6039 str r1, [r7, #0]
|
|
800aa06: 71fb strb r3, [r7, #7]
|
|
UNUSED(speed);
|
|
*length = sizeof(USBD_FS_DeviceDesc);
|
|
800aa08: 683b ldr r3, [r7, #0]
|
|
800aa0a: 2212 movs r2, #18
|
|
800aa0c: 801a strh r2, [r3, #0]
|
|
return USBD_FS_DeviceDesc;
|
|
800aa0e: 4b03 ldr r3, [pc, #12] ; (800aa1c <USBD_FS_DeviceDescriptor+0x20>)
|
|
}
|
|
800aa10: 4618 mov r0, r3
|
|
800aa12: 370c adds r7, #12
|
|
800aa14: 46bd mov sp, r7
|
|
800aa16: bc80 pop {r7}
|
|
800aa18: 4770 bx lr
|
|
800aa1a: bf00 nop
|
|
800aa1c: 20000170 .word 0x20000170
|
|
|
|
0800aa20 <USBD_FS_LangIDStrDescriptor>:
|
|
* @param speed : Current device speed
|
|
* @param length : Pointer to data length variable
|
|
* @retval Pointer to descriptor buffer
|
|
*/
|
|
uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
|
|
{
|
|
800aa20: b480 push {r7}
|
|
800aa22: b083 sub sp, #12
|
|
800aa24: af00 add r7, sp, #0
|
|
800aa26: 4603 mov r3, r0
|
|
800aa28: 6039 str r1, [r7, #0]
|
|
800aa2a: 71fb strb r3, [r7, #7]
|
|
UNUSED(speed);
|
|
*length = sizeof(USBD_LangIDDesc);
|
|
800aa2c: 683b ldr r3, [r7, #0]
|
|
800aa2e: 2204 movs r2, #4
|
|
800aa30: 801a strh r2, [r3, #0]
|
|
return USBD_LangIDDesc;
|
|
800aa32: 4b03 ldr r3, [pc, #12] ; (800aa40 <USBD_FS_LangIDStrDescriptor+0x20>)
|
|
}
|
|
800aa34: 4618 mov r0, r3
|
|
800aa36: 370c adds r7, #12
|
|
800aa38: 46bd mov sp, r7
|
|
800aa3a: bc80 pop {r7}
|
|
800aa3c: 4770 bx lr
|
|
800aa3e: bf00 nop
|
|
800aa40: 20000184 .word 0x20000184
|
|
|
|
0800aa44 <USBD_FS_ProductStrDescriptor>:
|
|
* @param speed : Current device speed
|
|
* @param length : Pointer to data length variable
|
|
* @retval Pointer to descriptor buffer
|
|
*/
|
|
uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
|
|
{
|
|
800aa44: b580 push {r7, lr}
|
|
800aa46: b082 sub sp, #8
|
|
800aa48: af00 add r7, sp, #0
|
|
800aa4a: 4603 mov r3, r0
|
|
800aa4c: 6039 str r1, [r7, #0]
|
|
800aa4e: 71fb strb r3, [r7, #7]
|
|
if(speed == 0)
|
|
800aa50: 79fb ldrb r3, [r7, #7]
|
|
800aa52: 2b00 cmp r3, #0
|
|
800aa54: d105 bne.n 800aa62 <USBD_FS_ProductStrDescriptor+0x1e>
|
|
{
|
|
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
|
|
800aa56: 683a ldr r2, [r7, #0]
|
|
800aa58: 4907 ldr r1, [pc, #28] ; (800aa78 <USBD_FS_ProductStrDescriptor+0x34>)
|
|
800aa5a: 4808 ldr r0, [pc, #32] ; (800aa7c <USBD_FS_ProductStrDescriptor+0x38>)
|
|
800aa5c: f7fd f80f bl 8007a7e <USBD_GetString>
|
|
800aa60: e004 b.n 800aa6c <USBD_FS_ProductStrDescriptor+0x28>
|
|
}
|
|
else
|
|
{
|
|
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
|
|
800aa62: 683a ldr r2, [r7, #0]
|
|
800aa64: 4904 ldr r1, [pc, #16] ; (800aa78 <USBD_FS_ProductStrDescriptor+0x34>)
|
|
800aa66: 4805 ldr r0, [pc, #20] ; (800aa7c <USBD_FS_ProductStrDescriptor+0x38>)
|
|
800aa68: f7fd f809 bl 8007a7e <USBD_GetString>
|
|
}
|
|
return USBD_StrDesc;
|
|
800aa6c: 4b02 ldr r3, [pc, #8] ; (800aa78 <USBD_FS_ProductStrDescriptor+0x34>)
|
|
}
|
|
800aa6e: 4618 mov r0, r3
|
|
800aa70: 3708 adds r7, #8
|
|
800aa72: 46bd mov sp, r7
|
|
800aa74: bd80 pop {r7, pc}
|
|
800aa76: bf00 nop
|
|
800aa78: 20002040 .word 0x20002040
|
|
800aa7c: 0800c7ac .word 0x0800c7ac
|
|
|
|
0800aa80 <USBD_FS_ManufacturerStrDescriptor>:
|
|
* @param speed : Current device speed
|
|
* @param length : Pointer to data length variable
|
|
* @retval Pointer to descriptor buffer
|
|
*/
|
|
uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
|
|
{
|
|
800aa80: b580 push {r7, lr}
|
|
800aa82: b082 sub sp, #8
|
|
800aa84: af00 add r7, sp, #0
|
|
800aa86: 4603 mov r3, r0
|
|
800aa88: 6039 str r1, [r7, #0]
|
|
800aa8a: 71fb strb r3, [r7, #7]
|
|
UNUSED(speed);
|
|
USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
|
|
800aa8c: 683a ldr r2, [r7, #0]
|
|
800aa8e: 4904 ldr r1, [pc, #16] ; (800aaa0 <USBD_FS_ManufacturerStrDescriptor+0x20>)
|
|
800aa90: 4804 ldr r0, [pc, #16] ; (800aaa4 <USBD_FS_ManufacturerStrDescriptor+0x24>)
|
|
800aa92: f7fc fff4 bl 8007a7e <USBD_GetString>
|
|
return USBD_StrDesc;
|
|
800aa96: 4b02 ldr r3, [pc, #8] ; (800aaa0 <USBD_FS_ManufacturerStrDescriptor+0x20>)
|
|
}
|
|
800aa98: 4618 mov r0, r3
|
|
800aa9a: 3708 adds r7, #8
|
|
800aa9c: 46bd mov sp, r7
|
|
800aa9e: bd80 pop {r7, pc}
|
|
800aaa0: 20002040 .word 0x20002040
|
|
800aaa4: 0800c7c4 .word 0x0800c7c4
|
|
|
|
0800aaa8 <USBD_FS_SerialStrDescriptor>:
|
|
* @param speed : Current device speed
|
|
* @param length : Pointer to data length variable
|
|
* @retval Pointer to descriptor buffer
|
|
*/
|
|
uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
|
|
{
|
|
800aaa8: b580 push {r7, lr}
|
|
800aaaa: b082 sub sp, #8
|
|
800aaac: af00 add r7, sp, #0
|
|
800aaae: 4603 mov r3, r0
|
|
800aab0: 6039 str r1, [r7, #0]
|
|
800aab2: 71fb strb r3, [r7, #7]
|
|
UNUSED(speed);
|
|
*length = USB_SIZ_STRING_SERIAL;
|
|
800aab4: 683b ldr r3, [r7, #0]
|
|
800aab6: 221a movs r2, #26
|
|
800aab8: 801a strh r2, [r3, #0]
|
|
|
|
/* Update the serial number string descriptor with the data from the unique
|
|
* ID */
|
|
Get_SerialNum();
|
|
800aaba: f000 f843 bl 800ab44 <Get_SerialNum>
|
|
/* USER CODE BEGIN USBD_FS_SerialStrDescriptor */
|
|
|
|
/* USER CODE END USBD_FS_SerialStrDescriptor */
|
|
return (uint8_t *) USBD_StringSerial;
|
|
800aabe: 4b02 ldr r3, [pc, #8] ; (800aac8 <USBD_FS_SerialStrDescriptor+0x20>)
|
|
}
|
|
800aac0: 4618 mov r0, r3
|
|
800aac2: 3708 adds r7, #8
|
|
800aac4: 46bd mov sp, r7
|
|
800aac6: bd80 pop {r7, pc}
|
|
800aac8: 20000188 .word 0x20000188
|
|
|
|
0800aacc <USBD_FS_ConfigStrDescriptor>:
|
|
* @param speed : Current device speed
|
|
* @param length : Pointer to data length variable
|
|
* @retval Pointer to descriptor buffer
|
|
*/
|
|
uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
|
|
{
|
|
800aacc: b580 push {r7, lr}
|
|
800aace: b082 sub sp, #8
|
|
800aad0: af00 add r7, sp, #0
|
|
800aad2: 4603 mov r3, r0
|
|
800aad4: 6039 str r1, [r7, #0]
|
|
800aad6: 71fb strb r3, [r7, #7]
|
|
if(speed == USBD_SPEED_HIGH)
|
|
800aad8: 79fb ldrb r3, [r7, #7]
|
|
800aada: 2b00 cmp r3, #0
|
|
800aadc: d105 bne.n 800aaea <USBD_FS_ConfigStrDescriptor+0x1e>
|
|
{
|
|
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
|
|
800aade: 683a ldr r2, [r7, #0]
|
|
800aae0: 4907 ldr r1, [pc, #28] ; (800ab00 <USBD_FS_ConfigStrDescriptor+0x34>)
|
|
800aae2: 4808 ldr r0, [pc, #32] ; (800ab04 <USBD_FS_ConfigStrDescriptor+0x38>)
|
|
800aae4: f7fc ffcb bl 8007a7e <USBD_GetString>
|
|
800aae8: e004 b.n 800aaf4 <USBD_FS_ConfigStrDescriptor+0x28>
|
|
}
|
|
else
|
|
{
|
|
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
|
|
800aaea: 683a ldr r2, [r7, #0]
|
|
800aaec: 4904 ldr r1, [pc, #16] ; (800ab00 <USBD_FS_ConfigStrDescriptor+0x34>)
|
|
800aaee: 4805 ldr r0, [pc, #20] ; (800ab04 <USBD_FS_ConfigStrDescriptor+0x38>)
|
|
800aaf0: f7fc ffc5 bl 8007a7e <USBD_GetString>
|
|
}
|
|
return USBD_StrDesc;
|
|
800aaf4: 4b02 ldr r3, [pc, #8] ; (800ab00 <USBD_FS_ConfigStrDescriptor+0x34>)
|
|
}
|
|
800aaf6: 4618 mov r0, r3
|
|
800aaf8: 3708 adds r7, #8
|
|
800aafa: 46bd mov sp, r7
|
|
800aafc: bd80 pop {r7, pc}
|
|
800aafe: bf00 nop
|
|
800ab00: 20002040 .word 0x20002040
|
|
800ab04: 0800c7d8 .word 0x0800c7d8
|
|
|
|
0800ab08 <USBD_FS_InterfaceStrDescriptor>:
|
|
* @param speed : Current device speed
|
|
* @param length : Pointer to data length variable
|
|
* @retval Pointer to descriptor buffer
|
|
*/
|
|
uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
|
|
{
|
|
800ab08: b580 push {r7, lr}
|
|
800ab0a: b082 sub sp, #8
|
|
800ab0c: af00 add r7, sp, #0
|
|
800ab0e: 4603 mov r3, r0
|
|
800ab10: 6039 str r1, [r7, #0]
|
|
800ab12: 71fb strb r3, [r7, #7]
|
|
if(speed == 0)
|
|
800ab14: 79fb ldrb r3, [r7, #7]
|
|
800ab16: 2b00 cmp r3, #0
|
|
800ab18: d105 bne.n 800ab26 <USBD_FS_InterfaceStrDescriptor+0x1e>
|
|
{
|
|
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
|
|
800ab1a: 683a ldr r2, [r7, #0]
|
|
800ab1c: 4907 ldr r1, [pc, #28] ; (800ab3c <USBD_FS_InterfaceStrDescriptor+0x34>)
|
|
800ab1e: 4808 ldr r0, [pc, #32] ; (800ab40 <USBD_FS_InterfaceStrDescriptor+0x38>)
|
|
800ab20: f7fc ffad bl 8007a7e <USBD_GetString>
|
|
800ab24: e004 b.n 800ab30 <USBD_FS_InterfaceStrDescriptor+0x28>
|
|
}
|
|
else
|
|
{
|
|
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
|
|
800ab26: 683a ldr r2, [r7, #0]
|
|
800ab28: 4904 ldr r1, [pc, #16] ; (800ab3c <USBD_FS_InterfaceStrDescriptor+0x34>)
|
|
800ab2a: 4805 ldr r0, [pc, #20] ; (800ab40 <USBD_FS_InterfaceStrDescriptor+0x38>)
|
|
800ab2c: f7fc ffa7 bl 8007a7e <USBD_GetString>
|
|
}
|
|
return USBD_StrDesc;
|
|
800ab30: 4b02 ldr r3, [pc, #8] ; (800ab3c <USBD_FS_InterfaceStrDescriptor+0x34>)
|
|
}
|
|
800ab32: 4618 mov r0, r3
|
|
800ab34: 3708 adds r7, #8
|
|
800ab36: 46bd mov sp, r7
|
|
800ab38: bd80 pop {r7, pc}
|
|
800ab3a: bf00 nop
|
|
800ab3c: 20002040 .word 0x20002040
|
|
800ab40: 0800c7e4 .word 0x0800c7e4
|
|
|
|
0800ab44 <Get_SerialNum>:
|
|
* @brief Create the serial number string descriptor
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void Get_SerialNum(void)
|
|
{
|
|
800ab44: b580 push {r7, lr}
|
|
800ab46: b084 sub sp, #16
|
|
800ab48: af00 add r7, sp, #0
|
|
uint32_t deviceserial0, deviceserial1, deviceserial2;
|
|
|
|
deviceserial0 = *(uint32_t *) DEVICE_ID1;
|
|
800ab4a: 4b0f ldr r3, [pc, #60] ; (800ab88 <Get_SerialNum+0x44>)
|
|
800ab4c: 681b ldr r3, [r3, #0]
|
|
800ab4e: 60fb str r3, [r7, #12]
|
|
deviceserial1 = *(uint32_t *) DEVICE_ID2;
|
|
800ab50: 4b0e ldr r3, [pc, #56] ; (800ab8c <Get_SerialNum+0x48>)
|
|
800ab52: 681b ldr r3, [r3, #0]
|
|
800ab54: 60bb str r3, [r7, #8]
|
|
deviceserial2 = *(uint32_t *) DEVICE_ID3;
|
|
800ab56: 4b0e ldr r3, [pc, #56] ; (800ab90 <Get_SerialNum+0x4c>)
|
|
800ab58: 681b ldr r3, [r3, #0]
|
|
800ab5a: 607b str r3, [r7, #4]
|
|
|
|
deviceserial0 += deviceserial2;
|
|
800ab5c: 68fa ldr r2, [r7, #12]
|
|
800ab5e: 687b ldr r3, [r7, #4]
|
|
800ab60: 4413 add r3, r2
|
|
800ab62: 60fb str r3, [r7, #12]
|
|
|
|
if (deviceserial0 != 0)
|
|
800ab64: 68fb ldr r3, [r7, #12]
|
|
800ab66: 2b00 cmp r3, #0
|
|
800ab68: d009 beq.n 800ab7e <Get_SerialNum+0x3a>
|
|
{
|
|
IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
|
|
800ab6a: 2208 movs r2, #8
|
|
800ab6c: 4909 ldr r1, [pc, #36] ; (800ab94 <Get_SerialNum+0x50>)
|
|
800ab6e: 68f8 ldr r0, [r7, #12]
|
|
800ab70: f000 f814 bl 800ab9c <IntToUnicode>
|
|
IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
|
|
800ab74: 2204 movs r2, #4
|
|
800ab76: 4908 ldr r1, [pc, #32] ; (800ab98 <Get_SerialNum+0x54>)
|
|
800ab78: 68b8 ldr r0, [r7, #8]
|
|
800ab7a: f000 f80f bl 800ab9c <IntToUnicode>
|
|
}
|
|
}
|
|
800ab7e: bf00 nop
|
|
800ab80: 3710 adds r7, #16
|
|
800ab82: 46bd mov sp, r7
|
|
800ab84: bd80 pop {r7, pc}
|
|
800ab86: bf00 nop
|
|
800ab88: 1ffff7e8 .word 0x1ffff7e8
|
|
800ab8c: 1ffff7ec .word 0x1ffff7ec
|
|
800ab90: 1ffff7f0 .word 0x1ffff7f0
|
|
800ab94: 2000018a .word 0x2000018a
|
|
800ab98: 2000019a .word 0x2000019a
|
|
|
|
0800ab9c <IntToUnicode>:
|
|
* @param pbuf: pointer to the buffer
|
|
* @param len: buffer length
|
|
* @retval None
|
|
*/
|
|
static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
|
|
{
|
|
800ab9c: b480 push {r7}
|
|
800ab9e: b087 sub sp, #28
|
|
800aba0: af00 add r7, sp, #0
|
|
800aba2: 60f8 str r0, [r7, #12]
|
|
800aba4: 60b9 str r1, [r7, #8]
|
|
800aba6: 4613 mov r3, r2
|
|
800aba8: 71fb strb r3, [r7, #7]
|
|
uint8_t idx = 0;
|
|
800abaa: 2300 movs r3, #0
|
|
800abac: 75fb strb r3, [r7, #23]
|
|
|
|
for (idx = 0; idx < len; idx++)
|
|
800abae: 2300 movs r3, #0
|
|
800abb0: 75fb strb r3, [r7, #23]
|
|
800abb2: e027 b.n 800ac04 <IntToUnicode+0x68>
|
|
{
|
|
if (((value >> 28)) < 0xA)
|
|
800abb4: 68fb ldr r3, [r7, #12]
|
|
800abb6: 0f1b lsrs r3, r3, #28
|
|
800abb8: 2b09 cmp r3, #9
|
|
800abba: d80b bhi.n 800abd4 <IntToUnicode+0x38>
|
|
{
|
|
pbuf[2 * idx] = (value >> 28) + '0';
|
|
800abbc: 68fb ldr r3, [r7, #12]
|
|
800abbe: 0f1b lsrs r3, r3, #28
|
|
800abc0: b2da uxtb r2, r3
|
|
800abc2: 7dfb ldrb r3, [r7, #23]
|
|
800abc4: 005b lsls r3, r3, #1
|
|
800abc6: 4619 mov r1, r3
|
|
800abc8: 68bb ldr r3, [r7, #8]
|
|
800abca: 440b add r3, r1
|
|
800abcc: 3230 adds r2, #48 ; 0x30
|
|
800abce: b2d2 uxtb r2, r2
|
|
800abd0: 701a strb r2, [r3, #0]
|
|
800abd2: e00a b.n 800abea <IntToUnicode+0x4e>
|
|
}
|
|
else
|
|
{
|
|
pbuf[2 * idx] = (value >> 28) + 'A' - 10;
|
|
800abd4: 68fb ldr r3, [r7, #12]
|
|
800abd6: 0f1b lsrs r3, r3, #28
|
|
800abd8: b2da uxtb r2, r3
|
|
800abda: 7dfb ldrb r3, [r7, #23]
|
|
800abdc: 005b lsls r3, r3, #1
|
|
800abde: 4619 mov r1, r3
|
|
800abe0: 68bb ldr r3, [r7, #8]
|
|
800abe2: 440b add r3, r1
|
|
800abe4: 3237 adds r2, #55 ; 0x37
|
|
800abe6: b2d2 uxtb r2, r2
|
|
800abe8: 701a strb r2, [r3, #0]
|
|
}
|
|
|
|
value = value << 4;
|
|
800abea: 68fb ldr r3, [r7, #12]
|
|
800abec: 011b lsls r3, r3, #4
|
|
800abee: 60fb str r3, [r7, #12]
|
|
|
|
pbuf[2 * idx + 1] = 0;
|
|
800abf0: 7dfb ldrb r3, [r7, #23]
|
|
800abf2: 005b lsls r3, r3, #1
|
|
800abf4: 3301 adds r3, #1
|
|
800abf6: 68ba ldr r2, [r7, #8]
|
|
800abf8: 4413 add r3, r2
|
|
800abfa: 2200 movs r2, #0
|
|
800abfc: 701a strb r2, [r3, #0]
|
|
for (idx = 0; idx < len; idx++)
|
|
800abfe: 7dfb ldrb r3, [r7, #23]
|
|
800ac00: 3301 adds r3, #1
|
|
800ac02: 75fb strb r3, [r7, #23]
|
|
800ac04: 7dfa ldrb r2, [r7, #23]
|
|
800ac06: 79fb ldrb r3, [r7, #7]
|
|
800ac08: 429a cmp r2, r3
|
|
800ac0a: d3d3 bcc.n 800abb4 <IntToUnicode+0x18>
|
|
}
|
|
}
|
|
800ac0c: bf00 nop
|
|
800ac0e: 371c adds r7, #28
|
|
800ac10: 46bd mov sp, r7
|
|
800ac12: bc80 pop {r7}
|
|
800ac14: 4770 bx lr
|
|
...
|
|
|
|
0800ac18 <Reset_Handler>:
|
|
.weak Reset_Handler
|
|
.type Reset_Handler, %function
|
|
Reset_Handler:
|
|
|
|
/* Copy the data segment initializers from flash to SRAM */
|
|
movs r1, #0
|
|
800ac18: 2100 movs r1, #0
|
|
b LoopCopyDataInit
|
|
800ac1a: e003 b.n 800ac24 <LoopCopyDataInit>
|
|
|
|
0800ac1c <CopyDataInit>:
|
|
|
|
CopyDataInit:
|
|
ldr r3, =_sidata
|
|
800ac1c: 4b0b ldr r3, [pc, #44] ; (800ac4c <LoopFillZerobss+0x14>)
|
|
ldr r3, [r3, r1]
|
|
800ac1e: 585b ldr r3, [r3, r1]
|
|
str r3, [r0, r1]
|
|
800ac20: 5043 str r3, [r0, r1]
|
|
adds r1, r1, #4
|
|
800ac22: 3104 adds r1, #4
|
|
|
|
0800ac24 <LoopCopyDataInit>:
|
|
|
|
LoopCopyDataInit:
|
|
ldr r0, =_sdata
|
|
800ac24: 480a ldr r0, [pc, #40] ; (800ac50 <LoopFillZerobss+0x18>)
|
|
ldr r3, =_edata
|
|
800ac26: 4b0b ldr r3, [pc, #44] ; (800ac54 <LoopFillZerobss+0x1c>)
|
|
adds r2, r0, r1
|
|
800ac28: 1842 adds r2, r0, r1
|
|
cmp r2, r3
|
|
800ac2a: 429a cmp r2, r3
|
|
bcc CopyDataInit
|
|
800ac2c: d3f6 bcc.n 800ac1c <CopyDataInit>
|
|
ldr r2, =_sbss
|
|
800ac2e: 4a0a ldr r2, [pc, #40] ; (800ac58 <LoopFillZerobss+0x20>)
|
|
b LoopFillZerobss
|
|
800ac30: e002 b.n 800ac38 <LoopFillZerobss>
|
|
|
|
0800ac32 <FillZerobss>:
|
|
/* Zero fill the bss segment. */
|
|
FillZerobss:
|
|
movs r3, #0
|
|
800ac32: 2300 movs r3, #0
|
|
str r3, [r2], #4
|
|
800ac34: f842 3b04 str.w r3, [r2], #4
|
|
|
|
0800ac38 <LoopFillZerobss>:
|
|
|
|
LoopFillZerobss:
|
|
ldr r3, = _ebss
|
|
800ac38: 4b08 ldr r3, [pc, #32] ; (800ac5c <LoopFillZerobss+0x24>)
|
|
cmp r2, r3
|
|
800ac3a: 429a cmp r2, r3
|
|
bcc FillZerobss
|
|
800ac3c: d3f9 bcc.n 800ac32 <FillZerobss>
|
|
|
|
/* Call the clock system intitialization function.*/
|
|
bl SystemInit
|
|
800ac3e: f7ff fb4d bl 800a2dc <SystemInit>
|
|
/* Call static constructors */
|
|
bl __libc_init_array
|
|
800ac42: f000 f815 bl 800ac70 <__libc_init_array>
|
|
/* Call the application's entry point.*/
|
|
bl main
|
|
800ac46: f7fe f915 bl 8008e74 <main>
|
|
bx lr
|
|
800ac4a: 4770 bx lr
|
|
ldr r3, =_sidata
|
|
800ac4c: 0800f238 .word 0x0800f238
|
|
ldr r0, =_sdata
|
|
800ac50: 20000000 .word 0x20000000
|
|
ldr r3, =_edata
|
|
800ac54: 20000208 .word 0x20000208
|
|
ldr r2, =_sbss
|
|
800ac58: 20000208 .word 0x20000208
|
|
ldr r3, = _ebss
|
|
800ac5c: 20002244 .word 0x20002244
|
|
|
|
0800ac60 <ADC1_2_IRQHandler>:
|
|
* @retval : None
|
|
*/
|
|
.section .text.Default_Handler,"ax",%progbits
|
|
Default_Handler:
|
|
Infinite_Loop:
|
|
b Infinite_Loop
|
|
800ac60: e7fe b.n 800ac60 <ADC1_2_IRQHandler>
|
|
...
|
|
|
|
0800ac64 <__errno>:
|
|
800ac64: 4b01 ldr r3, [pc, #4] ; (800ac6c <__errno+0x8>)
|
|
800ac66: 6818 ldr r0, [r3, #0]
|
|
800ac68: 4770 bx lr
|
|
800ac6a: bf00 nop
|
|
800ac6c: 200001a4 .word 0x200001a4
|
|
|
|
0800ac70 <__libc_init_array>:
|
|
800ac70: b570 push {r4, r5, r6, lr}
|
|
800ac72: 2500 movs r5, #0
|
|
800ac74: 4e0c ldr r6, [pc, #48] ; (800aca8 <__libc_init_array+0x38>)
|
|
800ac76: 4c0d ldr r4, [pc, #52] ; (800acac <__libc_init_array+0x3c>)
|
|
800ac78: 1ba4 subs r4, r4, r6
|
|
800ac7a: 10a4 asrs r4, r4, #2
|
|
800ac7c: 42a5 cmp r5, r4
|
|
800ac7e: d109 bne.n 800ac94 <__libc_init_array+0x24>
|
|
800ac80: f001 fcd2 bl 800c628 <_init>
|
|
800ac84: 2500 movs r5, #0
|
|
800ac86: 4e0a ldr r6, [pc, #40] ; (800acb0 <__libc_init_array+0x40>)
|
|
800ac88: 4c0a ldr r4, [pc, #40] ; (800acb4 <__libc_init_array+0x44>)
|
|
800ac8a: 1ba4 subs r4, r4, r6
|
|
800ac8c: 10a4 asrs r4, r4, #2
|
|
800ac8e: 42a5 cmp r5, r4
|
|
800ac90: d105 bne.n 800ac9e <__libc_init_array+0x2e>
|
|
800ac92: bd70 pop {r4, r5, r6, pc}
|
|
800ac94: f856 3025 ldr.w r3, [r6, r5, lsl #2]
|
|
800ac98: 4798 blx r3
|
|
800ac9a: 3501 adds r5, #1
|
|
800ac9c: e7ee b.n 800ac7c <__libc_init_array+0xc>
|
|
800ac9e: f856 3025 ldr.w r3, [r6, r5, lsl #2]
|
|
800aca2: 4798 blx r3
|
|
800aca4: 3501 adds r5, #1
|
|
800aca6: e7f2 b.n 800ac8e <__libc_init_array+0x1e>
|
|
800aca8: 0800f230 .word 0x0800f230
|
|
800acac: 0800f230 .word 0x0800f230
|
|
800acb0: 0800f230 .word 0x0800f230
|
|
800acb4: 0800f234 .word 0x0800f234
|
|
|
|
0800acb8 <memcpy>:
|
|
800acb8: b510 push {r4, lr}
|
|
800acba: 1e43 subs r3, r0, #1
|
|
800acbc: 440a add r2, r1
|
|
800acbe: 4291 cmp r1, r2
|
|
800acc0: d100 bne.n 800acc4 <memcpy+0xc>
|
|
800acc2: bd10 pop {r4, pc}
|
|
800acc4: f811 4b01 ldrb.w r4, [r1], #1
|
|
800acc8: f803 4f01 strb.w r4, [r3, #1]!
|
|
800accc: e7f7 b.n 800acbe <memcpy+0x6>
|
|
|
|
0800acce <memset>:
|
|
800acce: 4603 mov r3, r0
|
|
800acd0: 4402 add r2, r0
|
|
800acd2: 4293 cmp r3, r2
|
|
800acd4: d100 bne.n 800acd8 <memset+0xa>
|
|
800acd6: 4770 bx lr
|
|
800acd8: f803 1b01 strb.w r1, [r3], #1
|
|
800acdc: e7f9 b.n 800acd2 <memset+0x4>
|
|
...
|
|
|
|
0800ace0 <sniprintf>:
|
|
800ace0: b40c push {r2, r3}
|
|
800ace2: b530 push {r4, r5, lr}
|
|
800ace4: 4b17 ldr r3, [pc, #92] ; (800ad44 <sniprintf+0x64>)
|
|
800ace6: 1e0c subs r4, r1, #0
|
|
800ace8: b09d sub sp, #116 ; 0x74
|
|
800acea: 681d ldr r5, [r3, #0]
|
|
800acec: da08 bge.n 800ad00 <sniprintf+0x20>
|
|
800acee: 238b movs r3, #139 ; 0x8b
|
|
800acf0: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
|
800acf4: 602b str r3, [r5, #0]
|
|
800acf6: b01d add sp, #116 ; 0x74
|
|
800acf8: e8bd 4030 ldmia.w sp!, {r4, r5, lr}
|
|
800acfc: b002 add sp, #8
|
|
800acfe: 4770 bx lr
|
|
800ad00: f44f 7302 mov.w r3, #520 ; 0x208
|
|
800ad04: f8ad 3014 strh.w r3, [sp, #20]
|
|
800ad08: bf0c ite eq
|
|
800ad0a: 4623 moveq r3, r4
|
|
800ad0c: f104 33ff addne.w r3, r4, #4294967295 ; 0xffffffff
|
|
800ad10: 9304 str r3, [sp, #16]
|
|
800ad12: 9307 str r3, [sp, #28]
|
|
800ad14: f64f 73ff movw r3, #65535 ; 0xffff
|
|
800ad18: 9002 str r0, [sp, #8]
|
|
800ad1a: 9006 str r0, [sp, #24]
|
|
800ad1c: f8ad 3016 strh.w r3, [sp, #22]
|
|
800ad20: 9a20 ldr r2, [sp, #128] ; 0x80
|
|
800ad22: ab21 add r3, sp, #132 ; 0x84
|
|
800ad24: a902 add r1, sp, #8
|
|
800ad26: 4628 mov r0, r5
|
|
800ad28: 9301 str r3, [sp, #4]
|
|
800ad2a: f000 f887 bl 800ae3c <_svfiprintf_r>
|
|
800ad2e: 1c43 adds r3, r0, #1
|
|
800ad30: bfbc itt lt
|
|
800ad32: 238b movlt r3, #139 ; 0x8b
|
|
800ad34: 602b strlt r3, [r5, #0]
|
|
800ad36: 2c00 cmp r4, #0
|
|
800ad38: d0dd beq.n 800acf6 <sniprintf+0x16>
|
|
800ad3a: 2200 movs r2, #0
|
|
800ad3c: 9b02 ldr r3, [sp, #8]
|
|
800ad3e: 701a strb r2, [r3, #0]
|
|
800ad40: e7d9 b.n 800acf6 <sniprintf+0x16>
|
|
800ad42: bf00 nop
|
|
800ad44: 200001a4 .word 0x200001a4
|
|
|
|
0800ad48 <siprintf>:
|
|
800ad48: b40e push {r1, r2, r3}
|
|
800ad4a: f06f 4100 mvn.w r1, #2147483648 ; 0x80000000
|
|
800ad4e: b500 push {lr}
|
|
800ad50: b09c sub sp, #112 ; 0x70
|
|
800ad52: ab1d add r3, sp, #116 ; 0x74
|
|
800ad54: 9002 str r0, [sp, #8]
|
|
800ad56: 9006 str r0, [sp, #24]
|
|
800ad58: 9107 str r1, [sp, #28]
|
|
800ad5a: 9104 str r1, [sp, #16]
|
|
800ad5c: 4808 ldr r0, [pc, #32] ; (800ad80 <siprintf+0x38>)
|
|
800ad5e: 4909 ldr r1, [pc, #36] ; (800ad84 <siprintf+0x3c>)
|
|
800ad60: f853 2b04 ldr.w r2, [r3], #4
|
|
800ad64: 9105 str r1, [sp, #20]
|
|
800ad66: 6800 ldr r0, [r0, #0]
|
|
800ad68: a902 add r1, sp, #8
|
|
800ad6a: 9301 str r3, [sp, #4]
|
|
800ad6c: f000 f866 bl 800ae3c <_svfiprintf_r>
|
|
800ad70: 2200 movs r2, #0
|
|
800ad72: 9b02 ldr r3, [sp, #8]
|
|
800ad74: 701a strb r2, [r3, #0]
|
|
800ad76: b01c add sp, #112 ; 0x70
|
|
800ad78: f85d eb04 ldr.w lr, [sp], #4
|
|
800ad7c: b003 add sp, #12
|
|
800ad7e: 4770 bx lr
|
|
800ad80: 200001a4 .word 0x200001a4
|
|
800ad84: ffff0208 .word 0xffff0208
|
|
|
|
0800ad88 <__ssputs_r>:
|
|
800ad88: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
|
800ad8c: 688e ldr r6, [r1, #8]
|
|
800ad8e: 4682 mov sl, r0
|
|
800ad90: 429e cmp r6, r3
|
|
800ad92: 460c mov r4, r1
|
|
800ad94: 4690 mov r8, r2
|
|
800ad96: 4699 mov r9, r3
|
|
800ad98: d837 bhi.n 800ae0a <__ssputs_r+0x82>
|
|
800ad9a: 898a ldrh r2, [r1, #12]
|
|
800ad9c: f412 6f90 tst.w r2, #1152 ; 0x480
|
|
800ada0: d031 beq.n 800ae06 <__ssputs_r+0x7e>
|
|
800ada2: 2302 movs r3, #2
|
|
800ada4: 6825 ldr r5, [r4, #0]
|
|
800ada6: 6909 ldr r1, [r1, #16]
|
|
800ada8: 1a6f subs r7, r5, r1
|
|
800adaa: 6965 ldr r5, [r4, #20]
|
|
800adac: eb05 0545 add.w r5, r5, r5, lsl #1
|
|
800adb0: fb95 f5f3 sdiv r5, r5, r3
|
|
800adb4: f109 0301 add.w r3, r9, #1
|
|
800adb8: 443b add r3, r7
|
|
800adba: 429d cmp r5, r3
|
|
800adbc: bf38 it cc
|
|
800adbe: 461d movcc r5, r3
|
|
800adc0: 0553 lsls r3, r2, #21
|
|
800adc2: d530 bpl.n 800ae26 <__ssputs_r+0x9e>
|
|
800adc4: 4629 mov r1, r5
|
|
800adc6: f000 fb2d bl 800b424 <_malloc_r>
|
|
800adca: 4606 mov r6, r0
|
|
800adcc: b950 cbnz r0, 800ade4 <__ssputs_r+0x5c>
|
|
800adce: 230c movs r3, #12
|
|
800add0: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
|
800add4: f8ca 3000 str.w r3, [sl]
|
|
800add8: 89a3 ldrh r3, [r4, #12]
|
|
800adda: f043 0340 orr.w r3, r3, #64 ; 0x40
|
|
800adde: 81a3 strh r3, [r4, #12]
|
|
800ade0: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
|
800ade4: 463a mov r2, r7
|
|
800ade6: 6921 ldr r1, [r4, #16]
|
|
800ade8: f7ff ff66 bl 800acb8 <memcpy>
|
|
800adec: 89a3 ldrh r3, [r4, #12]
|
|
800adee: f423 6390 bic.w r3, r3, #1152 ; 0x480
|
|
800adf2: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
800adf6: 81a3 strh r3, [r4, #12]
|
|
800adf8: 6126 str r6, [r4, #16]
|
|
800adfa: 443e add r6, r7
|
|
800adfc: 6026 str r6, [r4, #0]
|
|
800adfe: 464e mov r6, r9
|
|
800ae00: 6165 str r5, [r4, #20]
|
|
800ae02: 1bed subs r5, r5, r7
|
|
800ae04: 60a5 str r5, [r4, #8]
|
|
800ae06: 454e cmp r6, r9
|
|
800ae08: d900 bls.n 800ae0c <__ssputs_r+0x84>
|
|
800ae0a: 464e mov r6, r9
|
|
800ae0c: 4632 mov r2, r6
|
|
800ae0e: 4641 mov r1, r8
|
|
800ae10: 6820 ldr r0, [r4, #0]
|
|
800ae12: f000 faa1 bl 800b358 <memmove>
|
|
800ae16: 68a3 ldr r3, [r4, #8]
|
|
800ae18: 2000 movs r0, #0
|
|
800ae1a: 1b9b subs r3, r3, r6
|
|
800ae1c: 60a3 str r3, [r4, #8]
|
|
800ae1e: 6823 ldr r3, [r4, #0]
|
|
800ae20: 441e add r6, r3
|
|
800ae22: 6026 str r6, [r4, #0]
|
|
800ae24: e7dc b.n 800ade0 <__ssputs_r+0x58>
|
|
800ae26: 462a mov r2, r5
|
|
800ae28: f000 fb56 bl 800b4d8 <_realloc_r>
|
|
800ae2c: 4606 mov r6, r0
|
|
800ae2e: 2800 cmp r0, #0
|
|
800ae30: d1e2 bne.n 800adf8 <__ssputs_r+0x70>
|
|
800ae32: 6921 ldr r1, [r4, #16]
|
|
800ae34: 4650 mov r0, sl
|
|
800ae36: f000 faa9 bl 800b38c <_free_r>
|
|
800ae3a: e7c8 b.n 800adce <__ssputs_r+0x46>
|
|
|
|
0800ae3c <_svfiprintf_r>:
|
|
800ae3c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
|
800ae40: 461d mov r5, r3
|
|
800ae42: 898b ldrh r3, [r1, #12]
|
|
800ae44: b09d sub sp, #116 ; 0x74
|
|
800ae46: 061f lsls r7, r3, #24
|
|
800ae48: 4680 mov r8, r0
|
|
800ae4a: 460c mov r4, r1
|
|
800ae4c: 4616 mov r6, r2
|
|
800ae4e: d50f bpl.n 800ae70 <_svfiprintf_r+0x34>
|
|
800ae50: 690b ldr r3, [r1, #16]
|
|
800ae52: b96b cbnz r3, 800ae70 <_svfiprintf_r+0x34>
|
|
800ae54: 2140 movs r1, #64 ; 0x40
|
|
800ae56: f000 fae5 bl 800b424 <_malloc_r>
|
|
800ae5a: 6020 str r0, [r4, #0]
|
|
800ae5c: 6120 str r0, [r4, #16]
|
|
800ae5e: b928 cbnz r0, 800ae6c <_svfiprintf_r+0x30>
|
|
800ae60: 230c movs r3, #12
|
|
800ae62: f8c8 3000 str.w r3, [r8]
|
|
800ae66: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
|
800ae6a: e0c8 b.n 800affe <_svfiprintf_r+0x1c2>
|
|
800ae6c: 2340 movs r3, #64 ; 0x40
|
|
800ae6e: 6163 str r3, [r4, #20]
|
|
800ae70: 2300 movs r3, #0
|
|
800ae72: 9309 str r3, [sp, #36] ; 0x24
|
|
800ae74: 2320 movs r3, #32
|
|
800ae76: f88d 3029 strb.w r3, [sp, #41] ; 0x29
|
|
800ae7a: 2330 movs r3, #48 ; 0x30
|
|
800ae7c: f04f 0b01 mov.w fp, #1
|
|
800ae80: f88d 302a strb.w r3, [sp, #42] ; 0x2a
|
|
800ae84: 9503 str r5, [sp, #12]
|
|
800ae86: 4637 mov r7, r6
|
|
800ae88: 463d mov r5, r7
|
|
800ae8a: f815 3b01 ldrb.w r3, [r5], #1
|
|
800ae8e: b10b cbz r3, 800ae94 <_svfiprintf_r+0x58>
|
|
800ae90: 2b25 cmp r3, #37 ; 0x25
|
|
800ae92: d13e bne.n 800af12 <_svfiprintf_r+0xd6>
|
|
800ae94: ebb7 0a06 subs.w sl, r7, r6
|
|
800ae98: d00b beq.n 800aeb2 <_svfiprintf_r+0x76>
|
|
800ae9a: 4653 mov r3, sl
|
|
800ae9c: 4632 mov r2, r6
|
|
800ae9e: 4621 mov r1, r4
|
|
800aea0: 4640 mov r0, r8
|
|
800aea2: f7ff ff71 bl 800ad88 <__ssputs_r>
|
|
800aea6: 3001 adds r0, #1
|
|
800aea8: f000 80a4 beq.w 800aff4 <_svfiprintf_r+0x1b8>
|
|
800aeac: 9b09 ldr r3, [sp, #36] ; 0x24
|
|
800aeae: 4453 add r3, sl
|
|
800aeb0: 9309 str r3, [sp, #36] ; 0x24
|
|
800aeb2: 783b ldrb r3, [r7, #0]
|
|
800aeb4: 2b00 cmp r3, #0
|
|
800aeb6: f000 809d beq.w 800aff4 <_svfiprintf_r+0x1b8>
|
|
800aeba: 2300 movs r3, #0
|
|
800aebc: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
|
800aec0: e9cd 2305 strd r2, r3, [sp, #20]
|
|
800aec4: 9304 str r3, [sp, #16]
|
|
800aec6: 9307 str r3, [sp, #28]
|
|
800aec8: f88d 3053 strb.w r3, [sp, #83] ; 0x53
|
|
800aecc: 931a str r3, [sp, #104] ; 0x68
|
|
800aece: 462f mov r7, r5
|
|
800aed0: 2205 movs r2, #5
|
|
800aed2: f817 1b01 ldrb.w r1, [r7], #1
|
|
800aed6: 4850 ldr r0, [pc, #320] ; (800b018 <_svfiprintf_r+0x1dc>)
|
|
800aed8: f000 fa30 bl 800b33c <memchr>
|
|
800aedc: 9b04 ldr r3, [sp, #16]
|
|
800aede: b9d0 cbnz r0, 800af16 <_svfiprintf_r+0xda>
|
|
800aee0: 06d9 lsls r1, r3, #27
|
|
800aee2: bf44 itt mi
|
|
800aee4: 2220 movmi r2, #32
|
|
800aee6: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53
|
|
800aeea: 071a lsls r2, r3, #28
|
|
800aeec: bf44 itt mi
|
|
800aeee: 222b movmi r2, #43 ; 0x2b
|
|
800aef0: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53
|
|
800aef4: 782a ldrb r2, [r5, #0]
|
|
800aef6: 2a2a cmp r2, #42 ; 0x2a
|
|
800aef8: d015 beq.n 800af26 <_svfiprintf_r+0xea>
|
|
800aefa: 462f mov r7, r5
|
|
800aefc: 2000 movs r0, #0
|
|
800aefe: 250a movs r5, #10
|
|
800af00: 9a07 ldr r2, [sp, #28]
|
|
800af02: 4639 mov r1, r7
|
|
800af04: f811 3b01 ldrb.w r3, [r1], #1
|
|
800af08: 3b30 subs r3, #48 ; 0x30
|
|
800af0a: 2b09 cmp r3, #9
|
|
800af0c: d94d bls.n 800afaa <_svfiprintf_r+0x16e>
|
|
800af0e: b1b8 cbz r0, 800af40 <_svfiprintf_r+0x104>
|
|
800af10: e00f b.n 800af32 <_svfiprintf_r+0xf6>
|
|
800af12: 462f mov r7, r5
|
|
800af14: e7b8 b.n 800ae88 <_svfiprintf_r+0x4c>
|
|
800af16: 4a40 ldr r2, [pc, #256] ; (800b018 <_svfiprintf_r+0x1dc>)
|
|
800af18: 463d mov r5, r7
|
|
800af1a: 1a80 subs r0, r0, r2
|
|
800af1c: fa0b f000 lsl.w r0, fp, r0
|
|
800af20: 4318 orrs r0, r3
|
|
800af22: 9004 str r0, [sp, #16]
|
|
800af24: e7d3 b.n 800aece <_svfiprintf_r+0x92>
|
|
800af26: 9a03 ldr r2, [sp, #12]
|
|
800af28: 1d11 adds r1, r2, #4
|
|
800af2a: 6812 ldr r2, [r2, #0]
|
|
800af2c: 9103 str r1, [sp, #12]
|
|
800af2e: 2a00 cmp r2, #0
|
|
800af30: db01 blt.n 800af36 <_svfiprintf_r+0xfa>
|
|
800af32: 9207 str r2, [sp, #28]
|
|
800af34: e004 b.n 800af40 <_svfiprintf_r+0x104>
|
|
800af36: 4252 negs r2, r2
|
|
800af38: f043 0302 orr.w r3, r3, #2
|
|
800af3c: 9207 str r2, [sp, #28]
|
|
800af3e: 9304 str r3, [sp, #16]
|
|
800af40: 783b ldrb r3, [r7, #0]
|
|
800af42: 2b2e cmp r3, #46 ; 0x2e
|
|
800af44: d10c bne.n 800af60 <_svfiprintf_r+0x124>
|
|
800af46: 787b ldrb r3, [r7, #1]
|
|
800af48: 2b2a cmp r3, #42 ; 0x2a
|
|
800af4a: d133 bne.n 800afb4 <_svfiprintf_r+0x178>
|
|
800af4c: 9b03 ldr r3, [sp, #12]
|
|
800af4e: 3702 adds r7, #2
|
|
800af50: 1d1a adds r2, r3, #4
|
|
800af52: 681b ldr r3, [r3, #0]
|
|
800af54: 9203 str r2, [sp, #12]
|
|
800af56: 2b00 cmp r3, #0
|
|
800af58: bfb8 it lt
|
|
800af5a: f04f 33ff movlt.w r3, #4294967295 ; 0xffffffff
|
|
800af5e: 9305 str r3, [sp, #20]
|
|
800af60: 4d2e ldr r5, [pc, #184] ; (800b01c <_svfiprintf_r+0x1e0>)
|
|
800af62: 2203 movs r2, #3
|
|
800af64: 7839 ldrb r1, [r7, #0]
|
|
800af66: 4628 mov r0, r5
|
|
800af68: f000 f9e8 bl 800b33c <memchr>
|
|
800af6c: b138 cbz r0, 800af7e <_svfiprintf_r+0x142>
|
|
800af6e: 2340 movs r3, #64 ; 0x40
|
|
800af70: 1b40 subs r0, r0, r5
|
|
800af72: fa03 f000 lsl.w r0, r3, r0
|
|
800af76: 9b04 ldr r3, [sp, #16]
|
|
800af78: 3701 adds r7, #1
|
|
800af7a: 4303 orrs r3, r0
|
|
800af7c: 9304 str r3, [sp, #16]
|
|
800af7e: 7839 ldrb r1, [r7, #0]
|
|
800af80: 2206 movs r2, #6
|
|
800af82: 4827 ldr r0, [pc, #156] ; (800b020 <_svfiprintf_r+0x1e4>)
|
|
800af84: 1c7e adds r6, r7, #1
|
|
800af86: f88d 1028 strb.w r1, [sp, #40] ; 0x28
|
|
800af8a: f000 f9d7 bl 800b33c <memchr>
|
|
800af8e: 2800 cmp r0, #0
|
|
800af90: d038 beq.n 800b004 <_svfiprintf_r+0x1c8>
|
|
800af92: 4b24 ldr r3, [pc, #144] ; (800b024 <_svfiprintf_r+0x1e8>)
|
|
800af94: bb13 cbnz r3, 800afdc <_svfiprintf_r+0x1a0>
|
|
800af96: 9b03 ldr r3, [sp, #12]
|
|
800af98: 3307 adds r3, #7
|
|
800af9a: f023 0307 bic.w r3, r3, #7
|
|
800af9e: 3308 adds r3, #8
|
|
800afa0: 9303 str r3, [sp, #12]
|
|
800afa2: 9b09 ldr r3, [sp, #36] ; 0x24
|
|
800afa4: 444b add r3, r9
|
|
800afa6: 9309 str r3, [sp, #36] ; 0x24
|
|
800afa8: e76d b.n 800ae86 <_svfiprintf_r+0x4a>
|
|
800afaa: fb05 3202 mla r2, r5, r2, r3
|
|
800afae: 2001 movs r0, #1
|
|
800afb0: 460f mov r7, r1
|
|
800afb2: e7a6 b.n 800af02 <_svfiprintf_r+0xc6>
|
|
800afb4: 2300 movs r3, #0
|
|
800afb6: 250a movs r5, #10
|
|
800afb8: 4619 mov r1, r3
|
|
800afba: 3701 adds r7, #1
|
|
800afbc: 9305 str r3, [sp, #20]
|
|
800afbe: 4638 mov r0, r7
|
|
800afc0: f810 2b01 ldrb.w r2, [r0], #1
|
|
800afc4: 3a30 subs r2, #48 ; 0x30
|
|
800afc6: 2a09 cmp r2, #9
|
|
800afc8: d903 bls.n 800afd2 <_svfiprintf_r+0x196>
|
|
800afca: 2b00 cmp r3, #0
|
|
800afcc: d0c8 beq.n 800af60 <_svfiprintf_r+0x124>
|
|
800afce: 9105 str r1, [sp, #20]
|
|
800afd0: e7c6 b.n 800af60 <_svfiprintf_r+0x124>
|
|
800afd2: fb05 2101 mla r1, r5, r1, r2
|
|
800afd6: 2301 movs r3, #1
|
|
800afd8: 4607 mov r7, r0
|
|
800afda: e7f0 b.n 800afbe <_svfiprintf_r+0x182>
|
|
800afdc: ab03 add r3, sp, #12
|
|
800afde: 9300 str r3, [sp, #0]
|
|
800afe0: 4622 mov r2, r4
|
|
800afe2: 4b11 ldr r3, [pc, #68] ; (800b028 <_svfiprintf_r+0x1ec>)
|
|
800afe4: a904 add r1, sp, #16
|
|
800afe6: 4640 mov r0, r8
|
|
800afe8: f3af 8000 nop.w
|
|
800afec: f1b0 3fff cmp.w r0, #4294967295 ; 0xffffffff
|
|
800aff0: 4681 mov r9, r0
|
|
800aff2: d1d6 bne.n 800afa2 <_svfiprintf_r+0x166>
|
|
800aff4: 89a3 ldrh r3, [r4, #12]
|
|
800aff6: 065b lsls r3, r3, #25
|
|
800aff8: f53f af35 bmi.w 800ae66 <_svfiprintf_r+0x2a>
|
|
800affc: 9809 ldr r0, [sp, #36] ; 0x24
|
|
800affe: b01d add sp, #116 ; 0x74
|
|
800b000: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
|
800b004: ab03 add r3, sp, #12
|
|
800b006: 9300 str r3, [sp, #0]
|
|
800b008: 4622 mov r2, r4
|
|
800b00a: 4b07 ldr r3, [pc, #28] ; (800b028 <_svfiprintf_r+0x1ec>)
|
|
800b00c: a904 add r1, sp, #16
|
|
800b00e: 4640 mov r0, r8
|
|
800b010: f000 f882 bl 800b118 <_printf_i>
|
|
800b014: e7ea b.n 800afec <_svfiprintf_r+0x1b0>
|
|
800b016: bf00 nop
|
|
800b018: 0800f020 .word 0x0800f020
|
|
800b01c: 0800f026 .word 0x0800f026
|
|
800b020: 0800f02a .word 0x0800f02a
|
|
800b024: 00000000 .word 0x00000000
|
|
800b028: 0800ad89 .word 0x0800ad89
|
|
|
|
0800b02c <_printf_common>:
|
|
800b02c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
|
800b030: 4691 mov r9, r2
|
|
800b032: 461f mov r7, r3
|
|
800b034: 688a ldr r2, [r1, #8]
|
|
800b036: 690b ldr r3, [r1, #16]
|
|
800b038: 4606 mov r6, r0
|
|
800b03a: 4293 cmp r3, r2
|
|
800b03c: bfb8 it lt
|
|
800b03e: 4613 movlt r3, r2
|
|
800b040: f8c9 3000 str.w r3, [r9]
|
|
800b044: f891 2043 ldrb.w r2, [r1, #67] ; 0x43
|
|
800b048: 460c mov r4, r1
|
|
800b04a: f8dd 8020 ldr.w r8, [sp, #32]
|
|
800b04e: b112 cbz r2, 800b056 <_printf_common+0x2a>
|
|
800b050: 3301 adds r3, #1
|
|
800b052: f8c9 3000 str.w r3, [r9]
|
|
800b056: 6823 ldr r3, [r4, #0]
|
|
800b058: 0699 lsls r1, r3, #26
|
|
800b05a: bf42 ittt mi
|
|
800b05c: f8d9 3000 ldrmi.w r3, [r9]
|
|
800b060: 3302 addmi r3, #2
|
|
800b062: f8c9 3000 strmi.w r3, [r9]
|
|
800b066: 6825 ldr r5, [r4, #0]
|
|
800b068: f015 0506 ands.w r5, r5, #6
|
|
800b06c: d107 bne.n 800b07e <_printf_common+0x52>
|
|
800b06e: f104 0a19 add.w sl, r4, #25
|
|
800b072: 68e3 ldr r3, [r4, #12]
|
|
800b074: f8d9 2000 ldr.w r2, [r9]
|
|
800b078: 1a9b subs r3, r3, r2
|
|
800b07a: 42ab cmp r3, r5
|
|
800b07c: dc29 bgt.n 800b0d2 <_printf_common+0xa6>
|
|
800b07e: f894 3043 ldrb.w r3, [r4, #67] ; 0x43
|
|
800b082: 6822 ldr r2, [r4, #0]
|
|
800b084: 3300 adds r3, #0
|
|
800b086: bf18 it ne
|
|
800b088: 2301 movne r3, #1
|
|
800b08a: 0692 lsls r2, r2, #26
|
|
800b08c: d42e bmi.n 800b0ec <_printf_common+0xc0>
|
|
800b08e: f104 0243 add.w r2, r4, #67 ; 0x43
|
|
800b092: 4639 mov r1, r7
|
|
800b094: 4630 mov r0, r6
|
|
800b096: 47c0 blx r8
|
|
800b098: 3001 adds r0, #1
|
|
800b09a: d021 beq.n 800b0e0 <_printf_common+0xb4>
|
|
800b09c: 6823 ldr r3, [r4, #0]
|
|
800b09e: 68e5 ldr r5, [r4, #12]
|
|
800b0a0: f003 0306 and.w r3, r3, #6
|
|
800b0a4: 2b04 cmp r3, #4
|
|
800b0a6: bf18 it ne
|
|
800b0a8: 2500 movne r5, #0
|
|
800b0aa: f8d9 2000 ldr.w r2, [r9]
|
|
800b0ae: f04f 0900 mov.w r9, #0
|
|
800b0b2: bf08 it eq
|
|
800b0b4: 1aad subeq r5, r5, r2
|
|
800b0b6: 68a3 ldr r3, [r4, #8]
|
|
800b0b8: 6922 ldr r2, [r4, #16]
|
|
800b0ba: bf08 it eq
|
|
800b0bc: ea25 75e5 biceq.w r5, r5, r5, asr #31
|
|
800b0c0: 4293 cmp r3, r2
|
|
800b0c2: bfc4 itt gt
|
|
800b0c4: 1a9b subgt r3, r3, r2
|
|
800b0c6: 18ed addgt r5, r5, r3
|
|
800b0c8: 341a adds r4, #26
|
|
800b0ca: 454d cmp r5, r9
|
|
800b0cc: d11a bne.n 800b104 <_printf_common+0xd8>
|
|
800b0ce: 2000 movs r0, #0
|
|
800b0d0: e008 b.n 800b0e4 <_printf_common+0xb8>
|
|
800b0d2: 2301 movs r3, #1
|
|
800b0d4: 4652 mov r2, sl
|
|
800b0d6: 4639 mov r1, r7
|
|
800b0d8: 4630 mov r0, r6
|
|
800b0da: 47c0 blx r8
|
|
800b0dc: 3001 adds r0, #1
|
|
800b0de: d103 bne.n 800b0e8 <_printf_common+0xbc>
|
|
800b0e0: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
|
800b0e4: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
|
800b0e8: 3501 adds r5, #1
|
|
800b0ea: e7c2 b.n 800b072 <_printf_common+0x46>
|
|
800b0ec: 2030 movs r0, #48 ; 0x30
|
|
800b0ee: 18e1 adds r1, r4, r3
|
|
800b0f0: f881 0043 strb.w r0, [r1, #67] ; 0x43
|
|
800b0f4: 1c5a adds r2, r3, #1
|
|
800b0f6: f894 1045 ldrb.w r1, [r4, #69] ; 0x45
|
|
800b0fa: 4422 add r2, r4
|
|
800b0fc: 3302 adds r3, #2
|
|
800b0fe: f882 1043 strb.w r1, [r2, #67] ; 0x43
|
|
800b102: e7c4 b.n 800b08e <_printf_common+0x62>
|
|
800b104: 2301 movs r3, #1
|
|
800b106: 4622 mov r2, r4
|
|
800b108: 4639 mov r1, r7
|
|
800b10a: 4630 mov r0, r6
|
|
800b10c: 47c0 blx r8
|
|
800b10e: 3001 adds r0, #1
|
|
800b110: d0e6 beq.n 800b0e0 <_printf_common+0xb4>
|
|
800b112: f109 0901 add.w r9, r9, #1
|
|
800b116: e7d8 b.n 800b0ca <_printf_common+0x9e>
|
|
|
|
0800b118 <_printf_i>:
|
|
800b118: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
|
|
800b11c: f101 0c43 add.w ip, r1, #67 ; 0x43
|
|
800b120: 460c mov r4, r1
|
|
800b122: 7e09 ldrb r1, [r1, #24]
|
|
800b124: b085 sub sp, #20
|
|
800b126: 296e cmp r1, #110 ; 0x6e
|
|
800b128: 4617 mov r7, r2
|
|
800b12a: 4606 mov r6, r0
|
|
800b12c: 4698 mov r8, r3
|
|
800b12e: 9a0c ldr r2, [sp, #48] ; 0x30
|
|
800b130: f000 80b3 beq.w 800b29a <_printf_i+0x182>
|
|
800b134: d822 bhi.n 800b17c <_printf_i+0x64>
|
|
800b136: 2963 cmp r1, #99 ; 0x63
|
|
800b138: d036 beq.n 800b1a8 <_printf_i+0x90>
|
|
800b13a: d80a bhi.n 800b152 <_printf_i+0x3a>
|
|
800b13c: 2900 cmp r1, #0
|
|
800b13e: f000 80b9 beq.w 800b2b4 <_printf_i+0x19c>
|
|
800b142: 2958 cmp r1, #88 ; 0x58
|
|
800b144: f000 8083 beq.w 800b24e <_printf_i+0x136>
|
|
800b148: f104 0542 add.w r5, r4, #66 ; 0x42
|
|
800b14c: f884 1042 strb.w r1, [r4, #66] ; 0x42
|
|
800b150: e032 b.n 800b1b8 <_printf_i+0xa0>
|
|
800b152: 2964 cmp r1, #100 ; 0x64
|
|
800b154: d001 beq.n 800b15a <_printf_i+0x42>
|
|
800b156: 2969 cmp r1, #105 ; 0x69
|
|
800b158: d1f6 bne.n 800b148 <_printf_i+0x30>
|
|
800b15a: 6820 ldr r0, [r4, #0]
|
|
800b15c: 6813 ldr r3, [r2, #0]
|
|
800b15e: 0605 lsls r5, r0, #24
|
|
800b160: f103 0104 add.w r1, r3, #4
|
|
800b164: d52a bpl.n 800b1bc <_printf_i+0xa4>
|
|
800b166: 681b ldr r3, [r3, #0]
|
|
800b168: 6011 str r1, [r2, #0]
|
|
800b16a: 2b00 cmp r3, #0
|
|
800b16c: da03 bge.n 800b176 <_printf_i+0x5e>
|
|
800b16e: 222d movs r2, #45 ; 0x2d
|
|
800b170: 425b negs r3, r3
|
|
800b172: f884 2043 strb.w r2, [r4, #67] ; 0x43
|
|
800b176: 486f ldr r0, [pc, #444] ; (800b334 <_printf_i+0x21c>)
|
|
800b178: 220a movs r2, #10
|
|
800b17a: e039 b.n 800b1f0 <_printf_i+0xd8>
|
|
800b17c: 2973 cmp r1, #115 ; 0x73
|
|
800b17e: f000 809d beq.w 800b2bc <_printf_i+0x1a4>
|
|
800b182: d808 bhi.n 800b196 <_printf_i+0x7e>
|
|
800b184: 296f cmp r1, #111 ; 0x6f
|
|
800b186: d020 beq.n 800b1ca <_printf_i+0xb2>
|
|
800b188: 2970 cmp r1, #112 ; 0x70
|
|
800b18a: d1dd bne.n 800b148 <_printf_i+0x30>
|
|
800b18c: 6823 ldr r3, [r4, #0]
|
|
800b18e: f043 0320 orr.w r3, r3, #32
|
|
800b192: 6023 str r3, [r4, #0]
|
|
800b194: e003 b.n 800b19e <_printf_i+0x86>
|
|
800b196: 2975 cmp r1, #117 ; 0x75
|
|
800b198: d017 beq.n 800b1ca <_printf_i+0xb2>
|
|
800b19a: 2978 cmp r1, #120 ; 0x78
|
|
800b19c: d1d4 bne.n 800b148 <_printf_i+0x30>
|
|
800b19e: 2378 movs r3, #120 ; 0x78
|
|
800b1a0: 4865 ldr r0, [pc, #404] ; (800b338 <_printf_i+0x220>)
|
|
800b1a2: f884 3045 strb.w r3, [r4, #69] ; 0x45
|
|
800b1a6: e055 b.n 800b254 <_printf_i+0x13c>
|
|
800b1a8: 6813 ldr r3, [r2, #0]
|
|
800b1aa: f104 0542 add.w r5, r4, #66 ; 0x42
|
|
800b1ae: 1d19 adds r1, r3, #4
|
|
800b1b0: 681b ldr r3, [r3, #0]
|
|
800b1b2: 6011 str r1, [r2, #0]
|
|
800b1b4: f884 3042 strb.w r3, [r4, #66] ; 0x42
|
|
800b1b8: 2301 movs r3, #1
|
|
800b1ba: e08c b.n 800b2d6 <_printf_i+0x1be>
|
|
800b1bc: 681b ldr r3, [r3, #0]
|
|
800b1be: f010 0f40 tst.w r0, #64 ; 0x40
|
|
800b1c2: 6011 str r1, [r2, #0]
|
|
800b1c4: bf18 it ne
|
|
800b1c6: b21b sxthne r3, r3
|
|
800b1c8: e7cf b.n 800b16a <_printf_i+0x52>
|
|
800b1ca: 6813 ldr r3, [r2, #0]
|
|
800b1cc: 6825 ldr r5, [r4, #0]
|
|
800b1ce: 1d18 adds r0, r3, #4
|
|
800b1d0: 6010 str r0, [r2, #0]
|
|
800b1d2: 0628 lsls r0, r5, #24
|
|
800b1d4: d501 bpl.n 800b1da <_printf_i+0xc2>
|
|
800b1d6: 681b ldr r3, [r3, #0]
|
|
800b1d8: e002 b.n 800b1e0 <_printf_i+0xc8>
|
|
800b1da: 0668 lsls r0, r5, #25
|
|
800b1dc: d5fb bpl.n 800b1d6 <_printf_i+0xbe>
|
|
800b1de: 881b ldrh r3, [r3, #0]
|
|
800b1e0: 296f cmp r1, #111 ; 0x6f
|
|
800b1e2: bf14 ite ne
|
|
800b1e4: 220a movne r2, #10
|
|
800b1e6: 2208 moveq r2, #8
|
|
800b1e8: 4852 ldr r0, [pc, #328] ; (800b334 <_printf_i+0x21c>)
|
|
800b1ea: 2100 movs r1, #0
|
|
800b1ec: f884 1043 strb.w r1, [r4, #67] ; 0x43
|
|
800b1f0: 6865 ldr r5, [r4, #4]
|
|
800b1f2: 2d00 cmp r5, #0
|
|
800b1f4: 60a5 str r5, [r4, #8]
|
|
800b1f6: f2c0 8095 blt.w 800b324 <_printf_i+0x20c>
|
|
800b1fa: 6821 ldr r1, [r4, #0]
|
|
800b1fc: f021 0104 bic.w r1, r1, #4
|
|
800b200: 6021 str r1, [r4, #0]
|
|
800b202: 2b00 cmp r3, #0
|
|
800b204: d13d bne.n 800b282 <_printf_i+0x16a>
|
|
800b206: 2d00 cmp r5, #0
|
|
800b208: f040 808e bne.w 800b328 <_printf_i+0x210>
|
|
800b20c: 4665 mov r5, ip
|
|
800b20e: 2a08 cmp r2, #8
|
|
800b210: d10b bne.n 800b22a <_printf_i+0x112>
|
|
800b212: 6823 ldr r3, [r4, #0]
|
|
800b214: 07db lsls r3, r3, #31
|
|
800b216: d508 bpl.n 800b22a <_printf_i+0x112>
|
|
800b218: 6923 ldr r3, [r4, #16]
|
|
800b21a: 6862 ldr r2, [r4, #4]
|
|
800b21c: 429a cmp r2, r3
|
|
800b21e: bfde ittt le
|
|
800b220: 2330 movle r3, #48 ; 0x30
|
|
800b222: f805 3c01 strble.w r3, [r5, #-1]
|
|
800b226: f105 35ff addle.w r5, r5, #4294967295 ; 0xffffffff
|
|
800b22a: ebac 0305 sub.w r3, ip, r5
|
|
800b22e: 6123 str r3, [r4, #16]
|
|
800b230: f8cd 8000 str.w r8, [sp]
|
|
800b234: 463b mov r3, r7
|
|
800b236: aa03 add r2, sp, #12
|
|
800b238: 4621 mov r1, r4
|
|
800b23a: 4630 mov r0, r6
|
|
800b23c: f7ff fef6 bl 800b02c <_printf_common>
|
|
800b240: 3001 adds r0, #1
|
|
800b242: d14d bne.n 800b2e0 <_printf_i+0x1c8>
|
|
800b244: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
|
800b248: b005 add sp, #20
|
|
800b24a: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
|
|
800b24e: 4839 ldr r0, [pc, #228] ; (800b334 <_printf_i+0x21c>)
|
|
800b250: f884 1045 strb.w r1, [r4, #69] ; 0x45
|
|
800b254: 6813 ldr r3, [r2, #0]
|
|
800b256: 6821 ldr r1, [r4, #0]
|
|
800b258: 1d1d adds r5, r3, #4
|
|
800b25a: 681b ldr r3, [r3, #0]
|
|
800b25c: 6015 str r5, [r2, #0]
|
|
800b25e: 060a lsls r2, r1, #24
|
|
800b260: d50b bpl.n 800b27a <_printf_i+0x162>
|
|
800b262: 07ca lsls r2, r1, #31
|
|
800b264: bf44 itt mi
|
|
800b266: f041 0120 orrmi.w r1, r1, #32
|
|
800b26a: 6021 strmi r1, [r4, #0]
|
|
800b26c: b91b cbnz r3, 800b276 <_printf_i+0x15e>
|
|
800b26e: 6822 ldr r2, [r4, #0]
|
|
800b270: f022 0220 bic.w r2, r2, #32
|
|
800b274: 6022 str r2, [r4, #0]
|
|
800b276: 2210 movs r2, #16
|
|
800b278: e7b7 b.n 800b1ea <_printf_i+0xd2>
|
|
800b27a: 064d lsls r5, r1, #25
|
|
800b27c: bf48 it mi
|
|
800b27e: b29b uxthmi r3, r3
|
|
800b280: e7ef b.n 800b262 <_printf_i+0x14a>
|
|
800b282: 4665 mov r5, ip
|
|
800b284: fbb3 f1f2 udiv r1, r3, r2
|
|
800b288: fb02 3311 mls r3, r2, r1, r3
|
|
800b28c: 5cc3 ldrb r3, [r0, r3]
|
|
800b28e: f805 3d01 strb.w r3, [r5, #-1]!
|
|
800b292: 460b mov r3, r1
|
|
800b294: 2900 cmp r1, #0
|
|
800b296: d1f5 bne.n 800b284 <_printf_i+0x16c>
|
|
800b298: e7b9 b.n 800b20e <_printf_i+0xf6>
|
|
800b29a: 6813 ldr r3, [r2, #0]
|
|
800b29c: 6825 ldr r5, [r4, #0]
|
|
800b29e: 1d18 adds r0, r3, #4
|
|
800b2a0: 6961 ldr r1, [r4, #20]
|
|
800b2a2: 6010 str r0, [r2, #0]
|
|
800b2a4: 0628 lsls r0, r5, #24
|
|
800b2a6: 681b ldr r3, [r3, #0]
|
|
800b2a8: d501 bpl.n 800b2ae <_printf_i+0x196>
|
|
800b2aa: 6019 str r1, [r3, #0]
|
|
800b2ac: e002 b.n 800b2b4 <_printf_i+0x19c>
|
|
800b2ae: 066a lsls r2, r5, #25
|
|
800b2b0: d5fb bpl.n 800b2aa <_printf_i+0x192>
|
|
800b2b2: 8019 strh r1, [r3, #0]
|
|
800b2b4: 2300 movs r3, #0
|
|
800b2b6: 4665 mov r5, ip
|
|
800b2b8: 6123 str r3, [r4, #16]
|
|
800b2ba: e7b9 b.n 800b230 <_printf_i+0x118>
|
|
800b2bc: 6813 ldr r3, [r2, #0]
|
|
800b2be: 1d19 adds r1, r3, #4
|
|
800b2c0: 6011 str r1, [r2, #0]
|
|
800b2c2: 681d ldr r5, [r3, #0]
|
|
800b2c4: 6862 ldr r2, [r4, #4]
|
|
800b2c6: 2100 movs r1, #0
|
|
800b2c8: 4628 mov r0, r5
|
|
800b2ca: f000 f837 bl 800b33c <memchr>
|
|
800b2ce: b108 cbz r0, 800b2d4 <_printf_i+0x1bc>
|
|
800b2d0: 1b40 subs r0, r0, r5
|
|
800b2d2: 6060 str r0, [r4, #4]
|
|
800b2d4: 6863 ldr r3, [r4, #4]
|
|
800b2d6: 6123 str r3, [r4, #16]
|
|
800b2d8: 2300 movs r3, #0
|
|
800b2da: f884 3043 strb.w r3, [r4, #67] ; 0x43
|
|
800b2de: e7a7 b.n 800b230 <_printf_i+0x118>
|
|
800b2e0: 6923 ldr r3, [r4, #16]
|
|
800b2e2: 462a mov r2, r5
|
|
800b2e4: 4639 mov r1, r7
|
|
800b2e6: 4630 mov r0, r6
|
|
800b2e8: 47c0 blx r8
|
|
800b2ea: 3001 adds r0, #1
|
|
800b2ec: d0aa beq.n 800b244 <_printf_i+0x12c>
|
|
800b2ee: 6823 ldr r3, [r4, #0]
|
|
800b2f0: 079b lsls r3, r3, #30
|
|
800b2f2: d413 bmi.n 800b31c <_printf_i+0x204>
|
|
800b2f4: 68e0 ldr r0, [r4, #12]
|
|
800b2f6: 9b03 ldr r3, [sp, #12]
|
|
800b2f8: 4298 cmp r0, r3
|
|
800b2fa: bfb8 it lt
|
|
800b2fc: 4618 movlt r0, r3
|
|
800b2fe: e7a3 b.n 800b248 <_printf_i+0x130>
|
|
800b300: 2301 movs r3, #1
|
|
800b302: 464a mov r2, r9
|
|
800b304: 4639 mov r1, r7
|
|
800b306: 4630 mov r0, r6
|
|
800b308: 47c0 blx r8
|
|
800b30a: 3001 adds r0, #1
|
|
800b30c: d09a beq.n 800b244 <_printf_i+0x12c>
|
|
800b30e: 3501 adds r5, #1
|
|
800b310: 68e3 ldr r3, [r4, #12]
|
|
800b312: 9a03 ldr r2, [sp, #12]
|
|
800b314: 1a9b subs r3, r3, r2
|
|
800b316: 42ab cmp r3, r5
|
|
800b318: dcf2 bgt.n 800b300 <_printf_i+0x1e8>
|
|
800b31a: e7eb b.n 800b2f4 <_printf_i+0x1dc>
|
|
800b31c: 2500 movs r5, #0
|
|
800b31e: f104 0919 add.w r9, r4, #25
|
|
800b322: e7f5 b.n 800b310 <_printf_i+0x1f8>
|
|
800b324: 2b00 cmp r3, #0
|
|
800b326: d1ac bne.n 800b282 <_printf_i+0x16a>
|
|
800b328: 7803 ldrb r3, [r0, #0]
|
|
800b32a: f104 0542 add.w r5, r4, #66 ; 0x42
|
|
800b32e: f884 3042 strb.w r3, [r4, #66] ; 0x42
|
|
800b332: e76c b.n 800b20e <_printf_i+0xf6>
|
|
800b334: 0800f031 .word 0x0800f031
|
|
800b338: 0800f042 .word 0x0800f042
|
|
|
|
0800b33c <memchr>:
|
|
800b33c: b510 push {r4, lr}
|
|
800b33e: b2c9 uxtb r1, r1
|
|
800b340: 4402 add r2, r0
|
|
800b342: 4290 cmp r0, r2
|
|
800b344: 4603 mov r3, r0
|
|
800b346: d101 bne.n 800b34c <memchr+0x10>
|
|
800b348: 2300 movs r3, #0
|
|
800b34a: e003 b.n 800b354 <memchr+0x18>
|
|
800b34c: 781c ldrb r4, [r3, #0]
|
|
800b34e: 3001 adds r0, #1
|
|
800b350: 428c cmp r4, r1
|
|
800b352: d1f6 bne.n 800b342 <memchr+0x6>
|
|
800b354: 4618 mov r0, r3
|
|
800b356: bd10 pop {r4, pc}
|
|
|
|
0800b358 <memmove>:
|
|
800b358: 4288 cmp r0, r1
|
|
800b35a: b510 push {r4, lr}
|
|
800b35c: eb01 0302 add.w r3, r1, r2
|
|
800b360: d807 bhi.n 800b372 <memmove+0x1a>
|
|
800b362: 1e42 subs r2, r0, #1
|
|
800b364: 4299 cmp r1, r3
|
|
800b366: d00a beq.n 800b37e <memmove+0x26>
|
|
800b368: f811 4b01 ldrb.w r4, [r1], #1
|
|
800b36c: f802 4f01 strb.w r4, [r2, #1]!
|
|
800b370: e7f8 b.n 800b364 <memmove+0xc>
|
|
800b372: 4283 cmp r3, r0
|
|
800b374: d9f5 bls.n 800b362 <memmove+0xa>
|
|
800b376: 1881 adds r1, r0, r2
|
|
800b378: 1ad2 subs r2, r2, r3
|
|
800b37a: 42d3 cmn r3, r2
|
|
800b37c: d100 bne.n 800b380 <memmove+0x28>
|
|
800b37e: bd10 pop {r4, pc}
|
|
800b380: f813 4d01 ldrb.w r4, [r3, #-1]!
|
|
800b384: f801 4d01 strb.w r4, [r1, #-1]!
|
|
800b388: e7f7 b.n 800b37a <memmove+0x22>
|
|
...
|
|
|
|
0800b38c <_free_r>:
|
|
800b38c: b538 push {r3, r4, r5, lr}
|
|
800b38e: 4605 mov r5, r0
|
|
800b390: 2900 cmp r1, #0
|
|
800b392: d043 beq.n 800b41c <_free_r+0x90>
|
|
800b394: f851 3c04 ldr.w r3, [r1, #-4]
|
|
800b398: 1f0c subs r4, r1, #4
|
|
800b39a: 2b00 cmp r3, #0
|
|
800b39c: bfb8 it lt
|
|
800b39e: 18e4 addlt r4, r4, r3
|
|
800b3a0: f000 f8d0 bl 800b544 <__malloc_lock>
|
|
800b3a4: 4a1e ldr r2, [pc, #120] ; (800b420 <_free_r+0x94>)
|
|
800b3a6: 6813 ldr r3, [r2, #0]
|
|
800b3a8: 4610 mov r0, r2
|
|
800b3aa: b933 cbnz r3, 800b3ba <_free_r+0x2e>
|
|
800b3ac: 6063 str r3, [r4, #4]
|
|
800b3ae: 6014 str r4, [r2, #0]
|
|
800b3b0: 4628 mov r0, r5
|
|
800b3b2: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
|
|
800b3b6: f000 b8c6 b.w 800b546 <__malloc_unlock>
|
|
800b3ba: 42a3 cmp r3, r4
|
|
800b3bc: d90b bls.n 800b3d6 <_free_r+0x4a>
|
|
800b3be: 6821 ldr r1, [r4, #0]
|
|
800b3c0: 1862 adds r2, r4, r1
|
|
800b3c2: 4293 cmp r3, r2
|
|
800b3c4: bf01 itttt eq
|
|
800b3c6: 681a ldreq r2, [r3, #0]
|
|
800b3c8: 685b ldreq r3, [r3, #4]
|
|
800b3ca: 1852 addeq r2, r2, r1
|
|
800b3cc: 6022 streq r2, [r4, #0]
|
|
800b3ce: 6063 str r3, [r4, #4]
|
|
800b3d0: 6004 str r4, [r0, #0]
|
|
800b3d2: e7ed b.n 800b3b0 <_free_r+0x24>
|
|
800b3d4: 4613 mov r3, r2
|
|
800b3d6: 685a ldr r2, [r3, #4]
|
|
800b3d8: b10a cbz r2, 800b3de <_free_r+0x52>
|
|
800b3da: 42a2 cmp r2, r4
|
|
800b3dc: d9fa bls.n 800b3d4 <_free_r+0x48>
|
|
800b3de: 6819 ldr r1, [r3, #0]
|
|
800b3e0: 1858 adds r0, r3, r1
|
|
800b3e2: 42a0 cmp r0, r4
|
|
800b3e4: d10b bne.n 800b3fe <_free_r+0x72>
|
|
800b3e6: 6820 ldr r0, [r4, #0]
|
|
800b3e8: 4401 add r1, r0
|
|
800b3ea: 1858 adds r0, r3, r1
|
|
800b3ec: 4282 cmp r2, r0
|
|
800b3ee: 6019 str r1, [r3, #0]
|
|
800b3f0: d1de bne.n 800b3b0 <_free_r+0x24>
|
|
800b3f2: 6810 ldr r0, [r2, #0]
|
|
800b3f4: 6852 ldr r2, [r2, #4]
|
|
800b3f6: 4401 add r1, r0
|
|
800b3f8: 6019 str r1, [r3, #0]
|
|
800b3fa: 605a str r2, [r3, #4]
|
|
800b3fc: e7d8 b.n 800b3b0 <_free_r+0x24>
|
|
800b3fe: d902 bls.n 800b406 <_free_r+0x7a>
|
|
800b400: 230c movs r3, #12
|
|
800b402: 602b str r3, [r5, #0]
|
|
800b404: e7d4 b.n 800b3b0 <_free_r+0x24>
|
|
800b406: 6820 ldr r0, [r4, #0]
|
|
800b408: 1821 adds r1, r4, r0
|
|
800b40a: 428a cmp r2, r1
|
|
800b40c: bf01 itttt eq
|
|
800b40e: 6811 ldreq r1, [r2, #0]
|
|
800b410: 6852 ldreq r2, [r2, #4]
|
|
800b412: 1809 addeq r1, r1, r0
|
|
800b414: 6021 streq r1, [r4, #0]
|
|
800b416: 6062 str r2, [r4, #4]
|
|
800b418: 605c str r4, [r3, #4]
|
|
800b41a: e7c9 b.n 800b3b0 <_free_r+0x24>
|
|
800b41c: bd38 pop {r3, r4, r5, pc}
|
|
800b41e: bf00 nop
|
|
800b420: 200011ec .word 0x200011ec
|
|
|
|
0800b424 <_malloc_r>:
|
|
800b424: b570 push {r4, r5, r6, lr}
|
|
800b426: 1ccd adds r5, r1, #3
|
|
800b428: f025 0503 bic.w r5, r5, #3
|
|
800b42c: 3508 adds r5, #8
|
|
800b42e: 2d0c cmp r5, #12
|
|
800b430: bf38 it cc
|
|
800b432: 250c movcc r5, #12
|
|
800b434: 2d00 cmp r5, #0
|
|
800b436: 4606 mov r6, r0
|
|
800b438: db01 blt.n 800b43e <_malloc_r+0x1a>
|
|
800b43a: 42a9 cmp r1, r5
|
|
800b43c: d903 bls.n 800b446 <_malloc_r+0x22>
|
|
800b43e: 230c movs r3, #12
|
|
800b440: 6033 str r3, [r6, #0]
|
|
800b442: 2000 movs r0, #0
|
|
800b444: bd70 pop {r4, r5, r6, pc}
|
|
800b446: f000 f87d bl 800b544 <__malloc_lock>
|
|
800b44a: 4a21 ldr r2, [pc, #132] ; (800b4d0 <_malloc_r+0xac>)
|
|
800b44c: 6814 ldr r4, [r2, #0]
|
|
800b44e: 4621 mov r1, r4
|
|
800b450: b991 cbnz r1, 800b478 <_malloc_r+0x54>
|
|
800b452: 4c20 ldr r4, [pc, #128] ; (800b4d4 <_malloc_r+0xb0>)
|
|
800b454: 6823 ldr r3, [r4, #0]
|
|
800b456: b91b cbnz r3, 800b460 <_malloc_r+0x3c>
|
|
800b458: 4630 mov r0, r6
|
|
800b45a: f000 f863 bl 800b524 <_sbrk_r>
|
|
800b45e: 6020 str r0, [r4, #0]
|
|
800b460: 4629 mov r1, r5
|
|
800b462: 4630 mov r0, r6
|
|
800b464: f000 f85e bl 800b524 <_sbrk_r>
|
|
800b468: 1c43 adds r3, r0, #1
|
|
800b46a: d124 bne.n 800b4b6 <_malloc_r+0x92>
|
|
800b46c: 230c movs r3, #12
|
|
800b46e: 4630 mov r0, r6
|
|
800b470: 6033 str r3, [r6, #0]
|
|
800b472: f000 f868 bl 800b546 <__malloc_unlock>
|
|
800b476: e7e4 b.n 800b442 <_malloc_r+0x1e>
|
|
800b478: 680b ldr r3, [r1, #0]
|
|
800b47a: 1b5b subs r3, r3, r5
|
|
800b47c: d418 bmi.n 800b4b0 <_malloc_r+0x8c>
|
|
800b47e: 2b0b cmp r3, #11
|
|
800b480: d90f bls.n 800b4a2 <_malloc_r+0x7e>
|
|
800b482: 600b str r3, [r1, #0]
|
|
800b484: 18cc adds r4, r1, r3
|
|
800b486: 50cd str r5, [r1, r3]
|
|
800b488: 4630 mov r0, r6
|
|
800b48a: f000 f85c bl 800b546 <__malloc_unlock>
|
|
800b48e: f104 000b add.w r0, r4, #11
|
|
800b492: 1d23 adds r3, r4, #4
|
|
800b494: f020 0007 bic.w r0, r0, #7
|
|
800b498: 1ac3 subs r3, r0, r3
|
|
800b49a: d0d3 beq.n 800b444 <_malloc_r+0x20>
|
|
800b49c: 425a negs r2, r3
|
|
800b49e: 50e2 str r2, [r4, r3]
|
|
800b4a0: e7d0 b.n 800b444 <_malloc_r+0x20>
|
|
800b4a2: 684b ldr r3, [r1, #4]
|
|
800b4a4: 428c cmp r4, r1
|
|
800b4a6: bf16 itet ne
|
|
800b4a8: 6063 strne r3, [r4, #4]
|
|
800b4aa: 6013 streq r3, [r2, #0]
|
|
800b4ac: 460c movne r4, r1
|
|
800b4ae: e7eb b.n 800b488 <_malloc_r+0x64>
|
|
800b4b0: 460c mov r4, r1
|
|
800b4b2: 6849 ldr r1, [r1, #4]
|
|
800b4b4: e7cc b.n 800b450 <_malloc_r+0x2c>
|
|
800b4b6: 1cc4 adds r4, r0, #3
|
|
800b4b8: f024 0403 bic.w r4, r4, #3
|
|
800b4bc: 42a0 cmp r0, r4
|
|
800b4be: d005 beq.n 800b4cc <_malloc_r+0xa8>
|
|
800b4c0: 1a21 subs r1, r4, r0
|
|
800b4c2: 4630 mov r0, r6
|
|
800b4c4: f000 f82e bl 800b524 <_sbrk_r>
|
|
800b4c8: 3001 adds r0, #1
|
|
800b4ca: d0cf beq.n 800b46c <_malloc_r+0x48>
|
|
800b4cc: 6025 str r5, [r4, #0]
|
|
800b4ce: e7db b.n 800b488 <_malloc_r+0x64>
|
|
800b4d0: 200011ec .word 0x200011ec
|
|
800b4d4: 200011f0 .word 0x200011f0
|
|
|
|
0800b4d8 <_realloc_r>:
|
|
800b4d8: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
800b4da: 4607 mov r7, r0
|
|
800b4dc: 4614 mov r4, r2
|
|
800b4de: 460e mov r6, r1
|
|
800b4e0: b921 cbnz r1, 800b4ec <_realloc_r+0x14>
|
|
800b4e2: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr}
|
|
800b4e6: 4611 mov r1, r2
|
|
800b4e8: f7ff bf9c b.w 800b424 <_malloc_r>
|
|
800b4ec: b922 cbnz r2, 800b4f8 <_realloc_r+0x20>
|
|
800b4ee: f7ff ff4d bl 800b38c <_free_r>
|
|
800b4f2: 4625 mov r5, r4
|
|
800b4f4: 4628 mov r0, r5
|
|
800b4f6: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
800b4f8: f000 f826 bl 800b548 <_malloc_usable_size_r>
|
|
800b4fc: 42a0 cmp r0, r4
|
|
800b4fe: d20f bcs.n 800b520 <_realloc_r+0x48>
|
|
800b500: 4621 mov r1, r4
|
|
800b502: 4638 mov r0, r7
|
|
800b504: f7ff ff8e bl 800b424 <_malloc_r>
|
|
800b508: 4605 mov r5, r0
|
|
800b50a: 2800 cmp r0, #0
|
|
800b50c: d0f2 beq.n 800b4f4 <_realloc_r+0x1c>
|
|
800b50e: 4631 mov r1, r6
|
|
800b510: 4622 mov r2, r4
|
|
800b512: f7ff fbd1 bl 800acb8 <memcpy>
|
|
800b516: 4631 mov r1, r6
|
|
800b518: 4638 mov r0, r7
|
|
800b51a: f7ff ff37 bl 800b38c <_free_r>
|
|
800b51e: e7e9 b.n 800b4f4 <_realloc_r+0x1c>
|
|
800b520: 4635 mov r5, r6
|
|
800b522: e7e7 b.n 800b4f4 <_realloc_r+0x1c>
|
|
|
|
0800b524 <_sbrk_r>:
|
|
800b524: b538 push {r3, r4, r5, lr}
|
|
800b526: 2300 movs r3, #0
|
|
800b528: 4c05 ldr r4, [pc, #20] ; (800b540 <_sbrk_r+0x1c>)
|
|
800b52a: 4605 mov r5, r0
|
|
800b52c: 4608 mov r0, r1
|
|
800b52e: 6023 str r3, [r4, #0]
|
|
800b530: f7fe fea8 bl 800a284 <_sbrk>
|
|
800b534: 1c43 adds r3, r0, #1
|
|
800b536: d102 bne.n 800b53e <_sbrk_r+0x1a>
|
|
800b538: 6823 ldr r3, [r4, #0]
|
|
800b53a: b103 cbz r3, 800b53e <_sbrk_r+0x1a>
|
|
800b53c: 602b str r3, [r5, #0]
|
|
800b53e: bd38 pop {r3, r4, r5, pc}
|
|
800b540: 20002240 .word 0x20002240
|
|
|
|
0800b544 <__malloc_lock>:
|
|
800b544: 4770 bx lr
|
|
|
|
0800b546 <__malloc_unlock>:
|
|
800b546: 4770 bx lr
|
|
|
|
0800b548 <_malloc_usable_size_r>:
|
|
800b548: f851 3c04 ldr.w r3, [r1, #-4]
|
|
800b54c: 1f18 subs r0, r3, #4
|
|
800b54e: 2b00 cmp r3, #0
|
|
800b550: bfbc itt lt
|
|
800b552: 580b ldrlt r3, [r1, r0]
|
|
800b554: 18c0 addlt r0, r0, r3
|
|
800b556: 4770 bx lr
|
|
|
|
0800b558 <cos>:
|
|
800b558: b530 push {r4, r5, lr}
|
|
800b55a: 4a18 ldr r2, [pc, #96] ; (800b5bc <cos+0x64>)
|
|
800b55c: f021 4300 bic.w r3, r1, #2147483648 ; 0x80000000
|
|
800b560: 4293 cmp r3, r2
|
|
800b562: b087 sub sp, #28
|
|
800b564: dc04 bgt.n 800b570 <cos+0x18>
|
|
800b566: 2200 movs r2, #0
|
|
800b568: 2300 movs r3, #0
|
|
800b56a: f000 fa9d bl 800baa8 <__kernel_cos>
|
|
800b56e: e006 b.n 800b57e <cos+0x26>
|
|
800b570: 4a13 ldr r2, [pc, #76] ; (800b5c0 <cos+0x68>)
|
|
800b572: 4293 cmp r3, r2
|
|
800b574: dd05 ble.n 800b582 <cos+0x2a>
|
|
800b576: 4602 mov r2, r0
|
|
800b578: 460b mov r3, r1
|
|
800b57a: f7f4 fded bl 8000158 <__aeabi_dsub>
|
|
800b57e: b007 add sp, #28
|
|
800b580: bd30 pop {r4, r5, pc}
|
|
800b582: aa02 add r2, sp, #8
|
|
800b584: f000 f8a0 bl 800b6c8 <__ieee754_rem_pio2>
|
|
800b588: e9dd 2304 ldrd r2, r3, [sp, #16]
|
|
800b58c: f000 0403 and.w r4, r0, #3
|
|
800b590: 2c01 cmp r4, #1
|
|
800b592: e9dd 0102 ldrd r0, r1, [sp, #8]
|
|
800b596: d008 beq.n 800b5aa <cos+0x52>
|
|
800b598: 2c02 cmp r4, #2
|
|
800b59a: d00c beq.n 800b5b6 <cos+0x5e>
|
|
800b59c: 2c00 cmp r4, #0
|
|
800b59e: d0e4 beq.n 800b56a <cos+0x12>
|
|
800b5a0: 2401 movs r4, #1
|
|
800b5a2: 9400 str r4, [sp, #0]
|
|
800b5a4: f000 fe88 bl 800c2b8 <__kernel_sin>
|
|
800b5a8: e7e9 b.n 800b57e <cos+0x26>
|
|
800b5aa: 9400 str r4, [sp, #0]
|
|
800b5ac: f000 fe84 bl 800c2b8 <__kernel_sin>
|
|
800b5b0: f101 4100 add.w r1, r1, #2147483648 ; 0x80000000
|
|
800b5b4: e7e3 b.n 800b57e <cos+0x26>
|
|
800b5b6: f000 fa77 bl 800baa8 <__kernel_cos>
|
|
800b5ba: e7f9 b.n 800b5b0 <cos+0x58>
|
|
800b5bc: 3fe921fb .word 0x3fe921fb
|
|
800b5c0: 7fefffff .word 0x7fefffff
|
|
|
|
0800b5c4 <round>:
|
|
800b5c4: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
800b5c6: f3c1 570a ubfx r7, r1, #20, #11
|
|
800b5ca: f2a7 34ff subw r4, r7, #1023 ; 0x3ff
|
|
800b5ce: 2c13 cmp r4, #19
|
|
800b5d0: 4606 mov r6, r0
|
|
800b5d2: 460d mov r5, r1
|
|
800b5d4: 460b mov r3, r1
|
|
800b5d6: 468c mov ip, r1
|
|
800b5d8: 4602 mov r2, r0
|
|
800b5da: dc17 bgt.n 800b60c <round+0x48>
|
|
800b5dc: 2c00 cmp r4, #0
|
|
800b5de: da09 bge.n 800b5f4 <round+0x30>
|
|
800b5e0: 3401 adds r4, #1
|
|
800b5e2: f001 4300 and.w r3, r1, #2147483648 ; 0x80000000
|
|
800b5e6: d103 bne.n 800b5f0 <round+0x2c>
|
|
800b5e8: f043 537f orr.w r3, r3, #1069547520 ; 0x3fc00000
|
|
800b5ec: f443 1340 orr.w r3, r3, #3145728 ; 0x300000
|
|
800b5f0: 2200 movs r2, #0
|
|
800b5f2: e028 b.n 800b646 <round+0x82>
|
|
800b5f4: 4915 ldr r1, [pc, #84] ; (800b64c <round+0x88>)
|
|
800b5f6: 4121 asrs r1, r4
|
|
800b5f8: 420d tst r5, r1
|
|
800b5fa: d100 bne.n 800b5fe <round+0x3a>
|
|
800b5fc: b178 cbz r0, 800b61e <round+0x5a>
|
|
800b5fe: f44f 2300 mov.w r3, #524288 ; 0x80000
|
|
800b602: 4123 asrs r3, r4
|
|
800b604: 4463 add r3, ip
|
|
800b606: ea23 0301 bic.w r3, r3, r1
|
|
800b60a: e7f1 b.n 800b5f0 <round+0x2c>
|
|
800b60c: 2c33 cmp r4, #51 ; 0x33
|
|
800b60e: dd09 ble.n 800b624 <round+0x60>
|
|
800b610: f5b4 6f80 cmp.w r4, #1024 ; 0x400
|
|
800b614: d103 bne.n 800b61e <round+0x5a>
|
|
800b616: f7f4 fda1 bl 800015c <__adddf3>
|
|
800b61a: 4606 mov r6, r0
|
|
800b61c: 460d mov r5, r1
|
|
800b61e: 4630 mov r0, r6
|
|
800b620: 4629 mov r1, r5
|
|
800b622: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
800b624: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
|
800b628: f2a7 4713 subw r7, r7, #1043 ; 0x413
|
|
800b62c: 40f8 lsrs r0, r7
|
|
800b62e: 4206 tst r6, r0
|
|
800b630: d0f5 beq.n 800b61e <round+0x5a>
|
|
800b632: 2101 movs r1, #1
|
|
800b634: f1c4 0433 rsb r4, r4, #51 ; 0x33
|
|
800b638: fa01 f404 lsl.w r4, r1, r4
|
|
800b63c: 1932 adds r2, r6, r4
|
|
800b63e: bf28 it cs
|
|
800b640: 185b addcs r3, r3, r1
|
|
800b642: ea22 0200 bic.w r2, r2, r0
|
|
800b646: 4619 mov r1, r3
|
|
800b648: 4610 mov r0, r2
|
|
800b64a: e7e6 b.n 800b61a <round+0x56>
|
|
800b64c: 000fffff .word 0x000fffff
|
|
|
|
0800b650 <sin>:
|
|
800b650: b530 push {r4, r5, lr}
|
|
800b652: 4a1a ldr r2, [pc, #104] ; (800b6bc <sin+0x6c>)
|
|
800b654: f021 4300 bic.w r3, r1, #2147483648 ; 0x80000000
|
|
800b658: 4293 cmp r3, r2
|
|
800b65a: b087 sub sp, #28
|
|
800b65c: dc06 bgt.n 800b66c <sin+0x1c>
|
|
800b65e: 2300 movs r3, #0
|
|
800b660: 2200 movs r2, #0
|
|
800b662: 9300 str r3, [sp, #0]
|
|
800b664: 2300 movs r3, #0
|
|
800b666: f000 fe27 bl 800c2b8 <__kernel_sin>
|
|
800b66a: e006 b.n 800b67a <sin+0x2a>
|
|
800b66c: 4a14 ldr r2, [pc, #80] ; (800b6c0 <sin+0x70>)
|
|
800b66e: 4293 cmp r3, r2
|
|
800b670: dd05 ble.n 800b67e <sin+0x2e>
|
|
800b672: 4602 mov r2, r0
|
|
800b674: 460b mov r3, r1
|
|
800b676: f7f4 fd6f bl 8000158 <__aeabi_dsub>
|
|
800b67a: b007 add sp, #28
|
|
800b67c: bd30 pop {r4, r5, pc}
|
|
800b67e: aa02 add r2, sp, #8
|
|
800b680: f000 f822 bl 800b6c8 <__ieee754_rem_pio2>
|
|
800b684: e9dd 2304 ldrd r2, r3, [sp, #16]
|
|
800b688: f000 0403 and.w r4, r0, #3
|
|
800b68c: 2c01 cmp r4, #1
|
|
800b68e: e9dd 0102 ldrd r0, r1, [sp, #8]
|
|
800b692: d005 beq.n 800b6a0 <sin+0x50>
|
|
800b694: 2c02 cmp r4, #2
|
|
800b696: d006 beq.n 800b6a6 <sin+0x56>
|
|
800b698: b964 cbnz r4, 800b6b4 <sin+0x64>
|
|
800b69a: 2401 movs r4, #1
|
|
800b69c: 9400 str r4, [sp, #0]
|
|
800b69e: e7e2 b.n 800b666 <sin+0x16>
|
|
800b6a0: f000 fa02 bl 800baa8 <__kernel_cos>
|
|
800b6a4: e7e9 b.n 800b67a <sin+0x2a>
|
|
800b6a6: 2401 movs r4, #1
|
|
800b6a8: 9400 str r4, [sp, #0]
|
|
800b6aa: f000 fe05 bl 800c2b8 <__kernel_sin>
|
|
800b6ae: f101 4100 add.w r1, r1, #2147483648 ; 0x80000000
|
|
800b6b2: e7e2 b.n 800b67a <sin+0x2a>
|
|
800b6b4: f000 f9f8 bl 800baa8 <__kernel_cos>
|
|
800b6b8: e7f9 b.n 800b6ae <sin+0x5e>
|
|
800b6ba: bf00 nop
|
|
800b6bc: 3fe921fb .word 0x3fe921fb
|
|
800b6c0: 7fefffff .word 0x7fefffff
|
|
800b6c4: 00000000 .word 0x00000000
|
|
|
|
0800b6c8 <__ieee754_rem_pio2>:
|
|
800b6c8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
|
800b6cc: 4614 mov r4, r2
|
|
800b6ce: 4ac2 ldr r2, [pc, #776] ; (800b9d8 <__ieee754_rem_pio2+0x310>)
|
|
800b6d0: f021 4a00 bic.w sl, r1, #2147483648 ; 0x80000000
|
|
800b6d4: 4592 cmp sl, r2
|
|
800b6d6: b08d sub sp, #52 ; 0x34
|
|
800b6d8: 468b mov fp, r1
|
|
800b6da: dc07 bgt.n 800b6ec <__ieee754_rem_pio2+0x24>
|
|
800b6dc: 2200 movs r2, #0
|
|
800b6de: 2300 movs r3, #0
|
|
800b6e0: e9c4 0100 strd r0, r1, [r4]
|
|
800b6e4: e9c4 2302 strd r2, r3, [r4, #8]
|
|
800b6e8: 2500 movs r5, #0
|
|
800b6ea: e023 b.n 800b734 <__ieee754_rem_pio2+0x6c>
|
|
800b6ec: 4abb ldr r2, [pc, #748] ; (800b9dc <__ieee754_rem_pio2+0x314>)
|
|
800b6ee: 4592 cmp sl, r2
|
|
800b6f0: dc71 bgt.n 800b7d6 <__ieee754_rem_pio2+0x10e>
|
|
800b6f2: a3ab add r3, pc, #684 ; (adr r3, 800b9a0 <__ieee754_rem_pio2+0x2d8>)
|
|
800b6f4: e9d3 2300 ldrd r2, r3, [r3]
|
|
800b6f8: 2900 cmp r1, #0
|
|
800b6fa: 4db9 ldr r5, [pc, #740] ; (800b9e0 <__ieee754_rem_pio2+0x318>)
|
|
800b6fc: dd36 ble.n 800b76c <__ieee754_rem_pio2+0xa4>
|
|
800b6fe: f7f4 fd2b bl 8000158 <__aeabi_dsub>
|
|
800b702: 45aa cmp sl, r5
|
|
800b704: 4606 mov r6, r0
|
|
800b706: 460f mov r7, r1
|
|
800b708: d018 beq.n 800b73c <__ieee754_rem_pio2+0x74>
|
|
800b70a: a3a7 add r3, pc, #668 ; (adr r3, 800b9a8 <__ieee754_rem_pio2+0x2e0>)
|
|
800b70c: e9d3 2300 ldrd r2, r3, [r3]
|
|
800b710: f7f4 fd22 bl 8000158 <__aeabi_dsub>
|
|
800b714: 4602 mov r2, r0
|
|
800b716: 460b mov r3, r1
|
|
800b718: 4630 mov r0, r6
|
|
800b71a: e9c4 2300 strd r2, r3, [r4]
|
|
800b71e: 4639 mov r1, r7
|
|
800b720: f7f4 fd1a bl 8000158 <__aeabi_dsub>
|
|
800b724: a3a0 add r3, pc, #640 ; (adr r3, 800b9a8 <__ieee754_rem_pio2+0x2e0>)
|
|
800b726: e9d3 2300 ldrd r2, r3, [r3]
|
|
800b72a: f7f4 fd15 bl 8000158 <__aeabi_dsub>
|
|
800b72e: 2501 movs r5, #1
|
|
800b730: e9c4 0102 strd r0, r1, [r4, #8]
|
|
800b734: 4628 mov r0, r5
|
|
800b736: b00d add sp, #52 ; 0x34
|
|
800b738: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
|
800b73c: a39c add r3, pc, #624 ; (adr r3, 800b9b0 <__ieee754_rem_pio2+0x2e8>)
|
|
800b73e: e9d3 2300 ldrd r2, r3, [r3]
|
|
800b742: f7f4 fd09 bl 8000158 <__aeabi_dsub>
|
|
800b746: a39c add r3, pc, #624 ; (adr r3, 800b9b8 <__ieee754_rem_pio2+0x2f0>)
|
|
800b748: e9d3 2300 ldrd r2, r3, [r3]
|
|
800b74c: 4606 mov r6, r0
|
|
800b74e: 460f mov r7, r1
|
|
800b750: f7f4 fd02 bl 8000158 <__aeabi_dsub>
|
|
800b754: 4602 mov r2, r0
|
|
800b756: 460b mov r3, r1
|
|
800b758: 4630 mov r0, r6
|
|
800b75a: e9c4 2300 strd r2, r3, [r4]
|
|
800b75e: 4639 mov r1, r7
|
|
800b760: f7f4 fcfa bl 8000158 <__aeabi_dsub>
|
|
800b764: a394 add r3, pc, #592 ; (adr r3, 800b9b8 <__ieee754_rem_pio2+0x2f0>)
|
|
800b766: e9d3 2300 ldrd r2, r3, [r3]
|
|
800b76a: e7de b.n 800b72a <__ieee754_rem_pio2+0x62>
|
|
800b76c: f7f4 fcf6 bl 800015c <__adddf3>
|
|
800b770: 45aa cmp sl, r5
|
|
800b772: 4606 mov r6, r0
|
|
800b774: 460f mov r7, r1
|
|
800b776: d016 beq.n 800b7a6 <__ieee754_rem_pio2+0xde>
|
|
800b778: a38b add r3, pc, #556 ; (adr r3, 800b9a8 <__ieee754_rem_pio2+0x2e0>)
|
|
800b77a: e9d3 2300 ldrd r2, r3, [r3]
|
|
800b77e: f7f4 fced bl 800015c <__adddf3>
|
|
800b782: 4602 mov r2, r0
|
|
800b784: 460b mov r3, r1
|
|
800b786: 4630 mov r0, r6
|
|
800b788: e9c4 2300 strd r2, r3, [r4]
|
|
800b78c: 4639 mov r1, r7
|
|
800b78e: f7f4 fce3 bl 8000158 <__aeabi_dsub>
|
|
800b792: a385 add r3, pc, #532 ; (adr r3, 800b9a8 <__ieee754_rem_pio2+0x2e0>)
|
|
800b794: e9d3 2300 ldrd r2, r3, [r3]
|
|
800b798: f7f4 fce0 bl 800015c <__adddf3>
|
|
800b79c: f04f 35ff mov.w r5, #4294967295 ; 0xffffffff
|
|
800b7a0: e9c4 0102 strd r0, r1, [r4, #8]
|
|
800b7a4: e7c6 b.n 800b734 <__ieee754_rem_pio2+0x6c>
|
|
800b7a6: a382 add r3, pc, #520 ; (adr r3, 800b9b0 <__ieee754_rem_pio2+0x2e8>)
|
|
800b7a8: e9d3 2300 ldrd r2, r3, [r3]
|
|
800b7ac: f7f4 fcd6 bl 800015c <__adddf3>
|
|
800b7b0: a381 add r3, pc, #516 ; (adr r3, 800b9b8 <__ieee754_rem_pio2+0x2f0>)
|
|
800b7b2: e9d3 2300 ldrd r2, r3, [r3]
|
|
800b7b6: 4606 mov r6, r0
|
|
800b7b8: 460f mov r7, r1
|
|
800b7ba: f7f4 fccf bl 800015c <__adddf3>
|
|
800b7be: 4602 mov r2, r0
|
|
800b7c0: 460b mov r3, r1
|
|
800b7c2: 4630 mov r0, r6
|
|
800b7c4: e9c4 2300 strd r2, r3, [r4]
|
|
800b7c8: 4639 mov r1, r7
|
|
800b7ca: f7f4 fcc5 bl 8000158 <__aeabi_dsub>
|
|
800b7ce: a37a add r3, pc, #488 ; (adr r3, 800b9b8 <__ieee754_rem_pio2+0x2f0>)
|
|
800b7d0: e9d3 2300 ldrd r2, r3, [r3]
|
|
800b7d4: e7e0 b.n 800b798 <__ieee754_rem_pio2+0xd0>
|
|
800b7d6: 4a83 ldr r2, [pc, #524] ; (800b9e4 <__ieee754_rem_pio2+0x31c>)
|
|
800b7d8: 4592 cmp sl, r2
|
|
800b7da: f300 80d2 bgt.w 800b982 <__ieee754_rem_pio2+0x2ba>
|
|
800b7de: f000 fe21 bl 800c424 <fabs>
|
|
800b7e2: a377 add r3, pc, #476 ; (adr r3, 800b9c0 <__ieee754_rem_pio2+0x2f8>)
|
|
800b7e4: e9d3 2300 ldrd r2, r3, [r3]
|
|
800b7e8: 4606 mov r6, r0
|
|
800b7ea: 460f mov r7, r1
|
|
800b7ec: f7f4 fe6c bl 80004c8 <__aeabi_dmul>
|
|
800b7f0: 2200 movs r2, #0
|
|
800b7f2: 4b7d ldr r3, [pc, #500] ; (800b9e8 <__ieee754_rem_pio2+0x320>)
|
|
800b7f4: f7f4 fcb2 bl 800015c <__adddf3>
|
|
800b7f8: f7f5 f900 bl 80009fc <__aeabi_d2iz>
|
|
800b7fc: 4605 mov r5, r0
|
|
800b7fe: f7f4 fdf9 bl 80003f4 <__aeabi_i2d>
|
|
800b802: a367 add r3, pc, #412 ; (adr r3, 800b9a0 <__ieee754_rem_pio2+0x2d8>)
|
|
800b804: e9d3 2300 ldrd r2, r3, [r3]
|
|
800b808: e9cd 0102 strd r0, r1, [sp, #8]
|
|
800b80c: f7f4 fe5c bl 80004c8 <__aeabi_dmul>
|
|
800b810: 4602 mov r2, r0
|
|
800b812: 460b mov r3, r1
|
|
800b814: 4630 mov r0, r6
|
|
800b816: 4639 mov r1, r7
|
|
800b818: f7f4 fc9e bl 8000158 <__aeabi_dsub>
|
|
800b81c: a362 add r3, pc, #392 ; (adr r3, 800b9a8 <__ieee754_rem_pio2+0x2e0>)
|
|
800b81e: e9d3 2300 ldrd r2, r3, [r3]
|
|
800b822: 4606 mov r6, r0
|
|
800b824: 460f mov r7, r1
|
|
800b826: e9dd 0102 ldrd r0, r1, [sp, #8]
|
|
800b82a: f7f4 fe4d bl 80004c8 <__aeabi_dmul>
|
|
800b82e: 2d1f cmp r5, #31
|
|
800b830: 4680 mov r8, r0
|
|
800b832: 4689 mov r9, r1
|
|
800b834: dc0e bgt.n 800b854 <__ieee754_rem_pio2+0x18c>
|
|
800b836: 4b6d ldr r3, [pc, #436] ; (800b9ec <__ieee754_rem_pio2+0x324>)
|
|
800b838: 1e6a subs r2, r5, #1
|
|
800b83a: f853 3022 ldr.w r3, [r3, r2, lsl #2]
|
|
800b83e: 4553 cmp r3, sl
|
|
800b840: d008 beq.n 800b854 <__ieee754_rem_pio2+0x18c>
|
|
800b842: 4642 mov r2, r8
|
|
800b844: 464b mov r3, r9
|
|
800b846: 4630 mov r0, r6
|
|
800b848: 4639 mov r1, r7
|
|
800b84a: f7f4 fc85 bl 8000158 <__aeabi_dsub>
|
|
800b84e: e9c4 0100 strd r0, r1, [r4]
|
|
800b852: e011 b.n 800b878 <__ieee754_rem_pio2+0x1b0>
|
|
800b854: 464b mov r3, r9
|
|
800b856: 4642 mov r2, r8
|
|
800b858: 4630 mov r0, r6
|
|
800b85a: 4639 mov r1, r7
|
|
800b85c: f7f4 fc7c bl 8000158 <__aeabi_dsub>
|
|
800b860: ea4f 5a2a mov.w sl, sl, asr #20
|
|
800b864: f3c1 530a ubfx r3, r1, #20, #11
|
|
800b868: ebaa 0303 sub.w r3, sl, r3
|
|
800b86c: 2b10 cmp r3, #16
|
|
800b86e: dc1f bgt.n 800b8b0 <__ieee754_rem_pio2+0x1e8>
|
|
800b870: 4602 mov r2, r0
|
|
800b872: 460b mov r3, r1
|
|
800b874: e9c4 2300 strd r2, r3, [r4]
|
|
800b878: e9d4 2a00 ldrd r2, sl, [r4]
|
|
800b87c: 4630 mov r0, r6
|
|
800b87e: 4653 mov r3, sl
|
|
800b880: 4639 mov r1, r7
|
|
800b882: f7f4 fc69 bl 8000158 <__aeabi_dsub>
|
|
800b886: 4642 mov r2, r8
|
|
800b888: 464b mov r3, r9
|
|
800b88a: f7f4 fc65 bl 8000158 <__aeabi_dsub>
|
|
800b88e: 4602 mov r2, r0
|
|
800b890: 460b mov r3, r1
|
|
800b892: f1bb 0f00 cmp.w fp, #0
|
|
800b896: e9c4 2302 strd r2, r3, [r4, #8]
|
|
800b89a: f6bf af4b bge.w 800b734 <__ieee754_rem_pio2+0x6c>
|
|
800b89e: f10a 4300 add.w r3, sl, #2147483648 ; 0x80000000
|
|
800b8a2: e9c4 3001 strd r3, r0, [r4, #4]
|
|
800b8a6: f101 4100 add.w r1, r1, #2147483648 ; 0x80000000
|
|
800b8aa: 60e1 str r1, [r4, #12]
|
|
800b8ac: 426d negs r5, r5
|
|
800b8ae: e741 b.n 800b734 <__ieee754_rem_pio2+0x6c>
|
|
800b8b0: a33f add r3, pc, #252 ; (adr r3, 800b9b0 <__ieee754_rem_pio2+0x2e8>)
|
|
800b8b2: e9d3 2300 ldrd r2, r3, [r3]
|
|
800b8b6: e9dd 0102 ldrd r0, r1, [sp, #8]
|
|
800b8ba: f7f4 fe05 bl 80004c8 <__aeabi_dmul>
|
|
800b8be: 4680 mov r8, r0
|
|
800b8c0: 4689 mov r9, r1
|
|
800b8c2: 4602 mov r2, r0
|
|
800b8c4: 460b mov r3, r1
|
|
800b8c6: 4630 mov r0, r6
|
|
800b8c8: 4639 mov r1, r7
|
|
800b8ca: f7f4 fc45 bl 8000158 <__aeabi_dsub>
|
|
800b8ce: e9cd 0104 strd r0, r1, [sp, #16]
|
|
800b8d2: 4602 mov r2, r0
|
|
800b8d4: 460b mov r3, r1
|
|
800b8d6: 4630 mov r0, r6
|
|
800b8d8: 4639 mov r1, r7
|
|
800b8da: f7f4 fc3d bl 8000158 <__aeabi_dsub>
|
|
800b8de: 4642 mov r2, r8
|
|
800b8e0: 464b mov r3, r9
|
|
800b8e2: f7f4 fc39 bl 8000158 <__aeabi_dsub>
|
|
800b8e6: a334 add r3, pc, #208 ; (adr r3, 800b9b8 <__ieee754_rem_pio2+0x2f0>)
|
|
800b8e8: e9d3 2300 ldrd r2, r3, [r3]
|
|
800b8ec: 4606 mov r6, r0
|
|
800b8ee: 460f mov r7, r1
|
|
800b8f0: e9dd 0102 ldrd r0, r1, [sp, #8]
|
|
800b8f4: f7f4 fde8 bl 80004c8 <__aeabi_dmul>
|
|
800b8f8: 4632 mov r2, r6
|
|
800b8fa: 463b mov r3, r7
|
|
800b8fc: f7f4 fc2c bl 8000158 <__aeabi_dsub>
|
|
800b900: 460b mov r3, r1
|
|
800b902: 4602 mov r2, r0
|
|
800b904: 4680 mov r8, r0
|
|
800b906: 4689 mov r9, r1
|
|
800b908: e9dd 0104 ldrd r0, r1, [sp, #16]
|
|
800b90c: f7f4 fc24 bl 8000158 <__aeabi_dsub>
|
|
800b910: f3c1 530a ubfx r3, r1, #20, #11
|
|
800b914: ebaa 0a03 sub.w sl, sl, r3
|
|
800b918: f1ba 0f31 cmp.w sl, #49 ; 0x31
|
|
800b91c: dc06 bgt.n 800b92c <__ieee754_rem_pio2+0x264>
|
|
800b91e: e9dd 6704 ldrd r6, r7, [sp, #16]
|
|
800b922: 4602 mov r2, r0
|
|
800b924: 460b mov r3, r1
|
|
800b926: e9c4 2300 strd r2, r3, [r4]
|
|
800b92a: e7a5 b.n 800b878 <__ieee754_rem_pio2+0x1b0>
|
|
800b92c: a326 add r3, pc, #152 ; (adr r3, 800b9c8 <__ieee754_rem_pio2+0x300>)
|
|
800b92e: e9d3 2300 ldrd r2, r3, [r3]
|
|
800b932: e9dd 0102 ldrd r0, r1, [sp, #8]
|
|
800b936: f7f4 fdc7 bl 80004c8 <__aeabi_dmul>
|
|
800b93a: 4680 mov r8, r0
|
|
800b93c: 4689 mov r9, r1
|
|
800b93e: 4602 mov r2, r0
|
|
800b940: 460b mov r3, r1
|
|
800b942: e9dd 0104 ldrd r0, r1, [sp, #16]
|
|
800b946: f7f4 fc07 bl 8000158 <__aeabi_dsub>
|
|
800b94a: 4602 mov r2, r0
|
|
800b94c: 460b mov r3, r1
|
|
800b94e: 4606 mov r6, r0
|
|
800b950: 460f mov r7, r1
|
|
800b952: e9dd 0104 ldrd r0, r1, [sp, #16]
|
|
800b956: f7f4 fbff bl 8000158 <__aeabi_dsub>
|
|
800b95a: 4642 mov r2, r8
|
|
800b95c: 464b mov r3, r9
|
|
800b95e: f7f4 fbfb bl 8000158 <__aeabi_dsub>
|
|
800b962: a31b add r3, pc, #108 ; (adr r3, 800b9d0 <__ieee754_rem_pio2+0x308>)
|
|
800b964: e9d3 2300 ldrd r2, r3, [r3]
|
|
800b968: 4680 mov r8, r0
|
|
800b96a: 4689 mov r9, r1
|
|
800b96c: e9dd 0102 ldrd r0, r1, [sp, #8]
|
|
800b970: f7f4 fdaa bl 80004c8 <__aeabi_dmul>
|
|
800b974: 4642 mov r2, r8
|
|
800b976: 464b mov r3, r9
|
|
800b978: f7f4 fbee bl 8000158 <__aeabi_dsub>
|
|
800b97c: 4680 mov r8, r0
|
|
800b97e: 4689 mov r9, r1
|
|
800b980: e75f b.n 800b842 <__ieee754_rem_pio2+0x17a>
|
|
800b982: 4a1b ldr r2, [pc, #108] ; (800b9f0 <__ieee754_rem_pio2+0x328>)
|
|
800b984: 4592 cmp sl, r2
|
|
800b986: dd35 ble.n 800b9f4 <__ieee754_rem_pio2+0x32c>
|
|
800b988: 4602 mov r2, r0
|
|
800b98a: 460b mov r3, r1
|
|
800b98c: f7f4 fbe4 bl 8000158 <__aeabi_dsub>
|
|
800b990: e9c4 0102 strd r0, r1, [r4, #8]
|
|
800b994: e9c4 0100 strd r0, r1, [r4]
|
|
800b998: e6a6 b.n 800b6e8 <__ieee754_rem_pio2+0x20>
|
|
800b99a: bf00 nop
|
|
800b99c: f3af 8000 nop.w
|
|
800b9a0: 54400000 .word 0x54400000
|
|
800b9a4: 3ff921fb .word 0x3ff921fb
|
|
800b9a8: 1a626331 .word 0x1a626331
|
|
800b9ac: 3dd0b461 .word 0x3dd0b461
|
|
800b9b0: 1a600000 .word 0x1a600000
|
|
800b9b4: 3dd0b461 .word 0x3dd0b461
|
|
800b9b8: 2e037073 .word 0x2e037073
|
|
800b9bc: 3ba3198a .word 0x3ba3198a
|
|
800b9c0: 6dc9c883 .word 0x6dc9c883
|
|
800b9c4: 3fe45f30 .word 0x3fe45f30
|
|
800b9c8: 2e000000 .word 0x2e000000
|
|
800b9cc: 3ba3198a .word 0x3ba3198a
|
|
800b9d0: 252049c1 .word 0x252049c1
|
|
800b9d4: 397b839a .word 0x397b839a
|
|
800b9d8: 3fe921fb .word 0x3fe921fb
|
|
800b9dc: 4002d97b .word 0x4002d97b
|
|
800b9e0: 3ff921fb .word 0x3ff921fb
|
|
800b9e4: 413921fb .word 0x413921fb
|
|
800b9e8: 3fe00000 .word 0x3fe00000
|
|
800b9ec: 0800f054 .word 0x0800f054
|
|
800b9f0: 7fefffff .word 0x7fefffff
|
|
800b9f4: ea4f 552a mov.w r5, sl, asr #20
|
|
800b9f8: f2a5 4516 subw r5, r5, #1046 ; 0x416
|
|
800b9fc: ebaa 5105 sub.w r1, sl, r5, lsl #20
|
|
800ba00: 460f mov r7, r1
|
|
800ba02: 4606 mov r6, r0
|
|
800ba04: f7f4 fffa bl 80009fc <__aeabi_d2iz>
|
|
800ba08: f7f4 fcf4 bl 80003f4 <__aeabi_i2d>
|
|
800ba0c: 4602 mov r2, r0
|
|
800ba0e: 460b mov r3, r1
|
|
800ba10: 4630 mov r0, r6
|
|
800ba12: 4639 mov r1, r7
|
|
800ba14: e9cd 2306 strd r2, r3, [sp, #24]
|
|
800ba18: f7f4 fb9e bl 8000158 <__aeabi_dsub>
|
|
800ba1c: 2200 movs r2, #0
|
|
800ba1e: 4b20 ldr r3, [pc, #128] ; (800baa0 <__ieee754_rem_pio2+0x3d8>)
|
|
800ba20: f7f4 fd52 bl 80004c8 <__aeabi_dmul>
|
|
800ba24: 460f mov r7, r1
|
|
800ba26: 4606 mov r6, r0
|
|
800ba28: f7f4 ffe8 bl 80009fc <__aeabi_d2iz>
|
|
800ba2c: f7f4 fce2 bl 80003f4 <__aeabi_i2d>
|
|
800ba30: 4602 mov r2, r0
|
|
800ba32: 460b mov r3, r1
|
|
800ba34: 4630 mov r0, r6
|
|
800ba36: 4639 mov r1, r7
|
|
800ba38: e9cd 2308 strd r2, r3, [sp, #32]
|
|
800ba3c: f7f4 fb8c bl 8000158 <__aeabi_dsub>
|
|
800ba40: 2200 movs r2, #0
|
|
800ba42: 4b17 ldr r3, [pc, #92] ; (800baa0 <__ieee754_rem_pio2+0x3d8>)
|
|
800ba44: f7f4 fd40 bl 80004c8 <__aeabi_dmul>
|
|
800ba48: f04f 0803 mov.w r8, #3
|
|
800ba4c: 2600 movs r6, #0
|
|
800ba4e: 2700 movs r7, #0
|
|
800ba50: e9cd 010a strd r0, r1, [sp, #40] ; 0x28
|
|
800ba54: f10d 0930 add.w r9, sp, #48 ; 0x30
|
|
800ba58: 4632 mov r2, r6
|
|
800ba5a: e979 0102 ldrd r0, r1, [r9, #-8]!
|
|
800ba5e: 463b mov r3, r7
|
|
800ba60: f108 3aff add.w sl, r8, #4294967295 ; 0xffffffff
|
|
800ba64: f7f4 ff98 bl 8000998 <__aeabi_dcmpeq>
|
|
800ba68: b9b8 cbnz r0, 800ba9a <__ieee754_rem_pio2+0x3d2>
|
|
800ba6a: 4b0e ldr r3, [pc, #56] ; (800baa4 <__ieee754_rem_pio2+0x3dc>)
|
|
800ba6c: 462a mov r2, r5
|
|
800ba6e: 9301 str r3, [sp, #4]
|
|
800ba70: 2302 movs r3, #2
|
|
800ba72: 4621 mov r1, r4
|
|
800ba74: 9300 str r3, [sp, #0]
|
|
800ba76: a806 add r0, sp, #24
|
|
800ba78: 4643 mov r3, r8
|
|
800ba7a: f000 f8d3 bl 800bc24 <__kernel_rem_pio2>
|
|
800ba7e: f1bb 0f00 cmp.w fp, #0
|
|
800ba82: 4605 mov r5, r0
|
|
800ba84: f6bf ae56 bge.w 800b734 <__ieee754_rem_pio2+0x6c>
|
|
800ba88: 6863 ldr r3, [r4, #4]
|
|
800ba8a: f103 4300 add.w r3, r3, #2147483648 ; 0x80000000
|
|
800ba8e: 6063 str r3, [r4, #4]
|
|
800ba90: 68e3 ldr r3, [r4, #12]
|
|
800ba92: f103 4300 add.w r3, r3, #2147483648 ; 0x80000000
|
|
800ba96: 60e3 str r3, [r4, #12]
|
|
800ba98: e708 b.n 800b8ac <__ieee754_rem_pio2+0x1e4>
|
|
800ba9a: 46d0 mov r8, sl
|
|
800ba9c: e7dc b.n 800ba58 <__ieee754_rem_pio2+0x390>
|
|
800ba9e: bf00 nop
|
|
800baa0: 41700000 .word 0x41700000
|
|
800baa4: 0800f0d4 .word 0x0800f0d4
|
|
|
|
0800baa8 <__kernel_cos>:
|
|
800baa8: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
|
800baac: f021 4600 bic.w r6, r1, #2147483648 ; 0x80000000
|
|
800bab0: f1b6 5f79 cmp.w r6, #1044381696 ; 0x3e400000
|
|
800bab4: 4680 mov r8, r0
|
|
800bab6: 460f mov r7, r1
|
|
800bab8: e9cd 2300 strd r2, r3, [sp]
|
|
800babc: da04 bge.n 800bac8 <__kernel_cos+0x20>
|
|
800babe: f7f4 ff9d bl 80009fc <__aeabi_d2iz>
|
|
800bac2: 2800 cmp r0, #0
|
|
800bac4: f000 8086 beq.w 800bbd4 <__kernel_cos+0x12c>
|
|
800bac8: 4642 mov r2, r8
|
|
800baca: 463b mov r3, r7
|
|
800bacc: 4640 mov r0, r8
|
|
800bace: 4639 mov r1, r7
|
|
800bad0: f7f4 fcfa bl 80004c8 <__aeabi_dmul>
|
|
800bad4: 2200 movs r2, #0
|
|
800bad6: 4b4e ldr r3, [pc, #312] ; (800bc10 <__kernel_cos+0x168>)
|
|
800bad8: 4604 mov r4, r0
|
|
800bada: 460d mov r5, r1
|
|
800badc: f7f4 fcf4 bl 80004c8 <__aeabi_dmul>
|
|
800bae0: a33f add r3, pc, #252 ; (adr r3, 800bbe0 <__kernel_cos+0x138>)
|
|
800bae2: e9d3 2300 ldrd r2, r3, [r3]
|
|
800bae6: 4682 mov sl, r0
|
|
800bae8: 468b mov fp, r1
|
|
800baea: 4620 mov r0, r4
|
|
800baec: 4629 mov r1, r5
|
|
800baee: f7f4 fceb bl 80004c8 <__aeabi_dmul>
|
|
800baf2: a33d add r3, pc, #244 ; (adr r3, 800bbe8 <__kernel_cos+0x140>)
|
|
800baf4: e9d3 2300 ldrd r2, r3, [r3]
|
|
800baf8: f7f4 fb30 bl 800015c <__adddf3>
|
|
800bafc: 4622 mov r2, r4
|
|
800bafe: 462b mov r3, r5
|
|
800bb00: f7f4 fce2 bl 80004c8 <__aeabi_dmul>
|
|
800bb04: a33a add r3, pc, #232 ; (adr r3, 800bbf0 <__kernel_cos+0x148>)
|
|
800bb06: e9d3 2300 ldrd r2, r3, [r3]
|
|
800bb0a: f7f4 fb25 bl 8000158 <__aeabi_dsub>
|
|
800bb0e: 4622 mov r2, r4
|
|
800bb10: 462b mov r3, r5
|
|
800bb12: f7f4 fcd9 bl 80004c8 <__aeabi_dmul>
|
|
800bb16: a338 add r3, pc, #224 ; (adr r3, 800bbf8 <__kernel_cos+0x150>)
|
|
800bb18: e9d3 2300 ldrd r2, r3, [r3]
|
|
800bb1c: f7f4 fb1e bl 800015c <__adddf3>
|
|
800bb20: 4622 mov r2, r4
|
|
800bb22: 462b mov r3, r5
|
|
800bb24: f7f4 fcd0 bl 80004c8 <__aeabi_dmul>
|
|
800bb28: a335 add r3, pc, #212 ; (adr r3, 800bc00 <__kernel_cos+0x158>)
|
|
800bb2a: e9d3 2300 ldrd r2, r3, [r3]
|
|
800bb2e: f7f4 fb13 bl 8000158 <__aeabi_dsub>
|
|
800bb32: 4622 mov r2, r4
|
|
800bb34: 462b mov r3, r5
|
|
800bb36: f7f4 fcc7 bl 80004c8 <__aeabi_dmul>
|
|
800bb3a: a333 add r3, pc, #204 ; (adr r3, 800bc08 <__kernel_cos+0x160>)
|
|
800bb3c: e9d3 2300 ldrd r2, r3, [r3]
|
|
800bb40: f7f4 fb0c bl 800015c <__adddf3>
|
|
800bb44: 4622 mov r2, r4
|
|
800bb46: 462b mov r3, r5
|
|
800bb48: f7f4 fcbe bl 80004c8 <__aeabi_dmul>
|
|
800bb4c: 4622 mov r2, r4
|
|
800bb4e: 462b mov r3, r5
|
|
800bb50: f7f4 fcba bl 80004c8 <__aeabi_dmul>
|
|
800bb54: e9dd 2300 ldrd r2, r3, [sp]
|
|
800bb58: 4604 mov r4, r0
|
|
800bb5a: 460d mov r5, r1
|
|
800bb5c: 4640 mov r0, r8
|
|
800bb5e: 4639 mov r1, r7
|
|
800bb60: f7f4 fcb2 bl 80004c8 <__aeabi_dmul>
|
|
800bb64: 460b mov r3, r1
|
|
800bb66: 4602 mov r2, r0
|
|
800bb68: 4629 mov r1, r5
|
|
800bb6a: 4620 mov r0, r4
|
|
800bb6c: f7f4 faf4 bl 8000158 <__aeabi_dsub>
|
|
800bb70: 4b28 ldr r3, [pc, #160] ; (800bc14 <__kernel_cos+0x16c>)
|
|
800bb72: 4680 mov r8, r0
|
|
800bb74: 429e cmp r6, r3
|
|
800bb76: 4689 mov r9, r1
|
|
800bb78: dc0e bgt.n 800bb98 <__kernel_cos+0xf0>
|
|
800bb7a: 4602 mov r2, r0
|
|
800bb7c: 460b mov r3, r1
|
|
800bb7e: 4650 mov r0, sl
|
|
800bb80: 4659 mov r1, fp
|
|
800bb82: f7f4 fae9 bl 8000158 <__aeabi_dsub>
|
|
800bb86: 4602 mov r2, r0
|
|
800bb88: 2000 movs r0, #0
|
|
800bb8a: 460b mov r3, r1
|
|
800bb8c: 4922 ldr r1, [pc, #136] ; (800bc18 <__kernel_cos+0x170>)
|
|
800bb8e: f7f4 fae3 bl 8000158 <__aeabi_dsub>
|
|
800bb92: b003 add sp, #12
|
|
800bb94: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
|
800bb98: 2400 movs r4, #0
|
|
800bb9a: 4b20 ldr r3, [pc, #128] ; (800bc1c <__kernel_cos+0x174>)
|
|
800bb9c: 4622 mov r2, r4
|
|
800bb9e: 429e cmp r6, r3
|
|
800bba0: bfcc ite gt
|
|
800bba2: 4d1f ldrgt r5, [pc, #124] ; (800bc20 <__kernel_cos+0x178>)
|
|
800bba4: f5a6 1500 suble.w r5, r6, #2097152 ; 0x200000
|
|
800bba8: 462b mov r3, r5
|
|
800bbaa: 2000 movs r0, #0
|
|
800bbac: 491a ldr r1, [pc, #104] ; (800bc18 <__kernel_cos+0x170>)
|
|
800bbae: f7f4 fad3 bl 8000158 <__aeabi_dsub>
|
|
800bbb2: 4622 mov r2, r4
|
|
800bbb4: 4606 mov r6, r0
|
|
800bbb6: 460f mov r7, r1
|
|
800bbb8: 462b mov r3, r5
|
|
800bbba: 4650 mov r0, sl
|
|
800bbbc: 4659 mov r1, fp
|
|
800bbbe: f7f4 facb bl 8000158 <__aeabi_dsub>
|
|
800bbc2: 4642 mov r2, r8
|
|
800bbc4: 464b mov r3, r9
|
|
800bbc6: f7f4 fac7 bl 8000158 <__aeabi_dsub>
|
|
800bbca: 4602 mov r2, r0
|
|
800bbcc: 460b mov r3, r1
|
|
800bbce: 4630 mov r0, r6
|
|
800bbd0: 4639 mov r1, r7
|
|
800bbd2: e7dc b.n 800bb8e <__kernel_cos+0xe6>
|
|
800bbd4: 2000 movs r0, #0
|
|
800bbd6: 4910 ldr r1, [pc, #64] ; (800bc18 <__kernel_cos+0x170>)
|
|
800bbd8: e7db b.n 800bb92 <__kernel_cos+0xea>
|
|
800bbda: bf00 nop
|
|
800bbdc: f3af 8000 nop.w
|
|
800bbe0: be8838d4 .word 0xbe8838d4
|
|
800bbe4: bda8fae9 .word 0xbda8fae9
|
|
800bbe8: bdb4b1c4 .word 0xbdb4b1c4
|
|
800bbec: 3e21ee9e .word 0x3e21ee9e
|
|
800bbf0: 809c52ad .word 0x809c52ad
|
|
800bbf4: 3e927e4f .word 0x3e927e4f
|
|
800bbf8: 19cb1590 .word 0x19cb1590
|
|
800bbfc: 3efa01a0 .word 0x3efa01a0
|
|
800bc00: 16c15177 .word 0x16c15177
|
|
800bc04: 3f56c16c .word 0x3f56c16c
|
|
800bc08: 5555554c .word 0x5555554c
|
|
800bc0c: 3fa55555 .word 0x3fa55555
|
|
800bc10: 3fe00000 .word 0x3fe00000
|
|
800bc14: 3fd33332 .word 0x3fd33332
|
|
800bc18: 3ff00000 .word 0x3ff00000
|
|
800bc1c: 3fe90000 .word 0x3fe90000
|
|
800bc20: 3fd20000 .word 0x3fd20000
|
|
|
|
0800bc24 <__kernel_rem_pio2>:
|
|
800bc24: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
|
800bc28: f5ad 7d19 sub.w sp, sp, #612 ; 0x264
|
|
800bc2c: 9307 str r3, [sp, #28]
|
|
800bc2e: 9104 str r1, [sp, #16]
|
|
800bc30: 4bbf ldr r3, [pc, #764] ; (800bf30 <__kernel_rem_pio2+0x30c>)
|
|
800bc32: 99a2 ldr r1, [sp, #648] ; 0x288
|
|
800bc34: 1ed4 subs r4, r2, #3
|
|
800bc36: f853 3021 ldr.w r3, [r3, r1, lsl #2]
|
|
800bc3a: 2500 movs r5, #0
|
|
800bc3c: 9302 str r3, [sp, #8]
|
|
800bc3e: 9b07 ldr r3, [sp, #28]
|
|
800bc40: 9008 str r0, [sp, #32]
|
|
800bc42: 3b01 subs r3, #1
|
|
800bc44: 9306 str r3, [sp, #24]
|
|
800bc46: 2318 movs r3, #24
|
|
800bc48: fb94 f4f3 sdiv r4, r4, r3
|
|
800bc4c: f06f 0317 mvn.w r3, #23
|
|
800bc50: ea24 74e4 bic.w r4, r4, r4, asr #31
|
|
800bc54: fb04 3303 mla r3, r4, r3, r3
|
|
800bc58: eb03 0a02 add.w sl, r3, r2
|
|
800bc5c: 9a06 ldr r2, [sp, #24]
|
|
800bc5e: 9b02 ldr r3, [sp, #8]
|
|
800bc60: 1aa7 subs r7, r4, r2
|
|
800bc62: eb03 0802 add.w r8, r3, r2
|
|
800bc66: 9ba3 ldr r3, [sp, #652] ; 0x28c
|
|
800bc68: 2200 movs r2, #0
|
|
800bc6a: eb03 0987 add.w r9, r3, r7, lsl #2
|
|
800bc6e: 2300 movs r3, #0
|
|
800bc70: ae1e add r6, sp, #120 ; 0x78
|
|
800bc72: 4545 cmp r5, r8
|
|
800bc74: dd14 ble.n 800bca0 <__kernel_rem_pio2+0x7c>
|
|
800bc76: 2600 movs r6, #0
|
|
800bc78: f50d 7bdc add.w fp, sp, #440 ; 0x1b8
|
|
800bc7c: 9b02 ldr r3, [sp, #8]
|
|
800bc7e: 429e cmp r6, r3
|
|
800bc80: dc39 bgt.n 800bcf6 <__kernel_rem_pio2+0xd2>
|
|
800bc82: 9b08 ldr r3, [sp, #32]
|
|
800bc84: f04f 0800 mov.w r8, #0
|
|
800bc88: 3b08 subs r3, #8
|
|
800bc8a: 9300 str r3, [sp, #0]
|
|
800bc8c: 9b07 ldr r3, [sp, #28]
|
|
800bc8e: f04f 0900 mov.w r9, #0
|
|
800bc92: 199d adds r5, r3, r6
|
|
800bc94: ab20 add r3, sp, #128 ; 0x80
|
|
800bc96: eb03 03c5 add.w r3, r3, r5, lsl #3
|
|
800bc9a: 9305 str r3, [sp, #20]
|
|
800bc9c: 2700 movs r7, #0
|
|
800bc9e: e023 b.n 800bce8 <__kernel_rem_pio2+0xc4>
|
|
800bca0: 42ef cmn r7, r5
|
|
800bca2: d40b bmi.n 800bcbc <__kernel_rem_pio2+0x98>
|
|
800bca4: f859 0025 ldr.w r0, [r9, r5, lsl #2]
|
|
800bca8: e9cd 2300 strd r2, r3, [sp]
|
|
800bcac: f7f4 fba2 bl 80003f4 <__aeabi_i2d>
|
|
800bcb0: e9dd 2300 ldrd r2, r3, [sp]
|
|
800bcb4: e9e6 0102 strd r0, r1, [r6, #8]!
|
|
800bcb8: 3501 adds r5, #1
|
|
800bcba: e7da b.n 800bc72 <__kernel_rem_pio2+0x4e>
|
|
800bcbc: 4610 mov r0, r2
|
|
800bcbe: 4619 mov r1, r3
|
|
800bcc0: e7f8 b.n 800bcb4 <__kernel_rem_pio2+0x90>
|
|
800bcc2: 9905 ldr r1, [sp, #20]
|
|
800bcc4: 9d00 ldr r5, [sp, #0]
|
|
800bcc6: e971 2302 ldrd r2, r3, [r1, #-8]!
|
|
800bcca: 9105 str r1, [sp, #20]
|
|
800bccc: e9f5 0102 ldrd r0, r1, [r5, #8]!
|
|
800bcd0: 9500 str r5, [sp, #0]
|
|
800bcd2: f7f4 fbf9 bl 80004c8 <__aeabi_dmul>
|
|
800bcd6: 4602 mov r2, r0
|
|
800bcd8: 460b mov r3, r1
|
|
800bcda: 4640 mov r0, r8
|
|
800bcdc: 4649 mov r1, r9
|
|
800bcde: f7f4 fa3d bl 800015c <__adddf3>
|
|
800bce2: 4680 mov r8, r0
|
|
800bce4: 4689 mov r9, r1
|
|
800bce6: 3701 adds r7, #1
|
|
800bce8: 9b06 ldr r3, [sp, #24]
|
|
800bcea: 429f cmp r7, r3
|
|
800bcec: dde9 ble.n 800bcc2 <__kernel_rem_pio2+0x9e>
|
|
800bcee: e9eb 8902 strd r8, r9, [fp, #8]!
|
|
800bcf2: 3601 adds r6, #1
|
|
800bcf4: e7c2 b.n 800bc7c <__kernel_rem_pio2+0x58>
|
|
800bcf6: 9b02 ldr r3, [sp, #8]
|
|
800bcf8: aa0c add r2, sp, #48 ; 0x30
|
|
800bcfa: eb02 0383 add.w r3, r2, r3, lsl #2
|
|
800bcfe: 930b str r3, [sp, #44] ; 0x2c
|
|
800bd00: 9ba3 ldr r3, [sp, #652] ; 0x28c
|
|
800bd02: 9f02 ldr r7, [sp, #8]
|
|
800bd04: eb03 0384 add.w r3, r3, r4, lsl #2
|
|
800bd08: 930a str r3, [sp, #40] ; 0x28
|
|
800bd0a: 2600 movs r6, #0
|
|
800bd0c: ab98 add r3, sp, #608 ; 0x260
|
|
800bd0e: f107 5b00 add.w fp, r7, #536870912 ; 0x20000000
|
|
800bd12: eb03 03c7 add.w r3, r3, r7, lsl #3
|
|
800bd16: f10b 3bff add.w fp, fp, #4294967295 ; 0xffffffff
|
|
800bd1a: e953 8928 ldrd r8, r9, [r3, #-160] ; 0xa0
|
|
800bd1e: ea4f 0bcb mov.w fp, fp, lsl #3
|
|
800bd22: ab98 add r3, sp, #608 ; 0x260
|
|
800bd24: 445b add r3, fp
|
|
800bd26: f1a3 0498 sub.w r4, r3, #152 ; 0x98
|
|
800bd2a: 1bbb subs r3, r7, r6
|
|
800bd2c: 2b00 cmp r3, #0
|
|
800bd2e: dc71 bgt.n 800be14 <__kernel_rem_pio2+0x1f0>
|
|
800bd30: 4652 mov r2, sl
|
|
800bd32: 4640 mov r0, r8
|
|
800bd34: 4649 mov r1, r9
|
|
800bd36: f000 fbff bl 800c538 <scalbn>
|
|
800bd3a: 2200 movs r2, #0
|
|
800bd3c: f04f 537f mov.w r3, #1069547520 ; 0x3fc00000
|
|
800bd40: 4604 mov r4, r0
|
|
800bd42: 460d mov r5, r1
|
|
800bd44: f7f4 fbc0 bl 80004c8 <__aeabi_dmul>
|
|
800bd48: f000 fb72 bl 800c430 <floor>
|
|
800bd4c: 2200 movs r2, #0
|
|
800bd4e: 4b79 ldr r3, [pc, #484] ; (800bf34 <__kernel_rem_pio2+0x310>)
|
|
800bd50: f7f4 fbba bl 80004c8 <__aeabi_dmul>
|
|
800bd54: 4602 mov r2, r0
|
|
800bd56: 460b mov r3, r1
|
|
800bd58: 4620 mov r0, r4
|
|
800bd5a: 4629 mov r1, r5
|
|
800bd5c: f7f4 f9fc bl 8000158 <__aeabi_dsub>
|
|
800bd60: 460d mov r5, r1
|
|
800bd62: 4604 mov r4, r0
|
|
800bd64: f7f4 fe4a bl 80009fc <__aeabi_d2iz>
|
|
800bd68: 9005 str r0, [sp, #20]
|
|
800bd6a: f7f4 fb43 bl 80003f4 <__aeabi_i2d>
|
|
800bd6e: 4602 mov r2, r0
|
|
800bd70: 460b mov r3, r1
|
|
800bd72: 4620 mov r0, r4
|
|
800bd74: 4629 mov r1, r5
|
|
800bd76: f7f4 f9ef bl 8000158 <__aeabi_dsub>
|
|
800bd7a: f1ba 0f00 cmp.w sl, #0
|
|
800bd7e: 4680 mov r8, r0
|
|
800bd80: 4689 mov r9, r1
|
|
800bd82: dd6c ble.n 800be5e <__kernel_rem_pio2+0x23a>
|
|
800bd84: 1e7a subs r2, r7, #1
|
|
800bd86: ab0c add r3, sp, #48 ; 0x30
|
|
800bd88: f853 0022 ldr.w r0, [r3, r2, lsl #2]
|
|
800bd8c: f1ca 0118 rsb r1, sl, #24
|
|
800bd90: 9c05 ldr r4, [sp, #20]
|
|
800bd92: fa40 f301 asr.w r3, r0, r1
|
|
800bd96: 441c add r4, r3
|
|
800bd98: 408b lsls r3, r1
|
|
800bd9a: 1ac0 subs r0, r0, r3
|
|
800bd9c: ab0c add r3, sp, #48 ; 0x30
|
|
800bd9e: f843 0022 str.w r0, [r3, r2, lsl #2]
|
|
800bda2: f1ca 0317 rsb r3, sl, #23
|
|
800bda6: 9405 str r4, [sp, #20]
|
|
800bda8: fa40 f303 asr.w r3, r0, r3
|
|
800bdac: 9300 str r3, [sp, #0]
|
|
800bdae: 9b00 ldr r3, [sp, #0]
|
|
800bdb0: 2b00 cmp r3, #0
|
|
800bdb2: dd62 ble.n 800be7a <__kernel_rem_pio2+0x256>
|
|
800bdb4: 2200 movs r2, #0
|
|
800bdb6: f06f 417f mvn.w r1, #4278190080 ; 0xff000000
|
|
800bdba: 4614 mov r4, r2
|
|
800bdbc: 9b05 ldr r3, [sp, #20]
|
|
800bdbe: 3301 adds r3, #1
|
|
800bdc0: 9305 str r3, [sp, #20]
|
|
800bdc2: 4297 cmp r7, r2
|
|
800bdc4: f300 809f bgt.w 800bf06 <__kernel_rem_pio2+0x2e2>
|
|
800bdc8: f1ba 0f00 cmp.w sl, #0
|
|
800bdcc: dd07 ble.n 800bdde <__kernel_rem_pio2+0x1ba>
|
|
800bdce: f1ba 0f01 cmp.w sl, #1
|
|
800bdd2: f000 80bb beq.w 800bf4c <__kernel_rem_pio2+0x328>
|
|
800bdd6: f1ba 0f02 cmp.w sl, #2
|
|
800bdda: f000 80c1 beq.w 800bf60 <__kernel_rem_pio2+0x33c>
|
|
800bdde: 9b00 ldr r3, [sp, #0]
|
|
800bde0: 2b02 cmp r3, #2
|
|
800bde2: d14a bne.n 800be7a <__kernel_rem_pio2+0x256>
|
|
800bde4: 4642 mov r2, r8
|
|
800bde6: 464b mov r3, r9
|
|
800bde8: 2000 movs r0, #0
|
|
800bdea: 4953 ldr r1, [pc, #332] ; (800bf38 <__kernel_rem_pio2+0x314>)
|
|
800bdec: f7f4 f9b4 bl 8000158 <__aeabi_dsub>
|
|
800bdf0: 4680 mov r8, r0
|
|
800bdf2: 4689 mov r9, r1
|
|
800bdf4: 2c00 cmp r4, #0
|
|
800bdf6: d040 beq.n 800be7a <__kernel_rem_pio2+0x256>
|
|
800bdf8: 4652 mov r2, sl
|
|
800bdfa: 2000 movs r0, #0
|
|
800bdfc: 494e ldr r1, [pc, #312] ; (800bf38 <__kernel_rem_pio2+0x314>)
|
|
800bdfe: f000 fb9b bl 800c538 <scalbn>
|
|
800be02: 4602 mov r2, r0
|
|
800be04: 460b mov r3, r1
|
|
800be06: 4640 mov r0, r8
|
|
800be08: 4649 mov r1, r9
|
|
800be0a: f7f4 f9a5 bl 8000158 <__aeabi_dsub>
|
|
800be0e: 4680 mov r8, r0
|
|
800be10: 4689 mov r9, r1
|
|
800be12: e032 b.n 800be7a <__kernel_rem_pio2+0x256>
|
|
800be14: 2200 movs r2, #0
|
|
800be16: 4b49 ldr r3, [pc, #292] ; (800bf3c <__kernel_rem_pio2+0x318>)
|
|
800be18: 4640 mov r0, r8
|
|
800be1a: 4649 mov r1, r9
|
|
800be1c: f7f4 fb54 bl 80004c8 <__aeabi_dmul>
|
|
800be20: f7f4 fdec bl 80009fc <__aeabi_d2iz>
|
|
800be24: f7f4 fae6 bl 80003f4 <__aeabi_i2d>
|
|
800be28: 2200 movs r2, #0
|
|
800be2a: 4b45 ldr r3, [pc, #276] ; (800bf40 <__kernel_rem_pio2+0x31c>)
|
|
800be2c: e9cd 0100 strd r0, r1, [sp]
|
|
800be30: f7f4 fb4a bl 80004c8 <__aeabi_dmul>
|
|
800be34: 4602 mov r2, r0
|
|
800be36: 460b mov r3, r1
|
|
800be38: 4640 mov r0, r8
|
|
800be3a: 4649 mov r1, r9
|
|
800be3c: f7f4 f98c bl 8000158 <__aeabi_dsub>
|
|
800be40: f7f4 fddc bl 80009fc <__aeabi_d2iz>
|
|
800be44: ab0c add r3, sp, #48 ; 0x30
|
|
800be46: f843 0026 str.w r0, [r3, r6, lsl #2]
|
|
800be4a: e974 2302 ldrd r2, r3, [r4, #-8]!
|
|
800be4e: e9dd 0100 ldrd r0, r1, [sp]
|
|
800be52: f7f4 f983 bl 800015c <__adddf3>
|
|
800be56: 3601 adds r6, #1
|
|
800be58: 4680 mov r8, r0
|
|
800be5a: 4689 mov r9, r1
|
|
800be5c: e765 b.n 800bd2a <__kernel_rem_pio2+0x106>
|
|
800be5e: d105 bne.n 800be6c <__kernel_rem_pio2+0x248>
|
|
800be60: 1e7b subs r3, r7, #1
|
|
800be62: aa0c add r2, sp, #48 ; 0x30
|
|
800be64: f852 0023 ldr.w r0, [r2, r3, lsl #2]
|
|
800be68: 15c3 asrs r3, r0, #23
|
|
800be6a: e79f b.n 800bdac <__kernel_rem_pio2+0x188>
|
|
800be6c: 2200 movs r2, #0
|
|
800be6e: 4b35 ldr r3, [pc, #212] ; (800bf44 <__kernel_rem_pio2+0x320>)
|
|
800be70: f7f4 fdb0 bl 80009d4 <__aeabi_dcmpge>
|
|
800be74: 2800 cmp r0, #0
|
|
800be76: d143 bne.n 800bf00 <__kernel_rem_pio2+0x2dc>
|
|
800be78: 9000 str r0, [sp, #0]
|
|
800be7a: 2200 movs r2, #0
|
|
800be7c: 2300 movs r3, #0
|
|
800be7e: 4640 mov r0, r8
|
|
800be80: 4649 mov r1, r9
|
|
800be82: f7f4 fd89 bl 8000998 <__aeabi_dcmpeq>
|
|
800be86: 2800 cmp r0, #0
|
|
800be88: f000 80c3 beq.w 800c012 <__kernel_rem_pio2+0x3ee>
|
|
800be8c: 1e7c subs r4, r7, #1
|
|
800be8e: 4623 mov r3, r4
|
|
800be90: 2200 movs r2, #0
|
|
800be92: 9902 ldr r1, [sp, #8]
|
|
800be94: 428b cmp r3, r1
|
|
800be96: da6a bge.n 800bf6e <__kernel_rem_pio2+0x34a>
|
|
800be98: 2a00 cmp r2, #0
|
|
800be9a: f000 8084 beq.w 800bfa6 <__kernel_rem_pio2+0x382>
|
|
800be9e: ab0c add r3, sp, #48 ; 0x30
|
|
800bea0: f853 3024 ldr.w r3, [r3, r4, lsl #2]
|
|
800bea4: f1aa 0a18 sub.w sl, sl, #24
|
|
800bea8: 2b00 cmp r3, #0
|
|
800beaa: f000 80b0 beq.w 800c00e <__kernel_rem_pio2+0x3ea>
|
|
800beae: 4652 mov r2, sl
|
|
800beb0: 2000 movs r0, #0
|
|
800beb2: 4921 ldr r1, [pc, #132] ; (800bf38 <__kernel_rem_pio2+0x314>)
|
|
800beb4: f000 fb40 bl 800c538 <scalbn>
|
|
800beb8: 4625 mov r5, r4
|
|
800beba: 4606 mov r6, r0
|
|
800bebc: 460f mov r7, r1
|
|
800bebe: f04f 0a00 mov.w sl, #0
|
|
800bec2: 00e3 lsls r3, r4, #3
|
|
800bec4: aa98 add r2, sp, #608 ; 0x260
|
|
800bec6: eb02 0803 add.w r8, r2, r3
|
|
800beca: f8df b070 ldr.w fp, [pc, #112] ; 800bf3c <__kernel_rem_pio2+0x318>
|
|
800bece: 9306 str r3, [sp, #24]
|
|
800bed0: f1a8 0898 sub.w r8, r8, #152 ; 0x98
|
|
800bed4: 2d00 cmp r5, #0
|
|
800bed6: f280 80d2 bge.w 800c07e <__kernel_rem_pio2+0x45a>
|
|
800beda: 2500 movs r5, #0
|
|
800bedc: 9a06 ldr r2, [sp, #24]
|
|
800bede: ab98 add r3, sp, #608 ; 0x260
|
|
800bee0: 189e adds r6, r3, r2
|
|
800bee2: 3ea8 subs r6, #168 ; 0xa8
|
|
800bee4: 1b63 subs r3, r4, r5
|
|
800bee6: 2b00 cmp r3, #0
|
|
800bee8: f2c0 80f9 blt.w 800c0de <__kernel_rem_pio2+0x4ba>
|
|
800beec: f8df 9058 ldr.w r9, [pc, #88] ; 800bf48 <__kernel_rem_pio2+0x324>
|
|
800bef0: eba6 08c5 sub.w r8, r6, r5, lsl #3
|
|
800bef4: f04f 0a00 mov.w sl, #0
|
|
800bef8: f04f 0b00 mov.w fp, #0
|
|
800befc: 2700 movs r7, #0
|
|
800befe: e0e2 b.n 800c0c6 <__kernel_rem_pio2+0x4a2>
|
|
800bf00: 2302 movs r3, #2
|
|
800bf02: 9300 str r3, [sp, #0]
|
|
800bf04: e756 b.n 800bdb4 <__kernel_rem_pio2+0x190>
|
|
800bf06: ab0c add r3, sp, #48 ; 0x30
|
|
800bf08: f853 3022 ldr.w r3, [r3, r2, lsl #2]
|
|
800bf0c: b94c cbnz r4, 800bf22 <__kernel_rem_pio2+0x2fe>
|
|
800bf0e: b12b cbz r3, 800bf1c <__kernel_rem_pio2+0x2f8>
|
|
800bf10: f1c3 7380 rsb r3, r3, #16777216 ; 0x1000000
|
|
800bf14: a80c add r0, sp, #48 ; 0x30
|
|
800bf16: f840 3022 str.w r3, [r0, r2, lsl #2]
|
|
800bf1a: 2301 movs r3, #1
|
|
800bf1c: 3201 adds r2, #1
|
|
800bf1e: 461c mov r4, r3
|
|
800bf20: e74f b.n 800bdc2 <__kernel_rem_pio2+0x19e>
|
|
800bf22: 1acb subs r3, r1, r3
|
|
800bf24: a80c add r0, sp, #48 ; 0x30
|
|
800bf26: f840 3022 str.w r3, [r0, r2, lsl #2]
|
|
800bf2a: 4623 mov r3, r4
|
|
800bf2c: e7f6 b.n 800bf1c <__kernel_rem_pio2+0x2f8>
|
|
800bf2e: bf00 nop
|
|
800bf30: 0800f220 .word 0x0800f220
|
|
800bf34: 40200000 .word 0x40200000
|
|
800bf38: 3ff00000 .word 0x3ff00000
|
|
800bf3c: 3e700000 .word 0x3e700000
|
|
800bf40: 41700000 .word 0x41700000
|
|
800bf44: 3fe00000 .word 0x3fe00000
|
|
800bf48: 0800f1d8 .word 0x0800f1d8
|
|
800bf4c: 1e7a subs r2, r7, #1
|
|
800bf4e: ab0c add r3, sp, #48 ; 0x30
|
|
800bf50: f853 3022 ldr.w r3, [r3, r2, lsl #2]
|
|
800bf54: f3c3 0316 ubfx r3, r3, #0, #23
|
|
800bf58: a90c add r1, sp, #48 ; 0x30
|
|
800bf5a: f841 3022 str.w r3, [r1, r2, lsl #2]
|
|
800bf5e: e73e b.n 800bdde <__kernel_rem_pio2+0x1ba>
|
|
800bf60: 1e7a subs r2, r7, #1
|
|
800bf62: ab0c add r3, sp, #48 ; 0x30
|
|
800bf64: f853 3022 ldr.w r3, [r3, r2, lsl #2]
|
|
800bf68: f3c3 0315 ubfx r3, r3, #0, #22
|
|
800bf6c: e7f4 b.n 800bf58 <__kernel_rem_pio2+0x334>
|
|
800bf6e: a90c add r1, sp, #48 ; 0x30
|
|
800bf70: f851 1023 ldr.w r1, [r1, r3, lsl #2]
|
|
800bf74: 3b01 subs r3, #1
|
|
800bf76: 430a orrs r2, r1
|
|
800bf78: e78b b.n 800be92 <__kernel_rem_pio2+0x26e>
|
|
800bf7a: 3401 adds r4, #1
|
|
800bf7c: f853 2d04 ldr.w r2, [r3, #-4]!
|
|
800bf80: 2a00 cmp r2, #0
|
|
800bf82: d0fa beq.n 800bf7a <__kernel_rem_pio2+0x356>
|
|
800bf84: ab98 add r3, sp, #608 ; 0x260
|
|
800bf86: 449b add fp, r3
|
|
800bf88: 9b07 ldr r3, [sp, #28]
|
|
800bf8a: 1c7e adds r6, r7, #1
|
|
800bf8c: 19dd adds r5, r3, r7
|
|
800bf8e: ab98 add r3, sp, #608 ; 0x260
|
|
800bf90: eb03 05c5 add.w r5, r3, r5, lsl #3
|
|
800bf94: f1ab 0b98 sub.w fp, fp, #152 ; 0x98
|
|
800bf98: f5a5 75f4 sub.w r5, r5, #488 ; 0x1e8
|
|
800bf9c: 443c add r4, r7
|
|
800bf9e: 42b4 cmp r4, r6
|
|
800bfa0: da04 bge.n 800bfac <__kernel_rem_pio2+0x388>
|
|
800bfa2: 4627 mov r7, r4
|
|
800bfa4: e6b1 b.n 800bd0a <__kernel_rem_pio2+0xe6>
|
|
800bfa6: 9b0b ldr r3, [sp, #44] ; 0x2c
|
|
800bfa8: 2401 movs r4, #1
|
|
800bfaa: e7e7 b.n 800bf7c <__kernel_rem_pio2+0x358>
|
|
800bfac: f105 0308 add.w r3, r5, #8
|
|
800bfb0: 9309 str r3, [sp, #36] ; 0x24
|
|
800bfb2: 9b0a ldr r3, [sp, #40] ; 0x28
|
|
800bfb4: 2700 movs r7, #0
|
|
800bfb6: f853 0026 ldr.w r0, [r3, r6, lsl #2]
|
|
800bfba: f7f4 fa1b bl 80003f4 <__aeabi_i2d>
|
|
800bfbe: f04f 0800 mov.w r8, #0
|
|
800bfc2: f04f 0900 mov.w r9, #0
|
|
800bfc6: 9b08 ldr r3, [sp, #32]
|
|
800bfc8: e9c5 0102 strd r0, r1, [r5, #8]
|
|
800bfcc: 3b08 subs r3, #8
|
|
800bfce: 9300 str r3, [sp, #0]
|
|
800bfd0: f105 0310 add.w r3, r5, #16
|
|
800bfd4: 9305 str r3, [sp, #20]
|
|
800bfd6: 9b06 ldr r3, [sp, #24]
|
|
800bfd8: 429f cmp r7, r3
|
|
800bfda: dd04 ble.n 800bfe6 <__kernel_rem_pio2+0x3c2>
|
|
800bfdc: e9eb 8902 strd r8, r9, [fp, #8]!
|
|
800bfe0: 3601 adds r6, #1
|
|
800bfe2: 9d09 ldr r5, [sp, #36] ; 0x24
|
|
800bfe4: e7db b.n 800bf9e <__kernel_rem_pio2+0x37a>
|
|
800bfe6: 9905 ldr r1, [sp, #20]
|
|
800bfe8: 9d00 ldr r5, [sp, #0]
|
|
800bfea: e971 2302 ldrd r2, r3, [r1, #-8]!
|
|
800bfee: 9105 str r1, [sp, #20]
|
|
800bff0: e9f5 0102 ldrd r0, r1, [r5, #8]!
|
|
800bff4: 9500 str r5, [sp, #0]
|
|
800bff6: f7f4 fa67 bl 80004c8 <__aeabi_dmul>
|
|
800bffa: 4602 mov r2, r0
|
|
800bffc: 460b mov r3, r1
|
|
800bffe: 4640 mov r0, r8
|
|
800c000: 4649 mov r1, r9
|
|
800c002: f7f4 f8ab bl 800015c <__adddf3>
|
|
800c006: 3701 adds r7, #1
|
|
800c008: 4680 mov r8, r0
|
|
800c00a: 4689 mov r9, r1
|
|
800c00c: e7e3 b.n 800bfd6 <__kernel_rem_pio2+0x3b2>
|
|
800c00e: 3c01 subs r4, #1
|
|
800c010: e745 b.n 800be9e <__kernel_rem_pio2+0x27a>
|
|
800c012: f1ca 0200 rsb r2, sl, #0
|
|
800c016: 4640 mov r0, r8
|
|
800c018: 4649 mov r1, r9
|
|
800c01a: f000 fa8d bl 800c538 <scalbn>
|
|
800c01e: 2200 movs r2, #0
|
|
800c020: 4ba3 ldr r3, [pc, #652] ; (800c2b0 <__kernel_rem_pio2+0x68c>)
|
|
800c022: 4604 mov r4, r0
|
|
800c024: 460d mov r5, r1
|
|
800c026: f7f4 fcd5 bl 80009d4 <__aeabi_dcmpge>
|
|
800c02a: b1f8 cbz r0, 800c06c <__kernel_rem_pio2+0x448>
|
|
800c02c: 2200 movs r2, #0
|
|
800c02e: 4ba1 ldr r3, [pc, #644] ; (800c2b4 <__kernel_rem_pio2+0x690>)
|
|
800c030: 4620 mov r0, r4
|
|
800c032: 4629 mov r1, r5
|
|
800c034: f7f4 fa48 bl 80004c8 <__aeabi_dmul>
|
|
800c038: f7f4 fce0 bl 80009fc <__aeabi_d2iz>
|
|
800c03c: 4606 mov r6, r0
|
|
800c03e: f7f4 f9d9 bl 80003f4 <__aeabi_i2d>
|
|
800c042: 2200 movs r2, #0
|
|
800c044: 4b9a ldr r3, [pc, #616] ; (800c2b0 <__kernel_rem_pio2+0x68c>)
|
|
800c046: f7f4 fa3f bl 80004c8 <__aeabi_dmul>
|
|
800c04a: 460b mov r3, r1
|
|
800c04c: 4602 mov r2, r0
|
|
800c04e: 4629 mov r1, r5
|
|
800c050: 4620 mov r0, r4
|
|
800c052: f7f4 f881 bl 8000158 <__aeabi_dsub>
|
|
800c056: f7f4 fcd1 bl 80009fc <__aeabi_d2iz>
|
|
800c05a: 1c7c adds r4, r7, #1
|
|
800c05c: ab0c add r3, sp, #48 ; 0x30
|
|
800c05e: f843 0027 str.w r0, [r3, r7, lsl #2]
|
|
800c062: f10a 0a18 add.w sl, sl, #24
|
|
800c066: f843 6024 str.w r6, [r3, r4, lsl #2]
|
|
800c06a: e720 b.n 800beae <__kernel_rem_pio2+0x28a>
|
|
800c06c: 4620 mov r0, r4
|
|
800c06e: 4629 mov r1, r5
|
|
800c070: f7f4 fcc4 bl 80009fc <__aeabi_d2iz>
|
|
800c074: ab0c add r3, sp, #48 ; 0x30
|
|
800c076: f843 0027 str.w r0, [r3, r7, lsl #2]
|
|
800c07a: 463c mov r4, r7
|
|
800c07c: e717 b.n 800beae <__kernel_rem_pio2+0x28a>
|
|
800c07e: ab0c add r3, sp, #48 ; 0x30
|
|
800c080: f853 0025 ldr.w r0, [r3, r5, lsl #2]
|
|
800c084: f7f4 f9b6 bl 80003f4 <__aeabi_i2d>
|
|
800c088: 4632 mov r2, r6
|
|
800c08a: 463b mov r3, r7
|
|
800c08c: f7f4 fa1c bl 80004c8 <__aeabi_dmul>
|
|
800c090: 4652 mov r2, sl
|
|
800c092: e968 0102 strd r0, r1, [r8, #-8]!
|
|
800c096: 465b mov r3, fp
|
|
800c098: 4630 mov r0, r6
|
|
800c09a: 4639 mov r1, r7
|
|
800c09c: f7f4 fa14 bl 80004c8 <__aeabi_dmul>
|
|
800c0a0: 3d01 subs r5, #1
|
|
800c0a2: 4606 mov r6, r0
|
|
800c0a4: 460f mov r7, r1
|
|
800c0a6: e715 b.n 800bed4 <__kernel_rem_pio2+0x2b0>
|
|
800c0a8: e9f8 2302 ldrd r2, r3, [r8, #8]!
|
|
800c0ac: e9f9 0102 ldrd r0, r1, [r9, #8]!
|
|
800c0b0: f7f4 fa0a bl 80004c8 <__aeabi_dmul>
|
|
800c0b4: 4602 mov r2, r0
|
|
800c0b6: 460b mov r3, r1
|
|
800c0b8: 4650 mov r0, sl
|
|
800c0ba: 4659 mov r1, fp
|
|
800c0bc: f7f4 f84e bl 800015c <__adddf3>
|
|
800c0c0: 4682 mov sl, r0
|
|
800c0c2: 468b mov fp, r1
|
|
800c0c4: 3701 adds r7, #1
|
|
800c0c6: 9b02 ldr r3, [sp, #8]
|
|
800c0c8: 429f cmp r7, r3
|
|
800c0ca: dc01 bgt.n 800c0d0 <__kernel_rem_pio2+0x4ac>
|
|
800c0cc: 42bd cmp r5, r7
|
|
800c0ce: daeb bge.n 800c0a8 <__kernel_rem_pio2+0x484>
|
|
800c0d0: ab48 add r3, sp, #288 ; 0x120
|
|
800c0d2: eb03 03c5 add.w r3, r3, r5, lsl #3
|
|
800c0d6: e9c3 ab00 strd sl, fp, [r3]
|
|
800c0da: 3501 adds r5, #1
|
|
800c0dc: e702 b.n 800bee4 <__kernel_rem_pio2+0x2c0>
|
|
800c0de: 9ba2 ldr r3, [sp, #648] ; 0x288
|
|
800c0e0: 2b03 cmp r3, #3
|
|
800c0e2: d86c bhi.n 800c1be <__kernel_rem_pio2+0x59a>
|
|
800c0e4: e8df f003 tbb [pc, r3]
|
|
800c0e8: 022f2f59 .word 0x022f2f59
|
|
800c0ec: 9a06 ldr r2, [sp, #24]
|
|
800c0ee: ab48 add r3, sp, #288 ; 0x120
|
|
800c0f0: 189d adds r5, r3, r2
|
|
800c0f2: 46aa mov sl, r5
|
|
800c0f4: 46a3 mov fp, r4
|
|
800c0f6: f1bb 0f00 cmp.w fp, #0
|
|
800c0fa: f300 8087 bgt.w 800c20c <__kernel_rem_pio2+0x5e8>
|
|
800c0fe: 46a2 mov sl, r4
|
|
800c100: f1ba 0f01 cmp.w sl, #1
|
|
800c104: f300 809f bgt.w 800c246 <__kernel_rem_pio2+0x622>
|
|
800c108: 2700 movs r7, #0
|
|
800c10a: 463e mov r6, r7
|
|
800c10c: 9d06 ldr r5, [sp, #24]
|
|
800c10e: ab48 add r3, sp, #288 ; 0x120
|
|
800c110: 3508 adds r5, #8
|
|
800c112: 441d add r5, r3
|
|
800c114: 2c01 cmp r4, #1
|
|
800c116: f300 80b3 bgt.w 800c280 <__kernel_rem_pio2+0x65c>
|
|
800c11a: 9b00 ldr r3, [sp, #0]
|
|
800c11c: 9d48 ldr r5, [sp, #288] ; 0x120
|
|
800c11e: 9849 ldr r0, [sp, #292] ; 0x124
|
|
800c120: 9c4a ldr r4, [sp, #296] ; 0x128
|
|
800c122: 994b ldr r1, [sp, #300] ; 0x12c
|
|
800c124: 2b00 cmp r3, #0
|
|
800c126: f040 80b5 bne.w 800c294 <__kernel_rem_pio2+0x670>
|
|
800c12a: 4603 mov r3, r0
|
|
800c12c: 462a mov r2, r5
|
|
800c12e: 9804 ldr r0, [sp, #16]
|
|
800c130: e9c0 2300 strd r2, r3, [r0]
|
|
800c134: 4622 mov r2, r4
|
|
800c136: 460b mov r3, r1
|
|
800c138: e9c0 2302 strd r2, r3, [r0, #8]
|
|
800c13c: 463a mov r2, r7
|
|
800c13e: 4633 mov r3, r6
|
|
800c140: e9c0 2304 strd r2, r3, [r0, #16]
|
|
800c144: e03b b.n 800c1be <__kernel_rem_pio2+0x59a>
|
|
800c146: f04f 0c00 mov.w ip, #0
|
|
800c14a: 4626 mov r6, r4
|
|
800c14c: 4667 mov r7, ip
|
|
800c14e: 9d06 ldr r5, [sp, #24]
|
|
800c150: ab48 add r3, sp, #288 ; 0x120
|
|
800c152: 3508 adds r5, #8
|
|
800c154: 441d add r5, r3
|
|
800c156: 2e00 cmp r6, #0
|
|
800c158: da42 bge.n 800c1e0 <__kernel_rem_pio2+0x5bc>
|
|
800c15a: 9b00 ldr r3, [sp, #0]
|
|
800c15c: 2b00 cmp r3, #0
|
|
800c15e: d049 beq.n 800c1f4 <__kernel_rem_pio2+0x5d0>
|
|
800c160: f107 4100 add.w r1, r7, #2147483648 ; 0x80000000
|
|
800c164: 4662 mov r2, ip
|
|
800c166: 460b mov r3, r1
|
|
800c168: 9904 ldr r1, [sp, #16]
|
|
800c16a: 2601 movs r6, #1
|
|
800c16c: e9c1 2300 strd r2, r3, [r1]
|
|
800c170: a948 add r1, sp, #288 ; 0x120
|
|
800c172: 463b mov r3, r7
|
|
800c174: e9d1 0100 ldrd r0, r1, [r1]
|
|
800c178: f7f3 ffee bl 8000158 <__aeabi_dsub>
|
|
800c17c: 4684 mov ip, r0
|
|
800c17e: 460f mov r7, r1
|
|
800c180: ad48 add r5, sp, #288 ; 0x120
|
|
800c182: 42b4 cmp r4, r6
|
|
800c184: da38 bge.n 800c1f8 <__kernel_rem_pio2+0x5d4>
|
|
800c186: 9b00 ldr r3, [sp, #0]
|
|
800c188: b10b cbz r3, 800c18e <__kernel_rem_pio2+0x56a>
|
|
800c18a: f107 4700 add.w r7, r7, #2147483648 ; 0x80000000
|
|
800c18e: 4662 mov r2, ip
|
|
800c190: 463b mov r3, r7
|
|
800c192: 9904 ldr r1, [sp, #16]
|
|
800c194: e9c1 2302 strd r2, r3, [r1, #8]
|
|
800c198: e011 b.n 800c1be <__kernel_rem_pio2+0x59a>
|
|
800c19a: 2700 movs r7, #0
|
|
800c19c: 463d mov r5, r7
|
|
800c19e: 9b06 ldr r3, [sp, #24]
|
|
800c1a0: aa98 add r2, sp, #608 ; 0x260
|
|
800c1a2: 4413 add r3, r2
|
|
800c1a4: f5a3 769c sub.w r6, r3, #312 ; 0x138
|
|
800c1a8: 2c00 cmp r4, #0
|
|
800c1aa: da0f bge.n 800c1cc <__kernel_rem_pio2+0x5a8>
|
|
800c1ac: 9b00 ldr r3, [sp, #0]
|
|
800c1ae: b10b cbz r3, 800c1b4 <__kernel_rem_pio2+0x590>
|
|
800c1b0: f105 4500 add.w r5, r5, #2147483648 ; 0x80000000
|
|
800c1b4: 463a mov r2, r7
|
|
800c1b6: 462b mov r3, r5
|
|
800c1b8: 9904 ldr r1, [sp, #16]
|
|
800c1ba: e9c1 2300 strd r2, r3, [r1]
|
|
800c1be: 9b05 ldr r3, [sp, #20]
|
|
800c1c0: f003 0007 and.w r0, r3, #7
|
|
800c1c4: f50d 7d19 add.w sp, sp, #612 ; 0x264
|
|
800c1c8: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
|
800c1cc: 4638 mov r0, r7
|
|
800c1ce: e976 2302 ldrd r2, r3, [r6, #-8]!
|
|
800c1d2: 4629 mov r1, r5
|
|
800c1d4: f7f3 ffc2 bl 800015c <__adddf3>
|
|
800c1d8: 3c01 subs r4, #1
|
|
800c1da: 4607 mov r7, r0
|
|
800c1dc: 460d mov r5, r1
|
|
800c1de: e7e3 b.n 800c1a8 <__kernel_rem_pio2+0x584>
|
|
800c1e0: 4660 mov r0, ip
|
|
800c1e2: e975 2302 ldrd r2, r3, [r5, #-8]!
|
|
800c1e6: 4639 mov r1, r7
|
|
800c1e8: f7f3 ffb8 bl 800015c <__adddf3>
|
|
800c1ec: 3e01 subs r6, #1
|
|
800c1ee: 4684 mov ip, r0
|
|
800c1f0: 460f mov r7, r1
|
|
800c1f2: e7b0 b.n 800c156 <__kernel_rem_pio2+0x532>
|
|
800c1f4: 4639 mov r1, r7
|
|
800c1f6: e7b5 b.n 800c164 <__kernel_rem_pio2+0x540>
|
|
800c1f8: 4660 mov r0, ip
|
|
800c1fa: e9f5 2302 ldrd r2, r3, [r5, #8]!
|
|
800c1fe: 4639 mov r1, r7
|
|
800c200: f7f3 ffac bl 800015c <__adddf3>
|
|
800c204: 3601 adds r6, #1
|
|
800c206: 4684 mov ip, r0
|
|
800c208: 460f mov r7, r1
|
|
800c20a: e7ba b.n 800c182 <__kernel_rem_pio2+0x55e>
|
|
800c20c: e97a 8902 ldrd r8, r9, [sl, #-8]!
|
|
800c210: e9da 2302 ldrd r2, r3, [sl, #8]
|
|
800c214: 4640 mov r0, r8
|
|
800c216: 4649 mov r1, r9
|
|
800c218: e9cd 2302 strd r2, r3, [sp, #8]
|
|
800c21c: f7f3 ff9e bl 800015c <__adddf3>
|
|
800c220: 4602 mov r2, r0
|
|
800c222: 460b mov r3, r1
|
|
800c224: 4606 mov r6, r0
|
|
800c226: 460f mov r7, r1
|
|
800c228: 4640 mov r0, r8
|
|
800c22a: 4649 mov r1, r9
|
|
800c22c: f7f3 ff94 bl 8000158 <__aeabi_dsub>
|
|
800c230: e9dd 2302 ldrd r2, r3, [sp, #8]
|
|
800c234: f7f3 ff92 bl 800015c <__adddf3>
|
|
800c238: f10b 3bff add.w fp, fp, #4294967295 ; 0xffffffff
|
|
800c23c: e9ca 0102 strd r0, r1, [sl, #8]
|
|
800c240: e9ca 6700 strd r6, r7, [sl]
|
|
800c244: e757 b.n 800c0f6 <__kernel_rem_pio2+0x4d2>
|
|
800c246: e975 6702 ldrd r6, r7, [r5, #-8]!
|
|
800c24a: e9d5 2302 ldrd r2, r3, [r5, #8]
|
|
800c24e: 4630 mov r0, r6
|
|
800c250: 4639 mov r1, r7
|
|
800c252: e9cd 2302 strd r2, r3, [sp, #8]
|
|
800c256: f7f3 ff81 bl 800015c <__adddf3>
|
|
800c25a: 4602 mov r2, r0
|
|
800c25c: 460b mov r3, r1
|
|
800c25e: 4680 mov r8, r0
|
|
800c260: 4689 mov r9, r1
|
|
800c262: 4630 mov r0, r6
|
|
800c264: 4639 mov r1, r7
|
|
800c266: f7f3 ff77 bl 8000158 <__aeabi_dsub>
|
|
800c26a: e9dd 2302 ldrd r2, r3, [sp, #8]
|
|
800c26e: f7f3 ff75 bl 800015c <__adddf3>
|
|
800c272: f10a 3aff add.w sl, sl, #4294967295 ; 0xffffffff
|
|
800c276: e9c5 0102 strd r0, r1, [r5, #8]
|
|
800c27a: e9c5 8900 strd r8, r9, [r5]
|
|
800c27e: e73f b.n 800c100 <__kernel_rem_pio2+0x4dc>
|
|
800c280: 4638 mov r0, r7
|
|
800c282: e975 2302 ldrd r2, r3, [r5, #-8]!
|
|
800c286: 4631 mov r1, r6
|
|
800c288: f7f3 ff68 bl 800015c <__adddf3>
|
|
800c28c: 3c01 subs r4, #1
|
|
800c28e: 4607 mov r7, r0
|
|
800c290: 460e mov r6, r1
|
|
800c292: e73f b.n 800c114 <__kernel_rem_pio2+0x4f0>
|
|
800c294: 9b04 ldr r3, [sp, #16]
|
|
800c296: f100 4000 add.w r0, r0, #2147483648 ; 0x80000000
|
|
800c29a: f101 4100 add.w r1, r1, #2147483648 ; 0x80000000
|
|
800c29e: f106 4600 add.w r6, r6, #2147483648 ; 0x80000000
|
|
800c2a2: 601d str r5, [r3, #0]
|
|
800c2a4: e9c3 0401 strd r0, r4, [r3, #4]
|
|
800c2a8: e9c3 1703 strd r1, r7, [r3, #12]
|
|
800c2ac: 615e str r6, [r3, #20]
|
|
800c2ae: e786 b.n 800c1be <__kernel_rem_pio2+0x59a>
|
|
800c2b0: 41700000 .word 0x41700000
|
|
800c2b4: 3e700000 .word 0x3e700000
|
|
|
|
0800c2b8 <__kernel_sin>:
|
|
800c2b8: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
|
800c2bc: b086 sub sp, #24
|
|
800c2be: e9cd 2300 strd r2, r3, [sp]
|
|
800c2c2: f021 4300 bic.w r3, r1, #2147483648 ; 0x80000000
|
|
800c2c6: f1b3 5f79 cmp.w r3, #1044381696 ; 0x3e400000
|
|
800c2ca: 4682 mov sl, r0
|
|
800c2cc: 460c mov r4, r1
|
|
800c2ce: 9d0e ldr r5, [sp, #56] ; 0x38
|
|
800c2d0: da03 bge.n 800c2da <__kernel_sin+0x22>
|
|
800c2d2: f7f4 fb93 bl 80009fc <__aeabi_d2iz>
|
|
800c2d6: 2800 cmp r0, #0
|
|
800c2d8: d050 beq.n 800c37c <__kernel_sin+0xc4>
|
|
800c2da: 4652 mov r2, sl
|
|
800c2dc: 4623 mov r3, r4
|
|
800c2de: 4650 mov r0, sl
|
|
800c2e0: 4621 mov r1, r4
|
|
800c2e2: f7f4 f8f1 bl 80004c8 <__aeabi_dmul>
|
|
800c2e6: 4606 mov r6, r0
|
|
800c2e8: 460f mov r7, r1
|
|
800c2ea: 4602 mov r2, r0
|
|
800c2ec: 460b mov r3, r1
|
|
800c2ee: 4650 mov r0, sl
|
|
800c2f0: 4621 mov r1, r4
|
|
800c2f2: f7f4 f8e9 bl 80004c8 <__aeabi_dmul>
|
|
800c2f6: a33e add r3, pc, #248 ; (adr r3, 800c3f0 <__kernel_sin+0x138>)
|
|
800c2f8: e9d3 2300 ldrd r2, r3, [r3]
|
|
800c2fc: 4680 mov r8, r0
|
|
800c2fe: 4689 mov r9, r1
|
|
800c300: 4630 mov r0, r6
|
|
800c302: 4639 mov r1, r7
|
|
800c304: f7f4 f8e0 bl 80004c8 <__aeabi_dmul>
|
|
800c308: a33b add r3, pc, #236 ; (adr r3, 800c3f8 <__kernel_sin+0x140>)
|
|
800c30a: e9d3 2300 ldrd r2, r3, [r3]
|
|
800c30e: f7f3 ff23 bl 8000158 <__aeabi_dsub>
|
|
800c312: 4632 mov r2, r6
|
|
800c314: 463b mov r3, r7
|
|
800c316: f7f4 f8d7 bl 80004c8 <__aeabi_dmul>
|
|
800c31a: a339 add r3, pc, #228 ; (adr r3, 800c400 <__kernel_sin+0x148>)
|
|
800c31c: e9d3 2300 ldrd r2, r3, [r3]
|
|
800c320: f7f3 ff1c bl 800015c <__adddf3>
|
|
800c324: 4632 mov r2, r6
|
|
800c326: 463b mov r3, r7
|
|
800c328: f7f4 f8ce bl 80004c8 <__aeabi_dmul>
|
|
800c32c: a336 add r3, pc, #216 ; (adr r3, 800c408 <__kernel_sin+0x150>)
|
|
800c32e: e9d3 2300 ldrd r2, r3, [r3]
|
|
800c332: f7f3 ff11 bl 8000158 <__aeabi_dsub>
|
|
800c336: 4632 mov r2, r6
|
|
800c338: 463b mov r3, r7
|
|
800c33a: f7f4 f8c5 bl 80004c8 <__aeabi_dmul>
|
|
800c33e: a334 add r3, pc, #208 ; (adr r3, 800c410 <__kernel_sin+0x158>)
|
|
800c340: e9d3 2300 ldrd r2, r3, [r3]
|
|
800c344: f7f3 ff0a bl 800015c <__adddf3>
|
|
800c348: e9cd 0102 strd r0, r1, [sp, #8]
|
|
800c34c: b9dd cbnz r5, 800c386 <__kernel_sin+0xce>
|
|
800c34e: 4602 mov r2, r0
|
|
800c350: 460b mov r3, r1
|
|
800c352: 4630 mov r0, r6
|
|
800c354: 4639 mov r1, r7
|
|
800c356: f7f4 f8b7 bl 80004c8 <__aeabi_dmul>
|
|
800c35a: a32f add r3, pc, #188 ; (adr r3, 800c418 <__kernel_sin+0x160>)
|
|
800c35c: e9d3 2300 ldrd r2, r3, [r3]
|
|
800c360: f7f3 fefa bl 8000158 <__aeabi_dsub>
|
|
800c364: 4642 mov r2, r8
|
|
800c366: 464b mov r3, r9
|
|
800c368: f7f4 f8ae bl 80004c8 <__aeabi_dmul>
|
|
800c36c: 4602 mov r2, r0
|
|
800c36e: 460b mov r3, r1
|
|
800c370: 4650 mov r0, sl
|
|
800c372: 4621 mov r1, r4
|
|
800c374: f7f3 fef2 bl 800015c <__adddf3>
|
|
800c378: 4682 mov sl, r0
|
|
800c37a: 460c mov r4, r1
|
|
800c37c: 4650 mov r0, sl
|
|
800c37e: 4621 mov r1, r4
|
|
800c380: b006 add sp, #24
|
|
800c382: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
|
800c386: 2200 movs r2, #0
|
|
800c388: e9dd 0100 ldrd r0, r1, [sp]
|
|
800c38c: 4b24 ldr r3, [pc, #144] ; (800c420 <__kernel_sin+0x168>)
|
|
800c38e: f7f4 f89b bl 80004c8 <__aeabi_dmul>
|
|
800c392: e9dd 2302 ldrd r2, r3, [sp, #8]
|
|
800c396: e9cd 0104 strd r0, r1, [sp, #16]
|
|
800c39a: 4640 mov r0, r8
|
|
800c39c: 4649 mov r1, r9
|
|
800c39e: f7f4 f893 bl 80004c8 <__aeabi_dmul>
|
|
800c3a2: 4602 mov r2, r0
|
|
800c3a4: 460b mov r3, r1
|
|
800c3a6: e9dd 0104 ldrd r0, r1, [sp, #16]
|
|
800c3aa: f7f3 fed5 bl 8000158 <__aeabi_dsub>
|
|
800c3ae: 4632 mov r2, r6
|
|
800c3b0: 463b mov r3, r7
|
|
800c3b2: f7f4 f889 bl 80004c8 <__aeabi_dmul>
|
|
800c3b6: e9dd 2300 ldrd r2, r3, [sp]
|
|
800c3ba: f7f3 fecd bl 8000158 <__aeabi_dsub>
|
|
800c3be: a316 add r3, pc, #88 ; (adr r3, 800c418 <__kernel_sin+0x160>)
|
|
800c3c0: e9d3 2300 ldrd r2, r3, [r3]
|
|
800c3c4: 4606 mov r6, r0
|
|
800c3c6: 460f mov r7, r1
|
|
800c3c8: 4640 mov r0, r8
|
|
800c3ca: 4649 mov r1, r9
|
|
800c3cc: f7f4 f87c bl 80004c8 <__aeabi_dmul>
|
|
800c3d0: 4602 mov r2, r0
|
|
800c3d2: 460b mov r3, r1
|
|
800c3d4: 4630 mov r0, r6
|
|
800c3d6: 4639 mov r1, r7
|
|
800c3d8: f7f3 fec0 bl 800015c <__adddf3>
|
|
800c3dc: 4602 mov r2, r0
|
|
800c3de: 460b mov r3, r1
|
|
800c3e0: 4650 mov r0, sl
|
|
800c3e2: 4621 mov r1, r4
|
|
800c3e4: f7f3 feb8 bl 8000158 <__aeabi_dsub>
|
|
800c3e8: e7c6 b.n 800c378 <__kernel_sin+0xc0>
|
|
800c3ea: bf00 nop
|
|
800c3ec: f3af 8000 nop.w
|
|
800c3f0: 5acfd57c .word 0x5acfd57c
|
|
800c3f4: 3de5d93a .word 0x3de5d93a
|
|
800c3f8: 8a2b9ceb .word 0x8a2b9ceb
|
|
800c3fc: 3e5ae5e6 .word 0x3e5ae5e6
|
|
800c400: 57b1fe7d .word 0x57b1fe7d
|
|
800c404: 3ec71de3 .word 0x3ec71de3
|
|
800c408: 19c161d5 .word 0x19c161d5
|
|
800c40c: 3f2a01a0 .word 0x3f2a01a0
|
|
800c410: 1110f8a6 .word 0x1110f8a6
|
|
800c414: 3f811111 .word 0x3f811111
|
|
800c418: 55555549 .word 0x55555549
|
|
800c41c: 3fc55555 .word 0x3fc55555
|
|
800c420: 3fe00000 .word 0x3fe00000
|
|
|
|
0800c424 <fabs>:
|
|
800c424: f021 4300 bic.w r3, r1, #2147483648 ; 0x80000000
|
|
800c428: 4619 mov r1, r3
|
|
800c42a: 4770 bx lr
|
|
800c42c: 0000 movs r0, r0
|
|
...
|
|
|
|
0800c430 <floor>:
|
|
800c430: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
|
|
800c434: f3c1 580a ubfx r8, r1, #20, #11
|
|
800c438: f2a8 36ff subw r6, r8, #1023 ; 0x3ff
|
|
800c43c: 2e13 cmp r6, #19
|
|
800c43e: 4607 mov r7, r0
|
|
800c440: 460b mov r3, r1
|
|
800c442: 460c mov r4, r1
|
|
800c444: 4605 mov r5, r0
|
|
800c446: dc35 bgt.n 800c4b4 <floor+0x84>
|
|
800c448: 2e00 cmp r6, #0
|
|
800c44a: da16 bge.n 800c47a <floor+0x4a>
|
|
800c44c: a336 add r3, pc, #216 ; (adr r3, 800c528 <floor+0xf8>)
|
|
800c44e: e9d3 2300 ldrd r2, r3, [r3]
|
|
800c452: f7f3 fe83 bl 800015c <__adddf3>
|
|
800c456: 2200 movs r2, #0
|
|
800c458: 2300 movs r3, #0
|
|
800c45a: f7f4 fac5 bl 80009e8 <__aeabi_dcmpgt>
|
|
800c45e: b148 cbz r0, 800c474 <floor+0x44>
|
|
800c460: 2c00 cmp r4, #0
|
|
800c462: da5b bge.n 800c51c <floor+0xec>
|
|
800c464: 2500 movs r5, #0
|
|
800c466: f024 4300 bic.w r3, r4, #2147483648 ; 0x80000000
|
|
800c46a: 4a31 ldr r2, [pc, #196] ; (800c530 <floor+0x100>)
|
|
800c46c: 433b orrs r3, r7
|
|
800c46e: 42ab cmp r3, r5
|
|
800c470: bf18 it ne
|
|
800c472: 4614 movne r4, r2
|
|
800c474: 4623 mov r3, r4
|
|
800c476: 462f mov r7, r5
|
|
800c478: e026 b.n 800c4c8 <floor+0x98>
|
|
800c47a: 4a2e ldr r2, [pc, #184] ; (800c534 <floor+0x104>)
|
|
800c47c: fa42 f806 asr.w r8, r2, r6
|
|
800c480: ea01 0208 and.w r2, r1, r8
|
|
800c484: 4302 orrs r2, r0
|
|
800c486: d01f beq.n 800c4c8 <floor+0x98>
|
|
800c488: a327 add r3, pc, #156 ; (adr r3, 800c528 <floor+0xf8>)
|
|
800c48a: e9d3 2300 ldrd r2, r3, [r3]
|
|
800c48e: f7f3 fe65 bl 800015c <__adddf3>
|
|
800c492: 2200 movs r2, #0
|
|
800c494: 2300 movs r3, #0
|
|
800c496: f7f4 faa7 bl 80009e8 <__aeabi_dcmpgt>
|
|
800c49a: 2800 cmp r0, #0
|
|
800c49c: d0ea beq.n 800c474 <floor+0x44>
|
|
800c49e: 2c00 cmp r4, #0
|
|
800c4a0: bfbe ittt lt
|
|
800c4a2: f44f 1380 movlt.w r3, #1048576 ; 0x100000
|
|
800c4a6: fa43 f606 asrlt.w r6, r3, r6
|
|
800c4aa: 19a4 addlt r4, r4, r6
|
|
800c4ac: ea24 0408 bic.w r4, r4, r8
|
|
800c4b0: 2500 movs r5, #0
|
|
800c4b2: e7df b.n 800c474 <floor+0x44>
|
|
800c4b4: 2e33 cmp r6, #51 ; 0x33
|
|
800c4b6: dd0b ble.n 800c4d0 <floor+0xa0>
|
|
800c4b8: f5b6 6f80 cmp.w r6, #1024 ; 0x400
|
|
800c4bc: d104 bne.n 800c4c8 <floor+0x98>
|
|
800c4be: 4602 mov r2, r0
|
|
800c4c0: f7f3 fe4c bl 800015c <__adddf3>
|
|
800c4c4: 4607 mov r7, r0
|
|
800c4c6: 460b mov r3, r1
|
|
800c4c8: 4638 mov r0, r7
|
|
800c4ca: 4619 mov r1, r3
|
|
800c4cc: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
|
|
800c4d0: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
|
800c4d4: f2a8 4813 subw r8, r8, #1043 ; 0x413
|
|
800c4d8: fa22 f808 lsr.w r8, r2, r8
|
|
800c4dc: ea18 0f00 tst.w r8, r0
|
|
800c4e0: d0f2 beq.n 800c4c8 <floor+0x98>
|
|
800c4e2: a311 add r3, pc, #68 ; (adr r3, 800c528 <floor+0xf8>)
|
|
800c4e4: e9d3 2300 ldrd r2, r3, [r3]
|
|
800c4e8: f7f3 fe38 bl 800015c <__adddf3>
|
|
800c4ec: 2200 movs r2, #0
|
|
800c4ee: 2300 movs r3, #0
|
|
800c4f0: f7f4 fa7a bl 80009e8 <__aeabi_dcmpgt>
|
|
800c4f4: 2800 cmp r0, #0
|
|
800c4f6: d0bd beq.n 800c474 <floor+0x44>
|
|
800c4f8: 2c00 cmp r4, #0
|
|
800c4fa: da02 bge.n 800c502 <floor+0xd2>
|
|
800c4fc: 2e14 cmp r6, #20
|
|
800c4fe: d103 bne.n 800c508 <floor+0xd8>
|
|
800c500: 3401 adds r4, #1
|
|
800c502: ea25 0508 bic.w r5, r5, r8
|
|
800c506: e7b5 b.n 800c474 <floor+0x44>
|
|
800c508: 2301 movs r3, #1
|
|
800c50a: f1c6 0634 rsb r6, r6, #52 ; 0x34
|
|
800c50e: fa03 f606 lsl.w r6, r3, r6
|
|
800c512: 4435 add r5, r6
|
|
800c514: 42bd cmp r5, r7
|
|
800c516: bf38 it cc
|
|
800c518: 18e4 addcc r4, r4, r3
|
|
800c51a: e7f2 b.n 800c502 <floor+0xd2>
|
|
800c51c: 2500 movs r5, #0
|
|
800c51e: 462c mov r4, r5
|
|
800c520: e7a8 b.n 800c474 <floor+0x44>
|
|
800c522: bf00 nop
|
|
800c524: f3af 8000 nop.w
|
|
800c528: 8800759c .word 0x8800759c
|
|
800c52c: 7e37e43c .word 0x7e37e43c
|
|
800c530: bff00000 .word 0xbff00000
|
|
800c534: 000fffff .word 0x000fffff
|
|
|
|
0800c538 <scalbn>:
|
|
800c538: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
800c53a: 4616 mov r6, r2
|
|
800c53c: f3c1 520a ubfx r2, r1, #20, #11
|
|
800c540: 4604 mov r4, r0
|
|
800c542: 460d mov r5, r1
|
|
800c544: 460b mov r3, r1
|
|
800c546: b982 cbnz r2, 800c56a <scalbn+0x32>
|
|
800c548: f021 4300 bic.w r3, r1, #2147483648 ; 0x80000000
|
|
800c54c: 4303 orrs r3, r0
|
|
800c54e: d034 beq.n 800c5ba <scalbn+0x82>
|
|
800c550: 4b2d ldr r3, [pc, #180] ; (800c608 <scalbn+0xd0>)
|
|
800c552: 2200 movs r2, #0
|
|
800c554: f7f3 ffb8 bl 80004c8 <__aeabi_dmul>
|
|
800c558: 4b2c ldr r3, [pc, #176] ; (800c60c <scalbn+0xd4>)
|
|
800c55a: 4604 mov r4, r0
|
|
800c55c: 429e cmp r6, r3
|
|
800c55e: 460d mov r5, r1
|
|
800c560: da0d bge.n 800c57e <scalbn+0x46>
|
|
800c562: a325 add r3, pc, #148 ; (adr r3, 800c5f8 <scalbn+0xc0>)
|
|
800c564: e9d3 2300 ldrd r2, r3, [r3]
|
|
800c568: e01c b.n 800c5a4 <scalbn+0x6c>
|
|
800c56a: f240 77ff movw r7, #2047 ; 0x7ff
|
|
800c56e: 42ba cmp r2, r7
|
|
800c570: d109 bne.n 800c586 <scalbn+0x4e>
|
|
800c572: 4602 mov r2, r0
|
|
800c574: f7f3 fdf2 bl 800015c <__adddf3>
|
|
800c578: 4604 mov r4, r0
|
|
800c57a: 460d mov r5, r1
|
|
800c57c: e01d b.n 800c5ba <scalbn+0x82>
|
|
800c57e: 460b mov r3, r1
|
|
800c580: f3c1 520a ubfx r2, r1, #20, #11
|
|
800c584: 3a36 subs r2, #54 ; 0x36
|
|
800c586: f240 71fe movw r1, #2046 ; 0x7fe
|
|
800c58a: 4432 add r2, r6
|
|
800c58c: 428a cmp r2, r1
|
|
800c58e: dd0c ble.n 800c5aa <scalbn+0x72>
|
|
800c590: 4622 mov r2, r4
|
|
800c592: 462b mov r3, r5
|
|
800c594: a11a add r1, pc, #104 ; (adr r1, 800c600 <scalbn+0xc8>)
|
|
800c596: e9d1 0100 ldrd r0, r1, [r1]
|
|
800c59a: f000 f83b bl 800c614 <copysign>
|
|
800c59e: a318 add r3, pc, #96 ; (adr r3, 800c600 <scalbn+0xc8>)
|
|
800c5a0: e9d3 2300 ldrd r2, r3, [r3]
|
|
800c5a4: f7f3 ff90 bl 80004c8 <__aeabi_dmul>
|
|
800c5a8: e7e6 b.n 800c578 <scalbn+0x40>
|
|
800c5aa: 2a00 cmp r2, #0
|
|
800c5ac: dd08 ble.n 800c5c0 <scalbn+0x88>
|
|
800c5ae: f023 43ff bic.w r3, r3, #2139095040 ; 0x7f800000
|
|
800c5b2: f423 03e0 bic.w r3, r3, #7340032 ; 0x700000
|
|
800c5b6: ea43 5502 orr.w r5, r3, r2, lsl #20
|
|
800c5ba: 4620 mov r0, r4
|
|
800c5bc: 4629 mov r1, r5
|
|
800c5be: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
800c5c0: f112 0f35 cmn.w r2, #53 ; 0x35
|
|
800c5c4: da0b bge.n 800c5de <scalbn+0xa6>
|
|
800c5c6: f24c 3350 movw r3, #50000 ; 0xc350
|
|
800c5ca: 429e cmp r6, r3
|
|
800c5cc: 4622 mov r2, r4
|
|
800c5ce: 462b mov r3, r5
|
|
800c5d0: dce0 bgt.n 800c594 <scalbn+0x5c>
|
|
800c5d2: a109 add r1, pc, #36 ; (adr r1, 800c5f8 <scalbn+0xc0>)
|
|
800c5d4: e9d1 0100 ldrd r0, r1, [r1]
|
|
800c5d8: f000 f81c bl 800c614 <copysign>
|
|
800c5dc: e7c1 b.n 800c562 <scalbn+0x2a>
|
|
800c5de: f023 43ff bic.w r3, r3, #2139095040 ; 0x7f800000
|
|
800c5e2: 3236 adds r2, #54 ; 0x36
|
|
800c5e4: f423 03e0 bic.w r3, r3, #7340032 ; 0x700000
|
|
800c5e8: ea43 5502 orr.w r5, r3, r2, lsl #20
|
|
800c5ec: 4620 mov r0, r4
|
|
800c5ee: 4629 mov r1, r5
|
|
800c5f0: 2200 movs r2, #0
|
|
800c5f2: 4b07 ldr r3, [pc, #28] ; (800c610 <scalbn+0xd8>)
|
|
800c5f4: e7d6 b.n 800c5a4 <scalbn+0x6c>
|
|
800c5f6: bf00 nop
|
|
800c5f8: c2f8f359 .word 0xc2f8f359
|
|
800c5fc: 01a56e1f .word 0x01a56e1f
|
|
800c600: 8800759c .word 0x8800759c
|
|
800c604: 7e37e43c .word 0x7e37e43c
|
|
800c608: 43500000 .word 0x43500000
|
|
800c60c: ffff3cb0 .word 0xffff3cb0
|
|
800c610: 3c900000 .word 0x3c900000
|
|
|
|
0800c614 <copysign>:
|
|
800c614: b530 push {r4, r5, lr}
|
|
800c616: f021 4200 bic.w r2, r1, #2147483648 ; 0x80000000
|
|
800c61a: f003 4300 and.w r3, r3, #2147483648 ; 0x80000000
|
|
800c61e: ea42 0503 orr.w r5, r2, r3
|
|
800c622: 4629 mov r1, r5
|
|
800c624: bd30 pop {r4, r5, pc}
|
|
...
|
|
|
|
0800c628 <_init>:
|
|
800c628: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
800c62a: bf00 nop
|
|
800c62c: bcf8 pop {r3, r4, r5, r6, r7}
|
|
800c62e: bc08 pop {r3}
|
|
800c630: 469e mov lr, r3
|
|
800c632: 4770 bx lr
|
|
|
|
0800c634 <_fini>:
|
|
800c634: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
800c636: bf00 nop
|
|
800c638: bcf8 pop {r3, r4, r5, r6, r7}
|
|
800c63a: bc08 pop {r3}
|
|
800c63c: 469e mov lr, r3
|
|
800c63e: 4770 bx lr
|